/** **************************************************************************************** * @brief Read n byte data form i2c device * @param[in] saddr slave device address(7bits, without R/W bit) * @param[in] reg_addr device register address * @param[in] buffer Pointer to read data buffer * @param[in] len read data length * @description * Read n byte data from slave device, read start address is 16 bits and the data will be * stored in buffer, n is the specified length ***************************************************************************************** */ void I2C_nBYTE_READ2(uint8_t saddr, uint16_t reg_addr, uint8_t *buffer, uint16_t len) { uint32_t i; //Store environment parameters i2c_env.i2cOpFsm = I2C_OP_IDLE; i2c_env.i2cIndex = 0; i2c_env.i2cTxCount = 2; i2c_env.i2cRxCount = len; i2c_env.i2cBuffer[0] = (reg_addr >> 8) & 0xFF; i2c_env.i2cBuffer[1] = reg_addr & 0xFF; for (i = 0; i < len; i++) { i2c_env.i2cBuffer[i2c_env.i2cTxCount + i] = 0; // clear result buffer } #if I2C_CALLBACK_EN==TRUE i2c_env.callback = NULL; #endif i2c_read(saddr); for (i = 0; i < len; i++) { buffer[i] = i2c_env.i2cBuffer[i2c_env.i2cTxCount + i]; } }
static int w83782d_hwmon_init(void) { u8 buf; if (i2c_read(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG, 1, &buf, 1)) return -1; i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG, 0x80); i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BANK_SEL, 0); i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_ADCCLK, 0x40); buf = i2c_reg_read(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BEEP_CTRL); i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BEEP_CTRL, buf | 0x80); i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BEEP_CTRL2, 0); i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_PWMOUT1, 0x47); i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_VBAT, 0x01); buf = i2c_reg_read(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG); i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG, (buf & 0xf4) | 0x01); return 0; }
unsigned int8 RTCRead(unsigned int8 address) { int1 nack; unsigned int8 value = 0; i2c_start(); nack = i2c_write(PCF8583_WRITE); if (nack) { i2c_stop(); printf("rtcread nack 1\n\r"); } else { nack = i2c_write(address); if (!nack) { i2c_start(); nack = i2c_write(PCF8583_READ); if (!nack) { value = i2c_read(); } else printf("rtcread nack 3\n\r"); } else printf("rtcread nack 2\n\r"); i2c_stop(); } return value; }
int main(void) { volatile uint8_t data; NRF_TWIM0->PSEL.SCL = PIN_SCL; NRF_TWIM0->PSEL.SDA = PIN_SDA; NRF_TWIM0->ADDRESS = DEVICE_ADDRESS; NRF_TWIM0->FREQUENCY = TWIM_FREQUENCY_FREQUENCY_K400 << TWIM_FREQUENCY_FREQUENCY_Pos; NRF_TWIM0->SHORTS = 0; NRF_TWIM0->ENABLE = TWIM_ENABLE_ENABLE_Enabled << TWIM_ENABLE_ENABLE_Pos; i2c_write(0x0, 0xFF); data = i2c_read(0x0); data; // to get rid of set but unused warning while (1) { __WFE(); } }
/***************************************************************************//** * @brief Reads the value of a register. * * @param dev - The device structure. * @param register_address - Address of the register. * @param bytes_number - Number of bytes. * * @return registerValue - Value of the register. *******************************************************************************/ uint32_t ad5933_get_register_value(struct ad5933_dev *dev, uint8_t register_address, uint8_t bytes_number) { uint32_t register_value = 0; uint8_t byte = 0; uint8_t write_data[2] = {0, 0}; uint8_t read_data[2] = {0, 0}; for(byte = 0; byte < bytes_number; byte ++) { /* Set the register pointer. */ write_data[0] = AD5933_ADDR_POINTER; write_data[1] = register_address + byte; i2c_write(dev->i2c_desc, write_data, 2, 1); /* Read Register Data. */ read_data[0] = 0xFF; i2c_read(dev->i2c_desc, read_data, 1, 1); register_value = register_value << 8; register_value += read_data[0]; } return register_value; }
static int tps6586x_read(int reg) { int i; uchar data; int retval = -1; for (i = 0; i < MAX_I2C_RETRY; ++i) { if (!i2c_read(tps6586x_dev, reg, &data, 1)) { retval = (int)data; goto exit; } /* i2c access failed, retry */ udelay(100); } exit: debug("pmu_read %x=%x\n", reg, retval); if (retval < 0) debug("%s: failed to read register %#x: %d\n", __func__, reg, retval); return retval; }
uint8_t i2c_ReadBuffer(uint8_t nAddress, uint8_t *pByte, uint8_t nBufSize, uint8_t *pLen) { uint8_t stat = 0; *pLen = 0; stat = i2c_start( nAddress, TW_READ ); while (!stat && nBufSize) { stat = i2c_read( pByte, nBufSize != 1 ); if ( !stat || stat == TW_MR_DATA_NACK) { nBufSize--; pByte++; (*pLen)++; stat = 0; } } i2c_stop(); return stat; }
// Read address uint8_t LED_readReg( uint8_t bus, uint8_t addr, uint8_t reg, uint8_t page ) { /* info_msg("I2C Read Bus: "); printHex( bus ); print(" Addr: "); printHex( addr ); print(" Reg: "); printHex( reg ); print(" Page: "); printHex( page ); print( NL ); */ #if ISSI_Chip_31FL3731_define == 1 || ISSI_Chip_31FL3732_define == 1 // Software shutdown must be enabled to read registers LED_writeReg( bus, addr, 0x0A, 0x00, ISSI_ConfigPage ); #endif // Setup page LED_setupPage( bus, addr, page ); // Register Read Command uint16_t regReadCmd[] = { addr, reg, I2C_RESTART, addr | 0x1, I2C_READ }; uint8_t recv_data; // Request single register byte while ( i2c_read( bus, regReadCmd, sizeof( regReadCmd ) / 2, &recv_data ) == -1 ) delay_us( ISSI_SendDelay ); #if ISSI_Chip_31FL3731_define == 1 || ISSI_Chip_31FL3732_define == 1 // Disable software shutdown LED_writeReg( bus, addr, 0x0A, 0x01, ISSI_ConfigPage ); #endif return recv_data; }
bool I2C_MultipleRead(alt_u32 clk_base, alt_u32 data_base, alt_8 DeviceAddr, alt_u8 szData[], alt_u16 len){ int i; bool bSuccess = TRUE; //alt_u8 DeviceAddr, alt_u8 ControlAddr = 0; // device id //DeviceAddr = HMB_E2_I2C_ID; i2c_start(clk_base, data_base); if (!i2c_write(clk_base, data_base, DeviceAddr)){ // send ID bSuccess = FALSE; I2C_DEBUG(("I2C HMB_E2 Fail: Address NACK!\n")); } if (bSuccess && !i2c_write(clk_base, data_base, ControlAddr)){ // send sub-address bSuccess = FALSE; I2C_DEBUG(("I2C HMB_E2 Fail: SubAddress NACK!\n")); } if (bSuccess) i2c_start(clk_base, data_base); // restart DeviceAddr |= 1; // Read if (bSuccess && !i2c_write(clk_base, data_base, DeviceAddr)){ // send id bSuccess = FALSE; I2C_DEBUG(("I2C HMB_E2 Fail: Address+1 NACK!\n")); } if (bSuccess){ for(i=0;i<len && bSuccess;i++){ i2c_read(clk_base, data_base, &szData[i], (i==(len-1))?FALSE:TRUE); // read } } i2c_stop(clk_base, data_base); return bSuccess; }
int altitude_changes_lookup(i2c_can_trans_t* trans, long* nextAlt) { short i; char dataBuf[8]; char plop=0x00; short test; unsigned char hasChanged; unsigned int oldPosition; unsigned int newPosition; int difference; hasChanged=0; i2c_write(trans->i2cNodes[0].nodeAddr, &plop, 1); test=i2c_read(trans->i2cNodes[0].nodeAddr, dataBuf, trans->i2cNodes[0].dataLength); if(test != 0) { // If there is no new value, copy the old one. memcpy(dataBuf, trans->oldData, trans->i2cNodes[0].dataLength); } hasChanged = memcmp(dataBuf, trans->oldData, trans->dataLength); if(hasChanged!=0){ // printf("has changed = %d \nread new value= 0x%4x\n",hasChanged,*(unsigned int*)dataBuf); oldPosition=((unsigned int)(trans->oldData[1])&0x00FF)|(((unsigned int)(trans->oldData[0])<<8)&0xFF00); newPosition=((unsigned int)(dataBuf[1])&0x00FF)|(((unsigned int)(dataBuf[0])<<8)&0xFF00); difference=newPosition-oldPosition; *nextAlt=*nextAlt+((long)(30.4799*difference)); if(*nextAlt<0) *nextAlt=0; printf("\naltitude=%lu\n", (*nextAlt)*3.28084); } memcpy(trans->oldData, dataBuf, trans->dataLength); return (hasChanged != 0 ? 0 : -1); }
int16_t ds1338_ram_read(uint16_t addr,uint8_t * data,int16_t len) { if(addr >= DS1338_RAM_SIZE || len < 0) { return -1; } int16_t ret = 0; if(addr + len > DS1338_RAM_SIZE) { len = DS1338_RAM_SIZE - addr; ret = len; } addr = DS1338_RAM_OFFSET + (addr); uint8_t a = (uint8_t)(addr&0xff); i2c_write(DS1338_I2C_ADDR,&a,1); i2c_read(DS1338_I2C_ADDR,data,len); return ret; }
int I2C_DATA_READ(uint8_t saddr,uint8_t *buffer, uint16_t len) { int ret = 0; uint32_t i; //Store environment parameters i2c_env.i2cOpFsm = I2C_OP_IDLE; i2c_env.i2cIndex = 0; i2c_env.i2cTxCount = 0; i2c_env.i2cRxCount = len; //i2c_env.i2cBuffer[0] = reg_addr; for (i = 0; i < len; i++) { i2c_env.i2cBuffer[i2c_env.i2cTxCount + i] = 0; // clear result buffer } #if I2C_CALLBACK_EN==TRUE i2c_env.callback = NULL; #endif ret = i2c_read(saddr); for (i = 0; i < len; i++) { buffer[i] = i2c_env.i2cBuffer[i2c_env.i2cTxCount + i]; } return ret; }
static u32 omap5evm_get_board_rev(void) { u32 ret = 0; hal_i2c i2c_id = HAL_I2C1; u32 clk32; u16 slave; u16 reg_addr; u16 cmd[7]; ret = i2c_init(i2c_id); if (ret != 0) { printf("Failed to init I2C-%d\n", i2c_id); return ret; } slave = 0x50; reg_addr = 0x8; cmd[0] = (reg_addr & 0xFF); clk32 = readl(CLK32K_COUNTER_REGISTER); ret = i2c_read(i2c_id, slave, 12, &cmd[0], clk32, 0xFF); if (ret != 0) { printf("I2C read failed, ret = %d\n", ret); return ret; } ret = i2c_close(i2c_id); if (ret != 0) { printf("i2c close for bus %d failed, ret = %d\n", i2c_id, ret); return ret; } ret = crc_board_rev((u8 *) cmd); return ret; }
int cmd_i2cread(int ac, char *av[]) { int i, len = 1; unsigned char addr[16] = { 0xa3, 0x02, 0x02, 0x02, 0x02, 0x02 }; unsigned char slave = 0xa3; unsigned char regoff = 0x02; unsigned char buf[16]; for (i = 0; i < ac; i++) printf("av[%d] : %s\n", i, av[i]); slave = strtoul(av[1], NULL, 0); printf("slave = %08x\n ", slave); if ((slave & 0x1) == 0) // Fix bad input slave = 0xa3; if (ac > 2) regoff = strtol(av[2], NULL, 0); printf("regoff = %08x\n", regoff); printf("%08x\n", i2c_read(slave, regoff)); return 0; }
/* * Routine: get_board_revision * Description: Returns the board revision */ int get_board_revision(void) { int revision; #ifdef CONFIG_DRIVER_OMAP34XX_I2C unsigned char data; /* board revisions <= R2410 connect 4030 irq_1 to gpio112 */ /* these boards should return a revision number of 0 */ /* the code below forces a 4030 RTC irq to ensure that gpio112 is low */ i2c_set_bus_num(TWL4030_I2C_BUS); data = 0x01; i2c_write(0x4B, 0x29, 1, &data, 1); data = 0x0c; i2c_write(0x4B, 0x2b, 1, &data, 1); i2c_read(0x4B, 0x2a, 1, &data, 1); #endif if (!gpio_request(112, "") && !gpio_request(113, "") && !gpio_request(115, "")) { gpio_direction_input(112); gpio_direction_input(113); gpio_direction_input(115); revision = gpio_get_value(115) << 2 | gpio_get_value(113) << 1 | gpio_get_value(112); } else { puts("Error: unable to acquire board revision GPIOs\n"); revision = -1; } return revision; }
static int bq2425x_getreg8(FAR struct bq2425x_dev_s *priv, uint8_t regaddr, FAR uint8_t *regval) { struct i2c_config_s config; uint8_t val; int ret; /* Set up the I2C configuration */ config.frequency = priv->frequency; config.address = priv->addr; config.addrlen = 7; /* Write the register address */ ret = i2c_write(priv->i2c, &config, ®addr, 1); if (ret < 0) { batdbg("i2c_write failed: %d\n", ret); return ret; } /* Restart and read 8-bits from the register */ ret = i2c_read(priv->i2c, &config, &val, 1); if (ret < 0) { batdbg("i2c_read failed: %d\n", ret); return ret; } /* Copy 8-bit value to be returned */ *regval = val; return OK; }
/* * Modify masked bits in register */ static int tca642x_reg_write(uchar chip, uint8_t addr, uint8_t reg_bit, uint8_t data) { uint8_t valw; int org_bus_num; int ret; org_bus_num = i2c_get_bus_num(); i2c_set_bus_num(CONFIG_SYS_I2C_TCA642X_BUS_NUM); if (i2c_read(chip, addr, 1, (uint8_t *)&valw, 1)) { printf("Could not read before writing\n"); ret = -1; goto error; } valw &= ~reg_bit; valw |= data; ret = i2c_write(chip, addr, 1, (u8 *)&valw, 1); error: i2c_set_bus_num(org_bus_num); return ret; }
int platform_i2c_transfer(unsigned bus, struct i2c_seg *segments, int seg_count) { struct i2c_seg *seg = segments; int ret = 0; if (i2c_init(bus)) return 1; while (!ret && seg_count--) { if (seg->read) ret = i2c_read(bus, seg->chip, seg->buf, seg->len); else ret = i2c_write(bus, seg->chip, seg->buf, seg->len, (seg_count ? 0 : 1)); seg++; } if (ret) { qup_set_state(bus, QUP_STATE_RESET); return 1; } return 0; }
static void send_command_to_pic(const unsigned char in, unsigned char* out, const unsigned int length) { /* Disable GIO0 interrupt */ IO_INTC_EINT1 &= ~INTR_EINT1_EXT0; /* Clear EXT0 interrupt */ IO_INTC_IRQ1 = INTR_IRQ1_EXT0; /* Write command to I²C */ restart: i2c_write(PIC_ADR, &in, 1); /* Wait for PIC */ int i = 0; while(!(IO_INTC_IRQ1 & INTR_IRQ1_EXT0)) { sleep(0); i++; if(i > 50) goto restart; } /* Read return from I²C */ i2c_read(PIC_ADR, out, length); /* Re-enable GIO0 interrupt */ IO_INTC_EINT1 |= INTR_EINT1_EXT0; }
void read_1307() { // set read address i2c_start(); i2c_write(0b11010000); i2c_write(0x0); i2c_stop(); // read first 8 bytes of eprom i2c_start(); i2c_write(0b11010001); i2c_read(); i2c_read(); i2c_read(); i2c_read(); i2c_read(); i2c_read(); i2c_read(); i2c_read_with_nack(); i2c_stop(); }
void GyroReadData(int *gyroX, int *gyroY, int *gyroZ) { i2c_write(GYRO_SLAVE_ADDRESS, 0x1D); gyroX = i2c_read(GYRO_SLAVE_ADDRESS); i2c_write(GYRO_SLAVE_ADDRESS, 0x1E); gyroX = (gyroX<<8)|i2c_read(GYRO_SLAVE_ADDRESS); i2c_write(GYRO_SLAVE_ADDRESS, 0x1F); gyroY = i2c_read(GYRO_SLAVE_ADDRESS); i2c_write(GYRO_SLAVE_ADDRESS, 0x20); gyroY = (gyroY<<8)|i2c_read(GYRO_SLAVE_ADDRESS); i2c_write(GYRO_SLAVE_ADDRESS, 0x21); gyroZ = i2c_read(GYRO_SLAVE_ADDRESS); i2c_write(GYRO_SLAVE_ADDRESS, 0x22); gyroZ = (gyroZ<<8)|i2c_read(GYRO_SLAVE_ADDRESS); }
/** * Initialization */ void Battery_Init(void) { int iErr; byte b; // Note: NOP() is used for testing only. iErr = i2c_read(SLAVE_ADDR_BATTERY, CMD_STATUS1_REG, 1, &b); NOP(); // Should be 0x7F (reads 0xE1 but probably ok) iErr = i2c_read(SLAVE_ADDR_BATTERY, 0x0, 1, &b); NOP(); // Should be 0x63 iErr = i2c_read(SLAVE_ADDR_BATTERY, 0x1, 1, &b); NOP(); // Should be 0x10 iErr = i2c_read(SLAVE_ADDR_BATTERY, 0x2, 1, &b); NOP(); // Should be 0x07 (ok for 10kOhm NTC) iErr = i2c_read(SLAVE_ADDR_BATTERY, 0x3, 1, &b); // Should be 0x8A iErr = i2c_read(SLAVE_ADDR_BATTERY, 0x4, 1, &b); m_isAlive = (bool)(iErr == 0x0); }
static int setup_pmic_voltages(void) { unsigned char value, rev_id = 0; i2c_set_bus_num(CONFIG_PMIC_I2C_BUS); i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_PMIC_I2C_SLAVE); if (!i2c_probe(CONFIG_PMIC_I2C_SLAVE)) { if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE100_DEVICEID, 1, &value, 1)) { printf("Read device ID error!\n"); return -1; } if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE100_REVID, 1, &rev_id, 1)) { printf("Read Rev ID error!\n"); return -1; } printf("Found PFUZE100! deviceid 0x%x, revid 0x%x\n", value, rev_id); if (setup_pmic_mode(value & 0xf)) { printf("setup pmic mode error!\n"); return -1; } /* set SW1AB standby volatage 0.975V */ if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1ABSTBY, 1, &value, 1)) { printf("Read SW1ABSTBY error!\n"); return -1; } value &= ~0x3f; value |= PFUZE100_SW1ABC_SETP(9750); if (i2c_write(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1ABSTBY, 1, &value, 1)) { printf("Set SW1ABSTBY error!\n"); return -1; } /* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */ if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1ABCONF, 1, &value, 1)) { printf("Read SW1ABCONFIG error!\n"); return -1; } value &= ~0xc0; value |= 0x40; if (i2c_write(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1ABCONF, 1, &value, 1)) { printf("Set SW1ABCONFIG error!\n"); return -1; } /* set SW1C standby volatage 0.975V */ if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1CSTBY, 1, &value, 1)) { printf("Read SW1CSTBY error!\n"); return -1; } value &= ~0x3f; value |= PFUZE100_SW1ABC_SETP(9750); if (i2c_write(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1CSTBY, 1, &value, 1)) { printf("Set SW1CSTBY error!\n"); return -1; } /* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */ if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1CCONF, 1, &value, 1)) { printf("Read SW1CCONFIG error!\n"); return -1; } value &= ~0xc0; value |= 0x40; if (i2c_write(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1CCONF, 1, &value, 1)) { printf("Set SW1CCONFIG error!\n"); return -1; } /* Enable power of VGEN5 3V3, needed for SD3 */ if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE100_VGEN5CTL, 1, &value, 1)) { printf("Read VGEN5CTL error!\n"); return -1; } value &= ~0x1F; value |= 0x1F; if (i2c_write(CONFIG_PMIC_I2C_SLAVE, PFUZE100_VGEN5CTL, 1, &value, 1)) { printf("Set VGEN5CTL error!\n"); return -1; } } return 0; }
/* * Handle our "Vendor Extension" commands on endpoint 0. * If we handle this one, return non-zero. */ unsigned char app_vendor_cmd (void) { OEE = 0x0f; IOE = 0x04; IOE = 0x01; // pulse two I/O pins if (bRequestType == VRT_VENDOR_IN){ ///////////////////////////////// // handle the IN requests ///////////////////////////////// switch (bRequest){ case VRQ_GET_STATUS: switch (wIndexL){ case GS_TX_UNDERRUN: EP0BUF[0] = g_tx_underrun; g_tx_underrun = 0; EP0BCH = 0; EP0BCL = 1; break; case GS_RX_OVERRUN: EP0BUF[0] = g_rx_overrun; g_rx_overrun = 0; EP0BCH = 0; EP0BCL = 1; break; default: return 0; } break; case VRQ_I2C_READ: if (!i2c_read (wValueL, EP0BUF, wLengthL)) return 0; EP0BCH = 0; EP0BCL = wLengthL; break; case VRQ_SPI_READ: if (!spi_read (wValueH, wValueL, wIndexH, wIndexL, EP0BUF, wLengthL)) return 0; EP0BCH = 0; EP0BCL = wLengthL; break; case VRQ_JTAG_RW: *EP0BUF = fpga_rxtx(wValueL); EP0BCH = 0; EP0BCL = 1; break; default: return 0; } } else if (bRequestType == VRT_VENDOR_OUT){ ///////////////////////////////// // handle the OUT requests ///////////////////////////////// switch (bRequest){ case VRQ_SET_LED: switch (wIndexL){ case 0: set_led_0 (wValueL); break; case 1: set_led_1 (wValueL); break; default: return 0; } break; case VRQ_FPGA_LOAD: switch (wIndexL){ // sub-command case FL_BEGIN: return fpga_load_begin (); case FL_XFER: get_ep0_data (); return fpga_load_xfer (EP0BUF, EP0BCL); case FL_END: return fpga_load_end (); case FL_END_SHUTDOWN: return fpga_load_end_shutdown (); case FL_TX: get_ep0_data (); return fpga_tx (EP0BUF); case FL_INIT: initialize_jtag(); return 1; default: return 0; } break; case VRQ_FPGA_SET_RESET: fpga_set_reset (wValueL); break; case VRQ_FPGA_SET_TX_ENABLE: fpga_set_tx_enable (wValueL); break; case VRQ_FPGA_SET_RX_ENABLE: fpga_set_rx_enable (wValueL); break; case VRQ_FPGA_SET_TX_RESET: fpga_set_tx_reset (wValueL); break; case VRQ_FPGA_SET_RX_RESET: fpga_set_rx_reset (wValueL); break; case VRQ_I2C_WRITE: get_ep0_data (); if (!i2c_write (wValueL, EP0BUF, EP0BCL)) return 0; break; case VRQ_SPI_WRITE: get_ep0_data (); if (!spi_write (wValueH, wValueL, wIndexH, wIndexL, EP0BUF, EP0BCL)) return 0; break; default: return 0; } } else return 0; // invalid bRequestType return 1; }
static int i2c_soft_rbuf(uchar chip, uint addr, int alen, uchar *buf, int len) { return i2c_read(chip, addr, alen, buf, len); }
void GIO0(void) { /* Mask GIO0 interrupt */ IO_INTC_IRQ1 = INTR_IRQ1_EXT0; unsigned char msg[4]; i2c_read(PIC_ADR, msg, sizeof(msg)); tick_diff = current_tick - last_tick; last_tick = current_tick; unsigned short btn_press = le2short(msg); if(tick_diff >= TICK_MIN && tick_diff <= TICK_MAX) { /* Ignore this, as it is a hold event */ return; } last_btn = btn_press; switch(btn_press) { map_button(BTN_LEFT, BUTTON_LEFT); map_button(BTN_RIGHT, BUTTON_RIGHT); map_button(BTN_BACK, BUTTON_BACK); map_button(BTN_CUSTOM, BUTTON_CUSTOM); map_button(BTN_MENU, BUTTON_MENU); map_button(BTN_PLAY, BUTTON_PLAY); map_button(BTN_POWER, BUTTON_POWER); map_button(BTN_TOUCHPAD_PRESS, BUTTON_SELECT); map_button(BTN_TOUCHPAD_CORNER_DOWN, BUTTON_DOWN); map_button(BTN_TOUCHPAD_CORNER_UP, BUTTON_UP); #ifndef ZEN_VISION /* These don't seem to work for some reason on the Zen Vision.. */ case BTN_TOUCHPAD_SCROLL_DOWN: btn = BUTTON_DOWN; break; case BTN_TOUCHPAD_SCROLL_UP: btn = BUTTON_UP; break; #endif case BTN_HOLD: hold_switch = true; break; case BTN_UNHOLD: hold_switch = false; break; #ifndef ZEN_VISION /* These don't seem to work for some reason.. */ case HEADPHONE_PLUGIN_A: case HEADPHONE_PLUGIN_B: nonbtn |= NONBUTTON_HEADPHONE; break; case HEADPHONE_UNPLUG_A: case HEADPHONE_UNPLUG_B: nonbtn &= ~NONBUTTON_HEADPHONE; break; #endif case DOCK_INSERT: nonbtn |= NONBUTTON_DOCK; break; case DOCK_UNPLUG: nonbtn &= ~(NONBUTTON_DOCK | NONBUTTON_USB | NONBUTTON_POWER); break; case DOCK_USB_INSERT: nonbtn |= NONBUTTON_USB; break; case DOCK_USB_UNPLUG: nonbtn &= ~NONBUTTON_USB; break; case DOCK_POWER_INSERT: nonbtn |= NONBUTTON_POWER; break; case DOCK_POWER_UNPLUG: nonbtn &= ~NONBUTTON_POWER; break; } #ifdef BUTTON_DEBUG unsigned char weergvn[10]; #ifdef BOOTLOADER lcd_set_foreground((sw ? LCD_RGBPACK(255,0,0) : LCD_RGBPACK(0,255,0) )); #endif snprintf(weergvn, sizeof(char)*10, "%x", (unsigned int)((msg[3] << 24) | (msg[2] << 16) | (msg[1] << 8) | msg[0])); lcd_putsxy(LCD_WIDTH-SYSFONT_WIDTH*10, LCD_HEIGHT-SYSFONT_HEIGHT*10, weergvn); snprintf(weergvn, sizeof(char)*10, "%x", btn); lcd_putsxy(LCD_WIDTH-SYSFONT_WIDTH*10, LCD_HEIGHT-SYSFONT_HEIGHT*7, weergvn); #ifdef BOOTLOADER lcd_set_foreground(LCD_BLACK); #endif lcd_update(); sw = !sw; #endif logf("PIC: 0x%x", (unsigned int)((msg[3] << 24) | (msg[2] << 16) | (msg[1] << 8) | msg[0])); }
static int run_prd_daemon(struct opal_prd_ctx *ctx) { int rc; /* log to syslog */ pr_log_daemon_init(); ctx->fd = -1; ctx->socket = -1; i2c_init(); #ifdef DEBUG_I2C { uint8_t foo[128]; int i; rc = i2c_read(0, 1, 2, 0x50, 2, 0x10, 128, foo); pr_debug("I2C: read rc: %d", rc); for (i = 0; i < sizeof(foo); i += 8) { pr_debug("I2C: %02x %02x %02x %02x %02x %02x %02x %02x", foo[i + 0], foo[i + 1], foo[i + 2], foo[i + 3], foo[i + 4], foo[i + 5], foo[i + 6], foo[i + 7]); } } #endif rc = init_control_socket(ctx); if (rc) { pr_log(LOG_WARNING, "CTRL: Error initialising PRD control: %m"); goto out_close; } rc = prd_init(ctx); if (rc) { pr_log(LOG_ERR, "FW: Error initialising PRD channel"); goto out_close; } if (ctx->hbrt_file_name) { rc = map_hbrt_file(ctx, ctx->hbrt_file_name); if (rc) { pr_log(LOG_ERR, "IMAGE: Can't access hbrt file %s", ctx->hbrt_file_name); goto out_close; } } else { rc = map_hbrt_physmem(ctx, hbrt_code_region_name); if (rc) { pr_log(LOG_ERR, "IMAGE: Can't access hbrt " "physical memory"); goto out_close; } dump_hbrt_map(ctx); } pr_debug("IMAGE: hbrt map at %p, size 0x%zx", ctx->code_addr, ctx->code_size); fixup_hinterface_table(); pr_debug("HBRT: calling hservices_init"); hservices_init(ctx, ctx->code_addr); pr_debug("HBRT: hservices_init done"); if (ctx->pnor.path) { rc = pnor_init(&ctx->pnor); if (rc) { pr_log(LOG_ERR, "PNOR: Failed to open pnor: %m"); goto out_close; } } ipmi_init(ctx); /* Test a scom */ if (ctx->debug) { uint64_t val; pr_debug("SCOM: trying scom read"); fflush(stdout); hservice_scom_read(0x00, 0xf000f, &val); pr_debug("SCOM: f00f: %lx", be64toh(val)); } run_attn_loop(ctx); rc = 0; out_close: pnor_close(&ctx->pnor); if (ctx->fd != -1) close(ctx->fd); if (ctx->socket != -1) close(ctx->socket); return rc; }
int pmu_read_multiple(int address, int count, unsigned char* buffer) { return i2c_read(0, 0xe6, address, count, buffer); }
static int setup_pmic_voltages(void) { unsigned char value, rev_id = 0; i2c_set_bus_num(CONFIG_PMIC_I2C_BUS); i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_PMIC_I2C_SLAVE); if (!i2c_probe(CONFIG_PMIC_I2C_SLAVE)) { if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE_DEVICEID, 1, &value, 1)) { printf("Read device ID error!\n"); return -1; } if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE_REVID, 1, &rev_id, 1)) { printf("Read Rev ID error!\n"); return -1; } printf("Found PFUZE300! deviceid 0x%x, revid 0x%x\n", value, rev_id); /* disable Low Power Mode during standby mode */ if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE_LDOGCTL, 1, &value, 1)) { printf("Read LDOCTL error!\n"); return -1; } value |= 0x1; if (i2c_write(CONFIG_PMIC_I2C_SLAVE, PFUZE_LDOGCTL, 1, &value, 1)) { printf("Set LDOCTL error!\n"); return -1; } /* SW1A/1B mode set to APS/APS */ value = 0x8; if (i2c_write(CONFIG_PMIC_I2C_SLAVE, PFUZE300_SW1AMODE, 1, &value, 1)) { printf("Set PFUZE300_SW1AMODE error!\n"); return -1; } if (i2c_write(CONFIG_PMIC_I2C_SLAVE, PFUZE300_SW1BMODE, 1, &value, 1)) { printf("Set PFUZE300_SW1BMODE error!\n"); return -1; } /* SW1A/1B standby voltage set to 1.025V */ value = 0xd; if (i2c_write(CONFIG_PMIC_I2C_SLAVE, PFUZE300_SW1ASTBY, 1, &value, 1)) { printf("Set PFUZE300_SW1ASTBY error!\n"); return -1; } if (i2c_write(CONFIG_PMIC_I2C_SLAVE, PFUZE300_SW1BSTBY, 1, &value, 1)) { printf("Set PFUZE300_SW1BSTBY error!\n"); return -1; } /* decrease SW1B normal voltage to 0.975V */ if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE300_SW1BVOLT, 1, &value, 1)) { printf("Read SW1BVOLT error!\n"); return -1; } value &= ~0x1f; value |= 0x0b; if (i2c_write(CONFIG_PMIC_I2C_SLAVE, PFUZE300_SW1BVOLT, 1, &value, 1)) { printf("Set SW1BVOLT error!\n"); return -1; } } return 0; }
static int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { const char *const fmt = "\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... "; #if defined(CONFIG_SYS_I2C_MULTI_EEPROMS) if (argc == 6) { ulong dev_addr = simple_strtoul (argv[2], NULL, 16); ulong addr = simple_strtoul (argv[3], NULL, 16); ulong off = simple_strtoul (argv[4], NULL, 16); ulong cnt = simple_strtoul (argv[5], NULL, 16); #else if (argc == 5) { ulong dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR; ulong addr = simple_strtoul (argv[2], NULL, 16); ulong off = simple_strtoul (argv[3], NULL, 16); ulong cnt = simple_strtoul (argv[4], NULL, 16); #endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */ # if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C) eeprom_init (); # endif /* !CONFIG_SPI */ if (strcmp (argv[1], "read") == 0) { int rcode; printf (fmt, dev_addr, argv[1], addr, off, cnt); rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt); puts ("done\n"); return rcode; } else if (strcmp (argv[1], "write") == 0) { int rcode; printf (fmt, dev_addr, argv[1], addr, off, cnt); rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt); puts ("done\n"); return rcode; } } return CMD_RET_USAGE; } #endif /*----------------------------------------------------------------------- * * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM. * * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is * 0x00000nxx for EEPROM address selectors and page number at n. */ #if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C) #if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1 || CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2 #error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2 #endif #endif int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt) { unsigned end = offset + cnt; unsigned blk_off; int rcode = 0; /* Read data until done or would cross a page boundary. * We must write the address again when changing pages * because the next page may be in a different device. */ while (offset < end) { unsigned alen, len; #if !defined(CONFIG_SYS_I2C_FRAM) unsigned maxlen; #endif #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X) uchar addr[2]; blk_off = offset & 0xFF; /* block offset */ addr[0] = offset >> 8; /* block number */ addr[1] = blk_off; /* block offset */ alen = 2; #else uchar addr[3]; blk_off = offset & 0xFF; /* block offset */ addr[0] = offset >> 16; /* block number */ addr[1] = offset >> 8; /* upper address octet */ addr[2] = blk_off; /* lower address octet */ alen = 3; #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */ addr[0] |= dev_addr; /* insert device address */ len = end - offset; /* * For a FRAM device there is no limit on the number of the * bytes that can be ccessed with the single read or write * operation. */ #if !defined(CONFIG_SYS_I2C_FRAM) maxlen = 0x100 - blk_off; if (maxlen > I2C_RXTX_LEN) maxlen = I2C_RXTX_LEN; if (len > maxlen) len = maxlen; #endif #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) spi_read (addr, alen, buffer, len); #else if (i2c_read(addr[0], offset, alen - 1, buffer, len)) rcode = 1; #endif buffer += len; offset += len; } return rcode; }