static int __devinit ispif_probe(struct platform_device *pdev)
{
int rc;
struct ispif_device *ispif;
ispif = kzalloc(sizeof(struct ispif_device), GFP_KERNEL);
if (!ispif) {
pr_err("%s: no enough memory\n", __func__);
return -ENOMEM;
}
v4l2_subdev_init(&ispif->msm_sd.sd, &msm_ispif_subdev_ops);
ispif->msm_sd.sd.internal_ops = &msm_ispif_internal_ops;
ispif->msm_sd.sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
snprintf(ispif->msm_sd.sd.name,
ARRAY_SIZE(ispif->msm_sd.sd.name), MSM_ISPIF_DRV_NAME);
v4l2_set_subdevdata(&ispif->msm_sd.sd, ispif);
platform_set_drvdata(pdev, &ispif->msm_sd.sd);
mutex_init(&ispif->mutex);
media_entity_init(&ispif->msm_sd.sd.entity, 0, NULL, 0);
ispif->msm_sd.sd.entity.type = MEDIA_ENT_T_V4L2_SUBDEV;
ispif->msm_sd.sd.entity.group_id = MSM_CAMERA_SUBDEV_ISPIF;
ispif->msm_sd.sd.entity.name = pdev->name;
ispif->msm_sd.close_seq = MSM_SD_CLOSE_1ST_CATEGORY | 0x1;
rc = msm_sd_register(&ispif->msm_sd);
if (rc) {
pr_err("%s: msm_sd_register error = %d\n", __func__, rc);
goto error_sd_register;
}
if (pdev->dev.of_node) {
of_property_read_u32((&pdev->dev)->of_node,
"cell-index", &pdev->id);
rc = of_property_read_u32((&pdev->dev)->of_node,
"qcom,num-isps", &ispif->hw_num_isps);
if (rc)
/* backward compatibility */
ispif->hw_num_isps = 1;
/* not an error condition */
rc = 0;
}
ispif->mem = platform_get_resource_byname(pdev,
IORESOURCE_MEM, "ispif");
if (!ispif->mem) {
pr_err("%s: no mem resource?\n", __func__);
rc = -ENODEV;
goto error;
}
ispif->irq = platform_get_resource_byname(pdev,
IORESOURCE_IRQ, "ispif");
if (!ispif->irq) {
pr_err("%s: no irq resource?\n", __func__);
rc = -ENODEV;
goto error;
}
ispif->io = request_mem_region(ispif->mem->start,
resource_size(ispif->mem), pdev->name);
if (!ispif->io) {
pr_err("%s: no valid mem region\n", __func__);
rc = -EBUSY;
goto error;
}
ispif->clk_mux_mem = platform_get_resource_byname(pdev,
IORESOURCE_MEM, "csi_clk_mux");
if (ispif->clk_mux_mem) {
ispif->clk_mux_io = request_mem_region(
ispif->clk_mux_mem->start,
resource_size(ispif->clk_mux_mem),
ispif->clk_mux_mem->name);
if (!ispif->clk_mux_io)
pr_err("%s: no valid csi_mux region\n", __func__);
}
ispif->pdev = pdev;
ispif->ispif_state = ISPIF_POWER_DOWN;
ispif->open_cnt = 0;
return 0;
error:
msm_sd_unregister(&ispif->msm_sd);
error_sd_register:
mutex_destroy(&ispif->mutex);
kfree(ispif);
return rc;
}
static int32_t msm_sensor_fill_eeprom_subdevid_by_name(
struct msm_sensor_ctrl_t *s_ctrl)
{
int32_t rc = 0;
const char *eeprom_name;
struct device_node *src_node = NULL;
uint32_t val = 0, count = 0, eeprom_name_len;
int i;
int32_t *eeprom_subdev_id;
struct msm_sensor_info_t *sensor_info;
struct device_node *of_node = s_ctrl->of_node;
const void *p;
if (!s_ctrl->sensordata->eeprom_name || !of_node)
return -EINVAL;
eeprom_name_len = strlen(s_ctrl->sensordata->eeprom_name);
if (eeprom_name_len >= MAX_SENSOR_NAME)
return -EINVAL;
sensor_info = s_ctrl->sensordata->sensor_info;
eeprom_subdev_id = &sensor_info->subdev_id[SUB_MODULE_EEPROM];
/*
* string for eeprom name is valid, set sudev id to -1
* and try to found new id
*/
*eeprom_subdev_id = -1;
if (0 == eeprom_name_len)
return 0;
CDBG("Try to find eeprom subdev for %s\n",
s_ctrl->sensordata->eeprom_name);
p = of_get_property(of_node, "qcom,eeprom-src", &count);
if (!p || !count)
return 0;
count /= sizeof(uint32_t);
for (i = 0; i < count; i++) {
eeprom_name = NULL;
src_node = of_parse_phandle(of_node, "qcom,eeprom-src", i);
if (!src_node) {
pr_err("eeprom src node NULL\n");
continue;
}
rc = of_property_read_string(src_node, "qcom,eeprom-name",
&eeprom_name);
if (rc < 0) {
pr_err("failed\n");
of_node_put(src_node);
continue;
}
if (strcmp(eeprom_name, s_ctrl->sensordata->eeprom_name))
continue;
rc = of_property_read_u32(src_node, "cell-index", &val);
CDBG("%s qcom,eeprom cell index %d, rc %d\n", __func__,
val, rc);
if (rc < 0) {
pr_err("failed\n");
of_node_put(src_node);
continue;
}
*eeprom_subdev_id = val;
CDBG("Done. Eeprom subdevice id is %d\n", val);
of_node_put(src_node);
src_node = NULL;
break;
}
return rc;
}
static int probe_vdd_rstr(struct device_node *node,
struct msm_thermal_data *data, struct platform_device *pdev)
{
int ret = 0;
int i = 0;
int arr_size;
char *key = NULL;
struct device_node *child_node = NULL;
rails = NULL;
key = "qcom,vdd-restriction-temp";
ret = of_property_read_u32(node, key, &data->vdd_rstr_temp_degC);
if (ret)
goto read_node_fail;
key = "qcom,vdd-restriction-temp-hysteresis";
ret = of_property_read_u32(node, key, &data->vdd_rstr_temp_hyst_degC);
if (ret)
goto read_node_fail;
for_each_child_of_node(node, child_node) {
rails_cnt++;
}
if (rails_cnt == 0)
goto read_node_fail;
if (rails_cnt >= MAX_RAILS) {
pr_err("%s: Too many rails.\n", __func__);
return -EFAULT;
}
rails = kzalloc(sizeof(struct rail) * rails_cnt,
GFP_KERNEL);
if (!rails) {
pr_err("%s: Fail to allocate memory for rails.\n", __func__);
return -ENOMEM;
}
i = 0;
for_each_child_of_node(node, child_node) {
key = "qcom,vdd-rstr-reg";
ret = of_property_read_string(child_node, key, &rails[i].name);
if (ret)
goto read_node_fail;
key = "qcom,levels";
if (!of_get_property(child_node, key, &arr_size))
goto read_node_fail;
rails[i].num_levels = arr_size/sizeof(__be32);
if (rails[i].num_levels >
sizeof(rails[i].levels)/sizeof(uint32_t)) {
pr_err("%s: Array size too large\n", __func__);
return -EFAULT;
}
ret = of_property_read_u32_array(child_node, key,
rails[i].levels, rails[i].num_levels);
if (ret)
goto read_node_fail;
key = "qcom,freq-req";
rails[i].freq_req = of_property_read_bool(child_node, key);
if (rails[i].freq_req)
rails[i].min_level = 0;
else {
key = "qcom,min-level";
ret = of_property_read_u32(child_node, key,
&rails[i].min_level);
if (ret)
goto read_node_fail;
}
rails[i].curr_level = -1;
rails[i].reg = NULL;
i++;
}
/*
* Translate OpenFirmware node properties into platform_data
*/
static int gpio_keys_get_devtree_pdata(struct device *dev,
struct gpio_keys_platform_data *pdata)
{
struct device_node *node, *pp;
int i;
struct gpio_keys_button *buttons;
u32 reg;
node = dev->of_node;
if (node == NULL)
return -ENODEV;
memset(pdata, 0, sizeof *pdata);
pdata->rep = !!of_get_property(node, "autorepeat", NULL);
pdata->name = of_get_property(node, "input-name", NULL);
/* First count the subnodes */
pdata->nbuttons = 0;
pp = NULL;
while ((pp = of_get_next_child(node, pp)))
pdata->nbuttons++;
if (pdata->nbuttons == 0)
return -ENODEV;
buttons = kzalloc(pdata->nbuttons * (sizeof *buttons), GFP_KERNEL);
if (!buttons)
return -ENOMEM;
pp = NULL;
i = 0;
while ((pp = of_get_next_child(node, pp))) {
enum of_gpio_flags flags;
if (!of_find_property(pp, "gpios", NULL)) {
pdata->nbuttons--;
dev_warn(dev, "Found button without gpios\n");
continue;
}
buttons[i].gpio = of_get_gpio_flags(pp, 0, &flags);
buttons[i].active_low = flags & OF_GPIO_ACTIVE_LOW;
if (of_property_read_u32(pp, "linux,code", ®)) {
dev_err(dev, "Button without keycode: 0x%x\n", buttons[i].gpio);
goto out_fail;
}
buttons[i].code = reg;
buttons[i].desc = of_get_property(pp, "label", NULL);
if (of_property_read_u32(pp, "linux,input-type", ®) == 0)
buttons[i].type = reg;
else
buttons[i].type = EV_KEY;
buttons[i].wakeup = !!of_get_property(pp, "gpio-key,wakeup", NULL);
if (of_property_read_u32(pp, "debounce-interval", ®) == 0)
buttons[i].debounce_interval = reg;
else
buttons[i].debounce_interval = 5;
i++;
}
pdata->buttons = buttons;
return 0;
out_fail:
kfree(buttons);
return -ENODEV;
}
static int imx6q_cpufreq_probe(struct platform_device *pdev)
{
struct device_node *np;
struct dev_pm_opp *opp;
unsigned long min_volt, max_volt;
int num, ret;
const struct property *prop;
const __be32 *val;
u32 nr, i, j;
cpu_dev = get_cpu_device(0);
if (!cpu_dev) {
pr_err("failed to get cpu0 device\n");
return -ENODEV;
}
np = of_node_get(cpu_dev->of_node);
if (!np) {
dev_err(cpu_dev, "failed to find cpu0 node\n");
return -ENOENT;
}
arm_clk = devm_clk_get(cpu_dev, "arm");
pll1_sys_clk = devm_clk_get(cpu_dev, "pll1_sys");
pll1_sw_clk = devm_clk_get(cpu_dev, "pll1_sw");
step_clk = devm_clk_get(cpu_dev, "step");
pll2_pfd2_396m_clk = devm_clk_get(cpu_dev, "pll2_pfd2_396m");
if (IS_ERR(arm_clk) || IS_ERR(pll1_sys_clk) || IS_ERR(pll1_sw_clk) ||
IS_ERR(step_clk) || IS_ERR(pll2_pfd2_396m_clk)) {
dev_err(cpu_dev, "failed to get clocks\n");
ret = -ENOENT;
goto put_node;
}
arm_reg = devm_regulator_get(cpu_dev, "arm");
pu_reg = devm_regulator_get(cpu_dev, "pu");
soc_reg = devm_regulator_get(cpu_dev, "soc");
if (IS_ERR(arm_reg) || IS_ERR(pu_reg) || IS_ERR(soc_reg)) {
dev_err(cpu_dev, "failed to get regulators\n");
ret = -ENOENT;
goto put_node;
}
/*
* We expect an OPP table supplied by platform.
* Just, incase the platform did not supply the OPP
* table, it will try to get it.
*/
num = dev_pm_opp_get_opp_count(cpu_dev);
if (num < 0) {
ret = of_init_opp_table(cpu_dev);
if (ret < 0) {
dev_err(cpu_dev, "failed to init OPP table: %d\n", ret);
goto put_node;
}
num = dev_pm_opp_get_opp_count(cpu_dev);
if (num < 0) {
ret = num;
dev_err(cpu_dev, "no OPP table is found: %d\n", ret);
goto put_node;
}
}
ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
if (ret) {
dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret);
goto put_node;
}
/* Make imx6_soc_volt array's size same as arm opp number */
imx6_soc_volt = devm_kzalloc(cpu_dev, sizeof(*imx6_soc_volt) * num, GFP_KERNEL);
if (imx6_soc_volt == NULL) {
ret = -ENOMEM;
goto free_freq_table;
}
prop = of_find_property(np, "fsl,soc-operating-points", NULL);
if (!prop || !prop->value)
goto soc_opp_out;
/*
* Each OPP is a set of tuples consisting of frequency and
* voltage like <freq-kHz vol-uV>.
*/
nr = prop->length / sizeof(u32);
if (nr % 2 || (nr / 2) < num)
goto soc_opp_out;
for (j = 0; j < num; j++) {
val = prop->value;
for (i = 0; i < nr / 2; i++) {
unsigned long freq = be32_to_cpup(val++);
unsigned long volt = be32_to_cpup(val++);
if (freq_table[j].frequency == freq) {
imx6_soc_volt[soc_opp_count++] = volt;
break;
}
}
}
soc_opp_out:
/* use fixed soc opp volt if no valid soc opp info found in dtb */
if (soc_opp_count != num) {
dev_warn(cpu_dev, "can NOT find valid fsl,soc-operating-points property in dtb, use default value!\n");
for (j = 0; j < num; j++)
imx6_soc_volt[j] = PU_SOC_VOLTAGE_NORMAL;
if (freq_table[num - 1].frequency * 1000 == FREQ_1P2_GHZ)
imx6_soc_volt[num - 1] = PU_SOC_VOLTAGE_HIGH;
}
if (of_property_read_u32(np, "clock-latency", &transition_latency))
transition_latency = CPUFREQ_ETERNAL;
/*
* Calculate the ramp time for max voltage change in the
* VDDSOC and VDDPU regulators.
*/
ret = regulator_set_voltage_time(soc_reg, imx6_soc_volt[0], imx6_soc_volt[num - 1]);
if (ret > 0)
transition_latency += ret * 1000;
ret = regulator_set_voltage_time(pu_reg, imx6_soc_volt[0], imx6_soc_volt[num - 1]);
if (ret > 0)
transition_latency += ret * 1000;
/*
* OPP is maintained in order of increasing frequency, and
* freq_table initialised from OPP is therefore sorted in the
* same order.
*/
rcu_read_lock();
opp = dev_pm_opp_find_freq_exact(cpu_dev,
freq_table[0].frequency * 1000, true);
min_volt = dev_pm_opp_get_voltage(opp);
opp = dev_pm_opp_find_freq_exact(cpu_dev,
freq_table[--num].frequency * 1000, true);
max_volt = dev_pm_opp_get_voltage(opp);
rcu_read_unlock();
ret = regulator_set_voltage_time(arm_reg, min_volt, max_volt);
if (ret > 0)
transition_latency += ret * 1000;
ret = cpufreq_register_driver(&imx6q_cpufreq_driver);
if (ret) {
dev_err(cpu_dev, "failed register driver: %d\n", ret);
goto free_freq_table;
}
of_node_put(np);
return 0;
free_freq_table:
dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
put_node:
of_node_put(np);
return ret;
}
static int brcmstb_gisb_arb_probe(struct platform_device *pdev)
{
struct device_node *dn = pdev->dev.of_node;
struct brcmstb_gisb_arb_device *gdev;
struct resource *r;
int err, timeout_irq, tea_irq;
unsigned int num_masters, j = 0;
int i, first, last;
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
timeout_irq = platform_get_irq(pdev, 0);
tea_irq = platform_get_irq(pdev, 1);
gdev = devm_kzalloc(&pdev->dev, sizeof(*gdev), GFP_KERNEL);
if (!gdev)
return -ENOMEM;
mutex_init(&gdev->lock);
INIT_LIST_HEAD(&gdev->next);
gdev->base = devm_request_and_ioremap(&pdev->dev, r);
if (!gdev->base)
return -ENOMEM;
err = devm_request_irq(&pdev->dev, timeout_irq,
brcmstb_gisb_timeout_handler, 0, pdev->name,
gdev);
if (err < 0)
return err;
err = devm_request_irq(&pdev->dev, tea_irq,
brcmstb_gisb_tea_handler, 0, pdev->name,
gdev);
if (err < 0)
return err;
/* If we do not have a valid mask, assume all masters are enabled */
if (of_property_read_u32(dn, "brcm,gisb-arb-master-mask",
&gdev->valid_mask))
gdev->valid_mask = 0xffffffff;
/* Proceed with reading the litteral names if we agree on the
* number of masters
*/
num_masters = of_property_count_strings(dn,
"brcm,gisb-arb-master-names");
if (hweight_long(gdev->valid_mask) == num_masters) {
first = ffs(gdev->valid_mask) - 1;
last = fls(gdev->valid_mask) - 1;
for (i = first; i < last; i++) {
if (!(gdev->valid_mask & BIT(i)))
continue;
of_property_read_string_index(dn,
"brcm,gisb-arb-master-names", j,
&gdev->master_names[i]);
j++;
}
}
err = sysfs_create_group(&pdev->dev.kobj, &gisb_arb_sysfs_attr_group);
if (err)
return err;
platform_set_drvdata(pdev, gdev);
list_add_tail(&gdev->next, &brcmstb_gisb_arb_device_list);
dev_info(&pdev->dev, "registered mem: %p, irqs: %d, %d\n",
gdev->base, timeout_irq, tea_irq);
return 0;
}
int get_bl_extern_dt_data(struct device_node* of_node, struct bl_extern_config_t *pdata)
{
int ret;
int val;
unsigned int bl_para[2];
const char *str;
ret = of_property_read_string(of_node, "dev_name", (const char **)&pdata->name);
if (ret) {
pdata->name = "aml_bl_extern";
printk("warning: get dev_name failed\n");
}
ret = of_property_read_u32(of_node, "type", &pdata->type);
if (ret) {
pdata->type = BL_EXTERN_MAX;
printk("%s warning: get type failed, exit\n", pdata->name);
return -1;
}
pdata->gpio_used = 0;
pdata->gpio = GPIO_MAX;
ret = of_property_read_string(of_node, "gpio_enable", &str);
if (ret) {
printk("%s warning: get gpio_enable failed\n", pdata->name);
}
else {
if (strncmp(str, "G", 1) == 0) {//"GPIO_xx"
pdata->gpio_used = 1;
val = amlogic_gpio_name_map_num(str);
ret = bl_extern_gpio_request(val);
if (ret) {
printk("%s warning: faild to alloc gpio (%s)\n", pdata->name, str);
}
pdata->gpio = val;
}
DBG_PRINT("%s: gpio_enable %s\n", pdata->name, ((pdata->gpio_used) ? str:"none"));
}
switch (pdata->type) {
case BL_EXTERN_I2C:
ret = of_property_read_u32(of_node,"i2c_address",&pdata->i2c_addr);
if (ret) {
printk("%s warning: get i2c_address failed\n", pdata->name);
pdata->i2c_addr = 0;
}
DBG_PRINT("%s: i2c_address=0x%02x\n", pdata->name, pdata->i2c_addr);
ret = of_property_read_string(of_node, "i2c_bus", &str);
if (ret) {
printk("%s warning: get i2c_bus failed, use default i2c bus\n", pdata->name);
pdata->i2c_bus = AML_I2C_MASTER_A;
}
else {
if (strncmp(str, "i2c_bus_a", 9) == 0)
pdata->i2c_bus = AML_I2C_MASTER_A;
else if (strncmp(str, "i2c_bus_b", 9) == 0)
pdata->i2c_bus = AML_I2C_MASTER_B;
else if (strncmp(str, "i2c_bus_c", 9) == 0)
pdata->i2c_bus = AML_I2C_MASTER_C;
else if (strncmp(str, "i2c_bus_d", 9) == 0)
pdata->i2c_bus = AML_I2C_MASTER_D;
else if (strncmp(str, "i2c_bus_ao", 10) == 0)
pdata->i2c_bus = AML_I2C_MASTER_AO;
else
pdata->i2c_bus = AML_I2C_MASTER_A;
}
DBG_PRINT("%s: i2c_bus=%s[%d]\n", pdata->name, str, pdata->i2c_bus);
break;
case BL_EXTERN_SPI:
ret = of_property_read_string(of_node,"gpio_spi_cs", &str);
if (ret) {
printk("%s warning: get spi gpio_spi_cs failed\n", pdata->name);
pdata->spi_cs = -1;
}
else {
val = amlogic_gpio_name_map_num(str);
if (val > 0) {
ret = bl_extern_gpio_request(val);
if (ret) {
printk("faild to alloc spi_cs gpio (%s)!\n", str);
}
pdata->spi_cs = val;
DBG_PRINT("spi_cs gpio = %s(%d)\n", str, pdata->spi_cs);
}
else {
pdata->spi_cs = -1;
}
}
ret = of_property_read_string(of_node,"gpio_spi_clk", &str);
if (ret) {
printk("%s warning: get spi gpio_spi_clk failed\n", pdata->name);
pdata->spi_clk = -1;
}
else {
val = amlogic_gpio_name_map_num(str);
if (val > 0) {
ret = bl_extern_gpio_request(val);
if (ret) {
printk("%s: faild to alloc spi_clk gpio (%s)!\n", pdata->name, str);
}
pdata->spi_clk = val;
DBG_PRINT("%s: spi_clk gpio = %s(%d)\n", pdata->name, str, pdata->spi_clk);
}
else {
pdata->spi_clk = -1;
}
}
ret = of_property_read_string(of_node,"gpio_spi_data", &str);
if (ret) {
printk("%s warning: get spi gpio_spi_data failed\n", pdata->name);
pdata->spi_data = -1;
}
else {
val = amlogic_gpio_name_map_num(str);
if (val > 0) {
ret = bl_extern_gpio_request(val);
if (ret) {
printk("%s: faild to alloc spi_data gpio (%s)!\n", pdata->name, str);
}
pdata->spi_data = val;
DBG_PRINT("%s: spi_data gpio = %s(%d)\n", pdata->name, str, pdata->spi_data);
}
else {
pdata->spi_data = -1;
}
}
break;
case BL_EXTERN_OTHER:
break;
default:
break;
}
ret = of_property_read_u32_array(of_node,"dim_max_min", &bl_para[0], 2);
if(ret) {
printk("%s warning: get dim_max_min failed\n", pdata->name);
pdata->dim_max = 0;
pdata->dim_min = 0;
}
else {
pdata->dim_max = bl_para[0];
pdata->dim_min = bl_para[1];
}
DBG_PRINT("%s dim_min = %d, dim_max = %d\n", pdata->name, pdata->dim_min, pdata->dim_max);
return 0;
}
static int csid_probe(struct platform_device *pdev)
{
struct csid_device *new_csid_dev;
uint32_t csi_vdd_voltage = 0;
int rc = 0;
new_csid_dev = kzalloc(sizeof(struct csid_device), GFP_KERNEL);
if (!new_csid_dev) {
pr_err("%s: no enough memory\n", __func__);
return -ENOMEM;
}
new_csid_dev->ctrl_reg = NULL;
new_csid_dev->ctrl_reg = kzalloc(sizeof(struct csid_ctrl_t),
GFP_KERNEL);
if (!new_csid_dev->ctrl_reg) {
kfree(new_csid_dev);
pr_err("%s:%d kzalloc failed\n", __func__, __LINE__);
return -ENOMEM;
}
v4l2_subdev_init(&new_csid_dev->msm_sd.sd, &msm_csid_subdev_ops);
v4l2_set_subdevdata(&new_csid_dev->msm_sd.sd, new_csid_dev);
platform_set_drvdata(pdev, &new_csid_dev->msm_sd.sd);
mutex_init(&new_csid_dev->mutex);
if (pdev->dev.of_node) {
rc = of_property_read_u32((&pdev->dev)->of_node,
"cell-index", &pdev->id);
if (rc < 0) {
pr_err("%s:%d failed to read cell-index\n", __func__,
__LINE__);
goto csid_no_resource;
}
CDBG("%s device id %d\n", __func__, pdev->id);
rc = of_property_read_u32((&pdev->dev)->of_node,
"qcom,csi-vdd-voltage", &csi_vdd_voltage);
if (rc < 0) {
pr_err("%s:%d failed to read qcom,csi-vdd-voltage\n",
__func__, __LINE__);
goto csid_no_resource;
}
CDBG("%s:%d reading mipi_csi_vdd is %d\n", __func__, __LINE__,
csi_vdd_voltage);
csid_vreg_info[0].min_voltage = csi_vdd_voltage;
csid_vreg_info[0].max_voltage = csi_vdd_voltage;
}
rc = msm_csid_get_clk_info(new_csid_dev, pdev);
if (rc < 0) {
pr_err("%s: msm_csid_get_clk_info() failed", __func__);
return -EFAULT;
}
new_csid_dev->mem = platform_get_resource_byname(pdev,
IORESOURCE_MEM, "csid");
if (!new_csid_dev->mem) {
pr_err("%s: no mem resource?\n", __func__);
rc = -ENODEV;
goto csid_no_resource;
}
new_csid_dev->irq = platform_get_resource_byname(pdev,
IORESOURCE_IRQ, "csid");
if (!new_csid_dev->irq) {
pr_err("%s: no irq resource?\n", __func__);
rc = -ENODEV;
goto csid_no_resource;
}
new_csid_dev->io = request_mem_region(new_csid_dev->mem->start,
resource_size(new_csid_dev->mem), pdev->name);
if (!new_csid_dev->io) {
pr_err("%s: no valid mem region\n", __func__);
rc = -EBUSY;
goto csid_no_resource;
}
new_csid_dev->pdev = pdev;
new_csid_dev->msm_sd.sd.internal_ops = &msm_csid_internal_ops;
new_csid_dev->msm_sd.sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
snprintf(new_csid_dev->msm_sd.sd.name,
ARRAY_SIZE(new_csid_dev->msm_sd.sd.name), "msm_csid");
media_entity_init(&new_csid_dev->msm_sd.sd.entity, 0, NULL, 0);
new_csid_dev->msm_sd.sd.entity.type = MEDIA_ENT_T_V4L2_SUBDEV;
new_csid_dev->msm_sd.sd.entity.group_id = MSM_CAMERA_SUBDEV_CSID;
new_csid_dev->msm_sd.close_seq = MSM_SD_CLOSE_2ND_CATEGORY | 0x5;
msm_sd_register(&new_csid_dev->msm_sd);
rc = request_irq(new_csid_dev->irq->start, msm_csid_irq,
IRQF_TRIGGER_RISING, "csid", new_csid_dev);
if (rc < 0) {
release_mem_region(new_csid_dev->mem->start,
resource_size(new_csid_dev->mem));
pr_err("%s: irq request fail\n", __func__);
rc = -EBUSY;
goto csid_no_resource;
}
disable_irq(new_csid_dev->irq->start);
if (rc < 0) {
release_mem_region(new_csid_dev->mem->start,
resource_size(new_csid_dev->mem));
pr_err("%s Error registering irq ", __func__);
goto csid_no_resource;
}
if (of_device_is_compatible(new_csid_dev->pdev->dev.of_node,
"qcom,csid-v2.0")) {
new_csid_dev->ctrl_reg->csid_reg = csid_v2_0;
new_csid_dev->hw_dts_version = CSID_VERSION_V20;
} else if (of_device_is_compatible(new_csid_dev->pdev->dev.of_node,
"qcom,csid-v2.2")) {
new_csid_dev->ctrl_reg->csid_reg = csid_v2_2;
new_csid_dev->hw_dts_version = CSID_VERSION_V22;
} else if (of_device_is_compatible(new_csid_dev->pdev->dev.of_node,
"qcom,csid-v3.0")) {
new_csid_dev->ctrl_reg->csid_reg = csid_v3_0;
new_csid_dev->hw_dts_version = CSID_VERSION_V30;
} else if (of_device_is_compatible(new_csid_dev->pdev->dev.of_node,
"qcom,csid-v4.0")) {
new_csid_dev->ctrl_reg->csid_reg = csid_v3_0;
new_csid_dev->hw_dts_version = CSID_VERSION_V40;
} else if (of_device_is_compatible(new_csid_dev->pdev->dev.of_node,
"qcom,csid-v3.1")) {
new_csid_dev->ctrl_reg->csid_reg = csid_v3_1;
new_csid_dev->hw_dts_version = CSID_VERSION_V31;
} else if (of_device_is_compatible(new_csid_dev->pdev->dev.of_node,
"qcom,csid-v3.2")) {
new_csid_dev->ctrl_reg->csid_reg = csid_v3_2;
new_csid_dev->hw_dts_version = CSID_VERSION_V32;
} else {
pr_err("%s:%d, invalid hw version : 0x%x", __func__, __LINE__,
new_csid_dev->hw_dts_version);
return -EINVAL;
}
new_csid_dev->csid_state = CSID_POWER_DOWN;
return 0;
csid_no_resource:
mutex_destroy(&new_csid_dev->mutex);
kfree(new_csid_dev->ctrl_reg);
kfree(new_csid_dev);
return 0;
}
static int __devinit csid_probe(struct platform_device *pdev)
{
struct csid_device *new_csid_dev;
struct msm_cam_subdev_info sd_info;
struct intr_table_entry irq_req;
int rc = 0;
CDBG("%s:%d called\n", __func__, __LINE__);
new_csid_dev = kzalloc(sizeof(struct csid_device), GFP_KERNEL);
if (!new_csid_dev) {
pr_err("%s: no enough memory\n", __func__);
return -ENOMEM;
}
v4l2_subdev_init(&new_csid_dev->subdev, &msm_csid_subdev_ops);
new_csid_dev->subdev.internal_ops = &msm_csid_internal_ops;
new_csid_dev->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
snprintf(new_csid_dev->subdev.name,
ARRAY_SIZE(new_csid_dev->subdev.name), "msm_csid");
v4l2_set_subdevdata(&new_csid_dev->subdev, new_csid_dev);
platform_set_drvdata(pdev, &new_csid_dev->subdev);
mutex_init(&new_csid_dev->mutex);
if (pdev->dev.of_node)
of_property_read_u32((&pdev->dev)->of_node,
"cell-index", &pdev->id);
CDBG("%s device id %d\n", __func__, pdev->id);
new_csid_dev->mem = platform_get_resource_byname(pdev,
IORESOURCE_MEM, "csid");
if (!new_csid_dev->mem) {
pr_err("%s: no mem resource?\n", __func__);
rc = -ENODEV;
goto csid_no_resource;
}
new_csid_dev->irq = platform_get_resource_byname(pdev,
IORESOURCE_IRQ, "csid");
if (!new_csid_dev->irq) {
pr_err("%s: no irq resource?\n", __func__);
rc = -ENODEV;
goto csid_no_resource;
}
new_csid_dev->io = request_mem_region(new_csid_dev->mem->start,
resource_size(new_csid_dev->mem), pdev->name);
if (!new_csid_dev->io) {
pr_err("%s: no valid mem region\n", __func__);
rc = -EBUSY;
goto csid_no_resource;
}
new_csid_dev->pdev = pdev;
sd_info.sdev_type = CSID_DEV;
sd_info.sd_index = pdev->id;
sd_info.irq_num = new_csid_dev->irq->start;
msm_cam_register_subdev_node(&new_csid_dev->subdev, &sd_info);
media_entity_init(&new_csid_dev->subdev.entity, 0, NULL, 0);
new_csid_dev->subdev.entity.type = MEDIA_ENT_T_V4L2_SUBDEV;
new_csid_dev->subdev.entity.group_id = CSID_DEV;
new_csid_dev->subdev.entity.name = pdev->name;
new_csid_dev->subdev.entity.revision =
new_csid_dev->subdev.devnode->num;
/* Request for this device irq from the camera server. If the
* IRQ Router is present on this target, the interrupt will be
* handled by the camera server and the interrupt service
* routine called. If the request_irq call returns ENXIO, then
* the IRQ Router hardware is not present on this target. We
* have to request for the irq ourselves and register the
* appropriate interrupt handler. */
irq_req.cam_hw_idx = MSM_CAM_HW_CSI0 + pdev->id;
irq_req.dev_name = "csid";
irq_req.irq_idx = CAMERA_SS_IRQ_2 + pdev->id;
irq_req.irq_num = new_csid_dev->irq->start;
irq_req.is_composite = 0;
irq_req.irq_trigger_type = IRQF_TRIGGER_RISING;
irq_req.num_hwcore = 1;
irq_req.subdev_list[0] = &new_csid_dev->subdev;
irq_req.data = (void *)new_csid_dev;
rc = msm_cam_server_request_irq(&irq_req);
if (rc == -ENXIO) {
/* IRQ Router hardware is not present on this hardware.
* Request for the IRQ and register the interrupt handler. */
rc = request_irq(new_csid_dev->irq->start, msm_csid_irq,
IRQF_TRIGGER_RISING, "csid", new_csid_dev);
if (rc < 0) {
release_mem_region(new_csid_dev->mem->start,
resource_size(new_csid_dev->mem));
pr_err("%s: irq request fail\n", __func__);
rc = -EBUSY;
goto csid_no_resource;
}
disable_irq(new_csid_dev->irq->start);
} else if (rc < 0) {
release_mem_region(new_csid_dev->mem->start,
resource_size(new_csid_dev->mem));
pr_err("%s Error registering irq ", __func__);
goto csid_no_resource;
}
new_csid_dev->csid_state = CSID_POWER_DOWN;
return 0;
csid_no_resource:
mutex_destroy(&new_csid_dev->mutex);
kfree(new_csid_dev);
return 0;
}
static int fsl_asoc_card_probe(struct platform_device *pdev)
{
struct device_node *cpu_np, *codec_np, *asrc_np;
struct device_node *np = pdev->dev.of_node;
struct platform_device *asrc_pdev = NULL;
struct platform_device *cpu_pdev;
struct fsl_asoc_card_priv *priv;
struct i2c_client *codec_dev;
const char *codec_dai_name;
u32 width;
int ret;
priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
cpu_np = of_parse_phandle(np, "audio-cpu", 0);
/* Give a chance to old DT binding */
if (!cpu_np)
cpu_np = of_parse_phandle(np, "ssi-controller", 0);
if (!cpu_np) {
dev_err(&pdev->dev, "CPU phandle missing or invalid\n");
ret = -EINVAL;
goto fail;
}
cpu_pdev = of_find_device_by_node(cpu_np);
if (!cpu_pdev) {
dev_err(&pdev->dev, "failed to find CPU DAI device\n");
ret = -EINVAL;
goto fail;
}
codec_np = of_parse_phandle(np, "audio-codec", 0);
if (codec_np)
codec_dev = of_find_i2c_device_by_node(codec_np);
else
codec_dev = NULL;
asrc_np = of_parse_phandle(np, "audio-asrc", 0);
if (asrc_np)
asrc_pdev = of_find_device_by_node(asrc_np);
/* Get the MCLK rate only, and leave it controlled by CODEC drivers */
if (codec_dev) {
struct clk *codec_clk = clk_get(&codec_dev->dev, NULL);
if (!IS_ERR(codec_clk)) {
priv->codec_priv.mclk_freq = clk_get_rate(codec_clk);
clk_put(codec_clk);
}
}
/* Default sample rate and format, will be updated in hw_params() */
priv->sample_rate = 44100;
priv->sample_format = SNDRV_PCM_FORMAT_S16_LE;
/* Assign a default DAI format, and allow each card to overwrite it */
priv->dai_fmt = DAI_FMT_BASE;
/* Diversify the card configurations */
if (of_device_is_compatible(np, "fsl,imx-audio-cs42888")) {
codec_dai_name = "cs42888";
priv->card.set_bias_level = NULL;
priv->cpu_priv.sysclk_freq[TX] = priv->codec_priv.mclk_freq;
priv->cpu_priv.sysclk_freq[RX] = priv->codec_priv.mclk_freq;
priv->cpu_priv.sysclk_dir[TX] = SND_SOC_CLOCK_OUT;
priv->cpu_priv.sysclk_dir[RX] = SND_SOC_CLOCK_OUT;
priv->cpu_priv.slot_width = 32;
priv->dai_fmt |= SND_SOC_DAIFMT_CBS_CFS;
} else if (of_device_is_compatible(np, "fsl,imx-audio-sgtl5000")) {
codec_dai_name = "sgtl5000";
priv->codec_priv.mclk_id = SGTL5000_SYSCLK;
priv->dai_fmt |= SND_SOC_DAIFMT_CBM_CFM;
} else if (of_device_is_compatible(np, "fsl,imx-audio-wm8962")) {
codec_dai_name = "wm8962";
priv->card.set_bias_level = fsl_asoc_card_set_bias_level;
priv->codec_priv.mclk_id = WM8962_SYSCLK_MCLK;
priv->codec_priv.fll_id = WM8962_SYSCLK_FLL;
priv->codec_priv.pll_id = WM8962_FLL;
priv->dai_fmt |= SND_SOC_DAIFMT_CBM_CFM;
} else if (of_device_is_compatible(np, "fsl,imx-audio-wm8960")) {
codec_dai_name = "wm8960-hifi";
priv->card.set_bias_level = fsl_asoc_card_set_bias_level;
priv->codec_priv.fll_id = WM8960_SYSCLK_AUTO;
priv->codec_priv.pll_id = WM8960_SYSCLK_AUTO;
priv->dai_fmt |= SND_SOC_DAIFMT_CBM_CFM;
} else if (of_device_is_compatible(np, "fsl,imx-audio-ac97")) {
codec_dai_name = "ac97-hifi";
priv->card.set_bias_level = NULL;
priv->dai_fmt = SND_SOC_DAIFMT_AC97;
} else {
dev_err(&pdev->dev, "unknown Device Tree compatible\n");
ret = -EINVAL;
goto asrc_fail;
}
if (!fsl_asoc_card_is_ac97(priv) && !codec_dev) {
dev_err(&pdev->dev, "failed to find codec device\n");
ret = -EINVAL;
goto asrc_fail;
}
/* Common settings for corresponding Freescale CPU DAI driver */
if (strstr(cpu_np->name, "ssi")) {
/* Only SSI needs to configure AUDMUX */
ret = fsl_asoc_card_audmux_init(np, priv);
if (ret) {
dev_err(&pdev->dev, "failed to init audmux\n");
goto asrc_fail;
}
} else if (strstr(cpu_np->name, "esai")) {
priv->cpu_priv.sysclk_id[1] = ESAI_HCKT_EXTAL;
priv->cpu_priv.sysclk_id[0] = ESAI_HCKR_EXTAL;
} else if (strstr(cpu_np->name, "sai")) {
priv->cpu_priv.sysclk_id[1] = FSL_SAI_CLK_MAST1;
priv->cpu_priv.sysclk_id[0] = FSL_SAI_CLK_MAST1;
}
snprintf(priv->name, sizeof(priv->name), "%s-audio",
fsl_asoc_card_is_ac97(priv) ? "ac97" :
codec_dev->name);
/* Initialize sound card */
priv->pdev = pdev;
priv->card.dev = &pdev->dev;
priv->card.name = priv->name;
priv->card.dai_link = priv->dai_link;
priv->card.dapm_routes = fsl_asoc_card_is_ac97(priv) ?
audio_map_ac97 : audio_map;
priv->card.late_probe = fsl_asoc_card_late_probe;
priv->card.num_dapm_routes = ARRAY_SIZE(audio_map);
priv->card.dapm_widgets = fsl_asoc_card_dapm_widgets;
priv->card.num_dapm_widgets = ARRAY_SIZE(fsl_asoc_card_dapm_widgets);
memcpy(priv->dai_link, fsl_asoc_card_dai,
sizeof(struct snd_soc_dai_link) * ARRAY_SIZE(priv->dai_link));
ret = snd_soc_of_parse_audio_routing(&priv->card, "audio-routing");
if (ret) {
dev_err(&pdev->dev, "failed to parse audio-routing: %d\n", ret);
goto asrc_fail;
}
/* Normal DAI Link */
priv->dai_link[0].cpu_of_node = cpu_np;
priv->dai_link[0].codec_dai_name = codec_dai_name;
if (!fsl_asoc_card_is_ac97(priv))
priv->dai_link[0].codec_of_node = codec_np;
else {
u32 idx;
ret = of_property_read_u32(cpu_np, "cell-index", &idx);
if (ret) {
dev_err(&pdev->dev,
"cannot get CPU index property\n");
goto asrc_fail;
}
priv->dai_link[0].codec_name =
devm_kasprintf(&pdev->dev, GFP_KERNEL,
"ac97-codec.%u",
(unsigned int)idx);
}
priv->dai_link[0].platform_of_node = cpu_np;
priv->dai_link[0].dai_fmt = priv->dai_fmt;
priv->card.num_links = 1;
if (asrc_pdev) {
/* DPCM DAI Links only if ASRC exsits */
priv->dai_link[1].cpu_of_node = asrc_np;
priv->dai_link[1].platform_of_node = asrc_np;
priv->dai_link[2].codec_dai_name = codec_dai_name;
priv->dai_link[2].codec_of_node = codec_np;
priv->dai_link[2].codec_name =
priv->dai_link[0].codec_name;
priv->dai_link[2].cpu_of_node = cpu_np;
priv->dai_link[2].dai_fmt = priv->dai_fmt;
priv->card.num_links = 3;
ret = of_property_read_u32(asrc_np, "fsl,asrc-rate",
&priv->asrc_rate);
if (ret) {
dev_err(&pdev->dev, "failed to get output rate\n");
ret = -EINVAL;
goto asrc_fail;
}
ret = of_property_read_u32(asrc_np, "fsl,asrc-width", &width);
if (ret) {
dev_err(&pdev->dev, "failed to get output rate\n");
ret = -EINVAL;
goto asrc_fail;
}
if (width == 24)
priv->asrc_format = SNDRV_PCM_FORMAT_S24_LE;
else
priv->asrc_format = SNDRV_PCM_FORMAT_S16_LE;
}
/* Finish card registering */
platform_set_drvdata(pdev, priv);
snd_soc_card_set_drvdata(&priv->card, priv);
ret = devm_snd_soc_register_card(&pdev->dev, &priv->card);
if (ret)
dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret);
asrc_fail:
of_node_put(asrc_np);
of_node_put(codec_np);
fail:
of_node_put(cpu_np);
return ret;
}
static int stm32_ipcc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
struct stm32_ipcc *ipcc;
struct resource *res;
unsigned int i;
int ret;
u32 ip_ver;
static const char * const irq_name[] = {"rx", "tx"};
irq_handler_t irq_thread[] = {stm32_ipcc_rx_irq, stm32_ipcc_tx_irq};
if (!np) {
dev_err(dev, "No DT found\n");
return -ENODEV;
}
ipcc = devm_kzalloc(dev, sizeof(*ipcc), GFP_KERNEL);
if (!ipcc)
return -ENOMEM;
/* proc_id */
if (of_property_read_u32(np, "st,proc-id", &ipcc->proc_id)) {
dev_err(dev, "Missing st,proc-id\n");
return -ENODEV;
}
if (ipcc->proc_id >= STM32_MAX_PROCS) {
dev_err(dev, "Invalid proc_id (%d)\n", ipcc->proc_id);
return -EINVAL;
}
/* regs */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
ipcc->reg_base = devm_ioremap_resource(dev, res);
if (IS_ERR(ipcc->reg_base))
return PTR_ERR(ipcc->reg_base);
ipcc->reg_proc = ipcc->reg_base + ipcc->proc_id * IPCC_PROC_OFFST;
/* clock */
ipcc->clk = devm_clk_get(dev, NULL);
if (IS_ERR(ipcc->clk))
return PTR_ERR(ipcc->clk);
ret = clk_prepare_enable(ipcc->clk);
if (ret) {
dev_err(dev, "can not enable the clock\n");
return ret;
}
/* irq */
for (i = 0; i < IPCC_IRQ_NUM; i++) {
ipcc->irqs[i] = of_irq_get_byname(dev->of_node, irq_name[i]);
if (ipcc->irqs[i] < 0) {
dev_err(dev, "no IRQ specified %s\n", irq_name[i]);
ret = ipcc->irqs[i];
goto err_clk;
}
ret = devm_request_threaded_irq(dev, ipcc->irqs[i], NULL,
irq_thread[i], IRQF_ONESHOT,
dev_name(dev), ipcc);
if (ret) {
dev_err(dev, "failed to request irq %d (%d)\n", i, ret);
goto err_clk;
}
}
/* mask and enable rx/tx irq */
stm32_ipcc_set_bits(ipcc->reg_proc + IPCC_XMR,
RX_BIT_MASK | TX_BIT_MASK);
stm32_ipcc_set_bits(ipcc->reg_proc + IPCC_XCR, XCR_RXOIE | XCR_TXOIE);
/* wakeup */
if (of_property_read_bool(np, "wakeup-source")) {
ipcc->wkp = of_irq_get_byname(dev->of_node, "wakeup");
if (ipcc->wkp < 0) {
dev_err(dev, "could not get wakeup IRQ\n");
ret = ipcc->wkp;
goto err_clk;
}
device_init_wakeup(dev, true);
ret = dev_pm_set_dedicated_wake_irq(dev, ipcc->wkp);
if (ret) {
dev_err(dev, "Failed to set wake up irq\n");
goto err_init_wkp;
}
} else {
device_init_wakeup(dev, false);
}
/* mailbox controller */
ipcc->n_chans = readl_relaxed(ipcc->reg_base + IPCC_HWCFGR);
ipcc->n_chans &= IPCFGR_CHAN_MASK;
ipcc->controller.dev = dev;
ipcc->controller.txdone_irq = true;
ipcc->controller.ops = &stm32_ipcc_ops;
ipcc->controller.num_chans = ipcc->n_chans;
ipcc->controller.chans = devm_kcalloc(dev, ipcc->controller.num_chans,
sizeof(*ipcc->controller.chans),
GFP_KERNEL);
if (!ipcc->controller.chans) {
ret = -ENOMEM;
goto err_irq_wkp;
}
for (i = 0; i < ipcc->controller.num_chans; i++)
ipcc->controller.chans[i].con_priv = (void *)i;
ret = mbox_controller_register(&ipcc->controller);
if (ret)
goto err_irq_wkp;
platform_set_drvdata(pdev, ipcc);
ip_ver = readl_relaxed(ipcc->reg_base + IPCC_VER);
dev_info(dev, "ipcc rev:%ld.%ld enabled, %d chans, proc %d\n",
FIELD_GET(VER_MAJREV_MASK, ip_ver),
FIELD_GET(VER_MINREV_MASK, ip_ver),
ipcc->controller.num_chans, ipcc->proc_id);
clk_disable_unprepare(ipcc->clk);
return 0;
err_irq_wkp:
if (ipcc->wkp)
dev_pm_clear_wake_irq(dev);
err_init_wkp:
device_init_wakeup(dev, false);
err_clk:
clk_disable_unprepare(ipcc->clk);
return ret;
}
static int fsl_asoc_card_audmux_init(struct device_node *np,
struct fsl_asoc_card_priv *priv)
{
struct device *dev = &priv->pdev->dev;
u32 int_ptcr = 0, ext_ptcr = 0;
int int_port, ext_port;
int ret;
ret = of_property_read_u32(np, "mux-int-port", &int_port);
if (ret) {
dev_err(dev, "mux-int-port missing or invalid\n");
return ret;
}
ret = of_property_read_u32(np, "mux-ext-port", &ext_port);
if (ret) {
dev_err(dev, "mux-ext-port missing or invalid\n");
return ret;
}
/*
* The port numbering in the hardware manual starts at 1, while
* the AUDMUX API expects it starts at 0.
*/
int_port--;
ext_port--;
/*
* Use asynchronous mode (6 wires) for all cases except AC97.
* If only 4 wires are needed, just set SSI into
* synchronous mode and enable 4 PADs in IOMUX.
*/
switch (priv->dai_fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBM_CFM:
int_ptcr = IMX_AUDMUX_V2_PTCR_RFSEL(8 | ext_port) |
IMX_AUDMUX_V2_PTCR_RCSEL(8 | ext_port) |
IMX_AUDMUX_V2_PTCR_TFSEL(ext_port) |
IMX_AUDMUX_V2_PTCR_TCSEL(ext_port) |
IMX_AUDMUX_V2_PTCR_RFSDIR |
IMX_AUDMUX_V2_PTCR_RCLKDIR |
IMX_AUDMUX_V2_PTCR_TFSDIR |
IMX_AUDMUX_V2_PTCR_TCLKDIR;
break;
case SND_SOC_DAIFMT_CBM_CFS:
int_ptcr = IMX_AUDMUX_V2_PTCR_RCSEL(8 | ext_port) |
IMX_AUDMUX_V2_PTCR_TCSEL(ext_port) |
IMX_AUDMUX_V2_PTCR_RCLKDIR |
IMX_AUDMUX_V2_PTCR_TCLKDIR;
ext_ptcr = IMX_AUDMUX_V2_PTCR_RFSEL(8 | int_port) |
IMX_AUDMUX_V2_PTCR_TFSEL(int_port) |
IMX_AUDMUX_V2_PTCR_RFSDIR |
IMX_AUDMUX_V2_PTCR_TFSDIR;
break;
case SND_SOC_DAIFMT_CBS_CFM:
int_ptcr = IMX_AUDMUX_V2_PTCR_RFSEL(8 | ext_port) |
IMX_AUDMUX_V2_PTCR_TFSEL(ext_port) |
IMX_AUDMUX_V2_PTCR_RFSDIR |
IMX_AUDMUX_V2_PTCR_TFSDIR;
ext_ptcr = IMX_AUDMUX_V2_PTCR_RCSEL(8 | int_port) |
IMX_AUDMUX_V2_PTCR_TCSEL(int_port) |
IMX_AUDMUX_V2_PTCR_RCLKDIR |
IMX_AUDMUX_V2_PTCR_TCLKDIR;
break;
case SND_SOC_DAIFMT_CBS_CFS:
ext_ptcr = IMX_AUDMUX_V2_PTCR_RFSEL(8 | int_port) |
IMX_AUDMUX_V2_PTCR_RCSEL(8 | int_port) |
IMX_AUDMUX_V2_PTCR_TFSEL(int_port) |
IMX_AUDMUX_V2_PTCR_TCSEL(int_port) |
IMX_AUDMUX_V2_PTCR_RFSDIR |
IMX_AUDMUX_V2_PTCR_RCLKDIR |
IMX_AUDMUX_V2_PTCR_TFSDIR |
IMX_AUDMUX_V2_PTCR_TCLKDIR;
break;
default:
if (!fsl_asoc_card_is_ac97(priv))
return -EINVAL;
}
if (fsl_asoc_card_is_ac97(priv)) {
int_ptcr = IMX_AUDMUX_V2_PTCR_SYN |
IMX_AUDMUX_V2_PTCR_TCSEL(ext_port) |
IMX_AUDMUX_V2_PTCR_TCLKDIR;
ext_ptcr = IMX_AUDMUX_V2_PTCR_SYN |
IMX_AUDMUX_V2_PTCR_TFSEL(int_port) |
IMX_AUDMUX_V2_PTCR_TFSDIR;
}
/* Asynchronous mode can not be set along with RCLKDIR */
if (!fsl_asoc_card_is_ac97(priv)) {
unsigned int pdcr =
IMX_AUDMUX_V2_PDCR_RXDSEL(ext_port);
ret = imx_audmux_v2_configure_port(int_port, 0,
pdcr);
if (ret) {
dev_err(dev, "audmux internal port setup failed\n");
return ret;
}
}
ret = imx_audmux_v2_configure_port(int_port, int_ptcr,
IMX_AUDMUX_V2_PDCR_RXDSEL(ext_port));
if (ret) {
dev_err(dev, "audmux internal port setup failed\n");
return ret;
}
if (!fsl_asoc_card_is_ac97(priv)) {
unsigned int pdcr =
IMX_AUDMUX_V2_PDCR_RXDSEL(int_port);
ret = imx_audmux_v2_configure_port(ext_port, 0,
pdcr);
if (ret) {
dev_err(dev, "audmux external port setup failed\n");
return ret;
}
}
ret = imx_audmux_v2_configure_port(ext_port, ext_ptcr,
IMX_AUDMUX_V2_PDCR_RXDSEL(int_port));
if (ret) {
dev_err(dev, "audmux external port setup failed\n");
return ret;
}
return 0;
}
static struct stml0xx_platform_data *stml0xx_of_init(struct spi_device *spi)
{
int len;
int lsize, bsize, index;
struct stml0xx_platform_data *pdata;
struct device_node *np = spi->dev.of_node;
unsigned int lux_table[LIGHTING_TABLE_SIZE];
unsigned int brightness_table[LIGHTING_TABLE_SIZE];
const char *name;
pdata = devm_kzalloc(&spi->dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata) {
dev_err(&stml0xx_misc_data->spi->dev,
"pdata allocation failure");
return NULL;
}
pdata->gpio_int = of_get_gpio(np, 0);
pdata->gpio_reset = of_get_gpio(np, 1);
pdata->gpio_bslen = of_get_gpio(np, 2);
pdata->gpio_wakeirq = of_get_gpio(np, 3);
if (of_gpio_count(np) >= 6) {
pdata->gpio_spi_ready_for_receive = of_get_gpio(np, 4);
pdata->gpio_spi_data_ack = of_get_gpio(np, 5);
} else {
dev_err(&stml0xx_misc_data->spi->dev,
"spi side band signals not defined");
return NULL;
}
if (of_gpio_count(np) >= 7) {
pdata->gpio_sh_wake = of_get_gpio(np, 6);
stml0xx_misc_data->sh_lowpower_enabled = 1;
} else {
pdata->gpio_sh_wake = -1;
stml0xx_misc_data->sh_lowpower_enabled = 0;
}
if (of_get_property(np, "lux_table", &len) == NULL) {
dev_err(&stml0xx_misc_data->spi->dev,
"lux_table len access failure");
return NULL;
}
lsize = len / sizeof(u32);
if ((lsize != 0) && (lsize < (LIGHTING_TABLE_SIZE - 1)) &&
(!of_property_read_u32_array(np, "lux_table",
(u32 *) (lux_table), lsize))) {
for (index = 0; index < lsize; index++)
pdata->lux_table[index] = ((u32 *) lux_table)[index];
} else {
dev_err(&stml0xx_misc_data->spi->dev,
"Lux table is missing");
return NULL;
}
pdata->lux_table[lsize] = 0xFFFF;
if (of_get_property(np, "brightness_table", &len) == NULL) {
dev_err(&stml0xx_misc_data->spi->dev,
"Brightness_table len access failure");
return NULL;
}
bsize = len / sizeof(u32);
if ((bsize != 0) && (bsize < (LIGHTING_TABLE_SIZE)) &&
!of_property_read_u32_array(np,
"brightness_table",
(u32 *) (brightness_table), bsize)) {
for (index = 0; index < bsize; index++) {
pdata->brightness_table[index]
= ((u32 *) brightness_table)[index];
}
} else {
dev_err(&stml0xx_misc_data->spi->dev,
"Brightness table is missing");
return NULL;
}
if ((lsize + 1) != bsize) {
dev_err(&stml0xx_misc_data->spi->dev,
"Lux and Brightness table sizes don't match");
return NULL;
}
of_property_read_u32(np, "bslen_pin_active_value",
&pdata->bslen_pin_active_value);
pdata->reset_hw_type = 0;
of_property_read_u32(np, "reset_hw_type",
&pdata->reset_hw_type);
of_get_property(np, "stml0xx_fw_version", &len);
if (!of_property_read_string(np, "stml0xx_fw_version", &name))
strlcpy(pdata->fw_version, name, FW_VERSION_SIZE);
else
dev_dbg(&stml0xx_misc_data->spi->dev,
"Not using stml0xx_fw_version override");
pdata->ct406_detect_threshold = 0x00C8;
pdata->ct406_undetect_threshold = 0x00A5;
pdata->ct406_recalibrate_threshold = 0x0064;
pdata->ct406_pulse_count = 0x02;
pdata->ct406_prox_gain = 0x02;
of_property_read_u32(np, "ct406_detect_threshold",
&pdata->ct406_detect_threshold);
of_property_read_u32(np, "ct406_undetect_threshold",
&pdata->ct406_undetect_threshold);
of_property_read_u32(np, "ct406_recalibrate_threshold",
&pdata->ct406_recalibrate_threshold);
of_property_read_u32(np, "ct406_pulse_count",
&pdata->ct406_pulse_count);
of_property_read_u32(np, "ct406_prox_gain",
&pdata->ct406_prox_gain);
pdata->ct406_als_lux1_c0_mult = 0x294;
pdata->ct406_als_lux1_c1_mult = 0x55A;
pdata->ct406_als_lux1_div = 0x64;
pdata->ct406_als_lux2_c0_mult = 0xDA;
pdata->ct406_als_lux2_c1_mult = 0x186;
pdata->ct406_als_lux2_div = 0x64;
of_property_read_u32(np, "ct406_als_lux1_c0_mult",
&pdata->ct406_als_lux1_c0_mult);
of_property_read_u32(np, "ct406_als_lux1_c1_mult",
&pdata->ct406_als_lux1_c1_mult);
of_property_read_u32(np, "ct406_als_lux1_div",
&pdata->ct406_als_lux1_div);
of_property_read_u32(np, "ct406_als_lux2_c0_mult",
&pdata->ct406_als_lux2_c0_mult);
of_property_read_u32(np, "ct406_als_lux2_c1_mult",
&pdata->ct406_als_lux2_c1_mult);
of_property_read_u32(np, "ct406_als_lux2_div",
&pdata->ct406_als_lux2_div);
pdata->dsp_iface_enable = 0;
of_property_read_u32(np, "dsp_iface_enable",
&pdata->dsp_iface_enable);
pdata->headset_detect_enable = 0;
pdata->headset_hw_version = 0;
pdata->headset_insertion_debounce = 0x01F4;
pdata->headset_removal_debounce = 0x01F4;
pdata->headset_button_down_debounce = 0x0032;
pdata->headset_button_up_debounce = 0x0032;
pdata->headset_button_0_1_threshold = 0x0096;
pdata->headset_button_1_2_threshold = 0x012C;
pdata->headset_button_2_3_threshold = 0x01C2;
pdata->headset_button_3_upper_threshold = 0x02EE;
pdata->headset_button_1_keycode = 0xE2;
pdata->headset_button_2_keycode = 0x0;
pdata->headset_button_3_keycode = 0x0;
pdata->headset_button_4_keycode = 0x0;
of_property_read_u32(np, "headset_detect_enable",
&pdata->headset_detect_enable);
of_property_read_u32(np, "headset_hw_version",
&pdata->headset_hw_version);
of_property_read_u32(np, "headset_insertion_debounce",
&pdata->headset_insertion_debounce);
of_property_read_u32(np, "headset_removal_debounce",
&pdata->headset_removal_debounce);
of_property_read_u32(np, "headset_button_down_debounce",
&pdata->headset_button_down_debounce);
of_property_read_u32(np, "headset_button_up_debounce",
&pdata->headset_button_up_debounce);
of_property_read_u32(np, "headset_button_0-1_threshold",
&pdata->headset_button_0_1_threshold);
of_property_read_u32(np, "headset_button_1-2_threshold",
&pdata->headset_button_1_2_threshold);
of_property_read_u32(np, "headset_button_2-3_threshold",
&pdata->headset_button_2_3_threshold);
of_property_read_u32(np, "headset_button_3-upper_threshold",
&pdata->headset_button_3_upper_threshold);
of_property_read_u32(np, "headset_button_1_keycode",
&pdata->headset_button_1_keycode);
of_property_read_u32(np, "headset_button_2_keycode",
&pdata->headset_button_2_keycode);
of_property_read_u32(np, "headset_button_3_keycode",
&pdata->headset_button_3_keycode);
of_property_read_u32(np, "headset_button_4_keycode",
&pdata->headset_button_4_keycode);
pdata->cover_detect_polarity = 0;
of_property_read_u32(np, "cover_detect_polarity",
&pdata->cover_detect_polarity);
pdata->accel_orientation_1 = 0;
pdata->accel_orientation_2 = 0;
of_property_read_u32(np, "accel_orientation_1",
&pdata->accel_orientation_1);
of_property_read_u32(np, "accel_orientation_2",
&pdata->accel_orientation_2);
pdata->accel_swap = 0;
of_property_read_u32(np, "accel_swap",
&pdata->accel_swap);
return pdata;
}
static int st_rtc_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
struct st_rtc *rtc;
struct resource *res;
uint32_t mode;
int ret = 0;
ret = of_property_read_u32(np, "st,lpc-mode", &mode);
if (ret) {
dev_err(&pdev->dev, "An LPC mode must be provided\n");
return -EINVAL;
}
/* LPC can either run as a Clocksource or in RTC or WDT mode */
if (mode != ST_LPC_MODE_RTC)
return -ENODEV;
rtc = devm_kzalloc(&pdev->dev, sizeof(struct st_rtc), GFP_KERNEL);
if (!rtc)
return -ENOMEM;
rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
if (IS_ERR(rtc->rtc_dev))
return PTR_ERR(rtc->rtc_dev);
spin_lock_init(&rtc->lock);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
rtc->ioaddr = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(rtc->ioaddr))
return PTR_ERR(rtc->ioaddr);
rtc->irq = irq_of_parse_and_map(np, 0);
if (!rtc->irq) {
dev_err(&pdev->dev, "IRQ missing or invalid\n");
return -EINVAL;
}
ret = devm_request_irq(&pdev->dev, rtc->irq, st_rtc_handler, 0,
pdev->name, rtc);
if (ret) {
dev_err(&pdev->dev, "Failed to request irq %i\n", rtc->irq);
return ret;
}
enable_irq_wake(rtc->irq);
disable_irq(rtc->irq);
rtc->clk = clk_get(&pdev->dev, NULL);
if (IS_ERR(rtc->clk)) {
dev_err(&pdev->dev, "Unable to request clock\n");
return PTR_ERR(rtc->clk);
}
clk_prepare_enable(rtc->clk);
rtc->clkrate = clk_get_rate(rtc->clk);
if (!rtc->clkrate) {
dev_err(&pdev->dev, "Unable to fetch clock rate\n");
return -EINVAL;
}
device_set_wakeup_capable(&pdev->dev, 1);
platform_set_drvdata(pdev, rtc);
rtc->rtc_dev->ops = &st_rtc_ops;
rtc->rtc_dev->range_max = U64_MAX;
do_div(rtc->rtc_dev->range_max, rtc->clkrate);
ret = rtc_register_device(rtc->rtc_dev);
if (ret) {
clk_disable_unprepare(rtc->clk);
return ret;
}
return 0;
}
static int ak8975_parse_dt(struct i2c_client *client,
struct ext_slave_platform_data *data)
{
int ret;
struct device_node *np = client->dev.of_node;
//enum of_gpio_flags gpioflags;
int length = 0,size = 0;
struct property *prop;
int debug = 1;
int i;
int orig_x,orig_y,orig_z;
u32 orientation[9];
ret = of_property_read_u32(np,"compass-bus",&data->bus);
if(ret!=0){
dev_err(&client->dev, "get compass-bus error\n");
return -EIO;
}
ret = of_property_read_u32(np,"compass-adapt_num",&data->adapt_num);
if(ret!=0){
dev_err(&client->dev, "get compass-adapt_num error\n");
return -EIO;
}
prop = of_find_property(np, "compass-orientation", &length);
if (!prop){
dev_err(&client->dev, "get compass-orientation length error\n");
return -EINVAL;
}
size = length / sizeof(int);
if((size > 0)&&(size <10)){
ret = of_property_read_u32_array(np, "compass-orientation",
orientation,
size);
if(ret<0){
dev_err(&client->dev, "get compass-orientation data error\n");
return -EINVAL;
}
}
else{
printk(" use default orientation\n");
}
for(i=0;i<9;i++)
data->orientation[i]= orientation[i];
ret = of_property_read_u32(np,"orientation-x",&orig_x);
if(ret!=0){
dev_err(&client->dev, "get orientation-x error\n");
return -EIO;
}
if(orig_x>0){
for(i=0;i<3;i++)
if(data->orientation[i])
data->orientation[i]=-1;
}
ret = of_property_read_u32(np,"orientation-y",&orig_y);
if(ret!=0){
dev_err(&client->dev, "get orientation-y error\n");
return -EIO;
}
if(orig_y>0){
for(i=3;i<6;i++)
if(data->orientation[i])
data->orientation[i]=-1;
}
ret = of_property_read_u32(np,"orientation-z",&orig_z);
if(ret!=0){
dev_err(&client->dev, "get orientation-z error\n");
return -EIO;
}
if(orig_z>0){
for(i=6;i<9;i++)
if(data->orientation[i])
data->orientation[i]=-1;
}
ret = of_property_read_u32(np,"compass-debug",&debug);
if(ret!=0){
dev_err(&client->dev, "get compass-debug error\n");
return -EINVAL;
}
if(client->addr)
data->address=client->addr;
else
dev_err(&client->dev, "compass-addr error\n");
if(debug){
printk("bus=%d,adapt_num=%d,addr=%x\n",data->bus, \
data->adapt_num,data->address);
for(i=0;i<size;i++)
printk("%d ",data->orientation[i]);
printk("\n");
}
return 0;
}
static int msm_eeprom_alloc_memory_map(struct msm_eeprom_ctrl_t *e_ctrl,
struct device_node *of)
{
int i, rc = 0;
char property[14];
uint32_t count = 6;
struct msm_eeprom_board_info *eb = e_ctrl->eboard_info;
rc = of_property_read_u32(of, "qcom,num-blocks", &eb->num_blocks);
CDBG("%s: qcom,num_blocks %d\n", __func__, eb->num_blocks);
if (rc < 0) {
pr_err("%s failed rc %d\n", __func__, rc);
return rc;
}
eb->eeprom_map = kzalloc((sizeof(struct eeprom_memory_map_t)
* eb->num_blocks), GFP_KERNEL);
if (!eb->eeprom_map) {
pr_err("%s failed line %d\n", __func__, __LINE__);
return -ENOMEM;
}
for (i = 0; i < eb->num_blocks; i++) {
snprintf(property, 12, "qcom,page%d", i);
rc = of_property_read_u32_array(of, property,
(uint32_t *) &eb->eeprom_map[i].page, count);
if (rc < 0) {
pr_err("%s: failed %d\n", __func__, __LINE__);
goto out;
}
snprintf(property, 14, "qcom,pageen%d", i);
rc = of_property_read_u32_array(of, property,
(uint32_t *) &eb->eeprom_map[i].pageen, count);
if (rc < 0)
pr_err("%s: pageen not needed\n", __func__);
snprintf(property, 12, "qcom,poll%d", i);
rc = of_property_read_u32_array(of, property,
(uint32_t *) &eb->eeprom_map[i].poll, count);
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
goto out;
}
snprintf(property, 12, "qcom,mem%d", i);
rc = of_property_read_u32_array(of, property,
(uint32_t *) &eb->eeprom_map[i].mem, count);
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
goto out;
}
e_ctrl->num_bytes += eb->eeprom_map[i].mem.valid_size;
}
CDBG("%s num_bytes %d\n", __func__, e_ctrl->num_bytes);
e_ctrl->memory_data = kzalloc(e_ctrl->num_bytes, GFP_KERNEL);
if (!e_ctrl->memory_data) {
pr_err("%s failed line %d\n", __func__, __LINE__);
rc = -ENOMEM;
goto out;
}
return rc;
out:
kfree(eb->eeprom_map);
return rc;
}
static int __devinit pm8941_get_config_flash(struct pm8941_flash_data *data,
struct device_node *node)
{
int rc;
u32 val;
struct device_node *node_vph;
rc = of_property_read_u32(node, "somc,headroom", &val);
if (!rc)
data->flash_cfg.headroom = (u8) val & 3;
else if (rc == -EINVAL)
data->flash_cfg.headroom = HEADROOM_300mV;
else
return rc;
rc = of_property_read_u32(node, "somc,clamp-curr-mA", &val);
if (!rc) {
val = 10 * val / 125;
if (val)
--val;
if (val > FLASH_MAX_LEVEL)
val = FLASH_MAX_LEVEL;
data->flash_cfg.clamp_curr = val;
} else if (rc == -EINVAL) {
data->flash_cfg.clamp_curr = FLASH_CLAMP_200mA;
} else {
return rc;
}
rc = of_property_read_u32(node, "somc,startup-dly", &val);
if (!rc)
data->flash_cfg.startup_dly = (u8) val & 3;
else if (rc == -EINVAL)
data->flash_cfg.startup_dly = DELAY_32us;
else
return rc;
rc = of_property_read_u32(node, "somc,hw-strobe-config", &val);
if (!rc)
data->flash_cfg.hw_strobe_config = (u8) val & 3;
else if (rc == -EINVAL)
data->flash_cfg.hw_strobe_config = 0;
else
return rc;
rc = of_property_read_u32(node, "somc,mask-enable", &val);
if (!rc)
data->flash_cfg.mask_enable = (u8) val & 7;
else if (rc == -EINVAL)
data->flash_cfg.mask_enable = 0;
else
return rc;
node_vph = of_find_node_by_name(node, "somc,vph-pwr-droop");
if (node_vph) {
rc = of_property_read_u32(node_vph, "somc,enable", &val);
if (!rc)
data->flash_cfg.vph_pwr_droop.enable = val & 1;
else if (rc == -EINVAL)
data->flash_cfg.vph_pwr_droop.enable = 0;
else
return rc;
rc = of_property_read_u32(node_vph, "somc,threshold", &val);
if (!rc)
data->flash_cfg.vph_pwr_droop.threshold = val & 7;
else if (rc == -EINVAL)
data->flash_cfg.vph_pwr_droop.threshold = 0;
else
return rc;
rc = of_property_read_u32(node_vph, "somc,debounce-time", &val);
if (!rc)
data->flash_cfg.vph_pwr_droop.debounce_time = val & 3;
else if (rc == -EINVAL)
data->flash_cfg.vph_pwr_droop.debounce_time = 0;
else
return rc;
} else {
data->flash_cfg.vph_pwr_droop.enable = 0;
data->flash_cfg.vph_pwr_droop.threshold = 0;
data->flash_cfg.vph_pwr_droop.debounce_time = 0;
}
return 0;
}
int32_t msm_eeprom_i2c_probe(struct i2c_client *client,
const struct i2c_device_id *id) {
int rc = 0;
int32_t j = 0;
uint32_t temp = 0;
struct msm_eeprom_ctrl_t *e_ctrl = NULL;
struct msm_camera_power_ctrl_t *power_info = NULL;
struct device_node *of_node = client->dev.of_node;
CDBG("%s E\n", __func__);
if (!of_node) {
pr_err("%s of_node NULL\n", __func__);
return -EINVAL;
}
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
pr_err("%s i2c_check_functionality failed\n", __func__);
goto probe_failure;
}
e_ctrl = kzalloc(sizeof(struct msm_eeprom_ctrl_t), GFP_KERNEL);
if (!e_ctrl) {
pr_err("%s:%d kzalloc failed\n", __func__, __LINE__);
return -ENOMEM;
}
e_ctrl->eeprom_v4l2_subdev_ops = &msm_eeprom_subdev_ops;
e_ctrl->eeprom_mutex = &msm_eeprom_mutex;
CDBG("%s client = %x\n", __func__, (unsigned int)client);
e_ctrl->eboard_info = kzalloc(sizeof(
struct msm_eeprom_board_info), GFP_KERNEL);
if (!e_ctrl->eboard_info) {
pr_err("%s:%d board info NULL\n", __func__, __LINE__);
return -EINVAL;
}
rc = of_property_read_u32(of_node, "qcom,slave-addr", &temp);
if (rc < 0) {
pr_err("%s failed rc %d\n", __func__, rc);
return rc;
}
power_info = &e_ctrl->eboard_info->power_info;
e_ctrl->eboard_info->i2c_slaveaddr = temp<<1; //LGE_UPDATE makes 8bit for i2c driver 2013-11-26 [email protected]
e_ctrl->i2c_client.client = client;
e_ctrl->is_supported = 0;
/* Set device type as I2C */
e_ctrl->eeprom_device_type = MSM_CAMERA_I2C_DEVICE;
e_ctrl->i2c_client.i2c_func_tbl = &msm_eeprom_qup_func_tbl;
if (e_ctrl->eboard_info->i2c_slaveaddr != 0)
e_ctrl->i2c_client.client->addr =
e_ctrl->eboard_info->i2c_slaveaddr;
power_info->clk_info = cam_8960_clk_info;
power_info->clk_info_size = ARRAY_SIZE(cam_8960_clk_info);
power_info->dev = &client->dev;
rc = of_property_read_string(of_node, "qcom,eeprom-name",
&e_ctrl->eboard_info->eeprom_name);
CDBG("%s qcom,eeprom-name %s, rc %d\n", __func__,
e_ctrl->eboard_info->eeprom_name, rc);
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
goto board_free;
}
rc = msm_eeprom_get_dt_data(e_ctrl);
if (rc)
goto board_free;
rc = msm_eeprom_alloc_memory_map(e_ctrl, of_node);
if (rc)
goto board_free;
rc = msm_camera_power_up(power_info, e_ctrl->eeprom_device_type,
&e_ctrl->i2c_client);
if (rc) {
pr_err("%s failed power up %d\n", __func__, __LINE__);
goto memdata_free;
}
rc = read_eeprom_memory(e_ctrl);
if (rc < 0) {
pr_err("%s read_eeprom_memory failed\n", __func__);
goto power_down;
}
for (j = 0; j < e_ctrl->num_bytes; j++)
CDBG("memory_data[%d] = 0x%X\n", j, e_ctrl->memory_data[j]);
// [LGE_UPDATE_S] [[email protected]] [2013-05-24] EEPROM ( of Y412B ) bring-up
#if defined(CONFIG_MACH_MSM8X10_W5_GLOBAL_COM) || defined(CONFIG_MACH_MSM8X10_W5DS_GLOBAL_COM) || defined(CONFIG_MACH_MSM8X10_W5TS_GLOBAL_COM)
if(lge_camera_info){
if(!strncmp(lge_camera_info, "imx111", 6)){
pr_err("%s (GLOBAL) call msm_eeprom_check_CRC\n", __func__);
rc = msm_eeprom_check_CRC(e_ctrl);
if (rc < 0) {
pr_err("%s read_eeprom_memory failed\n", __func__);
goto memdata_free;
}
}
}
#else
#if defined(CONFIG_IMX111)
pr_err("%s call msm_eeprom_check_CRC\n", __func__);
rc = msm_eeprom_check_CRC(e_ctrl);
if (rc < 0) {
pr_err("%s read_eeprom_memory failed\n", __func__);
goto memdata_free;
}
#endif
#endif
// [LGE_UPDATE_E] [[email protected]] [2013-05-24] EEPROM ( of Y412B ) bring-up
rc = msm_camera_power_down(power_info, e_ctrl->eeprom_device_type,
&e_ctrl->i2c_client);
if (rc) {
pr_err("failed rc %d\n", rc);
goto power_down;
}
/*IMPLEMENT READING PART*/
/* Initialize sub device */
v4l2_i2c_subdev_init(&e_ctrl->msm_sd.sd,
e_ctrl->i2c_client.client,
e_ctrl->eeprom_v4l2_subdev_ops);
v4l2_set_subdevdata(&e_ctrl->msm_sd.sd, e_ctrl);
e_ctrl->msm_sd.sd.internal_ops = &msm_eeprom_internal_ops;
e_ctrl->msm_sd.sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
media_entity_init(&e_ctrl->msm_sd.sd.entity, 0, NULL, 0);
e_ctrl->msm_sd.sd.entity.type = MEDIA_ENT_T_V4L2_SUBDEV;
e_ctrl->msm_sd.sd.entity.group_id = MSM_CAMERA_SUBDEV_EEPROM;
msm_sd_register(&e_ctrl->msm_sd);
e_ctrl->is_supported = 1;
CDBG("%s success result=%d X\n", __func__, rc);
return rc;
power_down:
msm_camera_power_down(power_info, e_ctrl->eeprom_device_type,
&e_ctrl->i2c_client);
memdata_free:
kfree(e_ctrl->memory_data);
kfree(e_ctrl->eboard_info->eeprom_map);
board_free:
kfree(e_ctrl->eboard_info);
probe_failure:
pr_err("%s failed! rc = %d\n", __func__, rc);
return rc;
}
static int ssp_parse_dt(struct device *dev,
struct ssp_data *data)
{
struct device_node *np = dev->of_node;
enum of_gpio_flags flags;
int errorno = 0;
data->mcu_int1 = of_get_named_gpio_flags(np, "ssp,mcu_int1-gpio",
0, &flags);
if (data->mcu_int1 < 0) {
errorno = data->mcu_int1;
goto dt_exit;
}
data->mcu_int2 = of_get_named_gpio_flags(np, "ssp,mcu_int2-gpio",
0, &flags);
if (data->mcu_int2 < 0) {
errorno = data->mcu_int2;
goto dt_exit;
}
data->ap_int = of_get_named_gpio_flags(np, "ssp,ap_int-gpio",
0, &flags);
if (data->ap_int < 0) {
errorno = data->ap_int;
goto dt_exit;
}
data->rst = of_get_named_gpio_flags(np, "ssp,rst-gpio",
0, &flags);
if (data->rst < 0) {
errorno = data->rst ;
goto dt_exit;
}
if (of_property_read_u32(np, "ssp,acc-position", &data->accel_position))
data->accel_position = 0;
if (of_property_read_u32(np, "ssp,mag-position", &data->mag_position))
data->mag_position = 0;
if (of_property_read_u32(np, "ssp,sns-combination", &data->sns_combination))
data->sns_combination = 0;
if (of_property_read_u32(np, "ssp,ap-rev", &data->ap_rev))
data->ap_rev = 0;
if (of_property_read_u32(np, "ssp,rotation-direction", &data->rot_direction))
data->rot_direction = 0;
errorno = gpio_request(data->mcu_int1, "mpu_ap_int1");
if (errorno) {
printk(KERN_ERR "failed to request MCU_INT2 for SSP\n");
goto dt_exit;
}
errorno = gpio_direction_input(data->mcu_int1);
if (errorno) {
printk(KERN_ERR "failed to set mcu_int1 as input\n");
goto dt_exit;
}
errorno = gpio_request(data->mcu_int2, "MCU_INT2");
if (errorno) {
printk(KERN_ERR "failed to request MCU_INT2 for SSP\n");
goto dt_exit;
}
gpio_direction_input(data->mcu_int2);
errorno = gpio_request(data->ap_int, "AP_MCU_INT");
if (errorno) {
printk(KERN_ERR "failed to request AP_INT for SSP\n");
goto dt_exit;
}
gpio_direction_output(data->ap_int, 1);
errorno = gpio_request(data->rst, "MCU_RST");
if (errorno) {
printk(KERN_ERR "failed to request MCU_RST for SSP\n");
goto dt_exit;
}
gpio_direction_output(data->rst, 1);
data->reg_hub = devm_regulator_get(dev, "hub_vreg");
if (IS_ERR(data->reg_hub)) {
pr_err("[SSP] could not get hub_vreg, %ld\n",
PTR_ERR(data->reg_hub));
} else {
regulator_enable(data->reg_hub);
}
data->reg_sns= devm_regulator_get(dev, "psns_vreg");
if (IS_ERR(data->reg_hub)) {
pr_err("[SSP] could not get psns_vreg, %ld\n",
PTR_ERR(data->reg_sns));
} else {
regulator_enable(data->reg_sns);
}
dt_exit:
return errorno;
}
static int msm_eeprom_spi_setup(struct spi_device *spi)
{
struct msm_eeprom_ctrl_t *e_ctrl = NULL;
struct msm_camera_i2c_client *client = NULL;
struct msm_camera_spi_client *spi_client;
struct msm_eeprom_board_info *eb_info;
struct msm_camera_power_ctrl_t *power_info = NULL;
int rc = 0;
e_ctrl = kzalloc(sizeof(struct msm_eeprom_ctrl_t), GFP_KERNEL);
if (!e_ctrl) {
pr_err("%s:%d kzalloc failed\n", __func__, __LINE__);
return -ENOMEM;
}
e_ctrl->eeprom_v4l2_subdev_ops = &msm_eeprom_subdev_ops;
e_ctrl->eeprom_mutex = &msm_eeprom_mutex;
client = &e_ctrl->i2c_client;
e_ctrl->is_supported = 0;
spi_client = kzalloc(sizeof(spi_client), GFP_KERNEL);
if (!spi_client) {
pr_err("%s:%d kzalloc failed\n", __func__, __LINE__);
kfree(e_ctrl);
return -ENOMEM;
}
rc = of_property_read_u32(spi->dev.of_node, "cell-index",
&e_ctrl->subdev_id);
CDBG("cell-index %d, rc %d\n", e_ctrl->subdev_id, rc);
if (rc) {
pr_err("failed rc %d\n", rc);
return rc;
}
e_ctrl->eeprom_device_type = MSM_CAMERA_SPI_DEVICE;
client->spi_client = spi_client;
spi_client->spi_master = spi;
client->i2c_func_tbl = &msm_eeprom_spi_func_tbl;
client->addr_type = MSM_CAMERA_I2C_3B_ADDR;
eb_info = kzalloc(sizeof(eb_info), GFP_KERNEL);
if (!eb_info)
goto spi_free;
e_ctrl->eboard_info = eb_info;
rc = of_property_read_string(spi->dev.of_node, "qcom,eeprom-name",
&eb_info->eeprom_name);
CDBG("%s qcom,eeprom-name %s, rc %d\n", __func__,
eb_info->eeprom_name, rc);
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
goto board_free;
}
power_info = &eb_info->power_info;
power_info->clk_info = cam_8974_clk_info;
power_info->clk_info_size = ARRAY_SIZE(cam_8974_clk_info);
power_info->dev = &spi->dev;
rc = msm_eeprom_get_dt_data(e_ctrl);
if (rc)
goto board_free;
/* set spi instruction info */
spi_client->retry_delay = 1;
spi_client->retries = 0;
if (msm_eeprom_spi_parse_of(spi_client)) {
dev_err(&spi->dev,
"%s: Error parsing device properties\n", __func__);
goto board_free;
}
rc = msm_eeprom_alloc_memory_map(e_ctrl, spi->dev.of_node);
if (rc)
goto board_free;
rc = msm_camera_power_up(power_info, e_ctrl->eeprom_device_type,
&e_ctrl->i2c_client);
if (rc) {
pr_err("failed rc %d\n", rc);
goto memmap_free;
}
/* check eeprom id */
rc = msm_eeprom_check_id(e_ctrl);
if (rc) {
CDBG("%s: eeprom not matching %d\n", __func__, rc);
goto power_down;
}
/* read eeprom */
rc = read_eeprom_memory(e_ctrl);
if (rc) {
dev_err(&spi->dev, "%s: read eeprom memory failed\n", __func__);
goto power_down;
}
rc = msm_camera_power_down(power_info, e_ctrl->eeprom_device_type,
&e_ctrl->i2c_client);
if (rc) {
pr_err("failed rc %d\n", rc);
goto memmap_free;
}
/* initiazlie subdev */
v4l2_spi_subdev_init(&e_ctrl->msm_sd.sd,
e_ctrl->i2c_client.spi_client->spi_master,
e_ctrl->eeprom_v4l2_subdev_ops);
v4l2_set_subdevdata(&e_ctrl->msm_sd.sd, e_ctrl);
e_ctrl->msm_sd.sd.internal_ops = &msm_eeprom_internal_ops;
e_ctrl->msm_sd.sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
media_entity_init(&e_ctrl->msm_sd.sd.entity, 0, NULL, 0);
e_ctrl->msm_sd.sd.entity.type = MEDIA_ENT_T_V4L2_SUBDEV;
e_ctrl->msm_sd.sd.entity.group_id = MSM_CAMERA_SUBDEV_EEPROM;
msm_sd_register(&e_ctrl->msm_sd);
e_ctrl->is_supported = 1;
CDBG("%s success result=%d X\n", __func__, rc);
return 0;
power_down:
msm_camera_power_down(power_info, e_ctrl->eeprom_device_type,
&e_ctrl->i2c_client);
memmap_free:
kfree(e_ctrl->eboard_info->eeprom_map);
kfree(e_ctrl->memory_data);
board_free:
kfree(e_ctrl->eboard_info);
spi_free:
kfree(spi_client);
return rc;
}
static int aspeed_vuart_probe(struct platform_device *pdev)
{
struct uart_8250_port port;
struct aspeed_vuart *vuart;
struct device_node *np;
struct resource *res;
u32 clk, prop;
int rc;
np = pdev->dev.of_node;
vuart = devm_kzalloc(&pdev->dev, sizeof(*vuart), GFP_KERNEL);
if (!vuart)
return -ENOMEM;
vuart->dev = &pdev->dev;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
vuart->regs = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(vuart->regs))
return PTR_ERR(vuart->regs);
memset(&port, 0, sizeof(port));
port.port.private_data = vuart;
port.port.membase = vuart->regs;
port.port.mapbase = res->start;
port.port.mapsize = resource_size(res);
port.port.startup = aspeed_vuart_startup;
port.port.shutdown = aspeed_vuart_shutdown;
port.port.dev = &pdev->dev;
rc = sysfs_create_group(&vuart->dev->kobj, &aspeed_vuart_attr_group);
if (rc < 0)
return rc;
if (of_property_read_u32(np, "clock-frequency", &clk)) {
vuart->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(vuart->clk)) {
dev_warn(&pdev->dev,
"clk or clock-frequency not defined\n");
rc = PTR_ERR(vuart->clk);
goto err_sysfs_remove;
}
rc = clk_prepare_enable(vuart->clk);
if (rc < 0)
goto err_sysfs_remove;
clk = clk_get_rate(vuart->clk);
}
/* If current-speed was set, then try not to change it. */
if (of_property_read_u32(np, "current-speed", &prop) == 0)
port.port.custom_divisor = clk / (16 * prop);
/* Check for shifted address mapping */
if (of_property_read_u32(np, "reg-offset", &prop) == 0)
port.port.mapbase += prop;
/* Check for registers offset within the devices address range */
if (of_property_read_u32(np, "reg-shift", &prop) == 0)
port.port.regshift = prop;
/* Check for fifo size */
if (of_property_read_u32(np, "fifo-size", &prop) == 0)
port.port.fifosize = prop;
/* Check for a fixed line number */
rc = of_alias_get_id(np, "serial");
if (rc >= 0)
port.port.line = rc;
port.port.irq = irq_of_parse_and_map(np, 0);
port.port.irqflags = IRQF_SHARED;
port.port.iotype = UPIO_MEM;
port.port.type = PORT_16550A;
port.port.uartclk = clk;
port.port.flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF
| UPF_FIXED_PORT | UPF_FIXED_TYPE | UPF_NO_THRE_TEST;
if (of_property_read_bool(np, "no-loopback-test"))
port.port.flags |= UPF_SKIP_TEST;
if (port.port.fifosize)
port.capabilities = UART_CAP_FIFO;
if (of_property_read_bool(np, "auto-flow-control"))
port.capabilities |= UART_CAP_AFE;
rc = serial8250_register_8250_port(&port);
if (rc < 0)
goto err_clk_disable;
vuart->line = rc;
aspeed_vuart_set_enabled(vuart, true);
aspeed_vuart_set_host_tx_discard(vuart, true);
platform_set_drvdata(pdev, vuart);
return 0;
err_clk_disable:
clk_disable_unprepare(vuart->clk);
irq_dispose_mapping(port.port.irq);
err_sysfs_remove:
sysfs_remove_group(&vuart->dev->kobj, &aspeed_vuart_attr_group);
return rc;
}
static int32_t msm_eeprom_platform_probe(struct platform_device *pdev)
{
int32_t rc = 0;
int32_t j = 0;
uint32_t temp;
struct msm_camera_cci_client *cci_client = NULL;
struct msm_eeprom_ctrl_t *e_ctrl = NULL;
struct msm_eeprom_board_info *eb_info = NULL;
struct device_node *of_node = pdev->dev.of_node;
struct msm_camera_power_ctrl_t *power_info = NULL;
CDBG("%s E\n", __func__);
e_ctrl = kzalloc(sizeof(struct msm_eeprom_ctrl_t), GFP_KERNEL);
if (!e_ctrl) {
pr_err("%s:%d kzalloc failed\n", __func__, __LINE__);
return -ENOMEM;
}
e_ctrl->eeprom_v4l2_subdev_ops = &msm_eeprom_subdev_ops;
e_ctrl->eeprom_mutex = &msm_eeprom_mutex;
e_ctrl->is_supported = 0;
if (!of_node) {
pr_err("%s dev.of_node NULL\n", __func__);
kfree(e_ctrl);
return -EINVAL;
}
rc = of_property_read_u32(of_node, "cell-index",
&pdev->id);
CDBG("cell-index %d, rc %d\n", pdev->id, rc);
if (rc < 0) {
pr_err("failed rc %d\n", rc);
kfree(e_ctrl);
return rc;
}
e_ctrl->subdev_id = pdev->id;
rc = of_property_read_u32(of_node, "qcom,cci-master",
&e_ctrl->cci_master);
CDBG("qcom,cci-master %d, rc %d\n", e_ctrl->cci_master, rc);
if (rc < 0) {
pr_err("%s failed rc %d\n", __func__, rc);
kfree(e_ctrl);
return rc;
}
rc = of_property_read_u32(of_node, "qcom,slave-addr",
&temp);
if (rc < 0) {
pr_err("%s failed rc %d\n", __func__, rc);
kfree(e_ctrl);
return rc;
}
/* Set platform device handle */
e_ctrl->pdev = pdev;
/* Set device type as platform device */
e_ctrl->eeprom_device_type = MSM_CAMERA_PLATFORM_DEVICE;
e_ctrl->i2c_client.i2c_func_tbl = &msm_eeprom_cci_func_tbl;
e_ctrl->i2c_client.cci_client = kzalloc(sizeof(
struct msm_camera_cci_client), GFP_KERNEL);
if (!e_ctrl->i2c_client.cci_client) {
pr_err("%s failed no memory\n", __func__);
kfree(e_ctrl);
return -ENOMEM;
}
e_ctrl->eboard_info = kzalloc(sizeof(
struct msm_eeprom_board_info), GFP_KERNEL);
if (!e_ctrl->eboard_info) {
pr_err("%s failed line %d\n", __func__, __LINE__);
rc = -ENOMEM;
goto cciclient_free;
}
eb_info = e_ctrl->eboard_info;
power_info = &eb_info->power_info;
eb_info->i2c_slaveaddr = temp;
power_info->clk_info = cam_8974_clk_info;
power_info->clk_info_size = ARRAY_SIZE(cam_8974_clk_info);
power_info->dev = &pdev->dev;
CDBG("qcom,slave-addr = 0x%X\n", eb_info->i2c_slaveaddr);
cci_client = e_ctrl->i2c_client.cci_client;
cci_client->cci_subdev = msm_cci_get_subdev();
cci_client->cci_i2c_master = e_ctrl->cci_master;
cci_client->sid = eb_info->i2c_slaveaddr >> 1;
cci_client->retries = 3;
cci_client->id_map = 0;
rc = of_property_read_string(of_node, "qcom,eeprom-name",
&eb_info->eeprom_name);
CDBG("%s qcom,eeprom-name %s, rc %d\n", __func__,
eb_info->eeprom_name, rc);
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
goto board_free;
}
rc = msm_eeprom_get_dt_data(e_ctrl);
if (rc)
goto board_free;
rc = msm_eeprom_alloc_memory_map(e_ctrl, of_node);
if (rc)
goto board_free;
rc = msm_camera_power_up(power_info, e_ctrl->eeprom_device_type,
&e_ctrl->i2c_client);
if (rc) {
pr_err("failed rc %d\n", rc);
goto memdata_free;
}
rc = read_eeprom_memory(e_ctrl);
if (rc < 0) {
pr_err("%s read_eeprom_memory failed\n", __func__);
goto power_down;
}
pr_err("%s line %d\n", __func__, __LINE__);
for (j = 0; j < e_ctrl->num_bytes; j++)
CDBG("memory_data[%d] = 0x%X\n", j, e_ctrl->memory_data[j]);
// [LGE_UPDATE_S] [[email protected]] [2013-05-24] EEPROM ( of Y412B ) bring-up
#if defined(CONFIG_IMX111)
rc = msm_eeprom_check_CRC(e_ctrl);
if (rc < 0) {
pr_err("%s read_eeprom_memory failed\n", __func__);
goto memdata_free;
}
#endif
// [LGE_UPDATE_E] [[email protected]] [2013-05-24] EEPROM ( of Y412B ) bring-up
rc = msm_camera_power_down(power_info, e_ctrl->eeprom_device_type,
&e_ctrl->i2c_client);
if (rc) {
pr_err("failed rc %d\n", rc);
goto memdata_free;
}
v4l2_subdev_init(&e_ctrl->msm_sd.sd,
e_ctrl->eeprom_v4l2_subdev_ops);
v4l2_set_subdevdata(&e_ctrl->msm_sd.sd, e_ctrl);
platform_set_drvdata(pdev, &e_ctrl->msm_sd.sd);
e_ctrl->msm_sd.sd.internal_ops = &msm_eeprom_internal_ops;
e_ctrl->msm_sd.sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
snprintf(e_ctrl->msm_sd.sd.name,
ARRAY_SIZE(e_ctrl->msm_sd.sd.name), "msm_eeprom");
media_entity_init(&e_ctrl->msm_sd.sd.entity, 0, NULL, 0);
e_ctrl->msm_sd.sd.entity.type = MEDIA_ENT_T_V4L2_SUBDEV;
e_ctrl->msm_sd.sd.entity.group_id = MSM_CAMERA_SUBDEV_EEPROM;
msm_sd_register(&e_ctrl->msm_sd);
e_ctrl->is_supported = 1;
CDBG("%s X\n", __func__);
return rc;
power_down:
msm_camera_power_down(power_info, e_ctrl->eeprom_device_type,
&e_ctrl->i2c_client);
memdata_free:
kfree(e_ctrl->memory_data);
kfree(eb_info->eeprom_map);
board_free:
kfree(e_ctrl->eboard_info);
cciclient_free:
kfree(e_ctrl->i2c_client.cci_client);
kfree(e_ctrl);
return rc;
}
static int spi_qup_probe(struct platform_device *pdev)
{
struct spi_master *master;
struct clk *iclk, *cclk;
struct spi_qup *controller;
struct resource *res;
struct device *dev;
void __iomem *base;
u32 max_freq, iomode, num_cs;
int ret, irq, size;
dev = &pdev->dev;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
base = devm_ioremap_resource(dev, res);
if (IS_ERR(base))
return PTR_ERR(base);
irq = platform_get_irq(pdev, 0);
if (irq < 0)
return irq;
cclk = devm_clk_get(dev, "core");
if (IS_ERR(cclk))
return PTR_ERR(cclk);
iclk = devm_clk_get(dev, "iface");
if (IS_ERR(iclk))
return PTR_ERR(iclk);
/* This is optional parameter */
if (of_property_read_u32(dev->of_node, "spi-max-frequency", &max_freq))
max_freq = SPI_MAX_RATE;
if (!max_freq || max_freq > SPI_MAX_RATE) {
dev_err(dev, "invalid clock frequency %d\n", max_freq);
return -ENXIO;
}
ret = clk_prepare_enable(cclk);
if (ret) {
dev_err(dev, "cannot enable core clock\n");
return ret;
}
ret = clk_prepare_enable(iclk);
if (ret) {
clk_disable_unprepare(cclk);
dev_err(dev, "cannot enable iface clock\n");
return ret;
}
master = spi_alloc_master(dev, sizeof(struct spi_qup));
if (!master) {
clk_disable_unprepare(cclk);
clk_disable_unprepare(iclk);
dev_err(dev, "cannot allocate master\n");
return -ENOMEM;
}
/* use num-cs unless not present or out of range */
if (of_property_read_u32(dev->of_node, "num-cs", &num_cs) ||
num_cs > SPI_NUM_CHIPSELECTS)
master->num_chipselect = SPI_NUM_CHIPSELECTS;
else
master->num_chipselect = num_cs;
master->bus_num = pdev->id;
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP;
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
master->max_speed_hz = max_freq;
master->transfer_one = spi_qup_transfer_one;
master->dev.of_node = pdev->dev.of_node;
master->auto_runtime_pm = true;
platform_set_drvdata(pdev, master);
controller = spi_master_get_devdata(master);
controller->dev = dev;
controller->base = base;
controller->iclk = iclk;
controller->cclk = cclk;
controller->irq = irq;
/* set v1 flag if device is version 1 */
if (of_device_is_compatible(dev->of_node, "qcom,spi-qup-v1.1.1"))
controller->qup_v1 = 1;
spin_lock_init(&controller->lock);
init_completion(&controller->done);
iomode = readl_relaxed(base + QUP_IO_M_MODES);
size = QUP_IO_M_OUTPUT_BLOCK_SIZE(iomode);
if (size)
controller->out_blk_sz = size * 16;
else
controller->out_blk_sz = 4;
size = QUP_IO_M_INPUT_BLOCK_SIZE(iomode);
if (size)
controller->in_blk_sz = size * 16;
else
controller->in_blk_sz = 4;
size = QUP_IO_M_OUTPUT_FIFO_SIZE(iomode);
controller->out_fifo_sz = controller->out_blk_sz * (2 << size);
size = QUP_IO_M_INPUT_FIFO_SIZE(iomode);
controller->in_fifo_sz = controller->in_blk_sz * (2 << size);
dev_info(dev, "IN:block:%d, fifo:%d, OUT:block:%d, fifo:%d\n",
controller->in_blk_sz, controller->in_fifo_sz,
controller->out_blk_sz, controller->out_fifo_sz);
writel_relaxed(1, base + QUP_SW_RESET);
ret = spi_qup_set_state(controller, QUP_STATE_RESET);
if (ret) {
dev_err(dev, "cannot set RESET state\n");
goto error;
}
writel_relaxed(0, base + QUP_OPERATIONAL);
writel_relaxed(0, base + QUP_IO_M_MODES);
if (!controller->qup_v1)
writel_relaxed(0, base + QUP_OPERATIONAL_MASK);
writel_relaxed(SPI_ERROR_CLK_UNDER_RUN | SPI_ERROR_CLK_OVER_RUN,
base + SPI_ERROR_FLAGS_EN);
/* if earlier version of the QUP, disable INPUT_OVERRUN */
if (controller->qup_v1)
writel_relaxed(QUP_ERROR_OUTPUT_OVER_RUN |
QUP_ERROR_INPUT_UNDER_RUN | QUP_ERROR_OUTPUT_UNDER_RUN,
base + QUP_ERROR_FLAGS_EN);
writel_relaxed(0, base + SPI_CONFIG);
writel_relaxed(SPI_IO_C_NO_TRI_STATE, base + SPI_IO_CONTROL);
ret = devm_request_irq(dev, irq, spi_qup_qup_irq,
IRQF_TRIGGER_HIGH, pdev->name, controller);
if (ret)
goto error;
pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC);
pm_runtime_use_autosuspend(dev);
pm_runtime_set_active(dev);
pm_runtime_enable(dev);
ret = devm_spi_register_master(dev, master);
if (ret)
goto disable_pm;
return 0;
disable_pm:
pm_runtime_disable(&pdev->dev);
error:
clk_disable_unprepare(cclk);
clk_disable_unprepare(iclk);
spi_master_put(master);
return ret;
}
static int lm3630_parse_dt(struct device *dev,
struct backlight_platform_data *pdata)
{
int rc = 0, i;
u32 *array;
struct device_node *np = dev->of_node;
pdata->gpio = of_get_named_gpio_flags(np,
"lm3630,lcd_bl_en", 0, NULL);
rc = of_property_read_u32(np, "lm3630,max_current",
&pdata->max_current);
rc = of_property_read_u32(np, "lm3630,min_brightness",
&pdata->min_brightness);
rc = of_property_read_u32(np, "lm3630,default_brightness",
&pdata->default_brightness);
rc = of_property_read_u32(np, "lm3630,max_brightness",
&pdata->max_brightness);
rc = of_property_read_u32(np, "lm3630,enable_pwm",
&lm3630_pwm_enable);
if(rc == -EINVAL)
lm3630_pwm_enable = 1;
rc = of_property_read_u32(np, "lm3630,blmap_size",
&pdata->blmap_size);
if (pdata->blmap_size) {
array = kzalloc(sizeof(u32) * pdata->blmap_size, GFP_KERNEL);
if (!array)
return -ENOMEM;
rc = of_property_read_u32_array(np, "lm3630,blmap", array, pdata->blmap_size);
if (rc) {
pr_err("%s:%d, uable to read backlight map\n",__func__, __LINE__);
return -EINVAL;
}
pdata->blmap = kzalloc(sizeof(char) * pdata->blmap_size, GFP_KERNEL);
if (!pdata->blmap)
return -ENOMEM;
for (i = 0; i < pdata->blmap_size; i++ )
pdata->blmap[i] = (char)array[i];
if (array)
kfree(array);
} else {
pdata->blmap = NULL;
}
pr_debug("%s gpio: %d, max_current: %d, min: %d, "
"default: %d, max: %d, pwm : %d , blmap_size : %d\n",
__func__, pdata->gpio,
pdata->max_current,
pdata->min_brightness,
pdata->default_brightness,
pdata->max_brightness,
lm3630_pwm_enable,
pdata->blmap_size);
return rc;
}
static int32_t msm_sensor_driver_get_dt_data(struct msm_sensor_ctrl_t *s_ctrl)
{
int32_t rc = 0;
struct msm_camera_sensor_board_info *sensordata = NULL;
struct device_node *of_node = s_ctrl->of_node;
uint32_t cell_id;
s_ctrl->sensordata = kzalloc(sizeof(*sensordata), GFP_KERNEL);
if (!s_ctrl->sensordata) {
pr_err("failed: no memory");
return -ENOMEM;
}
sensordata = s_ctrl->sensordata;
/*
* Read cell index - this cell index will be the camera slot where
* this camera will be mounted
*/
rc = of_property_read_u32(of_node, "cell-index", &cell_id);
if (rc < 0) {
pr_err("failed: cell-index rc %d", rc);
goto FREE_SENSOR_DATA;
}
s_ctrl->id = cell_id;
/* Validate cell_id */
if (cell_id >= MAX_CAMERAS) {
pr_err("failed: invalid cell_id %d", cell_id);
rc = -EINVAL;
goto FREE_SENSOR_DATA;
}
/* Check whether g_sctrl is already filled for this cell_id */
if (g_sctrl[cell_id]) {
pr_err("failed: sctrl already filled for cell_id %d", cell_id);
rc = -EINVAL;
goto FREE_SENSOR_DATA;
}
/* Read subdev info */
rc = msm_sensor_get_sub_module_index(of_node, &sensordata->sensor_info);
if (rc < 0) {
pr_err("failed");
goto FREE_SENSOR_DATA;
}
/* Read vreg information */
rc = msm_camera_get_dt_vreg_data(of_node,
&sensordata->power_info.cam_vreg,
&sensordata->power_info.num_vreg);
if (rc < 0) {
pr_err("failed: msm_camera_get_dt_vreg_data rc %d", rc);
goto FREE_SUB_MODULE_DATA;
}
/* Read gpio information */
rc = msm_sensor_driver_get_gpio_data(sensordata, of_node);
if (rc < 0) {
pr_err("failed: msm_sensor_driver_get_gpio_data rc %d", rc);
goto FREE_VREG_DATA;
}
/* Get CCI master */
rc = of_property_read_u32(of_node, "qcom,cci-master",
&s_ctrl->cci_i2c_master);
CDBG("qcom,cci-master %d, rc %d", s_ctrl->cci_i2c_master, rc);
if (rc < 0) {
/* Set default master 0 */
s_ctrl->cci_i2c_master = MASTER_0;
rc = 0;
}
/* Get mount angle */
if (0 > of_property_read_u32(of_node, "qcom,mount-angle",
&sensordata->sensor_info->sensor_mount_angle)) {
/* Invalidate mount angle flag */
sensordata->sensor_info->is_mount_angle_valid = 0;
sensordata->sensor_info->sensor_mount_angle = 0;
} else {
sensordata->sensor_info->is_mount_angle_valid = 1;
}
CDBG("%s qcom,mount-angle %d\n", __func__,
sensordata->sensor_info->sensor_mount_angle);
if (0 > of_property_read_u32(of_node, "qcom,sensor-position",
&sensordata->sensor_info->position)) {
CDBG("%s:%d Invalid sensor position\n", __func__, __LINE__);
sensordata->sensor_info->position = INVALID_CAMERA_B;
}
if (0 > of_property_read_u32(of_node, "qcom,sensor-mode",
&sensordata->sensor_info->modes_supported)) {
CDBG("%s:%d Invalid sensor mode supported\n",
__func__, __LINE__);
sensordata->sensor_info->modes_supported = CAMERA_MODE_INVALID;
}
/* Get vdd-cx regulator */
/*Optional property, don't return error if absent */
of_property_read_string(of_node, "qcom,vdd-cx-name",
&sensordata->misc_regulator);
CDBG("qcom,misc_regulator %s", sensordata->misc_regulator);
s_ctrl->set_mclk_23880000 = of_property_read_bool(of_node,
"qcom,mclk-23880000");
CDBG("%s qcom,mclk-23880000 = %d\n", __func__,
s_ctrl->set_mclk_23880000);
return rc;
FREE_VREG_DATA:
kfree(sensordata->power_info.cam_vreg);
FREE_SUB_MODULE_DATA:
kfree(sensordata->sensor_info);
FREE_SENSOR_DATA:
kfree(sensordata);
return rc;
}
static struct exynos_dp_platdata *exynos_dp_dt_parse_pdata(struct device *dev)
{
struct device_node *dp_node = dev->of_node;
struct exynos_dp_platdata *pd;
struct video_info *dp_video_config;
int ret = -1;
pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);
if (!pd) {
dev_err(dev, "memory allocation for pdata failed\n");
return ERR_PTR(-ENOMEM);
}
dp_video_config = devm_kzalloc(dev,
sizeof(*dp_video_config), GFP_KERNEL);
if (!dp_video_config) {
dev_err(dev, "memory allocation for video config failed\n");
return ERR_PTR(-ENOMEM);
}
pd->video_info = dp_video_config;
dp_video_config->h_sync_polarity =
of_property_read_bool(dp_node, "hsync-active-high");
dp_video_config->v_sync_polarity =
of_property_read_bool(dp_node, "vsync-active-high");
dp_video_config->interlaced =
of_property_read_bool(dp_node, "interlaced");
if (of_property_read_u32(dp_node, "samsung,color-space",
&dp_video_config->color_space)) {
dev_err(dev, "failed to get color-space\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,dynamic-range",
&dp_video_config->dynamic_range)) {
dev_err(dev, "failed to get dynamic-range\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,ycbcr-coeff",
&dp_video_config->ycbcr_coeff)) {
dev_err(dev, "failed to get ycbcr-coeff\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,color-depth",
&dp_video_config->color_depth)) {
dev_err(dev, "failed to get color-depth\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,link-rate",
&dp_video_config->link_rate)) {
dev_err(dev, "failed to get link-rate\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,lane-count",
&dp_video_config->lane_count)) {
dev_err(dev, "failed to get lane-count\n");
return ERR_PTR(-EINVAL);
}
ret = exynos_parse_gpio(dev);
if (ret != 0)
return NULL;
return pd;
}
static int sifive_spi_probe(struct platform_device *pdev)
{
struct sifive_spi *spi;
struct resource *res;
int ret, irq, num_cs;
u32 cs_bits, max_bits_per_word;
struct spi_master *master;
master = spi_alloc_master(&pdev->dev, sizeof(struct sifive_spi));
if (!master) {
dev_err(&pdev->dev, "out of memory\n");
return -ENOMEM;
}
spi = spi_master_get_devdata(master);
init_completion(&spi->done);
platform_set_drvdata(pdev, master);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
spi->regs = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(spi->regs)) {
ret = PTR_ERR(spi->regs);
goto put_master;
}
spi->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(spi->clk)) {
dev_err(&pdev->dev, "Unable to find bus clock\n");
ret = PTR_ERR(spi->clk);
goto put_master;
}
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
dev_err(&pdev->dev, "Unable to find interrupt\n");
ret = irq;
goto put_master;
}
/* Optional parameters */
ret =
of_property_read_u32(pdev->dev.of_node, "sifive,fifo-depth",
&spi->fifo_depth);
if (ret < 0)
spi->fifo_depth = SIFIVE_SPI_DEFAULT_DEPTH;
ret =
of_property_read_u32(pdev->dev.of_node, "sifive,max-bits-per-word",
&max_bits_per_word);
if (!ret && max_bits_per_word < 8) {
dev_err(&pdev->dev, "Only 8bit SPI words supported by the driver\n");
ret = -EINVAL;
goto put_master;
}
/* Spin up the bus clock before hitting registers */
ret = clk_prepare_enable(spi->clk);
if (ret) {
dev_err(&pdev->dev, "Unable to enable bus clock\n");
goto put_master;
}
/* probe the number of CS lines */
spi->cs_inactive = sifive_spi_read(spi, SIFIVE_SPI_REG_CSDEF);
sifive_spi_write(spi, SIFIVE_SPI_REG_CSDEF, 0xffffffffU);
cs_bits = sifive_spi_read(spi, SIFIVE_SPI_REG_CSDEF);
sifive_spi_write(spi, SIFIVE_SPI_REG_CSDEF, spi->cs_inactive);
if (!cs_bits) {
dev_err(&pdev->dev, "Could not auto probe CS lines\n");
ret = -EINVAL;
goto put_master;
}
num_cs = ilog2(cs_bits) + 1;
if (num_cs > SIFIVE_SPI_MAX_CS) {
dev_err(&pdev->dev, "Invalid number of spi slaves\n");
ret = -EINVAL;
goto put_master;
}
/* Define our master */
master->dev.of_node = pdev->dev.of_node;
master->bus_num = pdev->id;
master->num_chipselect = num_cs;
master->mode_bits = SPI_CPHA | SPI_CPOL
| SPI_CS_HIGH | SPI_LSB_FIRST
| SPI_TX_DUAL | SPI_TX_QUAD
| SPI_RX_DUAL | SPI_RX_QUAD;
/* TODO: add driver support for bits_per_word < 8
* we need to "left-align" the bits (unless SPI_LSB_FIRST)
*/
master->bits_per_word_mask = SPI_BPW_MASK(8);
master->flags = SPI_CONTROLLER_MUST_TX | SPI_MASTER_GPIO_SS;
master->prepare_message = sifive_spi_prepare_message;
master->set_cs = sifive_spi_set_cs;
master->transfer_one = sifive_spi_transfer_one;
pdev->dev.dma_mask = NULL;
/* Configure the SPI master hardware */
sifive_spi_init(spi);
/* Register for SPI Interrupt */
ret = devm_request_irq(&pdev->dev, irq, sifive_spi_irq, 0,
dev_name(&pdev->dev), spi);
if (ret) {
dev_err(&pdev->dev, "Unable to bind to interrupt\n");
goto put_master;
}
dev_info(&pdev->dev, "mapped; irq=%d, cs=%d\n",
irq, master->num_chipselect);
ret = devm_spi_register_master(&pdev->dev, master);
if (ret < 0) {
dev_err(&pdev->dev, "spi_register_master failed\n");
goto put_master;
}
return 0;
put_master:
spi_master_put(master);
return ret;
}
/*
* Translate OpenFirmware node properties into platform_data
*/
static struct gpio_keys_platform_data *
gpio_keys_get_devtree_pdata(struct device *dev)
{
struct device_node *node, *pp;
struct gpio_keys_platform_data *pdata;
struct gpio_keys_button *button;
int error;
int nbuttons;
int i;
node = dev->of_node;
if (!node) {
error = -ENODEV;
goto err_out;
}
nbuttons = of_get_child_count(node);
if (nbuttons == 0) {
error = -ENODEV;
goto err_out;
}
pdata = kzalloc(sizeof(*pdata) + nbuttons * (sizeof *button),
GFP_KERNEL);
if (!pdata) {
error = -ENOMEM;
goto err_out;
}
pdata->buttons = (struct gpio_keys_button *)(pdata + 1);
pdata->nbuttons = nbuttons;
pdata->rep = !!of_get_property(node, "autorepeat", NULL);
pdata->name = of_get_property(node, "input-name", NULL);
i = 0;
for_each_child_of_node(node, pp) {
int gpio;
enum of_gpio_flags flags;
if (!of_find_property(pp, "gpios", NULL)) {
pdata->nbuttons--;
dev_warn(dev, "Found button without gpios\n");
continue;
}
gpio = of_get_gpio_flags(pp, 0, &flags);
if (gpio < 0) {
error = gpio;
if (error != -EPROBE_DEFER)
dev_err(dev,
"Failed to get gpio flags, error: %d\n",
error);
goto err_free_pdata;
}
button = &pdata->buttons[i++];
button->gpio = gpio;
button->active_low = flags & OF_GPIO_ACTIVE_LOW;
if (of_property_read_u32(pp, "linux,code", &button->code)) {
dev_err(dev, "Button without keycode: 0x%x\n",
button->gpio);
error = -EINVAL;
goto err_free_pdata;
}
button->desc = of_get_property(pp, "label", NULL);
if (of_property_read_u32(pp, "linux,input-type", &button->type))
button->type = EV_KEY;
button->wakeup = !!of_get_property(pp, "gpio-key,wakeup", NULL);
if (of_property_read_u32(pp, "debounce-interval",
&button->debounce_interval))
button->debounce_interval = 5;
}
static int msm_ssphy_probe(struct platform_device *pdev)
{
struct msm_ssphy *phy;
struct device *dev = &pdev->dev;
struct resource *res;
int ret = 0;
phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
if (!phy)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(dev, "missing memory base resource\n");
return -ENODEV;
}
phy->base = devm_ioremap_nocache(dev, res->start, resource_size(res));
if (!phy->base) {
dev_err(dev, "ioremap failed\n");
return -ENODEV;
}
if (of_get_property(dev->of_node, "qti,primary-phy", NULL)) {
dev_dbg(dev, "secondary HSPHY\n");
phy->phy.flags |= ENABLE_SECONDARY_PHY;
}
ret = of_property_read_u32_array(dev->of_node, "qti,vdd-voltage-level",
(u32 *) phy->vdd_levels,
ARRAY_SIZE(phy->vdd_levels));
if (ret) {
dev_err(dev, "error reading qti,vdd-voltage-level property\n");
return ret;
}
phy->phy.dev = dev;
phy->vdd = devm_regulator_get(dev, "vdd");
if (IS_ERR(phy->vdd)) {
dev_err(dev, "unable to get vdd supply\n");
return PTR_ERR(phy->vdd);
}
phy->vdda18 = devm_regulator_get(dev, "vdda18");
if (IS_ERR(phy->vdda18)) {
dev_err(dev, "unable to get vdda18 supply\n");
return PTR_ERR(phy->vdda18);
}
ret = msm_ssusb_config_vdd(phy, 1);
if (ret) {
dev_err(dev, "ssusb vdd_dig configuration failed\n");
return ret;
}
ret = regulator_enable(phy->vdd);
if (ret) {
dev_err(dev, "unable to enable the ssusb vdd_dig\n");
goto unconfig_ss_vdd;
}
ret = msm_ssusb_ldo_enable(phy, 1);
if (ret) {
dev_err(dev, "ssusb vreg enable failed\n");
goto disable_ss_vdd;
}
platform_set_drvdata(pdev, phy);
if (of_property_read_bool(dev->of_node, "qti,vbus-valid-override"))
phy->phy.flags |= PHY_VBUS_VALID_OVERRIDE;
if (of_property_read_u32(dev->of_node, "qti,deemphasis-value",
&phy->deemphasis_val))
dev_dbg(dev, "unable to read ssphy deemphasis value\n");
phy->phy.init = msm_ssphy_init;
phy->phy.set_suspend = msm_ssphy_set_suspend;
phy->phy.set_params = msm_ssphy_set_params;
phy->phy.post_init = msm_ssphy_post_init;
phy->phy.notify_connect = msm_ssphy_notify_connect;
phy->phy.notify_disconnect = msm_ssphy_notify_disconnect;
phy->phy.type = USB_PHY_TYPE_USB3;
ret = usb_add_phy_dev(&phy->phy);
if (ret)
goto disable_ss_ldo;
return 0;
disable_ss_ldo:
msm_ssusb_ldo_enable(phy, 0);
disable_ss_vdd:
regulator_disable(phy->vdd);
unconfig_ss_vdd:
msm_ssusb_config_vdd(phy, 0);
return ret;
}
static int bq24297_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
struct bq24297_chip *chip;
struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
struct device_node *np = client->dev.of_node;
struct pinctrl *pinctrl;
int ret = 0;
dev_info(&client->dev, "%s: addr=0x%x @ IIC%d, irq=%d\n",
client->name,client->addr,client->adapter->nr,client->irq);
if (!i2c_check_functionality(adapter, I2C_FUNC_I2C))//I2C_FUNC_SMBUS_BYTE
return -EIO;
chip = kzalloc(sizeof(*chip), GFP_KERNEL);
if (!chip)
return -ENOMEM;
this_chip = chip;
chip->client = client;
i2c_set_clientdata(client, chip);
of_property_read_u32(np, "debug", &bq24297_dbg);
ret = bq24297_hw_init();
if (ret < 0)
{
goto err_hw_init;
}
bq24297_read_version();
chip->usb.name = "usb";
chip->usb.type = POWER_SUPPLY_TYPE_USB;
chip->usb.supplied_to = supply_to_list;
chip->usb.num_supplicants = ARRAY_SIZE(supply_to_list);
chip->usb.get_property = bq24297_power_get_property;
chip->usb.properties = bq24297_power_props;
chip->usb.num_properties = ARRAY_SIZE(bq24297_power_props);
chip->ac.name = "ac";
chip->ac.type = POWER_SUPPLY_TYPE_MAINS;
chip->ac.supplied_to = supply_to_list;
chip->ac.num_supplicants = ARRAY_SIZE(supply_to_list);
chip->ac.get_property = bq24297_power_get_property;
chip->ac.properties = bq24297_power_props;
chip->ac.num_properties = ARRAY_SIZE(bq24297_power_props);
power_supply_register(&client->dev, &chip->usb);
power_supply_register(&client->dev, &chip->ac);
chip->battery = power_supply_get_by_name("battery");
ret = sysfs_create_group(&client->dev.kobj, &bq24297_attr_group);
if (ret)
{
dev_err(&client->dev, "create sysfs error\n");
goto err_create_sysfs;
}
pinctrl = devm_pinctrl_get_select_default(&client->dev);
if (IS_ERR(pinctrl))
{
dev_err(&client->dev, "pinctrl error\n");
goto err_pinctrl;
}
INIT_DELAYED_WORK(&chip->work_status, bq24297_status_func);
chip->chg_int_gpio = of_get_named_gpio(np, "bq24297,chg_int", 0);
chip->chg_int_irq = gpio_to_irq(chip->chg_int_gpio);
//gpio_set_debounce(chip->chg_int_gpio, 1);// TODO
ret = request_irq(chip->chg_int_irq, chg_int_func,
IRQF_TRIGGER_RISING, "chg_int", NULL);
if (ret)
{
dev_err(&client->dev, "request_irq error\n");
goto err_request_irq;
}
return 0;
err_request_irq:
err_pinctrl:
sysfs_remove_group(&client->dev.kobj, &bq24297_attr_group);
err_create_sysfs:
power_supply_unregister(&chip->usb);
power_supply_unregister(&chip->ac);
err_hw_init:
kfree(chip);
return ret;
}
