Exemplo n.º 1
0
int main (void)
{
	board_init();

	twim_options_t twim_opt;
	twim_opt.chip = 0x38;
	twim_opt.pba_hz = PBA_HZ;
	twim_opt.speed = TWI_STD_MODE_SPEED;
	twim_opt.smbus = 0;
	
	twim_master_init(&AVR32_TWIM0, &twim_opt);
	sensor_acc_init();
	avr32_gpio_port_t *led_port = &AVR32_GPIO.port[MYLED/32]; //.pvr
	
	// 	avr32_gpio_port_t *button_port = &AVR32_GPIO.port[GPIO_PUSH_BUTTON_0/32]; //.pvr
	// 	button_port->gpers = (1<<(GPIO_PUSH_BUTTON_0&0x1f));
	// 	button_port->oderc = (1<<(GPIO_PUSH_BUTTON_0&0x1f));
	//
	uint32_t i = 0;
	while(1)
	{
		// 		while ((button_port->pvr& (1<<(GPIO_PUSH_BUTTON_0&0x1f))))
		// 			;
		if((i==1000)){
			led_port->gpers = (1<<(MYLED&0x1f));
			led_port->oders = (1<<(MYLED&0x1f));
			led_port->ovrt = (1<<(MYLED&0x1f));
			//
			i = 0;
		}
		i++;
	}
	// Insert application code here, after the board has been initialized.
}
Exemplo n.º 2
0
void adxl345_driver_init_slow(void) 
{
	static twim_options_t twi_opt = 
	{
		.pba_hz = 64000000, 
		.speed	= 400000,
		.chip	= ADXL_ALT_SLAVE_ADDRESS, 
		.smbus	= false
	};

	twim_master_init(&AVR32_TWIM0, &twi_opt);
	twim_write(&AVR32_TWIM0, (uint8_t*)&default_configuration, 2, ADXL_ALT_SLAVE_ADDRESS, false);
	twim_write(&AVR32_TWIM0, (uint8_t*)&data_configuration, 2, ADXL_ALT_SLAVE_ADDRESS, false);
}

acc_data_t* adxl345_driver_get_acc_data_slow(void) 
{
	int32_t i;
	uint8_t write_then_read_preamble=SENSOR_REG_ADDRESS;
	
	twim_write(&AVR32_TWIM0, (uint8_t*)&write_then_read_preamble, 1, ADXL_ALT_SLAVE_ADDRESS, false);
	twim_read(&AVR32_TWIM0, (uint8_t*)&acc_outputs, 6, ADXL_ALT_SLAVE_ADDRESS, false);
	
	for (i = 0; i < 3; i++) 
	{
		acc_outputs.axes[i] = (int16_t)(acc_outputs.raw_data[2 * i]) + (int16_t)(acc_outputs.raw_data[2 * i + 1] << 8);
	}
				
	return (acc_data_t*)&acc_outputs;
}
Exemplo n.º 3
0
static void twim_init(void)
{
	uint8_t status;
	const gpio_map_t TWIM_GPIO_MAP = {
		(AVR32_TWIMS0_TWCK_0_0_PIN, AVR32_TWIMS0_TWCK_0_0_FUNCTION,AVR32_TWIMS0_TWD_0_0_PIN, AVR32_TWIMS0_TWD_0_0_FUNCTION)
	};

	gpio_enable_module(TWIM_GPIO_MAP, sizeof(TWIM_GPIO_MAP)/sizeof(TWIM_GPIO_MAP[0]));
	status = twim_master_init(TWIM, &twi_opt_GYRO);	
	
	twim_set_speed (TWIM, TWI_STD_MODE_SPEED, FPBA_HZ);
}
Exemplo n.º 4
0
void itg3200_init_slow(void) 
{
	static twim_options_t twi_opt= 
	{
		.pba_hz = 64000000, 
		.speed = 400000,
		.chip = ITG3200_SLAVE_ADDRESS, 
		.smbus = false
	};
	twim_master_init(&AVR32_TWIM0, &twi_opt);
	twim_write(&AVR32_TWIM0, (uint8_t*)&default_configuration, 4, ITG3200_SLAVE_ADDRESS, false);
}

gyroscope_t* itg3200_get_data_slow(void) 
{
	uint8_t write_then_read_preamble=SENSOR_REG_ADDRESS;
	
	twim_write(&AVR32_TWIM0, (uint8_t*) &write_then_read_preamble, 1, ITG3200_SLAVE_ADDRESS, false);
	twim_read(&AVR32_TWIM0, (uint8_t*)&gyro_outputs, 8, ITG3200_SLAVE_ADDRESS, false);
	
	return (gyroscope_t*)&gyro_outputs;
}
Exemplo n.º 5
0
void i2c_driver_init(uint8_t  i2c_device) 
{
	volatile avr32_twim_t *twim;
	switch (i2c_device) {
	case I2C0: 
		twim = &AVR32_TWIM0;
		///< Register PDCA IRQ interrupt.
		INTC_register_interrupt( (__int_handler) &i2c_int_handler_i2c0, AVR32_TWIM0_IRQ, AVR32_INTC_INT1);
		gpio_enable_module_pin(AVR32_TWIMS0_TWCK_0_0_PIN, AVR32_TWIMS0_TWCK_0_0_FUNCTION);
		gpio_enable_module_pin(AVR32_TWIMS0_TWD_0_0_PIN, AVR32_TWIMS0_TWD_0_0_FUNCTION);

	break;
	case I2C1:
		twim = &AVR32_TWIM1;///< Register PDCA IRQ interrupt.
		//INTC_register_interrupt( (__int_handler) &i2c_int_handler_i2c1, AVR32_TWIM1_IRQ, AVR32_INTC_INT1);
		gpio_enable_module_pin(AVR32_TWIMS1_TWCK_0_0_PIN, AVR32_TWIMS1_TWCK_0_0_FUNCTION);
		gpio_enable_module_pin(AVR32_TWIMS1_TWD_0_0_PIN, AVR32_TWIMS1_TWD_0_0_FUNCTION);
	break;
	default: ///< invalid device ID
		return;
	}		
	
	static twim_options_t twi_opt=
	{
		.pba_hz = 64000000,
		.speed = 400000,
		.chip = 0xff,
		.smbus = false
	};
	
	twi_opt.pba_hz = sysclk_get_pba_hz();
	
	status_code_t ret_twim_init = twim_master_init(twim, &twi_opt);
	
	print_util_dbg_print("\r\n");
	
	switch(ret_twim_init)
	{
		case ERR_IO_ERROR :
			print_util_dbg_print("NO Twim probe here \r\n");
		case STATUS_OK :
			print_util_dbg_print("I2C initialised \r\n");
			break;
		default :
			print_util_dbg_print("Error initialising I2C \r\n");
			break;
	}
}

int8_t  i2c_driver_reset(uint8_t  i2c_device) 
{
	volatile avr32_twim_t *twim;
	switch (i2c_device) 
	{
		case 0: 
			twim = &AVR32_TWIM0;
		break;
		case 1:
			twim = &AVR32_TWIM1;
		break;
		default: ///< invalid device ID
			return -1;
	}		
	bool global_interrupt_enabled = cpu_irq_is_enabled ();
	///< Disable TWI interrupts
	if (global_interrupt_enabled) 
	{
		cpu_irq_disable ();
	}
	twim->idr = ~0UL;
	///< Enable master transfer
	twim->cr = AVR32_TWIM_CR_MEN_MASK;
	///< Reset TWI
	twim->cr = AVR32_TWIM_CR_SWRST_MASK;
	if (global_interrupt_enabled) 
	{
		cpu_irq_enable ();
	}
	///< Clear SR
	twim->scr = ~0UL;
	
	return STATUS_OK; //No error
}

int8_t  i2c_driver_trigger_request(uint8_t  i2c_device, i2c_packet_t *transfer) 
{
	///< initiate transfer of given request
	///< set up DMA channel
	volatile avr32_twim_t *twim;
	bool global_interrupt_enabled = cpu_irq_is_enabled ();
	
	if (global_interrupt_enabled) 
	{
		cpu_irq_disable ();
	}
	
	switch (i2c_device) 
	{
		case 0: 
			twim = &AVR32_TWIM0;
			twim->cr = AVR32_TWIM_CR_MEN_MASK;
			twim->cr = AVR32_TWIM_CR_SWRST_MASK;
			twim->cr = AVR32_TWIM_CR_MDIS_MASK;
			twim->scr = ~0UL;
			// Clear the interrupt flags
			twim->idr = ~0UL;
			if (twim_set_speed(twim, transfer->i2c_speed, sysclk_get_pba_hz()) == ERR_INVALID_ARG) 
			{
				return ERR_INVALID_ARG;
			}
		
			//pdca_load_channel(TWI0_DMA_CH, (void *)schedule[i2c_device][schedule_slot].config.write_data, schedule[i2c_device][schedule_slot].config.write_count);
			///< Enable pdca interrupt each time the reload counter reaches zero, i.e. each time
			///< the whole block was received
		
			//pdca_enable_interrupt_transfer_error(TWI0_DMA_CH);		
			break;
		case 1:
			twim = &AVR32_TWIM1;
			twim->cr = AVR32_TWIM_CR_MEN_MASK;
			twim->cr = AVR32_TWIM_CR_SWRST_MASK;
			twim->cr = AVR32_TWIM_CR_MDIS_MASK;
			twim->scr = ~0UL;
			///< Clear the interrupt flags
			twim->idr = ~0UL;
			if (twim_set_speed(twim, transfer->i2c_speed, sysclk_get_pba_hz()) == ERR_INVALID_ARG) 
			{
				return ERR_INVALID_ARG;
			}
			break;
		default: ///< invalid device ID
			return -1;
	}		

	///< set up I2C speed and mode
	//twim_set_speed(twim, 100000, sysclk_get_pba_hz());
    
	switch (1/*conf->direction*/)  
	{
		case I2C_READ:
 			twim->cmdr = (transfer->slave_address << AVR32_TWIM_CMDR_SADR_OFFSET)
 						| (transfer->data_size << AVR32_TWIM_CMDR_NBYTES_OFFSET)
 						| (AVR32_TWIM_CMDR_VALID_MASK)
 						| (AVR32_TWIM_CMDR_START_MASK)
 						| (AVR32_TWIM_CMDR_STOP_MASK)
 						| (AVR32_TWIM_CMDR_READ_MASK);
			twim->ncmdr = 0;					
			twim->ier = AVR32_TWIM_IER_STD_MASK |  AVR32_TWIM_IER_RXRDY_MASK;
			break;	
		case I2C_WRITE1_THEN_READ:
			///< set up next command register for the burst read transfer
			///< set up command register to initiate the write transfer. The DMA will take care of the reading once this is done.
 			twim->cmdr = (transfer->slave_address << AVR32_TWIM_CMDR_SADR_OFFSET)
 						| ((1)<< AVR32_TWIM_CMDR_NBYTES_OFFSET)
 						| (AVR32_TWIM_CMDR_VALID_MASK)
 						| (AVR32_TWIM_CMDR_START_MASK)
 						//| (AVR32_TWIM_CMDR_STOP_MASK)
 						| (0 << AVR32_TWIM_CMDR_READ_OFFSET);
 						;	 
 			twim->ncmdr = (transfer->slave_address << AVR32_TWIM_CMDR_SADR_OFFSET)
 						| ((transfer->data_size) << AVR32_TWIM_CMDR_NBYTES_OFFSET)
 						| (AVR32_TWIM_CMDR_VALID_MASK)
 						| (AVR32_TWIM_CMDR_START_MASK)
 						| (AVR32_TWIM_CMDR_STOP_MASK)
 						| (AVR32_TWIM_CMDR_READ_MASK);
			twim->ier = AVR32_TWIM_IER_STD_MASK | AVR32_TWIM_IER_RXRDY_MASK | AVR32_TWIM_IER_TXRDY_MASK;
			///< set up writing of one byte (usually a slave register index)
			twim->cr = AVR32_TWIM_CR_MEN_MASK;
			twim->thr = transfer->write_then_read_preamble;
			twim->cr = AVR32_TWIM_CR_MEN_MASK;
			break;	
		case I2C_WRITE:
 			twim->cmdr = (transfer->slave_address << AVR32_TWIM_CMDR_SADR_OFFSET)
 						| ((transfer->data_size) << AVR32_TWIM_CMDR_NBYTES_OFFSET)
 						| (AVR32_TWIM_CMDR_VALID_MASK)
 						| (AVR32_TWIM_CMDR_START_MASK)
 						| (AVR32_TWIM_CMDR_STOP_MASK);
			twim->ncmdr = 0;						;	
			twim->ier = AVR32_TWIM_IER_NAK_MASK |  AVR32_TWIM_IER_TXRDY_MASK;
		break;	
	}
			
	///< start transfer
	current_transfer = transfer;
	current_transfer->transfer_in_progress = 1;
	current_transfer->data_index = 0;
	
	if (global_interrupt_enabled) 
	{
		cpu_irq_enable ();
	}	
	twim->cr = AVR32_TWIM_CR_MEN_MASK;
	
	return STATUS_OK;
}