forbidden_architecture

Main repository. Sub repositories to be integrated here.

Name		Name	Last commit message	Last commit date
Latest commit History 413 Commits
Application		Application
Assembler		Assembler
Bit Files		Bit Files
CPU		CPU
DVI_50Mhz		DVI_50Mhz
Emulator		Emulator
Final_Top_Level_CPU_NPU_Interface_Simulation		Final_Top_Level_CPU_NPU_Interface_Simulation
Final_Top_level_CPU_NPU_Interfaces		Final_Top_level_CPU_NPU_Interfaces
Final_Top_level_CPU_NPU_Interfaces_50Mhz		Final_Top_level_CPU_NPU_Interfaces_50Mhz
IO		IO
MATLAB SPART connection		MATLAB SPART connection
MATLAB_image_COE		MATLAB_image_COE
MMU		MMU
NPU		NPU
NPU_Reduced		NPU_Reduced
Npu_640_480		Npu_640_480
Sobel_project		Sobel_project
Top_Level_50MHz_Rohit		Top_Level_50MHz_Rohit
Top_level_Block_FPGA		Top_level_Block_FPGA
Working code_Rohit		Working code_Rohit
Xilinx ISE shortcut		Xilinx ISE shortcut
act-lab-approx.bench		act-lab-approx.bench
.gitignore		.gitignore
README.md		README.md
Rules.txt		Rules.txt

ayoosh/forbidden_architecture