//supend and resume function static int mtk_voice_extint_pm_ops_suspend(struct device *device) { // if now in phone call state, not suspend!! bool b_modem1_speech_on; bool b_modem2_speech_on; AudDrv_Clk_On();//should enable clk for access reg b_modem1_speech_on = (bool)(Afe_Get_Reg(PCM2_INTF_CON) & 0x1); b_modem2_speech_on = (bool)(Afe_Get_Reg(PCM_INTF_CON) & 0x1); AudDrv_Clk_Off();//should enable clk for access reg if (b_modem1_speech_on == true || b_modem2_speech_on == true) { clkmux_sel(MT_MUX_AUDINTBUS, 0, "AUDIO"); //select 26M return 0; } return 0; }
static int mtk_voice_pm_ops_resume(struct device *device) { bool b_modem1_speech_on; bool b_modem2_speech_on; AudDrv_Clk_On();//should enable clk for access reg b_modem1_speech_on = (bool)(Afe_Get_Reg(PCM2_INTF_CON) & 0x1); b_modem2_speech_on = (bool)(Afe_Get_Reg(PCM_INTF_CON) & 0x1); AudDrv_Clk_Off(); if (b_modem1_speech_on == true || b_modem2_speech_on == true) { clkmux_sel(MT_MUX_AUDINTBUS, 1, "AUDIO"); //mainpll return 0; } return 0; }
static int mtk_dl1_awb_pcm_open(struct snd_pcm_substream *substream) { struct snd_pcm_runtime *runtime = substream->runtime; int ret = 0; printk("mtk_dl1_awb_pcm_open\n"); Dl1_AWB_Control_context = Get_Mem_ControlT(Soc_Aud_Digital_Block_MEM_AWB); runtime->hw = mtk_dl1_awb_hardware; memcpy((void *)(&(runtime->hw)), (void *)&mtk_dl1_awb_hardware , sizeof(struct snd_pcm_hardware)); ret = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &dl1_awb_constraints_sample_rates); ret = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); if (ret < 0) { printk("snd_pcm_hw_constraint_integer failed\n"); } // here open audio clocks AudDrv_Clk_On(); //print for hw pcm information printk("mtk_dl1_awb_pcm_open runtime rate = %d channels = %d \n", runtime->rate, runtime->channels); runtime->hw.info |= SNDRV_PCM_INFO_INTERLEAVED; runtime->hw.info |= SNDRV_PCM_INFO_NONINTERLEAVED; runtime->hw.info |= SNDRV_PCM_INFO_MMAP_VALID; if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { printk("SNDRV_PCM_STREAM_CAPTURE \n"); } else { return -1; } if (ret < 0) { printk("mtk_dl1_awb_pcm_close\n"); mtk_dl1_awb_pcm_close(substream); return ret; } AudDrv_Emi_Clk_On(); printk("mtk_dl1_awb_pcm_open return\n"); return 0; }
static int mtk_voice_md2_bt_pm_ops_resume(struct device *device) { bool b_modem1_speech_on; bool b_modem2_speech_on; AudDrv_Clk_On();//should enable clk for access reg b_modem1_speech_on = (bool)(Afe_Get_Reg(PCM2_INTF_CON) & 0x1); b_modem2_speech_on = (bool)(Afe_Get_Reg(PCM_INTF_CON) & 0x1); AudDrv_Clk_Off(); if (b_modem1_speech_on == true || b_modem2_speech_on == true) { //clkmux_sel(MT_MUX_AUDINTBUS, 0, "AUDIO"); SetClkCfg(AUDIO_CLK_CFG_4, 0x1000000, 0x1000000); return 0; } return 0; }
static int mtk_voice_pm_ops_resume(struct device *device) { bool b_modem1_speech_on; bool b_modem2_speech_on; AudDrv_Clk_On(); /* should enable clk for access reg */ b_modem1_speech_on = (bool) (Afe_Get_Reg(PCM2_INTF_CON) & 0x1); b_modem2_speech_on = (bool) (Afe_Get_Reg(PCM_INTF_CON) & 0x1); AudDrv_Clk_Off(); if (b_modem1_speech_on == true || b_modem2_speech_on == true) { /* mainpll */ clkmux_sel(MT_CLKMUX_AUD_HF_26M_SEL, MT_CG_SYS_TEMP, "AUDIO "); clkmux_sel(MT_CLKMUX_AUD_INTBUS_SEL, MT_CG_MPLL_D12, "AUDIO "); return 0; } return 0; }
static int mtk_voice_pcm_open(struct snd_pcm_substream *substream) { struct snd_pcm_runtime *runtime = substream->runtime; int err = 0; int ret = 0; AudDrv_Clk_On(); AudDrv_ADC_Clk_On(); pr_warn("mtk_voice_pcm_open\n"); if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { pr_warn("%s with SNDRV_PCM_STREAM_CAPTURE\n", __func__); runtime->rate = 16000; return 0; } runtime->hw = mtk_pcm_hardware; memcpy((void *)(&(runtime->hw)), (void *)&mtk_pcm_hardware, sizeof(struct snd_pcm_hardware)); ret = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &constraints_sample_rates); ret = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); if (ret < 0) pr_warn("snd_pcm_hw_constraint_integer failed\n"); /* print for hw pcm information */ pr_warn("mtk_voice_pcm_open runtime rate = %d channels = %d\n", runtime->rate, runtime->channels); runtime->hw.info |= SNDRV_PCM_INFO_INTERLEAVED; runtime->hw.info |= SNDRV_PCM_INFO_NONINTERLEAVED; if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { pr_warn("SNDRV_PCM_STREAM_PLAYBACK mtkalsa_voice_constraints\n"); runtime->rate = 16000; } if (err < 0) { pr_warn("mtk_voice_close\n"); mtk_voice_close(substream); return err; } pr_warn("mtk_voice_pcm_open return\n"); return 0; }
static int mtk_voice_bt1_prepare(struct snd_pcm_substream *substream) { struct snd_pcm_runtime *runtimeStream = substream->runtime; pr_debug("mtk_alsa_prepare rate = %d channels = %d period_size = %lu\n", runtimeStream->rate, runtimeStream->channels, runtimeStream->period_size); if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { pr_err("%s with SNDRV_PCM_STREAM_CAPTURE\n", __func__); return 0; } AudDrv_ANA_Clk_On(); AudDrv_Clk_On(); /* here start digital part */ SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I02, Soc_Aud_InterConnectionOutput_O17); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I02, Soc_Aud_InterConnectionOutput_O18); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O02); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I21, Soc_Aud_InterConnectionOutput_O08); if (GetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT) == false) { /* set merge interface */ SetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT, true); } else SetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT, true); /* now use samplerate 8000 */ SetModemSpeechDAIBTAttribute(runtimeStream->rate); SetDaiBtEnable(true); voice_bt1Pcm.mPcmModeWidebandSel = (runtimeStream->rate == 8000) ? Soc_Aud_PCM_MODE_PCM_MODE_8K : Soc_Aud_PCM_MODE_PCM_MODE_16K; voice_bt1Pcm.mAsyncFifoSel = Soc_Aud_BYPASS_SRC_SLAVE_USE_ASYNC_FIFO; SetModemPcmConfig(MODEM_1, voice_bt1Pcm); SetModemPcmEnable(MODEM_1, true); EnableAfe(true); voice_bt_Status = true; return 0; }
static int mtk_pcm_fmtx_open(struct snd_pcm_substream *substream) { int ret = 0; struct snd_pcm_runtime *runtime = substream->runtime; PRINTK_AUD_FMTX("mtk_pcm_fmtx_open\n"); AudDrv_Clk_On(); // get dl1 memconptrol and record substream pMemControl = Get_Mem_ControlT(Soc_Aud_Digital_Block_MEM_DL1); runtime->hw = mtk_fmtx_hardware; memcpy((void *)(&(runtime->hw)), (void *)&mtk_fmtx_hardware , sizeof(struct snd_pcm_hardware)); //PRINTK_AUDDRV("runtime->hw->rates= 0x%x mtk_pcm_hardware = = 0x%x\n ", runtime->hw.rates, &mtk_pcm_hardware); ret = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &constraints_fmtx_sample_rates); ret = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); if (ret < 0) { PRINTK_AUD_FMTX("[mtk_pcm_fmtx_open]snd_pcm_hw_constraint_integer failed\n"); } //print for hw pcm information PRINTK_AUD_FMTX("[mtk_pcm_fmtx_open] runtime rate = %d channels = %d substream->pcm->device = %d\n", runtime->rate, runtime->channels, substream->pcm->device); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { PRINTK_AUD_FMTX("[mtk_pcm_fmtx_open]SNDRV_PCM_FMTX_PLAYBACK mtkalsa_playback_constraints\n"); } else { } if (ret < 0) { PRINTK_AUD_FMTX("[mtk_pcm_fmtx_open]mtk_pcm_fmtx_close\n"); mtk_pcm_fmtx_close(substream); return ret; } //PRINTK_AUDDRV("mtk_pcm_open return\n"); return 0; }
static int mtk_pcm_fm_i2s_open(struct snd_pcm_substream *substream) { struct snd_pcm_runtime *runtime = substream->runtime; int ret = 0; AudDrv_Clk_On(); AudDrv_I2S_Clk_On(); printk("mtk_pcm_fm_i2s_open\n"); runtime->hw = mtk_fm_i2s_hardware; memcpy((void *)(&(runtime->hw)), (void *)&mtk_fm_i2s_hardware , sizeof(struct snd_pcm_hardware)); ret = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &fm_i2s_constraints_sample_rates); ret = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); if (ret < 0) { printk("snd_pcm_hw_constraint_integer failed\n"); } printk("mtk_pcm_fm_i2s_open runtime rate = %d channels = %d substream->pcm->device = %d\n", runtime->rate, runtime->channels, substream->pcm->device); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { printk("SNDRV_PCM_STREAM_PLAYBACK mtkalsa_fm_i2s_playback_constraints\n"); } else { } if (ret < 0) { printk("mtk_pcm_fm_i2s_close\n"); mtk_pcm_fm_i2s_close(substream); return ret; } SetFMEnableFlag(true); printk("mtk_pcm_fm_i2s_open return\n"); return 0; }
static int Audio_I2S0dl1_hdoutput_Set(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { printk("%s()\n", __func__); if (ucontrol->value.enumerated.item[0] > ARRAY_SIZE(I2S0dl1_HD_output)) { printk("return -EINVAL\n"); return -EINVAL; } mI2S0dl1_hdoutput_control = ucontrol->value.integer.value[0]; if (GetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_HDMI) == true ) { printk("return HDMI enabled\n"); return 0; } if (mI2S0dl1_hdoutput_control) { // set APLL clock setting AudDrv_Clk_On(); EnableApll1(true); EnableApll2(true); EnableI2SDivPower(AUDIO_APLL1_DIV0, true); EnableI2SDivPower(AUDIO_APLL2_DIV0, true); AudDrv_APLL1Tuner_Clk_On(); AudDrv_APLL2Tuner_Clk_On(); } else { // set APLL clock setting EnableApll1(false); EnableApll2(false); EnableI2SDivPower(AUDIO_APLL1_DIV0, false); EnableI2SDivPower(AUDIO_APLL2_DIV0, false); AudDrv_APLL1Tuner_Clk_Off(); AudDrv_APLL2Tuner_Clk_Off(); AudDrv_Clk_Off(); } return 0; }
static int mtk_pcm_dl2_open(struct snd_pcm_substream *substream) { int ret = 0; struct snd_pcm_runtime *runtime = substream->runtime; PRINTK_AUDDRV("mtk_pcm_dl2_open\n"); mtk_pcm_dl2_hardware.buffer_bytes_max = GetPLaybackDramLowLatencySize(); mPlaybackSramState = SRAM_STATE_PLAYBACKDRAM; mPlaybackUseSram = false; if (mPlaybackSramState == SRAM_STATE_PLAYBACKDRAM) AudDrv_Emi_Clk_On(); pr_warn("mtk_pcm_dl2_hardware.buffer_bytes_max = %zu mPlaybackSramState = %d\n", mtk_pcm_dl2_hardware.buffer_bytes_max, mPlaybackSramState); runtime->hw = mtk_pcm_dl2_hardware; AudDrv_Clk_On(); memcpy((void *)(&(runtime->hw)), (void *)&mtk_pcm_dl2_hardware, sizeof(struct snd_pcm_hardware)); pMemControl = Get_Mem_ControlT(Soc_Aud_Digital_Block_MEM_DL2); ret = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &constraints_sample_rates); if (ret < 0) pr_err("snd_pcm_hw_constraint_integer failed\n"); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) pr_warn("SNDRV_PCM_STREAM_PLAYBACK mtkalsa_dl2playback_constraints\n"); else pr_warn("SNDRV_PCM_STREAM_CAPTURE mtkalsa_dl2playback_constraints\n"); if (ret < 0) { pr_err("ret < 0 mtk_soc_pcm_dl2_close\n"); mtk_soc_pcm_dl2_close(substream); return ret; } /* PRINTK_AUDDRV("mtk_pcm_dl2_open return\n"); */ return 0; }
static int mtk_mrgrx_awb_pcm_open(struct snd_pcm_substream *substream) { struct snd_pcm_runtime *runtime = substream->runtime; int ret = 0; printk("mtk_mrgrx_awb_pcm_open\n"); Mrgrx_AWB_Control_context = Get_Mem_ControlT(Soc_Aud_Digital_Block_MEM_AWB); runtime->hw = mtk_mgrrx_awb_hardware; memcpy((void *)(&(runtime->hw)), (void *)&mtk_mgrrx_awb_hardware , sizeof(struct snd_pcm_hardware)); ret = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &mrgrx_awb_constraints_sample_rates); ret = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); if (ret < 0) { printk("snd_pcm_hw_constraint_integer failed\n"); } printk("mtk_mrgrx_awb_pcm_open runtime rate = %d channels = %d \n", runtime->rate, runtime->channels); if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { printk("SNDRV_PCM_STREAM_CAPTURE \n"); } else { return -1; } // here open audio clocks AudDrv_Clk_On(); AudDrv_I2S_Clk_On(); if (ret < 0) { printk("mtk_mrgrx_awb_pcm_close\n"); mtk_mrgrx_awb_pcm_close(substream); return ret; } printk("mtk_mrgrx_awb_pcm_open return\n"); return 0; }
/* supend and resume function */ static int mtk_voice_pm_ops_suspend(struct device *device) { /* if now in phone call state, not suspend!! */ bool b_modem1_speech_on; bool b_modem2_speech_on; AudDrv_Clk_On(); /* should enable clk for access reg */ b_modem1_speech_on = (bool) (Afe_Get_Reg(PCM2_INTF_CON) & 0x1); b_modem2_speech_on = (bool) (Afe_Get_Reg(PCM_INTF_CON) & 0x1); AudDrv_Clk_Off(); /* should enable clk for access reg */ pr_warn ("mtk_voice_pm_ops_suspend, b_modem1_speech_on=%d, b_modem2_speech_on=%d, speech_md_usage_control=%d\n", b_modem1_speech_on, b_modem2_speech_on, speech_md_usage_control); if (b_modem1_speech_on == true || b_modem2_speech_on == true || speech_md_usage_control == true) { /* select 26M */ clkmux_sel(MT_CLKMUX_AUD_HF_26M_SEL, MT_CG_SYS_26M, "AUDIO "); clkmux_sel(MT_CLKMUX_AUD_INTBUS_SEL, MT_CG_SYS_26M, "AUDIO "); return 0; } return 0; }
static int mtk_voice_bt_pm_ops_resume(struct device *device) { bool b_modem1_speech_on; bool b_modem2_speech_on; AudDrv_ANA_Clk_On(); AudDrv_Clk_On(); /* should enable clk for access reg */ b_modem1_speech_on = (bool) (Afe_Get_Reg(PCM2_INTF_CON) & 0x1); b_modem2_speech_on = (bool) (Afe_Get_Reg(PCM_INTF_CON) & 0x1); AudDrv_Clk_Off(); AudDrv_ANA_Clk_Off(); if (b_modem1_speech_on == true || b_modem2_speech_on == true) { #ifdef CONFIG_MTK_CLKMGR clkmux_sel(MT_MUX_AUDINTBUS, 1, "AUDIO"); /* mainpll */ #endif return 0; } return 0; }
static int Audio_Hpr_Offset_Get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { #ifndef EFUSE_HP_TRIM printk("%s \n", __func__); AudDrv_Clk_On(); if (mHprCalibrated == false) { GetAudioTrimOffset(AUDIO_OFFSET_TRIM_MUX_HPR); SetHprTrimOffset(mHprOffset); SetHplTrimOffset(mHplOffset); mHplCalibrated = true; mHprCalibrated = true; } ucontrol->value.integer.value[0] = mHprOffset; AudDrv_Clk_Off(); #else ucontrol->value.integer.value[0] = 2048; #endif return 0; }
/* supend and resume function */ static int mtk_voice_bt_pm_ops_suspend(struct device *device) { /* if now in phone call state, not suspend!! */ bool b_modem1_speech_on; bool b_modem2_speech_on; AudDrv_ANA_Clk_On(); AudDrv_Clk_On(); /* should enable clk for access reg */ b_modem1_speech_on = (bool) (Afe_Get_Reg(PCM2_INTF_CON) & 0x1); b_modem2_speech_on = (bool) (Afe_Get_Reg(PCM_INTF_CON) & 0x1); AudDrv_Clk_Off(); AudDrv_ANA_Clk_Off(); if (b_modem1_speech_on == true || b_modem2_speech_on == true) { #ifdef CONFIG_MTK_CLKMGR clkmux_sel(MT_MUX_AUDINTBUS, 0, "AUDIO"); /* select 26M */ #endif return 0; } return 0; }
static int Audio_i2s0_hdoutput_Set(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { printk("+%s()\n", __func__); if (ucontrol->value.enumerated.item[0] > ARRAY_SIZE(i2s0_HD_output)) { printk("return -EINVAL\n"); return -EINVAL; } AudDrv_Clk_On(); if ( (ucontrol->value.integer.value[0] == true) &&(mi2s0_hdoutput_control == false) ) { printk("%s(), mi2s0_hdoutput_control=%d, enable APLL!!!!\n", __func__, mi2s0_hdoutput_control); // set APLL clock setting EnableApll1(true); EnableApll2(true); EnableI2SDivPower(AUDIO_APLL1_DIV0, true); EnableI2SDivPower(AUDIO_APLL2_DIV0, true); AudDrv_APLL1Tuner_Clk_On(); AudDrv_APLL2Tuner_Clk_On(); } else if( (ucontrol->value.integer.value[0] == false) &&(mi2s0_hdoutput_control == true) ) { printk("%s(), mi2s0_hdoutput_control=%d, disable APLL!!!!\n", __func__, mi2s0_hdoutput_control); // set APLL clock setting EnableApll1(false); EnableApll2(false); EnableI2SDivPower(AUDIO_APLL1_DIV0, false); EnableI2SDivPower(AUDIO_APLL2_DIV0, false); AudDrv_APLL1Tuner_Clk_Off(); AudDrv_APLL2Tuner_Clk_Off(); } mi2s0_hdoutput_control = ucontrol->value.integer.value[0]; printk("%s(), mi2s0_hdoutput_control=%d\n", __func__, mi2s0_hdoutput_control); AudDrv_Clk_Off(); printk("-%s(), mi2s0_hdoutput_control=%d\n", __func__, mi2s0_hdoutput_control); return 0; }
static int mtk_pcm_hdmi_open(struct snd_pcm_substream *substream) { int ret = 0; struct snd_pcm_runtime *runtime = substream->runtime; pr_debug("%s\n", __func__); AudDrv_ANA_Clk_On(); AudDrv_Emi_Clk_On(); AudDrv_Clk_On(); runtime->hw = mtk_hdmi_hardware; pMemControl = Get_Mem_ControlT(Soc_Aud_Digital_Block_MEM_HDMI); memcpy((void *)(&(runtime->hw)), (void *)&mtk_hdmi_hardware, sizeof(struct snd_pcm_hardware)); ret = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &constraints_sample_rates); if (ret < 0) { PRINTK_AUD_HDMI("snd_pcm_hw_constraint_integer failed\n"); return ret; } /* print for hw pcm information */ pr_debug("%s, runtime->rate = %d, channels = %d, substream->pcm->device = %d\n", __func__, runtime->rate, runtime->channels, substream->pcm->device); runtime->hw.info |= SNDRV_PCM_INFO_INTERLEAVED; runtime->hw.info |= SNDRV_PCM_INFO_NONINTERLEAVED; runtime->hw.info |= SNDRV_PCM_INFO_MMAP_VALID; PRINTK_AUD_HDMI("mtk_pcm_hdmi_open return\n"); return 0; }
static int mtk_bt_dai_pcm_open(struct snd_pcm_substream *substream) { struct snd_pcm_runtime *runtime = substream->runtime; int ret = 0; pr_warn("mtk_bt_dai_pcm_open\n"); Bt_Dai_Control_context = Get_Mem_ControlT(Soc_Aud_Digital_Block_MEM_DAI); runtime->hw = mtk_btdai_hardware; memcpy((void *)(&(runtime->hw)), (void *)&mtk_btdai_hardware , sizeof(struct snd_pcm_hardware)); ret = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &bt_dai_constraints_sample_rates); ret = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); if (ret < 0) pr_err("snd_pcm_hw_constraint_integer failed\n"); AudDrv_Clk_On(); /* print for hw pcm information */ pr_warn("mtk_bt_dai_pcm_open runtime rate = %d channels = %d\n", runtime->rate, runtime->channels); runtime->hw.info |= SNDRV_PCM_INFO_INTERLEAVED; runtime->hw.info |= SNDRV_PCM_INFO_NONINTERLEAVED; if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) pr_warn("SNDRV_PCM_STREAM_CAPTURE\n"); else return -1; if (ret < 0) { pr_err("mtk_bt_dai_pcm_close\n"); mtk_bt_dai_pcm_close(substream); return ret; } pr_warn("mtk_bt_dai_pcm_open return\n"); return 0; }
void Afe_Log_Print(void) { AudDrv_Clk_On(); pr_debug("+AudDrv Afe_Log_Print\n"); pr_debug("AUDIO_TOP_CON0 = 0x%x\n", Afe_Get_Reg(AUDIO_TOP_CON0)); pr_debug("AUDIO_TOP_CON1 = 0x%x\n", Afe_Get_Reg(AUDIO_TOP_CON1)); pr_debug("AUDIO_TOP_CON3 = 0x%x\n", Afe_Get_Reg(AUDIO_TOP_CON3)); pr_debug("AFE_DAC_CON0 = 0x%x\n", Afe_Get_Reg(AFE_DAC_CON0)); pr_debug("AFE_DAC_CON1 = 0x%x\n", Afe_Get_Reg(AFE_DAC_CON1)); pr_debug("AFE_I2S_CON = 0x%x\n", Afe_Get_Reg(AFE_I2S_CON)); pr_debug("AFE_DAIBT_CON0 = 0x%x\n", Afe_Get_Reg(AFE_DAIBT_CON0)); pr_debug("AFE_CONN0 = 0x%x\n", Afe_Get_Reg(AFE_CONN0)); pr_debug("AFE_CONN1 = 0x%x\n", Afe_Get_Reg(AFE_CONN1)); pr_debug("AFE_CONN2 = 0x%x\n", Afe_Get_Reg(AFE_CONN2)); pr_debug("AFE_CONN3 = 0x%x\n", Afe_Get_Reg(AFE_CONN3)); pr_debug("AFE_CONN4 = 0x%x\n", Afe_Get_Reg(AFE_CONN4)); pr_debug("AFE_I2S_CON1 = 0x%x\n", Afe_Get_Reg(AFE_I2S_CON1)); pr_debug("AFE_I2S_CON2 = 0x%x\n", Afe_Get_Reg(AFE_I2S_CON2)); pr_debug("AFE_MRGIF_CON = 0x%x\n", Afe_Get_Reg(AFE_MRGIF_CON)); pr_debug("AFE_DL1_BASE = 0x%x\n", Afe_Get_Reg(AFE_DL1_BASE)); pr_debug("AFE_DL1_CUR = 0x%x\n", Afe_Get_Reg(AFE_DL1_CUR)); pr_debug("AFE_DL1_END = 0x%x\n", Afe_Get_Reg(AFE_DL1_END)); pr_debug("AFE_VUL_D2_BASE = 0x%x\n", Afe_Get_Reg(AFE_VUL_D2_BASE)); pr_debug("AFE_VUL_D2_END = 0x%x\n", Afe_Get_Reg(AFE_VUL_D2_END)); pr_debug("AFE_VUL_D2_CUR = 0x%x\n", Afe_Get_Reg(AFE_VUL_D2_CUR)); pr_debug("AFE_I2S_CON3 = 0x%x\n", Afe_Get_Reg(AFE_I2S_CON3)); pr_debug("AFE_DL2_BASE = 0x%x\n", Afe_Get_Reg(AFE_DL2_BASE)); pr_debug("AFE_DL2_CUR = 0x%x\n", Afe_Get_Reg(AFE_DL2_CUR)); pr_debug("AFE_DL2_END = 0x%x\n", Afe_Get_Reg(AFE_DL2_END)); pr_debug("AFE_CONN5 = 0x%x\n", Afe_Get_Reg(AFE_CONN5)); pr_debug("AFE_CONN_24BIT = 0x%x\n", Afe_Get_Reg(AFE_CONN_24BIT)); pr_debug("AFE_AWB_BASE = 0x%x\n", Afe_Get_Reg(AFE_AWB_BASE)); pr_debug("AFE_AWB_END = 0x%x\n", Afe_Get_Reg(AFE_AWB_END)); pr_debug("AFE_AWB_CUR = 0x%x\n", Afe_Get_Reg(AFE_AWB_CUR)); pr_debug("AFE_VUL_BASE = 0x%x\n", Afe_Get_Reg(AFE_VUL_BASE)); pr_debug("AFE_VUL_END = 0x%x\n", Afe_Get_Reg(AFE_VUL_END)); pr_debug("AFE_VUL_CUR = 0x%x\n", Afe_Get_Reg(AFE_VUL_CUR)); pr_debug("AFE_DAI_BASE = 0x%x\n", Afe_Get_Reg(AFE_DAI_BASE)); pr_debug("AFE_DAI_END = 0x%x\n", Afe_Get_Reg(AFE_DAI_END)); pr_debug("AFE_DAI_CUR = 0x%x\n", Afe_Get_Reg(AFE_DAI_CUR)); pr_debug("AFE_CONN6 = 0x%x\n", Afe_Get_Reg(AFE_CONN6)); pr_debug("AFE_MEMIF_MSB = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_MSB)); pr_debug("AFE_MEMIF_MON0 = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_MON0)); pr_debug("AFE_MEMIF_MON1 = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_MON1)); pr_debug("AFE_MEMIF_MON2 = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_MON2)); pr_debug("AFE_MEMIF_MON4 = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_MON4)); pr_debug("AFE_ADDA_DL_SRC2_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_DL_SRC2_CON0)); pr_debug("AFE_ADDA_DL_SRC2_CON1 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_DL_SRC2_CON1)); pr_debug("AFE_ADDA_UL_SRC_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_UL_SRC_CON0)); pr_debug("AFE_ADDA_UL_SRC_CON1 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_UL_SRC_CON1)); pr_debug("AFE_ADDA_TOP_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_TOP_CON0)); pr_debug("AFE_ADDA_UL_DL_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_UL_DL_CON0)); pr_debug("AFE_ADDA_SRC_DEBUG = 0x%x\n", Afe_Get_Reg(AFE_ADDA_SRC_DEBUG)); pr_debug("AFE_ADDA_SRC_DEBUG_MON0= 0x%x\n", Afe_Get_Reg(AFE_ADDA_SRC_DEBUG_MON0)); pr_debug("AFE_ADDA_SRC_DEBUG_MON1= 0x%x\n", Afe_Get_Reg(AFE_ADDA_SRC_DEBUG_MON1)); pr_debug("AFE_ADDA_NEWIF_CFG0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_NEWIF_CFG0)); pr_debug("AFE_ADDA_NEWIF_CFG1 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_NEWIF_CFG1)); pr_debug("AFE_ADDA_NEWIF_CFG2 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_NEWIF_CFG2)); pr_debug("AFE_SIDETONE_DEBUG = 0x%x\n", Afe_Get_Reg(AFE_SIDETONE_DEBUG)); pr_debug("AFE_SIDETONE_MON = 0x%x\n", Afe_Get_Reg(AFE_SIDETONE_MON)); pr_debug("AFE_SIDETONE_CON0 = 0x%x\n", Afe_Get_Reg(AFE_SIDETONE_CON0)); pr_debug("AFE_SIDETONE_COEFF = 0x%x\n", Afe_Get_Reg(AFE_SIDETONE_COEFF)); pr_debug("AFE_SIDETONE_CON1 = 0x%x\n", Afe_Get_Reg(AFE_SIDETONE_CON1)); pr_debug("AFE_SIDETONE_GAIN = 0x%x\n", Afe_Get_Reg(AFE_SIDETONE_GAIN)); pr_debug("AFE_SGEN_CON0 = 0x%x\n", Afe_Get_Reg(AFE_SGEN_CON0)); pr_debug("AFE_TOP_CON0 = 0x%x\n", Afe_Get_Reg(AFE_TOP_CON0)); pr_debug("AFE_ADDA_PREDIS_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_PREDIS_CON0)); pr_debug("AFE_ADDA_PREDIS_CON1 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_PREDIS_CON1)); pr_debug("AFE_MRGIF_MON0 = 0x%x\n", Afe_Get_Reg(AFE_MRGIF_MON0)); pr_debug("AFE_MRGIF_MON1 = 0x%x\n", Afe_Get_Reg(AFE_MRGIF_MON1)); pr_debug("AFE_MRGIF_MON2 = 0x%x\n", Afe_Get_Reg(AFE_MRGIF_MON2)); pr_debug("AFE_MOD_DAI_BASE = 0x%x\n", Afe_Get_Reg(AFE_MOD_DAI_BASE)); pr_debug("AFE_MOD_DAI_END = 0x%x\n", Afe_Get_Reg(AFE_MOD_DAI_END)); pr_debug("AFE_MOD_DAI_CUR = 0x%x\n", Afe_Get_Reg(AFE_MOD_DAI_CUR)); pr_debug("AFE_IRQ_MCU_CON = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_CON)); pr_debug("AFE_IRQ_MCU_STATUS = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_STATUS)); pr_debug("AFE_IRQ_MCU_CLR = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_CLR)); pr_debug("AFE_IRQ_MCU_CNT1 = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_CNT1)); pr_debug("AFE_IRQ_MCU_CNT2 = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_CNT2)); pr_debug("AFE_IRQ_MCU_EN = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_EN)); pr_debug("AFE_IRQ_MCU_MON2 = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_MON2)); pr_debug("AFE_IRQ_MCU_CNT5 = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_CNT5)); pr_debug("AFE_IRQ1_MCU_CNT_MON = 0x%x\n", Afe_Get_Reg(AFE_IRQ1_MCU_CNT_MON)); pr_debug("AFE_IRQ2_MCU_CNT_MON = 0x%x\n", Afe_Get_Reg(AFE_IRQ2_MCU_CNT_MON)); pr_debug("AFE_IRQ1_MCU_EN_CNT_MON= 0x%x\n", Afe_Get_Reg(AFE_IRQ1_MCU_EN_CNT_MON)); pr_debug("AFE_IRQ5_MCU_CNT_MON = 0x%x\n", Afe_Get_Reg(AFE_IRQ5_MCU_CNT_MON)); pr_debug("AFE_MEMIF_MAXLEN = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_MAXLEN)); pr_debug("AFE_MEMIF_PBUF_SIZE = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_PBUF_SIZE)); pr_debug("AFE_IRQ_MCU_CNT7 = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_CNT7)); pr_debug("AFE_APLL1_TUNER_CFG = 0x%x\n", Afe_Get_Reg(AFE_APLL1_TUNER_CFG)); pr_debug("AFE_APLL2_TUNER_CFG = 0x%x\n", Afe_Get_Reg(AFE_APLL2_TUNER_CFG)); pr_debug("AFE_GAIN1_CON0 = 0x%x\n", Afe_Get_Reg(AFE_GAIN1_CON0)); pr_debug("AFE_GAIN1_CON1 = 0x%x\n", Afe_Get_Reg(AFE_GAIN1_CON1)); pr_debug("AFE_GAIN1_CON2 = 0x%x\n", Afe_Get_Reg(AFE_GAIN1_CON2)); pr_debug("AFE_GAIN1_CON3 = 0x%x\n", Afe_Get_Reg(AFE_GAIN1_CON3)); pr_debug("AFE_GAIN1_CUR = 0x%x\n", Afe_Get_Reg(AFE_GAIN1_CUR)); pr_debug("AFE_GAIN2_CON0 = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CON0)); pr_debug("AFE_GAIN2_CON1 = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CON1)); pr_debug("AFE_GAIN2_CON2 = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CON2)); pr_debug("AFE_GAIN2_CON3 = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CON3)); pr_debug("AFE_GAIN2_CUR = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CUR)); pr_debug("AFE_CONN7 = 0x%x\n", Afe_Get_Reg(AFE_CONN7)); pr_debug("AFE_CONN8 = 0x%x\n", Afe_Get_Reg(AFE_CONN8)); pr_debug("AFE_CONN9 = 0x%x\n", Afe_Get_Reg(AFE_CONN9)); pr_debug("AFE_CONN10 = 0x%x\n", Afe_Get_Reg(AFE_CONN10)); pr_debug("AFE_ASRC_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON0)); pr_debug("AFE_ASRC_CON1 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON1)); pr_debug("AFE_ASRC_CON2 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON2)); pr_debug("AFE_ASRC_CON3 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON3)); pr_debug("AFE_ASRC_CON4 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON4)); pr_debug("AFE_ASRC_CON5 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON5)); pr_debug("AFE_ASRC_CON6 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON6)); pr_debug("AFE_ASRC_CON7 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON7)); pr_debug("AFE_ASRC_CON8 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON8)); pr_debug("AFE_ASRC_CON9 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON9)); pr_debug("AFE_ASRC_CON10 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON10)); pr_debug("AFE_ASRC_CON11 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON11)); pr_debug("PCM_INTF_CON = 0x%x\n", Afe_Get_Reg(PCM_INTF_CON1)); pr_debug("PCM_INTF_CON2 = 0x%x\n", Afe_Get_Reg(PCM_INTF_CON2)); pr_debug("PCM2_INTF_CON = 0x%x\n", Afe_Get_Reg(PCM2_INTF_CON)); pr_debug("AFE_ASRC_CON13 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON13)); pr_debug("AFE_ASRC_CON14 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON14)); pr_debug("AFE_ASRC_CON15 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON15)); pr_debug("AFE_ASRC_CON16 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON16)); pr_debug("AFE_ASRC_CON17 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON17)); pr_debug("AFE_ASRC_CON18 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON18)); pr_debug("AFE_ASRC_CON19 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON19)); pr_debug("AFE_ASRC_CON20 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON20)); pr_debug("AFE_ASRC_CON21 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON21)); pr_debug("AFE_ASRC4_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON0)); pr_debug("AFE_ASRC4_CON1 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON1)); pr_debug("AFE_ASRC4_CON2 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON2)); pr_debug("AFE_ASRC4_CON3 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON3)); pr_debug("AFE_ASRC4_CON4 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON4)); pr_debug("AFE_ASRC4_CON5 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON5)); pr_debug("AFE_ASRC4_CON6 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON6)); pr_debug("AFE_ASRC4_CON7 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON7)); pr_debug("AFE_ASRC4_CON8 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON8)); pr_debug("AFE_ASRC4_CON9 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON9)); pr_debug("AFE_ASRC4_CON10 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON10)); pr_debug("AFE_ASRC4_CON11 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON11)); pr_debug("AFE_ASRC4_CON12 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON12)); pr_debug("AFE_ASRC4_CON13 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON13)); pr_debug("AFE_ASRC4_CON14 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON14)); pr_debug("AFE_ASRC2_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ASRC2_CON0)); pr_debug("AFE_ASRC2_CON1 = 0x%x\n", Afe_Get_Reg(AFE_ASRC2_CON1)); pr_debug("AFE_ASRC2_CON2 = 0x%x\n", Afe_Get_Reg(AFE_ASRC2_CON2)); pr_debug("AFE_ASRC2_CON3 = 0x%x\n", Afe_Get_Reg(AFE_ASRC2_CON3)); pr_debug("AFE_ASRC2_CON4 = 0x%x\n", Afe_Get_Reg(AFE_ASRC2_CON4)); pr_debug("AFE_ASRC2_CON5 = 0x%x\n", Afe_Get_Reg(AFE_ASRC2_CON5)); pr_debug("AFE_ASRC2_CON6 = 0x%x\n", Afe_Get_Reg(AFE_ASRC2_CON6)); pr_debug("AFE_ASRC2_CON7 = 0x%x\n", Afe_Get_Reg(AFE_ASRC2_CON7)); pr_debug("AFE_ASRC2_CON8 = 0x%x\n", Afe_Get_Reg(AFE_ASRC2_CON8)); pr_debug("AFE_ASRC2_CON9 = 0x%x\n", Afe_Get_Reg(AFE_ASRC2_CON9)); pr_debug("AFE_ASRC2_CON10 = 0x%x\n", Afe_Get_Reg(AFE_ASRC2_CON10)); pr_debug("AFE_ASRC2_CON11 = 0x%x\n", Afe_Get_Reg(AFE_ASRC2_CON11)); pr_debug("AFE_ASRC2_CON12 = 0x%x\n", Afe_Get_Reg(AFE_ASRC2_CON12)); pr_debug("AFE_ASRC2_CON13 = 0x%x\n", Afe_Get_Reg(AFE_ASRC2_CON13)); pr_debug("AFE_ASRC2_CON14 = 0x%x\n", Afe_Get_Reg(AFE_ASRC2_CON14)); pr_debug("AFE_ASRC3_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ASRC3_CON0)); pr_debug("AFE_ASRC3_CON1 = 0x%x\n", Afe_Get_Reg(AFE_ASRC3_CON1)); pr_debug("AFE_ASRC3_CON2 = 0x%x\n", Afe_Get_Reg(AFE_ASRC3_CON2)); pr_debug("AFE_ASRC3_CON3 = 0x%x\n", Afe_Get_Reg(AFE_ASRC3_CON3)); pr_debug("AFE_ASRC3_CON4 = 0x%x\n", Afe_Get_Reg(AFE_ASRC3_CON4)); pr_debug("AFE_ASRC3_CON5 = 0x%x\n", Afe_Get_Reg(AFE_ASRC3_CON5)); pr_debug("AFE_ASRC3_CON6 = 0x%x\n", Afe_Get_Reg(AFE_ASRC3_CON6)); pr_debug("AFE_ASRC3_CON7 = 0x%x\n", Afe_Get_Reg(AFE_ASRC3_CON7)); pr_debug("AFE_ASRC3_CON8 = 0x%x\n", Afe_Get_Reg(AFE_ASRC3_CON8)); pr_debug("AFE_ASRC3_CON9 = 0x%x\n", Afe_Get_Reg(AFE_ASRC3_CON9)); pr_debug("AFE_ASRC3_CON10 = 0x%x\n", Afe_Get_Reg(AFE_ASRC3_CON10)); pr_debug("AFE_ASRC3_CON11 = 0x%x\n", Afe_Get_Reg(AFE_ASRC3_CON11)); pr_debug("AFE_ASRC3_CON12 = 0x%x\n", Afe_Get_Reg(AFE_ASRC3_CON12)); pr_debug("AFE_ASRC3_CON13 = 0x%x\n", Afe_Get_Reg(AFE_ASRC3_CON13)); pr_debug("AFE_ASRC3_CON14 = 0x%x\n", Afe_Get_Reg(AFE_ASRC3_CON14)); #ifdef CONFIG_FPGA_EARLY_PORTING pr_debug("FPGA_CFG0 = 0x%x\n", Afe_Get_Reg(FPGA_CFG0)); #endif AudDrv_Clk_Off(); pr_debug("-AudDrv Afe_Log_Print\n"); }
static int Audio_hdmi_SideGen_Set(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { printk("%s()\n", __func__); if (ucontrol->value.enumerated.item[0] > ARRAY_SIZE(HDMI_SIDEGEN)) { printk("return -EINVAL\n"); return -EINVAL; } #ifdef _TDM_8CH_SGEN_TEST mHdmi_sidegen_control = ucontrol->value.integer.value[0]; if (mHdmi_sidegen_control) { uint32 samplerate = 44100; uint32 Channels = 2; uint32 HDMIchaanel = 8; uint32 Tdm_Lrck = 0; uint32 MclkDiv = 0; AudDrv_Clk_On (); SetHDMIAddress(); copysinewavetohdmi(8); SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_HDMI, AFE_WLEN_16_BIT); SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_HDMI, AFE_WLEN_16_BIT); SetHDMIdatalength(Soc_Aud_I2S_WLEN_WLEN_16BITS); SetTDMDatalength(Soc_Aud_I2S_WLEN_WLEN_16BITS); SetTDMbckcycle(Soc_Aud_I2S_WLEN_WLEN_16BITS); Tdm_Lrck = ((Soc_Aud_I2S_WLEN_WLEN_16BITS + 1) * 16) - 1; // set APLL clock setting EnableApll1(true); EnableApll2(true); EnableI2SDivPower(AUDIO_APLL1_DIV4, true); EnableI2SDivPower(AUDIO_APLL1_DIV5, true); EnableI2SDivPower(AUDIO_APLL2_DIV4, true); EnableI2SDivPower(AUDIO_APLL2_DIV5, true); MclkDiv = SetCLkMclk(Soc_Aud_I2S3, samplerate); SetCLkBclk(MclkDiv, samplerate, Channels, Soc_Aud_I2S_WLEN_WLEN_16BITS); SetHDMIsamplerate(samplerate); SetHDMIChannels(HDMIchaanel); SetHDMIMCLK(); SetHDMIBCLK(); SetTDMLrckWidth(Tdm_Lrck); SetTDMbckcycle(Soc_Aud_I2S_WLEN_WLEN_16BITS); SetTDMChannelsSdata(Channels); SetTDMDatalength(Soc_Aud_I2S_WLEN_WLEN_16BITS); SetTDMI2Smode(Soc_Aud_I2S_FORMAT_I2S); SetTDMLrckInverse(false); SetTDMBckInverse(false); #if 0 Afe_Set_Reg(AFE_TDM_CON2, 0, 0x0000000f); // tmp 0: Channel starts from O30/O31. Afe_Set_Reg(AFE_TDM_CON2, 1 << 4, 0x000000f0); // tmp 1: Channel starts from O32/O33. Afe_Set_Reg(AFE_TDM_CON2, 2 << 8, 0x00000f00); // tmp 2: Channel starts from O34/O35. Afe_Set_Reg(AFE_TDM_CON2, 3 << 12, 0x0000f000); // tmp 3: Channel starts from O36/O37. #endif Afe_Set_Reg(AUDIO_TOP_CON3, 1<<3, 1 << 3); // inverse HDMI BCLK SetTDMEnable(true); //enable TDM Afe_Set_Reg(AUDIO_TOP_CON0, 0 << 20, 1 << 20); // enable HDMI CK // here start digital part SetHDMIConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I30, Soc_Aud_InterConnectionOutput_O30); SetHDMIConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I31, Soc_Aud_InterConnectionOutput_O31); SetHDMIConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I30, Soc_Aud_InterConnectionOutput_O32); SetHDMIConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I31, Soc_Aud_InterConnectionOutput_O33); SetHDMIConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I30, Soc_Aud_InterConnectionOutput_O34); SetHDMIConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I31, Soc_Aud_InterConnectionOutput_O35); SetHDMIConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I30, Soc_Aud_InterConnectionOutput_O36); SetHDMIConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I31, Soc_Aud_InterConnectionOutput_O37); SetHDMIEnable(true); Afe_Set_Reg(AFE_DAC_CON0, 0x1, 0x1); // tmp 3: Channel starts from O36/O37. } else { SetHDMIEnable(false); SetTDMEnable(false); Afe_Set_Reg(AFE_DAC_CON0, 0x0, 0x0); // tmp 3: Channel starts from O36/O37. AudDrv_Clk_Off (); } #endif return 0; }
static int Audio_hdmi_SideGen_Set(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { printk("%s()\n", __func__); if (ucontrol->value.enumerated.item[0] > ARRAY_SIZE(HDMI_SIDEGEN)) { printk("return -EINVAL\n"); return -EINVAL; } #ifdef _TDM_8CH_SGEN_TEST mHdmi_sidegen_control = ucontrol->value.integer.value[0]; if (mHdmi_sidegen_control) { uint32 samplerate = 44100; uint32 Channels = 2; uint32 HDMIchaanel = 8; uint32 Tdm_Lrck = 0; uint32 MclkDiv = 0; //Enable Audio Driver Clock AudDrv_Clk_On(); AudDrv_Emi_Clk_On(); //Enable APLL EnableApll(samplerate, true); EnableApllTuner(samplerate, true); //HDMI I2S clock setting MclkDiv = SetCLkMclk(Soc_Aud_HDMI_MCK, samplerate); SetCLkHdmiBclk(MclkDiv, samplerate, 2 , 32); //enable mclk divider EnableSpdifDivPower(AUDIO_APLL_SPDIF_DIV, true); //enable bck divider EnableHDMIDivPower(AUDIO_APLL_HDMI_BCK_DIV, true); //turn on hdmi clk SetHdmiClkOn(); //Set Mem buffer SetHDMIAddress(); copysinewavetohdmi(8); //config hdmi irq SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ5_MCU_MODE, 44100); //config hdmi interface SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_HDMI, AFE_WLEN_16_BIT); //now fix 16bit SetHdmiTdm1Config(44100, AFE_DATA_WLEN_32BIT); SetHdmiTdm2Config(44100); SetHDMIChannels(HDMIchaanel); //config hdmi connection SetHDMIConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I30, Soc_Aud_InterConnectionOutput_O30); SetHDMIConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I31, Soc_Aud_InterConnectionOutput_O31); SetHDMIConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I30, Soc_Aud_InterConnectionOutput_O32); SetHDMIConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I31, Soc_Aud_InterConnectionOutput_O33); SetHDMIConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I30, Soc_Aud_InterConnectionOutput_O34); SetHDMIConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I31, Soc_Aud_InterConnectionOutput_O35); SetHDMIConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I30, Soc_Aud_InterConnectionOutput_O36); SetHDMIConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I31, Soc_Aud_InterConnectionOutput_O37); //Enable hdmi Memory Path SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_HDMI, true); //enable irq SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ5_MCU_MODE, true); //enable hdmi out SetHDMIEnable(true); //enable afe EnableAfe(true); //enable TDM SetTDMEnable(HDMIchaanel); } else { uint32 samplerate = 44100; uint32 Channels = 2; uint32 HDMIchaanel = 8; uint32 Tdm_Lrck = 0; uint32 MclkDiv = 0; SetTDMEnable(false); SetHDMIEnable(false); SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ5_MCU_MODE, false); SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_HDMI, false); EnableAfe(false); SetHdmiPcmInterConnection(Soc_Aud_InterCon_DisConnect, HDMIchaanel); SetHdmiClkOff(); EnableSpdifDivPower(AUDIO_APLL_SPDIF_DIV, false); EnableHDMIDivPower(AUDIO_APLL_HDMI_BCK_DIV, false); AudDrv_Emi_Clk_Off(); AudDrv_Clk_Off(); } #endif return 0; }
static void GetAudioTrimOffset(int channels) { int Buffer_on_value = 0 , Buffer_offl_value = 0, Buffer_offr_value = 0; const int off_counter = 20, on_counter = 20 , Const_DC_OFFSET = 2048; printk("%s channels = %d\n", __func__, channels); // open headphone and digital part AudDrv_Clk_On(); AudDrv_Emi_Clk_On(); OpenAfeDigitaldl1(true); switch (channels) { case AUDIO_OFFSET_TRIM_MUX_HPL: case AUDIO_OFFSET_TRIM_MUX_HPR: { OpenTrimBufferHardware(true); setHpGainZero(); break; } default: break; } // Get HPL off offset SetSdmLevel(AUDIO_SDM_LEVEL_MUTE); msleep(1); setOffsetTrimMux(AUDIO_OFFSET_TRIM_MUX_HPL); setOffsetTrimBufferGain(3); EnableTrimbuffer(true); msleep(1); #if MTK_FPGA Buffer_offl_value = PMIC_IMM_GetOneChannelValue(MT6328_AUX_CH9, off_counter, 0); #else Buffer_offl_value = 0; #endif printk("Buffer_offl_value = %d \n", Buffer_offl_value); EnableTrimbuffer(false); // Get HPR off offset SetSdmLevel(AUDIO_SDM_LEVEL_MUTE); setOffsetTrimMux(AUDIO_OFFSET_TRIM_MUX_HPR); setOffsetTrimBufferGain(3); EnableTrimbuffer(true); msleep(5); #if MTK_FPGA Buffer_offr_value = PMIC_IMM_GetOneChannelValue(MT6328_AUX_CH9, off_counter, 0); #else Buffer_offr_value = 0; #endif printk("Buffer_offr_value = %d \n", Buffer_offr_value); EnableTrimbuffer(false); switch (channels) { case AUDIO_OFFSET_TRIM_MUX_HPL: case AUDIO_OFFSET_TRIM_MUX_HPR: { OpenTrimBufferHardware(false); break; } default: break; } // calibrate HPL offset trim setOffsetTrimMux(AUDIO_OFFSET_TRIM_MUX_HPL); setOffsetTrimBufferGain(3); // EnableTrimbuffer(true); // msleep(5); switch (channels) { case AUDIO_OFFSET_TRIM_MUX_HPL: case AUDIO_OFFSET_TRIM_MUX_HPR: { OpenAnalogHeadphone(true); setHpGainZero(); break; } default: break; } EnableTrimbuffer(true); msleep(10); #ifdef CONFIG_MTK_FPGA Buffer_on_value = PMIC_IMM_GetOneChannelValue(MT6328_AUX_CH9, on_counter, 0); #else Buffer_on_value = 0; #endif mHplOffset = Buffer_on_value - Buffer_offl_value + Const_DC_OFFSET; printk("Buffer_on_value = %d Buffer_offl_value = %d mHplOffset = %d \n", Buffer_on_value, Buffer_offl_value, mHplOffset); EnableTrimbuffer(false); // calibrate HPL offset trim setOffsetTrimMux(AUDIO_OFFSET_TRIM_MUX_HPR); setOffsetTrimBufferGain(3); EnableTrimbuffer(true); msleep(10); #ifdef CONFIG_MTK_FPGA Buffer_on_value = PMIC_IMM_GetOneChannelValue(MT6328_AUX_CH9, on_counter, 0); #else Buffer_on_value = 0; #endif mHprOffset = Buffer_on_value - Buffer_offr_value + Const_DC_OFFSET; printk("Buffer_on_value = %d Buffer_offr_value = %d mHprOffset = %d \n", Buffer_on_value, Buffer_offr_value, mHprOffset); switch (channels) { case AUDIO_OFFSET_TRIM_MUX_HPL: case AUDIO_OFFSET_TRIM_MUX_HPR: OpenAnalogHeadphone(false); break; } setOffsetTrimMux(AUDIO_OFFSET_TRIM_MUX_GROUND); EnableTrimbuffer(false); OpenAfeDigitaldl1(false); SetSdmLevel(AUDIO_SDM_LEVEL_NORMAL); AudDrv_Emi_Clk_Off(); AudDrv_Clk_Off(); }
static ssize_t mt_soc_ana_debug_read(struct file *file, char __user *buf, size_t count, loff_t *pos) { const int size = 4096; char buffer[size]; int n = 0; printk("mt_soc_ana_debug_read count = %zu\n", count); AudDrv_Clk_On(); audckbufEnable(true); n += scnprintf(buffer + n, size - n, "ABB_AFE_CON0 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON0)); n += scnprintf(buffer + n, size - n, "ABB_AFE_CON1 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON1)); n += scnprintf(buffer + n, size - n, "ABB_AFE_CON2 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON2)); n += scnprintf(buffer + n, size - n, "ABB_AFE_CON3 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON3)); n += scnprintf(buffer + n, size - n, "ABB_AFE_CON4 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON4)); n += scnprintf(buffer + n, size - n, "ABB_AFE_CON5 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON5)); n += scnprintf(buffer + n, size - n, "ABB_AFE_CON6 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON6)); n += scnprintf(buffer + n, size - n, "ABB_AFE_CON7 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON7)); n += scnprintf(buffer + n, size - n, "ABB_AFE_CON8 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON8)); n += scnprintf(buffer + n, size - n, "ABB_AFE_CON9 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON9)); n += scnprintf(buffer + n, size - n, "ABB_AFE_CON10 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON10)); n += scnprintf(buffer + n, size - n, "ABB_AFE_CON11 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON11)); n += scnprintf(buffer + n, size - n, "ABB_AFE_STA0 = 0x%x\n", Ana_Get_Reg(ABB_AFE_STA0)); n += scnprintf(buffer + n, size - n, "ABB_AFE_STA1 = 0x%x\n", Ana_Get_Reg(ABB_AFE_STA1)); n += scnprintf(buffer + n, size - n, "ABB_AFE_STA2 = 0x%x\n", Ana_Get_Reg(ABB_AFE_STA2)); n += scnprintf(buffer + n, size - n, "AFE_UP8X_FIFO_CFG0 = 0x%x\n", Ana_Get_Reg(AFE_UP8X_FIFO_CFG0)); n += scnprintf(buffer + n, size - n, "AFE_UP8X_FIFO_LOG_MON0 = 0x%x\n", Ana_Get_Reg(AFE_UP8X_FIFO_LOG_MON0)); n += scnprintf(buffer + n, size - n, "AFE_UP8X_FIFO_LOG_MON1 = 0x%x\n", Ana_Get_Reg(AFE_UP8X_FIFO_LOG_MON1)); n += scnprintf(buffer + n, size - n, "AFE_PMIC_NEWIF_CFG0 = 0x%x\n", Ana_Get_Reg(AFE_PMIC_NEWIF_CFG0)); n += scnprintf(buffer + n, size - n, "AFE_PMIC_NEWIF_CFG1 = 0x%x\n", Ana_Get_Reg(AFE_PMIC_NEWIF_CFG1)); n += scnprintf(buffer + n, size - n, "AFE_PMIC_NEWIF_CFG2 = 0x%x\n", Ana_Get_Reg(AFE_PMIC_NEWIF_CFG2)); n += scnprintf(buffer + n, size - n, "AFE_PMIC_NEWIF_CFG3 = 0x%x\n", Ana_Get_Reg(AFE_PMIC_NEWIF_CFG3)); n += scnprintf(buffer + n, size - n, "ABB_AFE_TOP_CON0 = 0x%x\n", Ana_Get_Reg(ABB_AFE_TOP_CON0)); n += scnprintf(buffer + n, size - n, "ABB_MON_DEBUG0 = 0x%x\n", Ana_Get_Reg(ABB_MON_DEBUG0)); n += scnprintf(buffer + n, size - n, "TOP_CKPDN0 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN0)); n += scnprintf(buffer + n, size - n, "TOP_CKPDN1 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN1)); n += scnprintf(buffer + n, size - n, "TOP_CKPDN2 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN2)); n += scnprintf(buffer + n, size - n, "TOP_CKCON1 = 0x%x\n", Ana_Get_Reg(TOP_CKCON1)); n += scnprintf(buffer + n, size - n, "SPK_CON0 = 0x%x\n", Ana_Get_Reg(SPK_CON0)); n += scnprintf(buffer + n, size - n, "SPK_CON1 = 0x%x\n", Ana_Get_Reg(SPK_CON1)); n += scnprintf(buffer + n, size - n, "SPK_CON2 = 0x%x\n", Ana_Get_Reg(SPK_CON2)); n += scnprintf(buffer + n, size - n, "SPK_CON6 = 0x%x\n", Ana_Get_Reg(SPK_CON6)); n += scnprintf(buffer + n, size - n, "SPK_CON7 = 0x%x\n", Ana_Get_Reg(SPK_CON7)); n += scnprintf(buffer + n, size - n, "SPK_CON8 = 0x%x\n", Ana_Get_Reg(SPK_CON8)); n += scnprintf(buffer + n, size - n, "SPK_CON9 = 0x%x\n", Ana_Get_Reg(SPK_CON9)); n += scnprintf(buffer + n, size - n, "SPK_CON10 = 0x%x\n", Ana_Get_Reg(SPK_CON10)); n += scnprintf(buffer + n, size - n, "SPK_CON11 = 0x%x\n", Ana_Get_Reg(SPK_CON11)); n += scnprintf(buffer + n, size - n, "SPK_CON12 = 0x%x\n", Ana_Get_Reg(SPK_CON12)); n += scnprintf(buffer + n, size - n, "AUDTOP_CON0 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON0)); n += scnprintf(buffer + n, size - n, "AUDTOP_CON1 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON1)); n += scnprintf(buffer + n, size - n, "AUDTOP_CON2 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON2)); n += scnprintf(buffer + n, size - n, "AUDTOP_CON3 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON3)); n += scnprintf(buffer + n, size - n, "AUDTOP_CON4 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON4)); n += scnprintf(buffer + n, size - n, "AUDTOP_CON5 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON5)); n += scnprintf(buffer + n, size - n, "AUDTOP_CON6 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON6)); n += scnprintf(buffer + n, size - n, "AUDTOP_CON7 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON7)); n += scnprintf(buffer + n, size - n, "AUDTOP_CON8 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON8)); n += scnprintf(buffer + n, size - n, "AUDTOP_CON9 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON9)); printk("mt_soc_ana_debug_read len = %d\n", n); audckbufEnable(false); AudDrv_Clk_Off(); return simple_read_from_buffer(buf, count, pos, buffer, n); }
static int Audio_i2s0_SideGen_Set(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { uint32 u32AudioI2S = 0, MclkDiv0, MclkDiv3, REG448 = 0, REG44C = 0; uint32 samplerate = 0; AudDrv_Clk_On(); printk("%s() mi2s0_hdoutput_control = %d\n", __func__, mi2s0_hdoutput_control); if (ucontrol->value.enumerated.item[0] > ARRAY_SIZE(i2s0_SIDEGEN)) { printk("return -EINVAL\n"); return -EINVAL; } mi2s0_sidegen_control = ucontrol->value.integer.value[0]; if (mi2s0_sidegen_control == 1) { samplerate = 48000; } else if (mi2s0_sidegen_control == 2) { samplerate = 44100; } else if (mi2s0_sidegen_control == 3) { samplerate = 32000; } else if (mi2s0_sidegen_control == 4) { samplerate = 16000; // here start digital part SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O00); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O01); } else if (mi2s0_sidegen_control == 5) { samplerate = 8000; // here start digital part SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O00); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O01); } else if (mi2s0_sidegen_control == 6) { samplerate = 16000; // here start digital part SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O00); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O01); printk("%s() Soc_Aud_InterCon_Connection I01 O14\n", __func__); //phone call echo reference connection: I0/I1->O13/O14(HW Gain1)->I11 ->O24 SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I01, Soc_Aud_InterConnectionOutput_O14);//0x448, 0x10000 REG448 = Afe_Get_Reg(AFE_GAIN1_CONN2); printk("%s() AFE_GAIN1_CONN2 (0X448) =0x%x\n", __func__, REG448); printk("%s() Soc_Aud_InterCon_Connection I11 O24\n", __func__); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I11, Soc_Aud_InterConnectionOutput_O24);//0x44c, 0x8 REG44C = Afe_Get_Reg(AFE_GAIN1_CONN3); printk("%s() AFE_GAIN1_CONN3 (0X44C) =0x%x\n", __func__, REG44C); // Set HW_GAIN1 SetHwDigitalGainMode(Soc_Aud_Hw_Digital_Gain_HW_DIGITAL_GAIN1, samplerate, 0x80); SetHwDigitalGainEnable(Soc_Aud_Hw_Digital_Gain_HW_DIGITAL_GAIN1, true); SetHwDigitalGain(0x80000, Soc_Aud_Hw_Digital_Gain_HW_DIGITAL_GAIN1); Afe_Set_Reg(AFE_DAC_CON1, 0x400, 0xF00); } if (mi2s0_sidegen_control != 0) { printk("%s() mi2s0_sidegen_control=%d, mi2s0_hdoutput_control=%d\n", __func__, mi2s0_sidegen_control, mi2s0_hdoutput_control); AudDrv_Clk_On(); Afe_Set_Reg(AUDIO_TOP_CON1, 0x2, 0x2); // I2S_SOFT_Reset Afe_Set_Reg(AUDIO_TOP_CON1, 0x1 << 4, 0x1 << 4); // I2S_SOFT_Reset uint32 Audio_I2S_Dac = 0; SetSampleRate(Soc_Aud_Digital_Block_MEM_I2S, samplerate); Audio_I2S_Dac |= (Soc_Aud_LR_SWAP_NO_SWAP << 31); // Audio_I2S_Dac |= (Soc_Aud_INV_BCK_INVESE << 29);//BCK Inv Audio_I2S_Dac |= (Soc_Aud_I2S_IN_PAD_SEL_I2S_IN_FROM_IO_MUX << 28);//I2S in from io_mux Audio_I2S_Dac |= (Soc_Aud_INV_LRCK_NO_INVERSE << 5); Audio_I2S_Dac |= (Soc_Aud_I2S_FORMAT_I2S << 3); Audio_I2S_Dac |= (Soc_Aud_I2S_WLEN_WLEN_32BITS << 1); u32AudioI2S = SampleRateTransform(samplerate) << 8; u32AudioI2S |= Soc_Aud_I2S_FORMAT_I2S << 3; // us3 I2s format u32AudioI2S |= Soc_Aud_I2S_WLEN_WLEN_32BITS << 1; // 32 BITS if (mi2s0_hdoutput_control == true) { printk("%s() mi2s0_sidegen_control = %d set low jitter\n", __func__, mi2s0_sidegen_control); MclkDiv0 = SetCLkMclk(Soc_Aud_I2S0, samplerate); //select I2S SetCLkBclk(MclkDiv0, samplerate, 2, Soc_Aud_I2S_WLEN_WLEN_32BITS); MclkDiv3 = SetCLkMclk(Soc_Aud_I2S3, samplerate); //select I2S SetCLkBclk(MclkDiv3, samplerate, 2, Soc_Aud_I2S_WLEN_WLEN_32BITS); u32AudioI2S |= Soc_Aud_LOW_JITTER_CLOCK << 12 ; //Low jitter mode Audio_I2S_Dac |= Soc_Aud_LOW_JITTER_CLOCK << 12 ; //Low jitter mode } else { printk("%s() mi2s0_sidegen_control = %d NOT set low jitter\n", __func__, mi2s0_sidegen_control); u32AudioI2S &= ~(Soc_Aud_LOW_JITTER_CLOCK << 12) ; Audio_I2S_Dac &= ~(Soc_Aud_LOW_JITTER_CLOCK << 12) ; } // start I2S DAC out if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2) == false) { printk("%s(), mi2s0_sidegen_control=%d, write AFE_I2S_CON (0x%x), AFE_I2S_CON3(0x%x)\n", __func__, mi2s0_sidegen_control, Audio_I2S_Dac, u32AudioI2S); Afe_Set_Reg(AFE_I2S_CON, 0x0, 0x1); SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2, true); Afe_Set_Reg(AFE_I2S_CON, Audio_I2S_Dac | 0x1, MASK_ALL); Afe_Set_Reg(AFE_I2S_CON3, u32AudioI2S | 1, AFE_MASK_ALL); Afe_Set_Reg(AUDIO_TOP_CON1, 0x0 << 4, 0x1 << 4); Afe_Set_Reg(AUDIO_TOP_CON1, 0x0, 0x2); // I2S_SOFT_Reset EnableAfe(true); } else { printk("%s(), mi2s0_sidegen_control=%d, write AFE_I2S_CON (0x%x), AFE_I2S_CON3(0x%x)\n", __func__, mi2s0_sidegen_control, Audio_I2S_Dac, u32AudioI2S); Afe_Set_Reg(AFE_I2S_CON, 0x0, 0x1); SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2, true); Afe_Set_Reg(AFE_I2S_CON, Audio_I2S_Dac | 0x1, MASK_ALL); Afe_Set_Reg(AFE_I2S_CON3, u32AudioI2S | 1, AFE_MASK_ALL); Afe_Set_Reg(AUDIO_TOP_CON1, 0x0 << 4, 0x1 << 4); Afe_Set_Reg(AUDIO_TOP_CON1, 0x0, 0x2); // I2S_SOFT_Reset EnableAfe(true); } } else { SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2, false); if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2) == false) { if (mi2s0_hdoutput_control == true) { Afe_Set_Reg(AFE_I2S_CON3, 0, 1 << 12); //Clear Low jitter mode setting } Afe_Set_Reg(AFE_I2S_CON3, 0x0, 0x1); Afe_Set_Reg(AFE_I2S_CON, 0x0, 0x1); SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O00); SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O01); EnableAfe(false); } AudDrv_Clk_Off(); } AudDrv_Clk_Off(); return 0; }
static ssize_t mt_soc_debug_read(struct file *file, char __user *buf, size_t count, loff_t *pos) { const int size = 4096; char buffer[size]; int n = 0; AudDrv_Clk_On(); printk("mt_soc_debug_read\n"); n = scnprintf(buffer + n, size - n, "AUDIO_TOP_CON0 = 0x%x\n", Afe_Get_Reg(AUDIO_TOP_CON0)); n += scnprintf(buffer + n, size - n, "AUDIO_TOP_CON1 = 0x%x\n", Afe_Get_Reg(AUDIO_TOP_CON1)); n += scnprintf(buffer + n, size - n, "AUDIO_TOP_CON2 = 0x%x\n", Afe_Get_Reg(AUDIO_TOP_CON2)); n += scnprintf(buffer + n, size - n, "AUDIO_TOP_CON3 = 0x%x\n", Afe_Get_Reg(AUDIO_TOP_CON3)); n += scnprintf(buffer + n, size - n, "AFE_DAC_CON0 = 0x%x\n", Afe_Get_Reg(AFE_DAC_CON0)); n += scnprintf(buffer + n, size - n, "AFE_DAC_CON1 = 0x%x\n", Afe_Get_Reg(AFE_DAC_CON1)); n += scnprintf(buffer + n, size - n, "AFE_I2S_CON = 0x%x\n", Afe_Get_Reg(AFE_I2S_CON)); n += scnprintf(buffer + n, size - n, "AFE_DAIBT_CON0 = 0x%x\n", Afe_Get_Reg(AFE_DAIBT_CON0)); n += scnprintf(buffer + n, size - n, "AFE_CONN0 = 0x%x\n", Afe_Get_Reg(AFE_CONN0)); n += scnprintf(buffer + n, size - n, "AFE_CONN1 = 0x%x\n", Afe_Get_Reg(AFE_CONN1)); n += scnprintf(buffer + n, size - n, "AFE_CONN2 = 0x%x\n", Afe_Get_Reg(AFE_CONN2)); n += scnprintf(buffer + n, size - n, "AFE_CONN3 = 0x%x\n", Afe_Get_Reg(AFE_CONN3)); n += scnprintf(buffer + n, size - n, "AFE_CONN4 = 0x%x\n", Afe_Get_Reg(AFE_CONN4)); n += scnprintf(buffer + n, size - n, "AFE_I2S_CON1 = 0x%x\n", Afe_Get_Reg(AFE_I2S_CON1)); n += scnprintf(buffer + n, size - n, "AFE_I2S_CON2 = 0x%x\n", Afe_Get_Reg(AFE_I2S_CON2)); n += scnprintf(buffer + n, size - n, "AFE_MRGIF_CON = 0x%x\n", Afe_Get_Reg(AFE_MRGIF_CON)); n += scnprintf(buffer + n, size - n, "AFE_DL1_BASE = 0x%x\n", Afe_Get_Reg(AFE_DL1_BASE)); n += scnprintf(buffer + n, size - n, "AFE_DL1_CUR = 0x%x\n", Afe_Get_Reg(AFE_DL1_CUR)); n += scnprintf(buffer + n, size - n, "AFE_DL1_END = 0x%x\n", Afe_Get_Reg(AFE_DL1_END)); n += scnprintf(buffer + n, size - n, "AFE_I2S_CON3 = 0x%x\n", Afe_Get_Reg(AFE_I2S_CON3)); n += scnprintf(buffer + n, size - n, "AFE_DL2_BASE = 0x%x\n", Afe_Get_Reg(AFE_DL2_BASE)); n += scnprintf(buffer + n, size - n, "AFE_DL2_CUR = 0x%x\n", Afe_Get_Reg(AFE_DL2_CUR)); n += scnprintf(buffer + n, size - n, "AFE_DL2_END = 0x%x\n", Afe_Get_Reg(AFE_DL2_END)); n += scnprintf(buffer + n, size - n, "AFE_CONN5 = 0x%x\n", Afe_Get_Reg(AFE_CONN5)); n += scnprintf(buffer + n, size - n, "AFE_CONN_24BIT = 0x%x\n", Afe_Get_Reg(AFE_CONN_24BIT)); n += scnprintf(buffer + n, size - n, "AFE_AWB_BASE = 0x%x\n", Afe_Get_Reg(AFE_AWB_BASE)); n += scnprintf(buffer + n, size - n, "AFE_AWB_END = 0x%x\n", Afe_Get_Reg(AFE_AWB_END)); n += scnprintf(buffer + n, size - n, "AFE_AWB_CUR = 0x%x\n", Afe_Get_Reg(AFE_AWB_CUR)); n += scnprintf(buffer + n, size - n, "AFE_VUL_BASE = 0x%x\n", Afe_Get_Reg(AFE_VUL_BASE)); n += scnprintf(buffer + n, size - n, "AFE_VUL_END = 0x%x\n", Afe_Get_Reg(AFE_VUL_END)); n += scnprintf(buffer + n, size - n, "AFE_VUL_CUR = 0x%x\n", Afe_Get_Reg(AFE_VUL_CUR)); n += scnprintf(buffer + n, size - n, "AFE_CONN6 = 0x%x\n", Afe_Get_Reg(AFE_CONN6)); n += scnprintf(buffer + n, size - n, "AFE_DAI_BASE = 0x%x\n", Afe_Get_Reg(AFE_DAI_BASE)); n += scnprintf(buffer + n, size - n, "AFE_DAI_END = 0x%x\n", Afe_Get_Reg(AFE_DAI_END)); n += scnprintf(buffer + n, size - n, "AFE_DAI_CUR = 0x%x\n", Afe_Get_Reg(AFE_DAI_CUR)); n += scnprintf(buffer + n, size - n, "AFE_MEMIF_MSB = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_MSB)); n += scnprintf(buffer + n, size - n, "AFE_MEMIF_MON0 = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_MON0)); n += scnprintf(buffer + n, size - n, "AFE_MEMIF_MON1 = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_MON1)); n += scnprintf(buffer + n, size - n, "AFE_MEMIF_MON2 = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_MON2)); n += scnprintf(buffer + n, size - n, "AFE_MEMIF_MON4 = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_MON4)); n += scnprintf(buffer + n, size - n, "AFE_ADDA_DL_SRC2_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_DL_SRC2_CON0)); n += scnprintf(buffer + n, size - n, "AFE_ADDA_DL_SRC2_CON1 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_DL_SRC2_CON1)); n += scnprintf(buffer + n, size - n, "AFE_ADDA_UL_SRC_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_UL_SRC_CON0)); n += scnprintf(buffer + n, size - n, "AFE_ADDA_UL_SRC_CON1 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_UL_SRC_CON1)); n += scnprintf(buffer + n, size - n, "AFE_ADDA_TOP_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_TOP_CON0)); n += scnprintf(buffer + n, size - n, "AFE_ADDA_UL_DL_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_UL_DL_CON0)); n += scnprintf(buffer + n, size - n, "AFE_ADDA_SRC_DEBUG = 0x%x\n", Afe_Get_Reg(AFE_ADDA_SRC_DEBUG)); n += scnprintf(buffer + n, size - n, "AFE_ADDA_SRC_DEBUG_MON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_SRC_DEBUG_MON0)); n += scnprintf(buffer + n, size - n, "AFE_ADDA_SRC_DEBUG_MON1 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_SRC_DEBUG_MON1)); n += scnprintf(buffer + n, size - n, "AFE_ADDA_NEWIF_CFG0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_NEWIF_CFG0)); n += scnprintf(buffer + n, size - n, "AFE_ADDA_NEWIF_CFG1 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_NEWIF_CFG1)); n += scnprintf(buffer + n, size - n, "AFE_SIDETONE_DEBUG = 0x%x\n", Afe_Get_Reg(AFE_SIDETONE_DEBUG)); n += scnprintf(buffer + n, size - n, "AFE_SIDETONE_MON = 0x%x\n", Afe_Get_Reg(AFE_SIDETONE_MON)); n += scnprintf(buffer + n, size - n, "AFE_SIDETONE_CON0 = 0x%x\n", Afe_Get_Reg(AFE_SIDETONE_CON0)); n += scnprintf(buffer + n, size - n, "AFE_SIDETONE_COEFF = 0x%x\n", Afe_Get_Reg(AFE_SIDETONE_COEFF)); n += scnprintf(buffer + n, size - n, "AFE_SIDETONE_CON1 = 0x%x\n", Afe_Get_Reg(AFE_SIDETONE_CON1)); n += scnprintf(buffer + n, size - n, "AFE_SIDETONE_GAIN = 0x%x\n", Afe_Get_Reg(AFE_SIDETONE_GAIN)); n += scnprintf(buffer + n, size - n, "AFE_SGEN_CON0 = 0x%x\n", Afe_Get_Reg(AFE_SGEN_CON0)); n += scnprintf(buffer + n, size - n, "AFE_TOP_CON0 = 0x%x\n", Afe_Get_Reg(AFE_TOP_CON0)); n += scnprintf(buffer + n, size - n, "AFE_ADDA_PREDIS_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_PREDIS_CON0)); n += scnprintf(buffer + n, size - n, "AFE_ADDA_PREDIS_CON1 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_PREDIS_CON1)); n += scnprintf(buffer + n, size - n, "AFE_MRG_MON0 = 0x%x\n", Afe_Get_Reg(AFE_MRGIF_MON0)); n += scnprintf(buffer + n, size - n, "AFE_MRG_MON1 = 0x%x\n", Afe_Get_Reg(AFE_MRGIF_MON1)); n += scnprintf(buffer + n, size - n, "AFE_MRG_MON2 = 0x%x\n", Afe_Get_Reg(AFE_MRGIF_MON2)); n += scnprintf(buffer + n, size - n, "AFE_MOD_DAI_BASE = 0x%x\n", Afe_Get_Reg(AFE_MOD_DAI_BASE)); n += scnprintf(buffer + n, size - n, "AFE_MOD_DAI_END = 0x%x\n", Afe_Get_Reg(AFE_MOD_DAI_END)); n += scnprintf(buffer + n, size - n, "AFE_MOD_DAI_CUR = 0x%x\n", Afe_Get_Reg(AFE_MOD_DAI_CUR)); n += scnprintf(buffer + n, size - n, "AFE_DL1_D2_BASE = 0x%x\n", Afe_Get_Reg(AFE_DL1_D2_BASE)); n += scnprintf(buffer+n,size-n,"AFE_DL1_D2_END = 0x%x\n", Afe_Get_Reg(AFE_DL1_D2_END)); n += scnprintf(buffer + n, size - n, "AFE_DL1_D2_CUR = 0x%x\n", Afe_Get_Reg(AFE_DL1_D2_CUR)); n += scnprintf(buffer + n, size - n, "AFE_VUL_D2_BASE = 0x%x\n", Afe_Get_Reg(AFE_VUL_D2_BASE)); n += scnprintf(buffer + n, size - n, "AFE_VUL_D2_END = 0x%x\n", Afe_Get_Reg(AFE_VUL_D2_END)); n += scnprintf(buffer + n, size - n, "AFE_VUL_D2_CUR = 0x%x\n", Afe_Get_Reg(AFE_VUL_D2_CUR)); n += scnprintf(buffer + n, size - n, "AFE_IRQ_CON = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_CON)); n += scnprintf(buffer + n, size - n, "AFE_IRQ_MCU_CON = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_CON)); n += scnprintf(buffer + n, size - n, "AFE_IRQ_STATUS = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_STATUS)); n += scnprintf(buffer + n, size - n, "AFE_IRQ_CLR = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_CLR)); n += scnprintf(buffer + n, size - n, "AFE_IRQ_MCU_CNT1 = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_CNT1)); n += scnprintf(buffer + n, size - n, "AFE_IRQ_MCU_CNT2 = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_CNT2)); n += scnprintf(buffer + n, size - n, "AFE_IRQ_MCU_EN = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_EN)); n += scnprintf(buffer + n, size - n, "AFE_IRQ_MON2 = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_MON2)); n += scnprintf(buffer + n, size - n, "AFE_IRQ1_CNT_MON = 0x%x\n", Afe_Get_Reg(AFE_IRQ1_MCU_CNT_MON)); n += scnprintf(buffer + n, size - n, "AFE_IRQ2_CNT_MON = 0x%x\n", Afe_Get_Reg(AFE_IRQ2_MCU_CNT_MON)); n += scnprintf(buffer + n, size - n, "AFE_IRQ1_EN_CNT_MON = 0x%x\n", Afe_Get_Reg(AFE_IRQ1_MCU_EN_CNT_MON)); n += scnprintf(buffer + n, size - n, "AFE_MEMIF_MAXLEN = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_MAXLEN)); n += scnprintf(buffer + n, size - n, "AFE_MEMIF_PBUF_SIZE = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_PBUF_SIZE)); n += scnprintf(buffer + n, size - n, "AFE_IRQ_MCU_CNT7 = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_CNT7)); // k2 add n += scnprintf(buffer + n, size - n, "AFE_APLL1_TUNER_CFG = 0x%x\n", Afe_Get_Reg(AFE_APLL1_TUNER_CFG)); n += scnprintf(buffer + n, size - n, "AFE_APLL2_TUNER_CFG = 0x%x\n", Afe_Get_Reg(AFE_APLL2_TUNER_CFG)); n += scnprintf(buffer + n, size - n, "AFE_GAIN1_CON0 = 0x%x\n", Afe_Get_Reg(AFE_GAIN1_CON0)); n += scnprintf(buffer + n, size - n, "AFE_GAIN1_CON1 = 0x%x\n", Afe_Get_Reg(AFE_GAIN1_CON1)); n += scnprintf(buffer + n, size - n, "AFE_GAIN1_CON2 = 0x%x\n", Afe_Get_Reg(AFE_GAIN1_CON2)); n += scnprintf(buffer + n, size - n, "AFE_GAIN1_CON3 = 0x%x\n", Afe_Get_Reg(AFE_GAIN1_CON3)); n += scnprintf(buffer + n, size - n, "AFE_GAIN1_CONN = 0x%x\n", Afe_Get_Reg(AFE_GAIN1_CONN)); n += scnprintf(buffer + n, size - n, "AFE_GAIN1_CUR = 0x%x\n", Afe_Get_Reg(AFE_GAIN1_CUR)); n += scnprintf(buffer + n, size - n, "AFE_GAIN2_CON0 = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CON0)); n += scnprintf(buffer + n, size - n, "AFE_GAIN2_CON1 = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CON1)); n += scnprintf(buffer + n, size - n, "AFE_GAIN2_CON2 = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CON2)); n += scnprintf(buffer + n, size - n, "AFE_GAIN2_CON3 = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CON3)); n += scnprintf(buffer + n, size - n, "AFE_GAIN2_CONN = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CONN)); n += scnprintf(buffer + n, size - n, "AFE_GAIN2_CUR = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CUR)); n += scnprintf(buffer + n, size - n, "AFE_GAIN2_CONN2 = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CONN2)); n += scnprintf(buffer + n, size - n, "FPGA_CFG2 = 0x%x\n", Afe_Get_Reg(FPGA_CFG2)); n += scnprintf(buffer + n, size - n, "FPGA_CFG3 = 0x%x\n", Afe_Get_Reg(FPGA_CFG3)); n += scnprintf(buffer + n, size - n, "FPGA_CFG0 = 0x%x\n", Afe_Get_Reg(FPGA_CFG0)); n += scnprintf(buffer + n, size - n, "FPGA_CFG1 = 0x%x\n", Afe_Get_Reg(FPGA_CFG1)); n += scnprintf(buffer + n, size - n, "FPGA_STC = 0x%x\n", Afe_Get_Reg(FPGA_STC)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON0)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON1 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON1)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON2 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON2)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON3 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON3)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON4 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON4)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON5 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON5)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON6 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON6)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON7 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON7)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON8 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON8)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON9 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON9)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON10 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON10)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON11 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON11)); n += scnprintf(buffer + n, size - n, "PCM_INTF_CON1 = 0x%x\n", Afe_Get_Reg(PCM_INTF_CON)); n += scnprintf(buffer + n, size - n, "PCM_INTF_CON2 = 0x%x\n", Afe_Get_Reg(PCM_INTF_CON2)); n += scnprintf(buffer + n, size - n, "PCM2_INTF_CON = 0x%x\n", Afe_Get_Reg(PCM2_INTF_CON)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON13 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON13)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON14 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON14)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON15 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON15)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON16 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON16)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON17 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON17)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON18 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON18)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON19 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON19)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON20 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON20)); n += scnprintf(buffer + n, size - n, "AFE_ASRC_CON21 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON21)); n += scnprintf(buffer + n, size - n, "AFE_ASRC4_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON0)); n += scnprintf(buffer + n, size - n, "AFE_ASRC4_CON1 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON1)); n += scnprintf(buffer + n, size - n, "AFE_ASRC4_CON2 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON2)); n += scnprintf(buffer + n, size - n, "AFE_ASRC4_CON3 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON3)); n += scnprintf(buffer + n, size - n, "AFE_ASRC4_CON4 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON4)); n += scnprintf(buffer + n, size - n, "AFE_ASRC4_CON5 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON5)); n += scnprintf(buffer + n, size - n, "AFE_ASRC4_CON6 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON6)); n += scnprintf(buffer + n, size - n, "AFE_ASRC4_CON7 = 0x%x\n", Afe_Get_Reg(AFE_ASRC4_CON7)); n += scnprintf(buffer + n, size - n, "AFE_ASRC2_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ASRC2_CON0)); n += scnprintf(buffer + n, size - n, "AFE_ASRC2_CON5 = 0x%x\n", Afe_Get_Reg(AFE_ASRC2_CON5)); n += scnprintf(buffer + n, size - n, "AFE_ASRC2_CON6 = 0x%x\n", Afe_Get_Reg(AFE_ASRC2_CON6)); n += scnprintf(buffer + n, size - n, "AFE_ASRC3_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ASRC3_CON0)); n += scnprintf(buffer + n, size - n, "AFE_ASRC3_CON5 = 0x%x\n", Afe_Get_Reg(AFE_ASRC3_CON5)); n += scnprintf(buffer + n, size - n, "AFE_ASRC3_CON6 = 0x%x\n", Afe_Get_Reg(AFE_ASRC3_CON6)); // k2 add n += scnprintf(buffer + n, size - n, "AFE_ADDA4_TOP_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA4_TOP_CON0)); n += scnprintf(buffer + n, size - n, "AFE_ADDA4_UL_SRC_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA4_UL_SRC_CON0)); n += scnprintf(buffer + n, size - n, "AFE_ADDA4_UL_SRC_CON1 = 0x%x\n", Afe_Get_Reg(AFE_ADDA4_UL_SRC_CON1)); n += scnprintf(buffer + n, size - n, "AFE_ADDA4_NEWIF_CFG0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA4_NEWIF_CFG0)); n += scnprintf(buffer + n, size - n, "AFE_ADDA4_NEWIF_CFG1 = 0x%x\n", Afe_Get_Reg(AFE_ADDA4_NEWIF_CFG1)); n += scnprintf(buffer + n, size - n, "AUDIO_CLK_AUDDIV_0 = 0x%x\n", GetClkCfg(AUDIO_CLK_AUDDIV_0)); n += scnprintf(buffer + n, size - n, "AUDIO_CLK_AUDDIV_1 = 0x%x\n", GetClkCfg(AUDIO_CLK_AUDDIV_1)); printk("mt_soc_debug_read len = %d\n", n); AudDrv_Clk_Off(); return simple_read_from_buffer(buf, count, pos, buffer, n); }
static ssize_t mt_soc_debug_write(struct file *f, const char __user *buf, size_t count, loff_t *offset) { int ret = 0; char InputString[256]; char *token1 = NULL ; char *token2 = NULL ; char *token3 = NULL; char *token4 = NULL; char *token5 = NULL; char *temp = NULL; long unsigned int regaddr = 0; long unsigned int regvalue = 0; char delim[] = " ,"; memset((void *)InputString, 0, 256); if (copy_from_user((InputString), buf, count)) { printk("copy_from_user mt_soc_debug_write count = %zu temp = %s\n", count, InputString); } temp = kstrdup(InputString, GFP_KERNEL); printk("copy_from_user mt_soc_debug_write count = %zu temp = %s pointer = %p\n", count, InputString, InputString); token1 = strsep(&temp, delim); printk("token1 \n"); printk("token1 = %s\n", token1); token2 = strsep(&temp, delim); printk("token2 = %s\n", token2); token3 = strsep(&temp, delim); printk("token3 = %s\n", token3); token4 = strsep(&temp, delim); printk("token4 = %s\n", token4); token5 = strsep(&temp, delim); printk("token5 = %s\n", token5); if (strcmp(token1, ParSetkeyAfe) == 0) { printk("strcmp (token1,ParSetkeyAfe) \n"); ret = strict_strtoul(token3, 16, ®addr); ret = strict_strtoul(token5, 16, ®value); printk("%s regaddr = 0x%lu regvalue = 0x%lu\n", ParSetkeyAfe, regaddr, regvalue); Afe_Set_Reg(regaddr, regvalue, 0xffffffff); regvalue = Afe_Get_Reg(regaddr); printk("%s regaddr = 0x%lu regvalue = 0x%lu\n", ParSetkeyAfe, regaddr, regvalue); } if (strcmp(token1, ParSetkeyAna) == 0) { printk("strcmp (token1,ParSetkeyAna)\n"); ret = strict_strtoul(token3, 16, ®addr); ret = strict_strtoul(token5, 16, ®value); printk("%s regaddr = 0x%lu regvalue = 0x%lu\n", ParSetkeyAna, regaddr, regvalue); //clk_buf_ctrl(CLK_BUF_AUDIO, true); //k2 need? AudDrv_Clk_On(); audckbufEnable(true); Ana_Set_Reg(regaddr, regvalue, 0xffffffff); regvalue = Ana_Get_Reg(regaddr); printk("%s regaddr = 0x%lu regvalue = 0x%lu\n", ParSetkeyAna, regaddr, regvalue); } if (strcmp(token1, ParSetkeyCfg) == 0) { printk("strcmp (token1,ParSetkeyCfg)\n"); ret = strict_strtoul(token3, 16, ®addr); ret = strict_strtoul(token5, 16, ®value); printk("%s regaddr = 0x%lu regvalue = 0x%lu\n", ParSetkeyCfg, regaddr, regvalue); SetClkCfg(regaddr, regvalue, 0xffffffff); regvalue = GetClkCfg(regaddr); printk("%s regaddr = 0x%lu regvalue = 0x%lu\n", ParSetkeyCfg, regaddr, regvalue); } if (strcmp(token1, PareGetkeyAfe) == 0) { printk("strcmp (token1,PareGetkeyAfe)\n"); ret = strict_strtoul(token3, 16, ®addr); regvalue = Afe_Get_Reg(regaddr); printk("%s regaddr = 0x%lu regvalue = 0x%lu\n", PareGetkeyAfe, regaddr, regvalue); } if (strcmp(token1, PareGetkeyAna) == 0) { printk("strcmp (token1,PareGetkeyAna)\n"); ret = strict_strtoul(token3, 16, ®addr); regvalue = Ana_Get_Reg(regaddr); printk("%s regaddr = 0x%lu regvalue = 0x%lu\n", PareGetkeyAna, regaddr, regvalue); } return count; }
static int mtk_capture_pcm_open(struct snd_pcm_substream *substream) { struct snd_pcm_runtime *runtime = substream->runtime; int ret = 0; AudDrv_Clk_On(); AudDrv_ADC_Clk_On(); VUL_Control_context = Get_Mem_ControlT(Soc_Aud_Digital_Block_MEM_VUL); // can allocate sram_dbg AfeControlSramLock(); #ifndef CAPTURE_FORCE_USE_DRAM if (GetSramState() == SRAM_STATE_FREE ) #else if (0) #endif { printk("mtk_capture_pcm_open use sram \n"); mtk_capture_hardware.buffer_bytes_max = GetCaptureSramSize(); SetSramState(SRAM_STATE_CAPTURE); mCaptureUseSram = true; } else { printk("mtk_capture_pcm_open use dram \n"); mtk_capture_hardware.buffer_bytes_max = UL1_MAX_BUFFER_SIZE; } AfeControlSramUnLock(); runtime->hw = mtk_capture_hardware; memcpy((void *)(&(runtime->hw)), (void *)&mtk_capture_hardware , sizeof(struct snd_pcm_hardware)); ret = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &constraints_sample_rates); ret = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); if (ret < 0) { printk("snd_pcm_hw_constraint_integer failed\n"); } if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { } else { } if (ret < 0) { printk("mtk_capture_pcm_close\n"); mtk_capture_pcm_close(substream); return ret; } if(mCaptureUseSram == false) { AudDrv_Emi_Clk_On(); } printk("mtk_capture_pcm_open return\n"); return 0; }
static int Audio_i2s0_SideGen_Set(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { uint32 u32AudioI2S = 0; uint32 samplerate = 0; uint32 Audio_I2S_Dac; AudDrv_Clk_On(); printk("%s() samplerate = %d mi2s0_hdoutput_control = %d\n", __func__, samplerate, mi2s0_hdoutput_control); if (ucontrol->value.enumerated.item[0] > ARRAY_SIZE(i2s0_SIDEGEN)) { printk("return -EINVAL\n"); return -EINVAL; } mi2s0_sidegen_control = ucontrol->value.integer.value[0]; if (mi2s0_sidegen_control == 1) { samplerate = 48000; } else if (mi2s0_sidegen_control == 2) { samplerate = 44100; } else if (mi2s0_sidegen_control == 3) { samplerate = 32000; } else if (mi2s0_sidegen_control == 4) { samplerate = 16000; // here start digital part SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O00); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O01); } else if (mi2s0_sidegen_control == 5) { samplerate = 8000; // here start digital part SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O00); SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O01); } if (mi2s0_sidegen_control) { AudDrv_Clk_On(); Afe_Set_Reg(AUDIO_TOP_CON1, 0x2, 0x2); // I2S_SOFT_Reset Afe_Set_Reg(AUDIO_TOP_CON1, 0x1 << 4, 0x1 << 4); // I2S_SOFT_Reset Audio_I2S_Dac = 0; SetCLkMclk(Soc_Aud_I2S0, samplerate); SetSampleRate(Soc_Aud_Digital_Block_MEM_I2S, samplerate); Audio_I2S_Dac |= (Soc_Aud_LR_SWAP_NO_SWAP << 31); if (mi2s0_hdoutput_control == true) { Audio_I2S_Dac |= Soc_Aud_LOW_JITTER_CLOCK << 12 ; //Low jitter mode } else { Audio_I2S_Dac |= Soc_Aud_NORMAL_CLOCK << 12 ; //Low jitter mode } Audio_I2S_Dac |= (Soc_Aud_INV_LRCK_NO_INVERSE << 5); Audio_I2S_Dac |= (Soc_Aud_I2S_FORMAT_I2S << 3); Audio_I2S_Dac |= (Soc_Aud_I2S_WLEN_WLEN_32BITS << 1); u32AudioI2S = SampleRateTransform(samplerate) << 8; u32AudioI2S |= Soc_Aud_I2S_FORMAT_I2S << 3; // us3 I2s format u32AudioI2S |= Soc_Aud_I2S_WLEN_WLEN_32BITS << 1; // 32 BITS if (mi2s0_hdoutput_control == true) { u32AudioI2S |= Soc_Aud_LOW_JITTER_CLOCK << 12 ; //Low jitter mode } else { u32AudioI2S |= Soc_Aud_NORMAL_CLOCK << 12 ; //Low jitter mode } // start I2S DAC out if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2) == false) { SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2, true); Afe_Set_Reg(AFE_I2S_CON, Audio_I2S_Dac | 0x1, MASK_ALL); Afe_Set_Reg(AFE_I2S_CON3, u32AudioI2S | 1, AFE_MASK_ALL); Afe_Set_Reg(AUDIO_TOP_CON1, 0x0 << 4, 0x1 << 4); Afe_Set_Reg(AUDIO_TOP_CON1, 0x0, 0x2); // I2S_SOFT_Reset EnableAfe(true); } else { printk("%s(), mi2s0_sidegen_control=%d, write AFE_I2S_CON (0x%x), AFE_I2S_CON3(0x%x)\n", __func__, mi2s0_sidegen_control, Audio_I2S_Dac, u32AudioI2S); Afe_Set_Reg(AFE_I2S_CON, 0x0, 0x1); SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2, true); Afe_Set_Reg(AFE_I2S_CON, Audio_I2S_Dac | 0x1, MASK_ALL); Afe_Set_Reg(AFE_I2S_CON3, u32AudioI2S | 1, AFE_MASK_ALL); Afe_Set_Reg(AUDIO_TOP_CON1, 0x0 << 4, 0x1 << 4); Afe_Set_Reg(AUDIO_TOP_CON1, 0x0, 0x2); // I2S_SOFT_Reset EnableAfe(true); } } else { SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2, false); if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2) == false) { Afe_Set_Reg(AFE_I2S_CON3, 0x0, 0x1); Afe_Set_Reg(AFE_I2S_CON, 0x0, 0x1); SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O00); SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O01); EnableAfe(false); } AudDrv_Clk_Off(); } AudDrv_Clk_Off(); return 0; }
void Afe_Log_Print(void) { AudDrv_Clk_On(); printk("+AudDrv Afe_Log_Print \n"); printk("AUDIOAFE_TOP_CON0 = 0x%x\n", Afe_Get_Reg(AUDIO_TOP_CON0)); printk("AUDIO_TOP_CON1 = 0x%x\n", Afe_Get_Reg(AUDIO_TOP_CON1)); printk("AUDIO_TOP_CON2 = 0x%x\n", Afe_Get_Reg(AUDIO_TOP_CON2)); printk("AUDIO_TOP_CON3 = 0x%x\n", Afe_Get_Reg(AUDIO_TOP_CON3)); printk("AFE_DAC_CON0 = 0x%x\n", Afe_Get_Reg(AFE_DAC_CON0)); printk("AFE_DAC_CON1 = 0x%x\n", Afe_Get_Reg(AFE_DAC_CON1)); printk("AFE_I2S_CON = 0x%x\n", Afe_Get_Reg(AFE_I2S_CON)); printk("AFE_DAIBT_CON0 = 0x%x\n",Afe_Get_Reg(AFE_DAIBT_CON0)); printk("AFE_CONN0 = 0x%x\n", Afe_Get_Reg(AFE_CONN0)); printk("AFE_CONN1 = 0x%x\n", Afe_Get_Reg(AFE_CONN1)); printk("AFE_CONN2 = 0x%x\n", Afe_Get_Reg(AFE_CONN2)); printk("AFE_CONN3 = 0x%x\n", Afe_Get_Reg(AFE_CONN3)); printk("AFE_CONN4 = 0x%x\n", Afe_Get_Reg(AFE_CONN4)); printk("AFE_I2S_CON1 = 0x%x\n", Afe_Get_Reg(AFE_I2S_CON1)); printk("AFE_I2S_CON2 = 0x%x\n", Afe_Get_Reg(AFE_I2S_CON2)); printk("AFE_MRGIF_CON = 0x%x\n",Afe_Get_Reg(AFE_MRGIF_CON)); printk("AFE_DL1_BASE = 0x%x\n", Afe_Get_Reg(AFE_DL1_BASE)); printk("AFE_DL1_CUR = 0x%x\n", Afe_Get_Reg(AFE_DL1_CUR)); printk("AFE_DL1_END = 0x%x\n", Afe_Get_Reg(AFE_DL1_END)); printk("AFE_I2S_CON3 = 0x%x\n", Afe_Get_Reg(AFE_I2S_CON3)); printk("AFE_DL2_BASE = 0x%x\n", Afe_Get_Reg(AFE_DL2_BASE)); printk("AFE_DL2_CUR = 0x%x\n", Afe_Get_Reg(AFE_DL2_CUR)); printk("AFE_DL2_END = 0x%x\n", Afe_Get_Reg(AFE_DL2_END)); printk("AFE_CONN5 = 0x%x\n", Afe_Get_Reg(AFE_CONN5)); printk("AFE_CONN_24BIT = 0x%x\n", Afe_Get_Reg(AFE_CONN_24BIT)); printk("AFE_AWB_BASE = 0x%x\n", Afe_Get_Reg(AFE_AWB_BASE)); printk("AFE_AWB_END = 0x%x\n", Afe_Get_Reg(AFE_AWB_END)); printk("AFE_AWB_CUR = 0x%x\n", Afe_Get_Reg(AFE_AWB_CUR)); printk("AFE_VUL_BASE = 0x%x\n", Afe_Get_Reg(AFE_VUL_BASE)); printk("AFE_VUL_END = 0x%x\n", Afe_Get_Reg(AFE_VUL_END)); printk("AFE_VUL_CUR = 0x%x\n", Afe_Get_Reg(AFE_VUL_CUR)); printk("AFE_CONN6 = 0x%x\n", Afe_Get_Reg(AFE_CONN6)); printk("AFE_DAI_BASE = 0x%x\n",Afe_Get_Reg(AFE_DAI_BASE)); printk("AFE_DAI_END = 0x%x\n",Afe_Get_Reg(AFE_DAI_END)); printk("AFE_DAI_CUR = 0x%x\n",Afe_Get_Reg(AFE_DAI_CUR)); printk("AFE_MEMIF_MSB = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_MSB)); printk("AFE_MEMIF_MON0 = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_MON0)); printk("AFE_MEMIF_MON1 = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_MON1)); printk("AFE_MEMIF_MON2 = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_MON2)); //printk("AFE_MEMIF_MON3 = 0x%x\n",Afe_Get_Reg(AFE_MEMIF_MON3)); printk("AFE_MEMIF_MON4 = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_MON4)); printk("AFE_ADDA_DL_SRC2_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_DL_SRC2_CON0)); printk("AFE_ADDA_DL_SRC2_CON1 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_DL_SRC2_CON1)); printk("AFE_ADDA_UL_SRC_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_UL_SRC_CON0)); printk("AFE_ADDA_UL_SRC_CON1 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_UL_SRC_CON1)); printk("AFE_ADDA_TOP_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_TOP_CON0)); printk("AFE_ADDA_UL_DL_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_UL_DL_CON0)); printk("AFE_ADDA_SRC_DEBUG = 0x%x\n", Afe_Get_Reg(AFE_ADDA_SRC_DEBUG)); printk("AFE_ADDA_SRC_DEBUG_MON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_SRC_DEBUG_MON0)); printk("AFE_ADDA_SRC_DEBUG_MON1 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_SRC_DEBUG_MON1)); printk("AFE_ADDA_NEWIF_CFG0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_NEWIF_CFG0)); printk("AFE_ADDA_NEWIF_CFG1 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_NEWIF_CFG1)); printk("AFE_SIDETONE_DEBUG = 0x%x\n", Afe_Get_Reg(AFE_SIDETONE_DEBUG)); printk("AFE_SIDETONE_MON = 0x%x\n", Afe_Get_Reg(AFE_SIDETONE_MON)); printk("AFE_SIDETONE_CON0 = 0x%x\n", Afe_Get_Reg(AFE_SIDETONE_CON0)); printk("AFE_SIDETONE_COEFF = 0x%x\n", Afe_Get_Reg(AFE_SIDETONE_COEFF)); printk("AFE_SIDETONE_CON1 = 0x%x\n", Afe_Get_Reg(AFE_SIDETONE_CON1)); printk("AFE_SIDETONE_GAIN = 0x%x\n", Afe_Get_Reg(AFE_SIDETONE_GAIN)); printk("AFE_SGEN_CON0 = 0x%x\n", Afe_Get_Reg(AFE_SGEN_CON0)); printk("AFE_SGEN_CON0 = 0x%x\n", Afe_Get_Reg(AFE_SGEN_CON1)); printk("AFE_TOP_CON0 = 0x%x\n", Afe_Get_Reg(AFE_TOP_CON0)); printk("AFE_ADDA_PREDIS_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_PREDIS_CON0)); printk("AFE_ADDA_PREDIS_CON1 = 0x%x\n", Afe_Get_Reg(AFE_ADDA_PREDIS_CON1)); printk("AFE_MRG_MON0 = 0x%x\n",Afe_Get_Reg(AFE_MRGIF_MON0)); printk("AFE_MRG_MON1 = 0x%x\n",Afe_Get_Reg(AFE_MRGIF_MON1)); printk("AFE_MRG_MON2 = 0x%x\n",Afe_Get_Reg(AFE_MRGIF_MON2)); printk("AFE_MOD_DAI_BASE = 0x%x\n", Afe_Get_Reg(AFE_MOD_DAI_BASE)); printk("AFE_MOD_DAI_END = 0x%x\n", Afe_Get_Reg(AFE_MOD_DAI_END)); printk("AFE_MOD_DAI_CUR = 0x%x\n", Afe_Get_Reg(AFE_MOD_DAI_CUR)); printk("AFE_HDMI_OUT_CON0 = 0x%x\n", Afe_Get_Reg(AFE_HDMI_OUT_CON0)); printk("AFE_HDMI_BASE = 0x%x\n", Afe_Get_Reg(AFE_HDMI_BASE)); printk("AFE_HDMI_CUR = 0x%x\n", Afe_Get_Reg(AFE_HDMI_CUR)); printk("AFE_HDMI_END = 0x%x\n", Afe_Get_Reg(AFE_HDMI_END)); printk("AFE_HDMI_CONN0 = 0x%x\n", Afe_Get_Reg(AFE_HDMI_CONN0)); //printk("AFE_IRQ_CON = 0x%x\n",Afe_Get_Reg(AFE_IRQ_CON)); printk("AFE_IRQ_MCU_CON = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_CON)); printk("AFE_IRQ_STATUS = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_STATUS)); printk("AFE_IRQ_CLR = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_CLR)); printk("AFE_IRQ_MCU_CNT1 = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_CNT1)); printk("AFE_IRQ_MCU_CNT2 = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_CNT2)); printk("AFE_IRQ_MCU_EN = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_EN)); printk("AFE_IRQ_MON2 = 0x%x\n", Afe_Get_Reg(AFE_IRQ_MCU_MON2)); //printk("AFE_IRQ_CNT5 = 0x%x\n",Afe_Get_Reg(AFE_IRQ_CNT5));MT6582 printk("AFE_IRQ1_CNT_MON = 0x%x\n", Afe_Get_Reg(AFE_IRQ1_MCU_CNT_MON)); printk("AFE_IRQ2_CNT_MON = 0x%x\n", Afe_Get_Reg(AFE_IRQ2_MCU_CNT_MON)); printk("AFE_IRQ1_EN_CNT_MON = 0x%x\n", Afe_Get_Reg(AFE_IRQ1_MCU_EN_CNT_MON)); //printk("AFE_IRQ5_MCU_EN_CNT_MON = 0x%x\n",Afe_Get_Reg(AFE_IRQ5_MCU_EN_CNT_MON)); printk("AFE_MEMIF_MAXLEN = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_MAXLEN)); printk("AFE_MEMIF_PBUF_SIZE = 0x%x\n", Afe_Get_Reg(AFE_MEMIF_PBUF_SIZE)); printk("AFE_GAIN1_CON0 = 0x%x\n", Afe_Get_Reg(AFE_GAIN1_CON0)); printk("AFE_GAIN1_CON1 = 0x%x\n", Afe_Get_Reg(AFE_GAIN1_CON1)); printk("AFE_GAIN1_CON2 = 0x%x\n", Afe_Get_Reg(AFE_GAIN1_CON2)); printk("AFE_GAIN1_CON3 = 0x%x\n", Afe_Get_Reg(AFE_GAIN1_CON3)); printk("AFE_GAIN1_CONN = 0x%x\n", Afe_Get_Reg(AFE_GAIN1_CONN)); printk("AFE_GAIN1_CUR = 0x%x\n", Afe_Get_Reg(AFE_GAIN1_CUR)); printk("AFE_GAIN2_CON0 = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CON0)); printk("AFE_GAIN2_CON1 = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CON1)); printk("AFE_GAIN2_CON2 = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CON2)); printk("AFE_GAIN2_CON3 = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CON3)); printk("AFE_GAIN2_CONN = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CONN)); printk("AFE_GAIN2_CUR = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CUR)); printk("AFE_GAIN2_CONN2 = 0x%x\n", Afe_Get_Reg(AFE_GAIN2_CONN2)); printk("FPGA_CFG2 = 0x%x\n", Afe_Get_Reg(FPGA_CFG2)); printk("FPGA_CFG3 = 0x%x\n", Afe_Get_Reg(FPGA_CFG3)); printk("FPGA_CFG0 = 0x%x\n", Afe_Get_Reg(FPGA_CFG0)); printk("FPGA_CFG1 = 0x%x\n", Afe_Get_Reg(FPGA_CFG1)); printk("FPGA_STC = 0x%x\n", Afe_Get_Reg(FPGA_STC)); printk("AFE_ASRC_CON0 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON0)); printk("AFE_ASRC_CON1 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON1)); printk("AFE_ASRC_CON2 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON2)); printk("AFE_ASRC_CON3 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON3)); printk("AFE_ASRC_CON4 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON4)); printk("AFE_ASRC_CON5 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON5)); printk("AFE_ASRC_CON6 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON6)); printk("AFE_ASRC_CON7 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON7)); printk("AFE_ASRC_CON8 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON8)); printk("AFE_ASRC_CON9 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON9)); printk("AFE_ASRC_CON10 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON10)); printk("AFE_ASRC_CON11 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON11)); printk("PCM_INTF_CON1 = 0x%x\n", Afe_Get_Reg(PCM_INTF_CON)); printk("PCM_INTF_CON2 = 0x%x\n", Afe_Get_Reg(PCM_INTF_CON2)); printk("PCM2_INTF_CON = 0x%x\n", Afe_Get_Reg(PCM2_INTF_CON)); printk("AFE_ASRC_CON13 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON13)); printk("AFE_ASRC_CON14 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON14)); printk("AFE_ASRC_CON15 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON15)); printk("AFE_ASRC_CON16 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON16)); printk("AFE_ASRC_CON17 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON17)); printk("AFE_ASRC_CON18 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON18)); printk("AFE_ASRC_CON19 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON19)); printk("AFE_ASRC_CON20 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON20)); printk("AFE_ASRC_CON21 = 0x%x\n", Afe_Get_Reg(AFE_ASRC_CON21)); AudDrv_Clk_Off(); printk("-AudDrv Afe_Log_Print \n"); }