BOOL BUS_has_properties(void* vbus, char prop) { Bus* bus = (Bus*)vbus; if (!bus) return FALSE; if ((prop & BUS_PROP_SLACK) && !BUS_is_slack(bus)) return FALSE; if ((prop & BUS_PROP_REG_BY_GEN) && !BUS_is_regulated_by_gen(bus)) return FALSE; if ((prop & BUS_PROP_REG_BY_TRAN) && !BUS_is_regulated_by_tran(bus)) return FALSE; if ((prop & BUS_PROP_REG_BY_SHUNT) && !BUS_is_regulated_by_shunt(bus)) return FALSE; if ((prop & BUS_PROP_NOT_REG_BY_GEN) && BUS_is_regulated_by_gen(bus)) return FALSE; if ((prop & BUS_PROP_NOT_SLACK) && BUS_is_slack(bus)) return FALSE; return TRUE; }
void CONSTR_PAR_GEN_P_count_step(Constr* c, Branch* br, int t) { // Local variables Bus* buses[2]; Bus* bus; Gen* gen1; Gen* gen2; int* A_nnz; int* A_row; char* bus_counted; int i; int T; // Number of periods T = BRANCH_get_num_periods(br); // Constr data A_nnz = CONSTR_get_A_nnz_ptr(c); A_row = CONSTR_get_A_row_ptr(c); bus_counted = CONSTR_get_bus_counted(c); // Check pointer if (!A_nnz || !A_row || !bus_counted) return; // Check outage if (BRANCH_is_on_outage(br)) return; // Bus data buses[0] = BRANCH_get_bus_k(br); buses[1] = BRANCH_get_bus_m(br); // Buses for (i = 0; i < 2; i++) { bus = buses[i]; if (!bus_counted[BUS_get_index(bus)*T+t]) { // Active power of slack generators if (BUS_is_slack(bus)) { gen1 = BUS_get_gen(bus); for (gen2 = GEN_get_next(gen1); gen2 != NULL; gen2 = GEN_get_next(gen2)) { if (GEN_has_flags(gen1,FLAG_VARS,GEN_VAR_P)) (*A_nnz)++; if (GEN_has_flags(gen2,FLAG_VARS,GEN_VAR_P)) (*A_nnz)++; (*A_row)++; } } } // Update counted flag bus_counted[BUS_get_index(bus)*T+t] = TRUE; } }
void BUS_show(Bus* bus, int t) { printf("bus %d\t%d\t%d\t%d\t%d\t%d\t%d\n", BUS_get_number(bus), BUS_is_slack(bus), BUS_is_regulated_by_gen(bus), BUS_get_num_gens(bus), BUS_get_num_reg_gens(bus), BUS_get_num_loads(bus), BUS_get_num_shunts(bus)); }
void HEUR_PVPQ_apply_step(Heur* h, Constr* clist, Net* net, Branch* br, int t, Vec* var_values) { // Local variables Vec* f; Mat* A; Vec* b; Bus* bus[2]; Gen* gen; char* bus_counted; Heur_PVPQ_Data* data; char* reg_flag; int bus_index_t[2]; int k; int i; Constr* pf; Constr* fix; REAL v; REAL v_set; REAL Q; REAL Qmax; REAL Qmin; char switch_flag; int j_old; int j_new; REAL b_new; int T; int num_buses; // Num periods T = BRANCH_get_num_periods(br); // Num buses num_buses = NET_get_num_buses(net); // Heur data bus_counted = HEUR_get_bus_counted(h); data = (Heur_PVPQ_Data*)HEUR_get_data(h); reg_flag = data->reg_flag; // Check outage if (BRANCH_is_on_outage(br)) return; // Bus from data bus[0] = BRANCH_get_bus_k(br); bus_index_t[0] = BUS_get_index(bus[0])*T+t; // Bus to data bus[1] = BRANCH_get_bus_m(br); bus_index_t[1] = BUS_get_index(bus[1])*T+t; // Power flow constraints for (pf = clist; pf != NULL; pf = CONSTR_get_next(pf)) { if (strcmp(CONSTR_get_name(pf),"AC power balance") == 0) break; } if (!pf) return; // Fix constraints for (fix = clist; fix != NULL; fix = CONSTR_get_next(fix)) { if (strcmp(CONSTR_get_name(fix),"variable fixing") == 0) break; } if (!fix) return; // Constr data f = CONSTR_get_f(pf); A = CONSTR_get_A(fix); b = CONSTR_get_b(fix); // Buses for (k = 0; k < 2; k++) { if (!bus_counted[bus_index_t[k]] && // not counted !BUS_is_slack(bus[k]) && // not slack BUS_is_regulated_by_gen(bus[k]) && // regulated BUS_has_flags(bus[k],FLAG_VARS,BUS_VAR_VMAG) && // v mag is variable BUS_has_flags(bus[k],FLAG_FIXED,BUS_VAR_VMAG) && // v mag is fixed GEN_has_flags(BUS_get_reg_gen(bus[k]),FLAG_VARS,GEN_VAR_Q)) { // reg gen Q is variable // Voltage magnitude v = VEC_get(var_values,BUS_get_index_v_mag(bus[k],t)); v_set = BUS_get_v_set(bus[k],t); // Regulating generator (first one in list of reg gens) gen = BUS_get_reg_gen(bus[k]); Q = VEC_get(var_values,GEN_get_index_Q(gen,t)); // per unit Qmax = GEN_get_Q_max(gen); // per unit Qmin = GEN_get_Q_min(gen); // per unit // Switch flag switch_flag = FALSE; // Currently regulated if (reg_flag[bus_index_t[k]]) { // Violations if (Q > Qmax) { // Set data j_old = BUS_get_index_v_mag(bus[k],t); j_new = GEN_get_index_Q(gen,t); b_new = Qmax; switch_flag = TRUE; reg_flag[bus_index_t[k]] = FALSE; // Update vector of var values while (gen) { if (GEN_has_flags(gen,FLAG_VARS,GEN_VAR_Q)) VEC_set(var_values,GEN_get_index_Q(gen,t),GEN_get_Q_max(gen)); gen = GEN_get_reg_next(gen); } } else if (Q < Qmin) { // Set data j_old = BUS_get_index_v_mag(bus[k],t); j_new = GEN_get_index_Q(gen,t); b_new = Qmin; switch_flag = TRUE; reg_flag[bus_index_t[k]] = FALSE; // Update vector of var values while (gen) { if (GEN_has_flags(gen,FLAG_VARS,GEN_VAR_Q)) VEC_set(var_values,GEN_get_index_Q(gen,t),GEN_get_Q_min(gen)); gen = GEN_get_reg_next(gen); } } } // Previously regulated else { // Q at Qmin and v < v_set if (fabs(Q-Qmin) < fabs(Q-Qmax) && v < v_set) { Q = Q - VEC_get(f,BUS_get_index_Q(GEN_get_bus(gen))+t*2*num_buses); // per unit (see constr_PF) if (Q >= Qmax) { // Set data j_old = GEN_get_index_Q(gen,t); j_new = GEN_get_index_Q(gen,t); b_new = Qmax; switch_flag = TRUE; // Update vector of var values while (gen) { if (GEN_has_flags(gen,FLAG_VARS,GEN_VAR_Q)) VEC_set(var_values,GEN_get_index_Q(gen,t),GEN_get_Q_max(gen)); gen = GEN_get_reg_next(gen); } } else if (Qmin < Q && Q < Qmax) { // Set data j_old = GEN_get_index_Q(gen,t); j_new = BUS_get_index_v_mag(bus[k],t); b_new = v_set; switch_flag = TRUE; reg_flag[bus_index_t[k]] = TRUE; // Udpate vector of var values VEC_set(var_values,j_new,b_new); } } // Q at Qmax and v > v_set else if (fabs(Q-Qmax) < fabs(Q-Qmin) && v > v_set) { Q = Q - VEC_get(f,BUS_get_index_Q(GEN_get_bus(gen))+t*2*num_buses); // per unit (see constr_PF) if (Q <= Qmin) { // Set data j_old = GEN_get_index_Q(gen,t); j_new = GEN_get_index_Q(gen,t); b_new = Qmin; switch_flag = TRUE; // Update vector of var values while (gen) { if (GEN_has_flags(gen,FLAG_VARS,GEN_VAR_Q)) VEC_set(var_values,GEN_get_index_Q(gen,t),GEN_get_Q_min(gen)); gen = GEN_get_reg_next(gen); } } else if (Qmin < Q && Q < Qmax) { // Set data j_old = GEN_get_index_Q(gen,t); j_new = BUS_get_index_v_mag(bus[k],t); b_new = v_set; switch_flag = TRUE; reg_flag[bus_index_t[k]] = TRUE; // Udpate vector of var values VEC_set(var_values,j_new,b_new); } } } // Update fix constraints if (switch_flag) { for (i = 0; i < MAT_get_nnz(A); i++) { if (MAT_get_j(A,i) == j_old) MAT_set_d(A,i,0.); if (MAT_get_j(A,i) == j_new) { MAT_set_d(A,i,1.); VEC_set(b,MAT_get_i(A,i),b_new); } } } } // Update counted flag bus_counted[bus_index_t[k]] = TRUE; } }
BOOL GEN_is_slack(Gen* gen) { if (gen) return BUS_is_slack(gen->bus); else return FALSE; }
void CONSTR_PAR_GEN_P_analyze_step(Constr* c, Branch* br, int t) { // Local variables Bus* buses[2]; Bus* bus; Gen* gen1; Gen* gen2; int* A_nnz; int* A_row; char* bus_counted; Vec* b; Mat* A; int i; int T; // Number of periods T = BRANCH_get_num_periods(br); // Cosntr data b = CONSTR_get_b(c); A = CONSTR_get_A(c); A_nnz = CONSTR_get_A_nnz_ptr(c); A_row = CONSTR_get_A_row_ptr(c); bus_counted = CONSTR_get_bus_counted(c); // Check pointers if (!A_nnz || !A_row || !bus_counted) return; // Check outage if (BRANCH_is_on_outage(br)) return; // Bus data buses[0] = BRANCH_get_bus_k(br); buses[1] = BRANCH_get_bus_m(br); // Buses for (i = 0; i < 2; i++) { bus = buses[i]; if (!bus_counted[BUS_get_index(bus)*T+t]) { // Active power of slack generators if (BUS_is_slack(bus)) { gen1 = BUS_get_gen(bus); for (gen2 = GEN_get_next(gen1); gen2 != NULL; gen2 = GEN_get_next(gen2)) { VEC_set(b,*A_row,0.); if (GEN_has_flags(gen1,FLAG_VARS,GEN_VAR_P)) { MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,GEN_get_index_P(gen1,t)); MAT_set_d(A,*A_nnz,1.); (*A_nnz)++; } else VEC_add_to_entry(b,*A_row,-GEN_get_P(gen1,t)); if (GEN_has_flags(gen2,FLAG_VARS,GEN_VAR_P)) { MAT_set_i(A,*A_nnz,*A_row); MAT_set_j(A,*A_nnz,GEN_get_index_P(gen2,t)); MAT_set_d(A,*A_nnz,-1.); (*A_nnz)++; } else VEC_add_to_entry(b,*A_row,GEN_get_P(gen2,t)); (*A_row)++; } } } // Update counted flag bus_counted[BUS_get_index(bus)*T+t] = TRUE; } }