static void cmos_check_acpi_rtc_status(struct device *dev, unsigned char *rtc_control) { struct cmos_rtc *cmos = dev_get_drvdata(dev); acpi_event_status rtc_status; acpi_status status; if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC) return; status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status); if (ACPI_FAILURE(status)) { dev_err(dev, "Could not get RTC status\n"); } else if (rtc_status & ACPI_EVENT_FLAG_SET) { unsigned char mask; *rtc_control &= ~RTC_AIE; CMOS_WRITE(*rtc_control, RTC_CONTROL); mask = CMOS_READ(RTC_INTR_FLAGS); rtc_update_irq(cmos->rtc, 1, mask); } }
void __init plat_time_init(void) { unsigned int est_freq; /* Set Data mode - binary. */ CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL); est_freq = estimate_cpu_frequency(); printk("CPU frequency %d.%02d MHz\n", est_freq/1000000, (est_freq%1000000)*100/1000000); cpu_khz = est_freq / 1000; mips_scroll_message(); #ifdef CONFIG_I8253 /* Only Malta has a PIT */ setup_pit_timer(); #endif plat_perf_setup(); }
static ssize_t cmos_nvram_write(struct file *filp, struct kobject *kobj, struct bin_attribute *attr, char *buf, loff_t off, size_t count) { struct cmos_rtc *cmos; int retval; cmos = dev_get_drvdata(container_of(kobj, struct device, kobj)); if (unlikely(off >= attr->size)) return -EFBIG; if (unlikely(off < 0)) return -EINVAL; if ((off + count) > attr->size) count = attr->size - off; /* NOTE: on at least PCs and Ataris, the boot firmware uses a * checksum on part of the NVRAM data. That's currently ignored * here. If userspace is smart enough to know what fields of * NVRAM to update, updating checksums is also part of its job. */ off += NVRAM_OFFSET; spin_lock_irq(&rtc_lock); for (retval = 0; count; count--, off++, retval++) { /* don't trash RTC registers */ if (off == cmos->day_alrm || off == cmos->mon_alrm || off == cmos->century) buf++; else if (off < 128) CMOS_WRITE(*buf++, off); else if (can_bank2) cmos_write_bank2(*buf++, off); else break; } spin_unlock_irq(&rtc_lock); return retval; }
static int rtc_release(struct inode *inode, struct file *file) { #ifdef RTC_IRQ unsigned char tmp; if (rtc_has_irq == 0) goto no_irq; /* * Turn off all interrupts once the device is no longer * in use, and clear the data. */ spin_lock_irq(&rtc_lock); if (!hpet_mask_rtc_irq_bit(RTC_PIE | RTC_AIE | RTC_UIE)) { tmp = CMOS_READ(RTC_CONTROL); tmp &= ~RTC_PIE; tmp &= ~RTC_AIE; tmp &= ~RTC_UIE; CMOS_WRITE(tmp, RTC_CONTROL); CMOS_READ(RTC_INTR_FLAGS); } if (rtc_status & RTC_TIMER_ON) { rtc_status &= ~RTC_TIMER_ON; del_timer(&rtc_irq_timer); } spin_unlock_irq(&rtc_lock); if (file->f_flags & FASYNC) { rtc_fasync (-1, file, 0); } no_irq: #endif spin_lock_irq (&rtc_lock); rtc_irq_data = 0; rtc_status &= ~RTC_IS_OPEN; spin_unlock_irq (&rtc_lock); return 0; }
static int cmos_resume(struct device *dev) { struct cmos_rtc *cmos = dev_get_drvdata(dev); unsigned char tmp = cmos->suspend_ctrl; if (tmp & RTC_IRQMASK) { unsigned char mask; if (cmos->enabled_wake) { if (cmos->wake_off) cmos->wake_off(dev); else disable_irq_wake(cmos->irq); cmos->enabled_wake = 0; } spin_lock_irq(&rtc_lock); do { CMOS_WRITE(tmp, RTC_CONTROL); hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK); mask = CMOS_READ(RTC_INTR_FLAGS); mask &= (tmp & RTC_IRQMASK) | RTC_IRQF; if (!is_hpet_enabled() || !is_intr(mask)) break; rtc_update_irq(cmos->rtc, 1, mask); tmp &= ~RTC_AIE; hpet_mask_rtc_irq_bit(RTC_AIE); } while (mask & RTC_AIE); spin_unlock_irq(&rtc_lock); } pr_debug("%s: resume, ctrl %02x\n", dev_name(&cmos_rtc.rtc->dev), tmp); return 0; }
static int cmos_suspend(struct device *dev, pm_message_t mesg) { struct cmos_rtc *cmos = dev_get_drvdata(dev); int do_wake = device_may_wakeup(dev); unsigned char tmp; /* only the alarm might be a wakeup event source */ spin_lock_irq(&rtc_lock); cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL); if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { unsigned char irqstat; if (do_wake) tmp &= ~(RTC_PIE|RTC_UIE); else tmp &= ~(RTC_PIE|RTC_AIE|RTC_UIE); CMOS_WRITE(tmp, RTC_CONTROL); irqstat = CMOS_READ(RTC_INTR_FLAGS); irqstat &= (tmp & RTC_IRQMASK) | RTC_IRQF; if (is_intr(irqstat)) rtc_update_irq(cmos->rtc, 1, irqstat); } spin_unlock_irq(&rtc_lock); if (tmp & RTC_AIE) { cmos->enabled_wake = 1; if (cmos->wake_on) cmos->wake_on(dev); else enable_irq_wake(cmos->irq); } pr_debug("%s: suspend%s, ctrl %02x\n", cmos_rtc.rtc->dev.bus_id, (tmp & RTC_AIE) ? ", alarm may wake" : "", tmp); return 0; }
static int cmos_suspend(struct device *dev) { struct cmos_rtc *cmos = dev_get_drvdata(dev); unsigned char tmp; /* only the alarm might be a wakeup event source */ spin_lock_irq(&rtc_lock); cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL); if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { unsigned char mask; if (device_may_wakeup(dev)) mask = RTC_IRQMASK & ~RTC_AIE; else mask = RTC_IRQMASK; tmp &= ~mask; CMOS_WRITE(tmp, RTC_CONTROL); /* shut down hpet emulation - we don't need it for alarm */ hpet_mask_rtc_irq_bit(RTC_PIE|RTC_AIE|RTC_UIE); cmos_checkintr(cmos, tmp); } spin_unlock_irq(&rtc_lock); if (tmp & RTC_AIE) { cmos->enabled_wake = 1; if (cmos->wake_on) cmos->wake_on(dev); else enable_irq_wake(cmos->irq); } pr_debug("%s: suspend%s, ctrl %02x\n", dev_name(&cmos_rtc.rtc->dev), (tmp & RTC_AIE) ? ", alarm may wake" : "", tmp); return 0; }
static int cmos_irq_set_freq(struct device *dev, int freq) { struct cmos_rtc *cmos = dev_get_drvdata(dev); int f; unsigned long flags; if (!is_valid_irq(cmos->irq)) return -ENXIO; /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */ f = ffs(freq); if (f-- > 16) return -EINVAL; f = 16 - f; spin_lock_irqsave(&rtc_lock, flags); hpet_set_periodic_freq(freq); CMOS_WRITE(RTC_REF_CLCK_32KHZ | f, RTC_FREQ_SELECT); spin_unlock_irqrestore(&rtc_lock, flags); return 0; }
static int cmos_suspend(struct device *dev) { struct cmos_rtc *cmos = dev_get_drvdata(dev); unsigned char tmp; /* only the alarm might be a wakeup event source */ spin_lock_irq(&rtc_lock); cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL); if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { unsigned char mask; if (device_may_wakeup(dev)) mask = RTC_IRQMASK & ~RTC_AIE; else mask = RTC_IRQMASK; tmp &= ~mask; CMOS_WRITE(tmp, RTC_CONTROL); hpet_mask_rtc_irq_bit(mask); cmos_checkintr(cmos, tmp); } spin_unlock_irq(&rtc_lock); if (tmp & RTC_AIE) { cmos->enabled_wake = 1; if (cmos->wake_on) cmos->wake_on(dev); else enable_irq_wake(cmos->irq); } cmos_read_alarm(dev, &cmos->saved_wkalrm); dev_dbg(dev, "suspend%s, ctrl %02x\n", (tmp & RTC_AIE) ? ", alarm may wake" : "", tmp); return 0; }
void __noreturn machine_real_restart(unsigned int type) { local_irq_disable(); /* * Write zero to CMOS register number 0x0f, which the BIOS POST * routine will recognize as telling it to do a proper reboot. (Well * that's what this book in front of me says -- it may only apply to * the Phoenix BIOS though, it's not clear). At the same time, * disable NMIs by setting the top bit in the CMOS address register, * as we're about to do peculiar things to the CPU. I'm not sure if * `outb_p' is needed instead of just `outb'. Use it to be on the * safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.) */ spin_lock(&rtc_lock); CMOS_WRITE(0x00, 0x8f); spin_unlock(&rtc_lock); /* * Switch back to the initial page table. */ #ifdef CONFIG_X86_32 load_cr3(initial_page_table); #else write_cr3(real_mode_header->trampoline_pgd); #endif /* Jump to the identity-mapped low memory code */ #ifdef CONFIG_X86_32 asm volatile("jmpl *%0" : : "rm" (real_mode_header->machine_real_restart_asm), "a" (type)); #else asm volatile("ljmpl *%0" : : "m" (real_mode_header->machine_real_restart_asm), "D" (type)); #endif unreachable(); }
int ds1287_set_base_clock(unsigned int hz) { u8 rate; switch (hz) { case 128: rate = 0x9; break; case 256: rate = 0x8; break; case 1024: rate = 0x6; break; default: return -EINVAL; } CMOS_WRITE(RTC_REF_CLCK_32KHZ | rate, RTC_REG_A); return 0; }
static irqreturn_t cmos_interrupt(int irq, void *p) { u8 irqstat; u8 rtc_control; spin_lock(&rtc_lock); /* When the HPET interrupt handler calls us, the interrupt * status is passed as arg1 instead of the irq number. But * always clear irq status, even when HPET is in the way. * * Note that HPET and RTC are almost certainly out of phase, * giving different IRQ status ... */ irqstat = CMOS_READ(RTC_INTR_FLAGS); rtc_control = CMOS_READ(RTC_CONTROL); if (is_hpet_enabled()) irqstat = (unsigned long)irq & 0xF0; irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; /* All Linux RTC alarms should be treated as if they were oneshot. * Similar code may be needed in system wakeup paths, in case the * alarm woke the system. */ if (irqstat & RTC_AIE) { rtc_control &= ~RTC_AIE; CMOS_WRITE(rtc_control, RTC_CONTROL); hpet_mask_rtc_irq_bit(RTC_AIE); CMOS_READ(RTC_INTR_FLAGS); } spin_unlock(&rtc_lock); if (is_intr(irqstat)) { rtc_update_irq(p, 1, irqstat); return IRQ_HANDLED; } else return IRQ_NONE; }
static void ds1287_set_mode(enum clock_event_mode mode, struct clock_event_device *evt) { u8 val; spin_lock(&rtc_lock); val = CMOS_READ(RTC_REG_B); switch (mode) { case CLOCK_EVT_MODE_PERIODIC: val |= RTC_PIE; break; default: val &= ~RTC_PIE; break; } CMOS_WRITE(val, RTC_REG_B); spin_unlock(&rtc_lock); }
static u32 rtc_handler(void *context) { struct device *dev = context; struct cmos_rtc *cmos = dev_get_drvdata(dev); unsigned char rtc_control = 0; unsigned char rtc_intr; spin_lock_irq(&rtc_lock); if (cmos_rtc.suspend_ctrl) rtc_control = CMOS_READ(RTC_CONTROL); if (rtc_control & RTC_AIE) { cmos_rtc.suspend_ctrl &= ~RTC_AIE; CMOS_WRITE(rtc_control, RTC_CONTROL); rtc_intr = CMOS_READ(RTC_INTR_FLAGS); rtc_update_irq(cmos->rtc, 1, rtc_intr); } spin_unlock_irq(&rtc_lock); pm_wakeup_event(dev, 0); acpi_clear_event(ACPI_EVENT_RTC); acpi_disable_event(ACPI_EVENT_RTC, 0); return ACPI_INTERRUPT_HANDLED; }
void __init mips_time_init(void) { unsigned int est_freq, flags; local_irq_save(flags); #if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_MALTA) /* Set Data mode - binary. */ CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL); #endif #ifdef CONFIG_SENSORS_DS1338 ds1338_time_init(); #endif est_freq = estimate_cpu_frequency (); printk("CPU frequency %d.%02d MHz\n", est_freq/1000000, (est_freq%1000000)*100/1000000); cpu_khz = est_freq / 1000; local_irq_restore(flags); }
void machine_real_restart(unsigned int type) { void (*restart_lowmem)(unsigned int) = (void (*)(unsigned int)) real_mode_header->machine_real_restart_asm; local_irq_disable(); /* * Write zero to CMOS register number 0x0f, which the BIOS POST * routine will recognize as telling it to do a proper reboot. (Well * that's what this book in front of me says -- it may only apply to * the Phoenix BIOS though, it's not clear). At the same time, * disable NMIs by setting the top bit in the CMOS address register, * as we're about to do peculiar things to the CPU. I'm not sure if * `outb_p' is needed instead of just `outb'. Use it to be on the * safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.) */ spin_lock(&rtc_lock); CMOS_WRITE(0x00, 0x8f); spin_unlock(&rtc_lock); /* * Switch back to the initial page table. */ load_cr3(initial_page_table); /* * Write 0x1234 to absolute memory location 0x472. The BIOS reads * this on booting to tell it to "Bypass memory test (also warm * boot)". This seems like a fairly standard thing that gets set by * REBOOT.COM programs, and the previous reset routine did this * too. */ *((unsigned short *)0x472) = reboot_mode; /* Jump to the identity-mapped low memory code */ restart_lowmem(type); }
int sm_osl_proc_write_alarm ( struct file *file, const char *buffer, unsigned long count, void *data) { char buf[30]; char *str = buf; u32 sec,min,hr; u32 day,mo,yr; int adjust = 0; unsigned char rtc_control; int error = -EINVAL; if (count > sizeof(buf) - 1) return -EINVAL; if (copy_from_user(str,buffer,count)) return -EFAULT; str[count] = '\0'; /* check for time adjustment */ if (str[0] == '+') { str++; adjust = 1; } if ((error = get_date_field(&str,&yr))) goto out; if ((error = get_date_field(&str,&mo))) goto out; if ((error = get_date_field(&str,&day))) goto out; if ((error = get_date_field(&str,&hr))) goto out; if ((error = get_date_field(&str,&min))) goto out; if ((error = get_date_field(&str,&sec))) goto out; if (sec > 59) { min += 1; sec -= 60; } if (min > 59) { hr += 1; min -= 60; } if (hr > 23) { day += 1; hr -= 24; } if (day > 31) { mo += 1; day -= 31; } if (mo > 12) { yr += 1; mo -= 12; } spin_lock_irq(&rtc_lock); rtc_control = CMOS_READ(RTC_CONTROL); if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { BIN_TO_BCD(yr); BIN_TO_BCD(mo); BIN_TO_BCD(day); BIN_TO_BCD(hr); BIN_TO_BCD(min); BIN_TO_BCD(sec); } if (adjust) { yr += CMOS_READ(RTC_YEAR); mo += CMOS_READ(RTC_MONTH); day += CMOS_READ(RTC_DAY_OF_MONTH); hr += CMOS_READ(RTC_HOURS); min += CMOS_READ(RTC_MINUTES); sec += CMOS_READ(RTC_SECONDS); } spin_unlock_irq(&rtc_lock); if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { BCD_TO_BIN(yr); BCD_TO_BIN(mo); BCD_TO_BIN(day); BCD_TO_BIN(hr); BCD_TO_BIN(min); BCD_TO_BIN(sec); } if (sec > 59) { min++; sec -= 60; } if (min > 59) { hr++; min -= 60; } if (hr > 23) { day++; hr -= 24; } if (day > 31) { mo++; day -= 31; } if (mo > 12) { yr++; mo -= 12; } if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { BIN_TO_BCD(yr); BIN_TO_BCD(mo); BIN_TO_BCD(day); BIN_TO_BCD(hr); BIN_TO_BCD(min); BIN_TO_BCD(sec); } spin_lock_irq(&rtc_lock); /* write the fields the rtc knows about */ CMOS_WRITE(hr,RTC_HOURS_ALARM); CMOS_WRITE(min,RTC_MINUTES_ALARM); CMOS_WRITE(sec,RTC_SECONDS_ALARM); /* If the system supports an enhanced alarm, it will have non-zero * offsets into the CMOS RAM here. * Which for some reason are pointing to the RTC area of memory. */ #if 0 if (acpi_gbl_FADT->day_alrm) CMOS_WRITE(day,acpi_gbl_FADT->day_alrm); if (acpi_gbl_FADT->mon_alrm) CMOS_WRITE(mo,acpi_gbl_FADT->mon_alrm); if (acpi_gbl_FADT->century) CMOS_WRITE(yr / 100,acpi_gbl_FADT->century); #endif /* enable the rtc alarm interrupt */ if (!(rtc_control & RTC_AIE)) { rtc_control |= RTC_AIE; CMOS_WRITE(rtc_control,RTC_CONTROL); CMOS_READ(RTC_INTR_FLAGS); } /* unlock the lock on the rtc now that we're done with it */ spin_unlock_irq(&rtc_lock); acpi_hw_register_bit_access(ACPI_WRITE,ACPI_MTX_LOCK, RTC_EN, 1); file->f_pos += count; error = 0; out: return error ? error : count; }
/* * In order to set the CMOS clock precisely, set_rtc_mmss has to be * called 500 ms after the second nowtime has started, because when * nowtime is written into the registers of the CMOS clock, it will * jump to the next second precisely 500 ms later. Check the Motorola * MC146818A or Dallas DS12887 data sheet for details. * * BUG: This routine does not handle hour overflow properly; it just * sets the minutes. Usually you'll only notice that after reboot! */ int mach_set_rtc_mmss(unsigned long nowtime) { int real_seconds, real_minutes, cmos_minutes; unsigned char save_control, save_freq_select; unsigned long flags; int retval = 0; spin_lock_irqsave(&rtc_lock, flags); /* tell the clock it's being set */ save_control = CMOS_READ(RTC_CONTROL); CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); /* stop and reset prescaler */ save_freq_select = CMOS_READ(RTC_FREQ_SELECT); CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); cmos_minutes = CMOS_READ(RTC_MINUTES); if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) cmos_minutes = bcd2bin(cmos_minutes); /* * since we're only adjusting minutes and seconds, * don't interfere with hour overflow. This avoids * messing with unknown time zones but requires your * RTC not to be off by more than 15 minutes */ real_seconds = nowtime % 60; real_minutes = nowtime / 60; /* correct for half hour time zone */ if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) real_minutes += 30; real_minutes %= 60; if (abs(real_minutes - cmos_minutes) < 30) { if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { real_seconds = bin2bcd(real_seconds); real_minutes = bin2bcd(real_minutes); } CMOS_WRITE(real_seconds, RTC_SECONDS); CMOS_WRITE(real_minutes, RTC_MINUTES); } else { printk_once(KERN_NOTICE "set_rtc_mmss: can't update from %d to %d\n", cmos_minutes, real_minutes); retval = -1; } /* The following flags have to be released exactly in this order, * otherwise the DS12887 (popular MC146818A clone with integrated * battery and quartz) will not reset the oscillator and will not * update precisely 500 ms later. You won't find this mentioned in * the Dallas Semiconductor data sheets, but who believes data * sheets anyway ... -- Markus Kuhn */ CMOS_WRITE(save_control, RTC_CONTROL); CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); spin_unlock_irqrestore(&rtc_lock, flags); return retval; }
static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t) { struct cmos_rtc *cmos = dev_get_drvdata(dev); unsigned char mon, mday, hrs, min, sec; unsigned char rtc_control, rtc_intr; if (!is_valid_irq(cmos->irq)) return -EIO; /* REVISIT this assumes PC style usage: always BCD */ /* Writing 0xff means "don't care" or "match all". */ mon = t->time.tm_mon; mon = (mon < 12) ? BIN2BCD(mon) : 0xff; mon++; mday = t->time.tm_mday; mday = (mday >= 1 && mday <= 31) ? BIN2BCD(mday) : 0xff; hrs = t->time.tm_hour; hrs = (hrs < 24) ? BIN2BCD(hrs) : 0xff; min = t->time.tm_min; min = (min < 60) ? BIN2BCD(min) : 0xff; sec = t->time.tm_sec; sec = (sec < 60) ? BIN2BCD(sec) : 0xff; spin_lock_irq(&rtc_lock); /* next rtc irq must not be from previous alarm setting */ rtc_control = CMOS_READ(RTC_CONTROL); rtc_control &= ~RTC_AIE; CMOS_WRITE(rtc_control, RTC_CONTROL); rtc_intr = CMOS_READ(RTC_INTR_FLAGS); if (rtc_intr) rtc_update_irq(&cmos->rtc->class_dev, 1, rtc_intr); /* update alarm */ CMOS_WRITE(hrs, RTC_HOURS_ALARM); CMOS_WRITE(min, RTC_MINUTES_ALARM); CMOS_WRITE(sec, RTC_SECONDS_ALARM); /* the system may support an "enhanced" alarm */ if (cmos->day_alrm) { CMOS_WRITE(mday, cmos->day_alrm); if (cmos->mon_alrm) CMOS_WRITE(mon, cmos->mon_alrm); } if (t->enabled) { rtc_control |= RTC_AIE; CMOS_WRITE(rtc_control, RTC_CONTROL); rtc_intr = CMOS_READ(RTC_INTR_FLAGS); if (rtc_intr) rtc_update_irq(&cmos->rtc->class_dev, 1, rtc_intr); } spin_unlock_irq(&rtc_lock); return 0; }
static int INITSECTION cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) { struct cmos_rtc_board_info *info = dev->platform_data; int retval = 0; unsigned char rtc_control; /* there can be only one ... */ if (cmos_rtc.dev) return -EBUSY; if (!ports) return -ENODEV; cmos_rtc.irq = rtc_irq; cmos_rtc.iomem = ports; /* For ACPI systems the info comes from the FADT. On others, * board specific setup provides it as appropriate. */ if (info) { cmos_rtc.day_alrm = info->rtc_day_alarm; cmos_rtc.mon_alrm = info->rtc_mon_alarm; cmos_rtc.century = info->rtc_century; } cmos_rtc.rtc = rtc_device_register(driver_name, dev, &cmos_rtc_ops, THIS_MODULE); if (IS_ERR(cmos_rtc.rtc)) return PTR_ERR(cmos_rtc.rtc); cmos_rtc.dev = dev; dev_set_drvdata(dev, &cmos_rtc); /* platform and pnp busses handle resources incompatibly. * * REVISIT for non-x86 systems we may need to handle io memory * resources: ioremap them, and request_mem_region(). */ if (is_pnpacpi()) { retval = request_resource(&ioport_resource, ports); if (retval < 0) { dev_dbg(dev, "i/o registers already in use\n"); goto cleanup0; } } rename_region(ports, cmos_rtc.rtc->class_dev.class_id); spin_lock_irq(&rtc_lock); /* force periodic irq to CMOS reset default of 1024Hz; * * REVISIT it's been reported that at least one x86_64 ALI mobo * doesn't use 32KHz here ... for portability we might need to * do something about other clock frequencies. */ CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); cmos_rtc.rtc->irq_freq = 1024; /* disable irqs. * * NOTE after changing RTC_xIE bits we always read INTR_FLAGS; * allegedly some older rtcs need that to handle irqs properly */ rtc_control = CMOS_READ(RTC_CONTROL); rtc_control &= ~(RTC_PIE | RTC_AIE | RTC_UIE); CMOS_WRITE(rtc_control, RTC_CONTROL); CMOS_READ(RTC_INTR_FLAGS); spin_unlock_irq(&rtc_lock); /* FIXME teach the alarm code how to handle binary mode; * <asm-generic/rtc.h> doesn't know 12-hour mode either. */ if (!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY))) { dev_dbg(dev, "only 24-hr BCD mode supported\n"); retval = -ENXIO; goto cleanup1; } if (is_valid_irq(rtc_irq)) retval = request_irq(rtc_irq, cmos_interrupt, IRQF_DISABLED, cmos_rtc.rtc->class_dev.class_id, &cmos_rtc.rtc->class_dev); if (retval < 0) { dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq); goto cleanup1; } /* REVISIT optionally make 50 or 114 bytes NVRAM available, * like rtc-ds1553, rtc-ds1742 ... this will often include * registers for century, and day/month alarm. */ pr_info("%s: alarms up to one %s%s\n", cmos_rtc.rtc->class_dev.class_id, is_valid_irq(rtc_irq) ? (cmos_rtc.mon_alrm ? "year" : (cmos_rtc.day_alrm ? "month" : "day")) : "no", cmos_rtc.century ? ", y3k" : "" ); return 0; cleanup1: rename_region(ports, NULL); cleanup0: rtc_device_unregister(cmos_rtc.rtc); return retval; }
static int rtc_ds1742_set_time(unsigned long t) { struct rtc_time tm; u8 year, month, day, hour, minute, second; u8 cmos_year, cmos_month, cmos_day, cmos_hour, cmos_minute, cmos_second; int cmos_century; unsigned long flags; spin_lock_irqsave(&rtc_lock, flags); CMOS_WRITE(RTC_READ, RTC_CONTROL); cmos_second = (u8)(CMOS_READ(RTC_SECONDS) & RTC_SECONDS_MASK); cmos_minute = (u8)CMOS_READ(RTC_MINUTES); cmos_hour = (u8)CMOS_READ(RTC_HOURS); cmos_day = (u8)CMOS_READ(RTC_DATE); cmos_month = (u8)CMOS_READ(RTC_MONTH); cmos_year = (u8)CMOS_READ(RTC_YEAR); cmos_century = CMOS_READ(RTC_CENTURY) & RTC_CENTURY_MASK; CMOS_WRITE(RTC_WRITE, RTC_CONTROL); /* convert */ to_tm(t, &tm); /* check each field one by one */ year = BIN2BCD(tm.tm_year - EPOCH); if (year != cmos_year) { CMOS_WRITE(year,RTC_YEAR); } month = BIN2BCD(tm.tm_mon); if (month != (cmos_month & 0x1f)) { CMOS_WRITE((month & 0x1f) | (cmos_month & ~0x1f),RTC_MONTH); } day = BIN2BCD(tm.tm_mday); if (day != cmos_day) { CMOS_WRITE(day, RTC_DATE); } if (cmos_hour & 0x40) { /* 12 hour format */ hour = 0x40; if (tm.tm_hour > 12) { hour |= 0x20 | (BIN2BCD(hour-12) & 0x1f); } else { hour |= BIN2BCD(tm.tm_hour); } } else { /* 24 hour format */ hour = BIN2BCD(tm.tm_hour) & 0x3f; } if (hour != cmos_hour) CMOS_WRITE(hour, RTC_HOURS); minute = BIN2BCD(tm.tm_min); if (minute != cmos_minute) { CMOS_WRITE(minute, RTC_MINUTES); } second = BIN2BCD(tm.tm_sec); if (second != cmos_second) { CMOS_WRITE(second & RTC_SECONDS_MASK,RTC_SECONDS); } /* RTC_CENTURY and RTC_CONTROL share same address... */ CMOS_WRITE(cmos_century, RTC_CONTROL); spin_unlock_irqrestore(&rtc_lock, flags); return 0; }
static int acpi_system_write_alarm ( struct file *file, const char *buffer, unsigned long count, void *data) { int result = 0; char alarm_string[30] = {'\0'}; char *p = alarm_string; u32 sec, min, hr, day, mo, yr; int adjust = 0; unsigned char rtc_control = 0; ACPI_FUNCTION_TRACE("acpi_system_write_alarm"); if (count > sizeof(alarm_string) - 1) return_VALUE(-EINVAL); if (copy_from_user(alarm_string, buffer, count)) return_VALUE(-EFAULT); alarm_string[count] = '\0'; /* check for time adjustment */ if (alarm_string[0] == '+') { p++; adjust = 1; } if ((result = get_date_field(&p, &yr))) goto end; if ((result = get_date_field(&p, &mo))) goto end; if ((result = get_date_field(&p, &day))) goto end; if ((result = get_date_field(&p, &hr))) goto end; if ((result = get_date_field(&p, &min))) goto end; if ((result = get_date_field(&p, &sec))) goto end; if (sec > 59) { min += 1; sec -= 60; } if (min > 59) { hr += 1; min -= 60; } if (hr > 23) { day += 1; hr -= 24; } if (day > 31) { mo += 1; day -= 31; } if (mo > 12) { yr += 1; mo -= 12; } spin_lock_irq(&rtc_lock); rtc_control = CMOS_READ(RTC_CONTROL); if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { BIN_TO_BCD(yr); BIN_TO_BCD(mo); BIN_TO_BCD(day); BIN_TO_BCD(hr); BIN_TO_BCD(min); BIN_TO_BCD(sec); } if (adjust) { yr += CMOS_READ(RTC_YEAR); mo += CMOS_READ(RTC_MONTH); day += CMOS_READ(RTC_DAY_OF_MONTH); hr += CMOS_READ(RTC_HOURS); min += CMOS_READ(RTC_MINUTES); sec += CMOS_READ(RTC_SECONDS); } spin_unlock_irq(&rtc_lock); if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { BCD_TO_BIN(yr); BCD_TO_BIN(mo); BCD_TO_BIN(day); BCD_TO_BIN(hr); BCD_TO_BIN(min); BCD_TO_BIN(sec); } if (sec > 59) { min++; sec -= 60; } if (min > 59) { hr++; min -= 60; } if (hr > 23) { day++; hr -= 24; } if (day > 31) { mo++; day -= 31; } if (mo > 12) { yr++; mo -= 12; } if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { BIN_TO_BCD(yr); BIN_TO_BCD(mo); BIN_TO_BCD(day); BIN_TO_BCD(hr); BIN_TO_BCD(min); BIN_TO_BCD(sec); } spin_lock_irq(&rtc_lock); /* write the fields the rtc knows about */ CMOS_WRITE(hr, RTC_HOURS_ALARM); CMOS_WRITE(min, RTC_MINUTES_ALARM); CMOS_WRITE(sec, RTC_SECONDS_ALARM); /* * If the system supports an enhanced alarm it will have non-zero * offsets into the CMOS RAM here -- which for some reason are pointing * to the RTC area of memory. */ #if 0 if (acpi_gbl_FADT->day_alrm) CMOS_WRITE(day, acpi_gbl_FADT->day_alrm); if (acpi_gbl_FADT->mon_alrm) CMOS_WRITE(mo, acpi_gbl_FADT->mon_alrm); if (acpi_gbl_FADT->century) CMOS_WRITE(yr/100, acpi_gbl_FADT->century); #endif /* enable the rtc alarm interrupt */ if (!(rtc_control & RTC_AIE)) { rtc_control |= RTC_AIE; CMOS_WRITE(rtc_control,RTC_CONTROL); CMOS_READ(RTC_INTR_FLAGS); } spin_unlock_irq(&rtc_lock); acpi_set_register(ACPI_BITREG_RT_CLOCK_ENABLE, 1, ACPI_MTX_LOCK); file->f_pos += count; result = 0; end: return_VALUE(result ? result : count); }
static long rtc_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { unsigned long flags; switch(cmd) { case RTC_RD_TIME: /* read the time/date from RTC */ { struct rtc_time rtc_tm; memset(&rtc_tm, 0, sizeof (struct rtc_time)); mutex_lock(&rtc_mutex); get_rtc_time(&rtc_tm); mutex_unlock(&rtc_mutex); if (copy_to_user((struct rtc_time*)arg, &rtc_tm, sizeof(struct rtc_time))) return -EFAULT; return 0; } case RTC_SET_TIME: /* set the RTC */ { struct rtc_time rtc_tm; unsigned char mon, day, hrs, min, sec, leap_yr; unsigned int yrs; if (!capable(CAP_SYS_TIME)) return -EPERM; if (copy_from_user(&rtc_tm, (struct rtc_time*)arg, sizeof(struct rtc_time))) return -EFAULT; yrs = rtc_tm.tm_year + 1900; mon = rtc_tm.tm_mon + 1; /* tm_mon starts at zero */ day = rtc_tm.tm_mday; hrs = rtc_tm.tm_hour; min = rtc_tm.tm_min; sec = rtc_tm.tm_sec; if ((yrs < 1970) || (yrs > 2069)) return -EINVAL; leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400)); if ((mon > 12) || (day == 0)) return -EINVAL; if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr))) return -EINVAL; if ((hrs >= 24) || (min >= 60) || (sec >= 60)) return -EINVAL; if (yrs >= 2000) yrs -= 2000; /* RTC (0, 1, ... 69) */ else yrs -= 1900; /* RTC (70, 71, ... 99) */ sec = bin2bcd(sec); min = bin2bcd(min); hrs = bin2bcd(hrs); day = bin2bcd(day); mon = bin2bcd(mon); yrs = bin2bcd(yrs); mutex_lock(&rtc_mutex); local_irq_save(flags); CMOS_WRITE(yrs, RTC_YEAR); CMOS_WRITE(mon, RTC_MONTH); CMOS_WRITE(day, RTC_DAY_OF_MONTH); CMOS_WRITE(hrs, RTC_HOURS); CMOS_WRITE(min, RTC_MINUTES); CMOS_WRITE(sec, RTC_SECONDS); local_irq_restore(flags); mutex_unlock(&rtc_mutex); /* Notice that at this point, the RTC is updated but * the kernel is still running with the old time. * You need to set that separately with settimeofday * or adjtimex. */ return 0; } case RTC_SET_CHARGE: /* set the RTC TRICKLE CHARGE register */ { int tcs_val; if (!capable(CAP_SYS_TIME)) return -EPERM; if(copy_from_user(&tcs_val, (int*)arg, sizeof(int))) return -EFAULT; mutex_lock(&rtc_mutex); tcs_val = RTC_TCR_PATTERN | (tcs_val & 0x0F); ds1302_writereg(RTC_TRICKLECHARGER, tcs_val); mutex_unlock(&rtc_mutex); return 0; } default: return -EINVAL; } }
static int INITSECTION cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) { struct cmos_rtc_board_info *info = dev->platform_data; int retval = 0; unsigned char rtc_control; unsigned address_space; if (cmos_rtc.dev) return -EBUSY; if (!ports) return -ENODEV; ports = request_region(ports->start, resource_size(ports), driver_name); if (!ports) { dev_dbg(dev, "i/o registers already in use\n"); return -EBUSY; } cmos_rtc.irq = rtc_irq; cmos_rtc.iomem = ports; #if defined(CONFIG_ATARI) address_space = 64; #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \ || defined(__sparc__) || defined(__mips__) \ || defined(__powerpc__) address_space = 128; #else #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. address_space = 128; #endif if (can_bank2 && ports->end > (ports->start + 1)) address_space = 256; if (info) { if (info->rtc_day_alarm && info->rtc_day_alarm < 128) cmos_rtc.day_alrm = info->rtc_day_alarm; if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128) cmos_rtc.mon_alrm = info->rtc_mon_alarm; if (info->rtc_century && info->rtc_century < 128) cmos_rtc.century = info->rtc_century; if (info->wake_on && info->wake_off) { cmos_rtc.wake_on = info->wake_on; cmos_rtc.wake_off = info->wake_off; } } cmos_rtc.dev = dev; dev_set_drvdata(dev, &cmos_rtc); cmos_rtc.rtc = rtc_device_register(driver_name, dev, &cmos_rtc_ops, THIS_MODULE); if (IS_ERR(cmos_rtc.rtc)) { retval = PTR_ERR(cmos_rtc.rtc); goto cleanup0; } rename_region(ports, dev_name(&cmos_rtc.rtc->dev)); spin_lock_irq(&rtc_lock); cmos_rtc.rtc->irq_freq = 1024; hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq); CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE); rtc_control = CMOS_READ(RTC_CONTROL); spin_unlock_irq(&rtc_lock); if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) { dev_warn(dev, "only 24-hr supported\n"); retval = -ENXIO; goto cleanup1; } if (is_valid_irq(rtc_irq)) { irq_handler_t rtc_cmos_int_handler; if (is_hpet_enabled()) { int err; rtc_cmos_int_handler = hpet_rtc_interrupt; err = hpet_register_irq_handler(cmos_interrupt); if (err != 0) { printk(KERN_WARNING "hpet_register_irq_handler " " failed in rtc_init()."); goto cleanup1; } } else rtc_cmos_int_handler = cmos_interrupt; retval = request_irq(rtc_irq, rtc_cmos_int_handler, 0, dev_name(&cmos_rtc.rtc->dev), cmos_rtc.rtc); if (retval < 0) { dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq); goto cleanup1; } } hpet_rtc_timer_init(); nvram.size = address_space - NVRAM_OFFSET; retval = sysfs_create_bin_file(&dev->kobj, &nvram); if (retval < 0) { dev_dbg(dev, "can't create nvram file? %d\n", retval); goto cleanup2; } pr_info("%s: %s%s, %zd bytes nvram%s\n", dev_name(&cmos_rtc.rtc->dev), !is_valid_irq(rtc_irq) ? "no alarms" : cmos_rtc.mon_alrm ? "alarms up to one year" : cmos_rtc.day_alrm ? "alarms up to one month" : "alarms up to one day", cmos_rtc.century ? ", y3k" : "", nvram.size, is_hpet_enabled() ? ", hpet irqs" : ""); return 0; cleanup2: if (is_valid_irq(rtc_irq)) free_irq(rtc_irq, cmos_rtc.rtc); cleanup1: cmos_rtc.dev = NULL; rtc_device_unregister(cmos_rtc.rtc); cleanup0: release_region(ports->start, resource_size(ports)); return retval; }
static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) { unsigned long flags; switch(cmd) { case RTC_RD_TIME: /* read the time/date from RTC */ { struct rtc_time rtc_tm; memset(&rtc_tm, 0, sizeof (struct rtc_time)); get_rtc_time(&rtc_tm); if (copy_to_user((struct rtc_time*)arg, &rtc_tm, sizeof(struct rtc_time))) return -EFAULT; return 0; } case RTC_SET_TIME: /* set the RTC */ { struct rtc_time rtc_tm; unsigned char mon, day, hrs, min, sec, leap_yr; unsigned int yrs; if (!capable(CAP_SYS_TIME)) return -EPERM; if (copy_from_user(&rtc_tm, (struct rtc_time*)arg, sizeof(struct rtc_time))) return -EFAULT; yrs = rtc_tm.tm_year + 1900; mon = rtc_tm.tm_mon + 1; /* tm_mon starts at zero */ day = rtc_tm.tm_mday; hrs = rtc_tm.tm_hour; min = rtc_tm.tm_min; sec = rtc_tm.tm_sec; if ((yrs < 1970) || (yrs > 2069)) return -EINVAL; leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400)); if ((mon > 12) || (day == 0)) return -EINVAL; if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr))) return -EINVAL; if ((hrs >= 24) || (min >= 60) || (sec >= 60)) return -EINVAL; if (yrs >= 2000) yrs -= 2000; /* RTC (0, 1, ... 69) */ else yrs -= 1900; /* RTC (70, 71, ... 99) */ BIN_TO_BCD(sec); BIN_TO_BCD(min); BIN_TO_BCD(hrs); BIN_TO_BCD(day); BIN_TO_BCD(mon); BIN_TO_BCD(yrs); local_irq_save(flags); CMOS_WRITE(yrs, RTC_YEAR); CMOS_WRITE(mon, RTC_MONTH); CMOS_WRITE(day, RTC_DAY_OF_MONTH); CMOS_WRITE(hrs, RTC_HOURS); CMOS_WRITE(min, RTC_MINUTES); CMOS_WRITE(sec, RTC_SECONDS); local_irq_restore(flags); /* Notice that at this point, the RTC is updated but * the kernel is still running with the old time. * You need to set that separately with settimeofday * or adjtimex. */ return 0; } case RTC_SET_CHARGE: /* set the RTC TRICKLE CHARGE register */ { int tcs_val; if (!capable(CAP_SYS_TIME)) return -EPERM; if(copy_from_user(&tcs_val, (int*)arg, sizeof(int))) return -EFAULT; tcs_val = RTC_TCR_PATTERN | (tcs_val & 0x0F); ds1302_writereg(RTC_TRICKLECHARGER, tcs_val); return 0; } case RTC_VLOW_RD: { /* TODO: * Implement voltage low detection support */ printk(KERN_WARNING "DS1302: RTC Voltage Low detection" " is not supported\n"); return 0; } case RTC_VLOW_SET: { /* TODO: * Nothing to do since Voltage Low detection is not supported */ return 0; } default: return -ENOIOCTLCMD; } }
static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) { struct rtc_time wtime; #if RTC_IRQ if (rtc_has_irq == 0) { switch (cmd) { case RTC_AIE_OFF: case RTC_AIE_ON: case RTC_PIE_OFF: case RTC_PIE_ON: case RTC_UIE_OFF: case RTC_UIE_ON: case RTC_IRQP_READ: case RTC_IRQP_SET: return -EINVAL; }; } #endif switch (cmd) { #if RTC_IRQ case RTC_AIE_OFF: /* Mask alarm int. enab. bit */ { mask_rtc_irq_bit(RTC_AIE); return 0; } case RTC_AIE_ON: /* Allow alarm interrupts. */ { set_rtc_irq_bit(RTC_AIE); return 0; } case RTC_PIE_OFF: /* Mask periodic int. enab. bit */ { mask_rtc_irq_bit(RTC_PIE); if (rtc_status & RTC_TIMER_ON) { spin_lock_irq (&rtc_lock); rtc_status &= ~RTC_TIMER_ON; del_timer(&rtc_irq_timer); spin_unlock_irq (&rtc_lock); } return 0; } case RTC_PIE_ON: /* Allow periodic ints */ { /* * We don't really want Joe User enabling more * than 64Hz of interrupts on a multi-user machine. */ if ((rtc_freq > rtc_max_user_freq) && (!capable(CAP_SYS_RESOURCE))) return -EACCES; if (!(rtc_status & RTC_TIMER_ON)) { spin_lock_irq (&rtc_lock); rtc_irq_timer.expires = jiffies + HZ/rtc_freq + 2*HZ/100; add_timer(&rtc_irq_timer); rtc_status |= RTC_TIMER_ON; spin_unlock_irq (&rtc_lock); } set_rtc_irq_bit(RTC_PIE); return 0; } case RTC_UIE_OFF: /* Mask ints from RTC updates. */ { mask_rtc_irq_bit(RTC_UIE); return 0; } case RTC_UIE_ON: /* Allow ints for RTC updates. */ { set_rtc_irq_bit(RTC_UIE); return 0; } #endif case RTC_ALM_READ: /* Read the present alarm time */ { /* * This returns a struct rtc_time. Reading >= 0xc0 * means "don't care" or "match all". Only the tm_hour, * tm_min, and tm_sec values are filled in. */ memset(&wtime, 0, sizeof(struct rtc_time)); get_rtc_alm_time(&wtime); break; } case RTC_ALM_SET: /* Store a time into the alarm */ { /* * This expects a struct rtc_time. Writing 0xff means * "don't care" or "match all". Only the tm_hour, * tm_min and tm_sec are used. */ unsigned char hrs, min, sec; struct rtc_time alm_tm; if (copy_from_user(&alm_tm, (struct rtc_time*)arg, sizeof(struct rtc_time))) return -EFAULT; hrs = alm_tm.tm_hour; min = alm_tm.tm_min; sec = alm_tm.tm_sec; spin_lock_irq(&rtc_lock); if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { if (sec < 60) BIN_TO_BCD(sec); else sec = 0xff; if (min < 60) BIN_TO_BCD(min); else min = 0xff; if (hrs < 24) BIN_TO_BCD(hrs); else hrs = 0xff; } CMOS_WRITE(hrs, RTC_HOURS_ALARM); CMOS_WRITE(min, RTC_MINUTES_ALARM); CMOS_WRITE(sec, RTC_SECONDS_ALARM); spin_unlock_irq(&rtc_lock); return 0; } case RTC_RD_TIME: /* Read the time/date from RTC */ { memset(&wtime, 0, sizeof(struct rtc_time)); get_rtc_time(&wtime); break; } case RTC_SET_TIME: /* Set the RTC */ { struct rtc_time rtc_tm; unsigned char mon, day, hrs, min, sec, leap_yr; unsigned char save_control, save_freq_select; unsigned int yrs; #ifdef CONFIG_DECSTATION unsigned int real_yrs; #endif if (!capable(CAP_SYS_TIME)) return -EACCES; if (copy_from_user(&rtc_tm, (struct rtc_time*)arg, sizeof(struct rtc_time))) return -EFAULT; yrs = rtc_tm.tm_year + 1900; mon = rtc_tm.tm_mon + 1; /* tm_mon starts at zero */ day = rtc_tm.tm_mday; hrs = rtc_tm.tm_hour; min = rtc_tm.tm_min; sec = rtc_tm.tm_sec; if (yrs < 1970) return -EINVAL; leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400)); if ((mon > 12) || (day == 0)) return -EINVAL; if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr))) return -EINVAL; if ((hrs >= 24) || (min >= 60) || (sec >= 60)) return -EINVAL; if ((yrs -= epoch) > 255) /* They are unsigned */ return -EINVAL; spin_lock_irq(&rtc_lock); #ifdef CONFIG_DECSTATION real_yrs = yrs; yrs = 72; /* * We want to keep the year set to 73 until March * for non-leap years, so that Feb, 29th is handled * correctly. */ if (!leap_yr && mon < 3) { real_yrs--; yrs = 73; } #endif /* These limits and adjustments are independant of * whether the chip is in binary mode or not. */ if (yrs > 169) { spin_unlock_irq(&rtc_lock); return -EINVAL; } if (yrs >= 100) yrs -= 100; if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { BIN_TO_BCD(sec); BIN_TO_BCD(min); BIN_TO_BCD(hrs); BIN_TO_BCD(day); BIN_TO_BCD(mon); BIN_TO_BCD(yrs); } save_control = CMOS_READ(RTC_CONTROL); CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); save_freq_select = CMOS_READ(RTC_FREQ_SELECT); CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); #ifdef CONFIG_DECSTATION CMOS_WRITE(real_yrs, RTC_DEC_YEAR); #endif CMOS_WRITE(yrs, RTC_YEAR); CMOS_WRITE(mon, RTC_MONTH); CMOS_WRITE(day, RTC_DAY_OF_MONTH); CMOS_WRITE(hrs, RTC_HOURS); CMOS_WRITE(min, RTC_MINUTES); CMOS_WRITE(sec, RTC_SECONDS); CMOS_WRITE(save_control, RTC_CONTROL); CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); spin_unlock_irq(&rtc_lock); return 0; } #if RTC_IRQ case RTC_IRQP_READ: /* Read the periodic IRQ rate. */ { return put_user(rtc_freq, (unsigned long *)arg); } case RTC_IRQP_SET: /* Set periodic IRQ rate. */ { int tmp = 0; unsigned char val; /* * The max we can do is 8192Hz. */ if ((arg < 2) || (arg > 8192)) return -EINVAL; /* * We don't really want Joe User generating more * than 64Hz of interrupts on a multi-user machine. */ if ((arg > rtc_max_user_freq) && (!capable(CAP_SYS_RESOURCE))) return -EACCES; while (arg > (1<<tmp)) tmp++; /* * Check that the input was really a power of 2. */ if (arg != (1<<tmp)) return -EINVAL; spin_lock_irq(&rtc_lock); rtc_freq = arg; val = CMOS_READ(RTC_FREQ_SELECT) & 0xf0; val |= (16 - tmp); CMOS_WRITE(val, RTC_FREQ_SELECT); spin_unlock_irq(&rtc_lock); return 0; } #endif case RTC_EPOCH_READ: /* Read the epoch. */ { return put_user (epoch, (unsigned long *)arg); } case RTC_EPOCH_SET: /* Set the epoch. */ { /* * There were no RTC clocks before 1900. */ if (arg < 1900) return -EINVAL; if (!capable(CAP_SYS_TIME)) return -EACCES; epoch = arg; return 0; } default: return -EINVAL; } return copy_to_user((void *)arg, &wtime, sizeof wtime) ? -EFAULT : 0; }
static int __init rtc_init(void) { #if defined(__alpha__) || defined(__mips__) unsigned int year, ctrl; unsigned long uip_watchdog; char *guess = NULL; #endif #ifdef __sparc__ struct linux_ebus *ebus; struct linux_ebus_device *edev; #ifdef __sparc_v9__ struct isa_bridge *isa_br; struct isa_device *isa_dev; #endif #endif #ifdef __sparc__ for_each_ebus(ebus) { for_each_ebusdev(edev, ebus) { if(strcmp(edev->prom_name, "rtc") == 0) { rtc_port = edev->resource[0].start; rtc_irq = edev->irqs[0]; goto found; } } } #ifdef __sparc_v9__ for_each_isa(isa_br) { for_each_isadev(isa_dev, isa_br) { if (strcmp(isa_dev->prom_name, "rtc") == 0) { rtc_port = isa_dev->resource.start; rtc_irq = isa_dev->irq; goto found; } } } #endif printk(KERN_ERR "rtc_init: no PC rtc found\n"); return -EIO; found: if (rtc_irq == PCI_IRQ_NONE) { rtc_has_irq = 0; goto no_irq; } /* * XXX Interrupt pin #7 in Espresso is shared between RTC and * PCI Slot 2 INTA# (and some INTx# in Slot 1). SA_INTERRUPT here * is asking for trouble with add-on boards. Change to SA_SHIRQ. */ if (request_irq(rtc_irq, rtc_interrupt, SA_INTERRUPT, "rtc", (void *)&rtc_port)) { /* * Standard way for sparc to print irq's is to use * __irq_itoa(). I think for EBus it's ok to use %d. */ printk(KERN_ERR "rtc: cannot register IRQ %d\n", rtc_irq); return -EIO; } no_irq: #else if (!request_region(RTC_PORT(0), RTC_IO_EXTENT, "rtc")) { printk(KERN_ERR "rtc: I/O port %d is not free.\n", RTC_PORT (0)); return -EIO; } #if RTC_IRQ if(request_irq(RTC_IRQ, rtc_interrupt, SA_INTERRUPT, "rtc", NULL)) { /* Yeah right, seeing as irq 8 doesn't even hit the bus. */ printk(KERN_ERR "rtc: IRQ %d is not free.\n", RTC_IRQ); release_region(RTC_PORT(0), RTC_IO_EXTENT); return -EIO; } #endif #endif /* __sparc__ vs. others */ misc_register(&rtc_dev); create_proc_read_entry ("driver/rtc", 0, 0, rtc_read_proc, NULL); #if defined(__alpha__) || defined(__mips__) rtc_freq = HZ; /* Each operating system on an Alpha uses its own epoch. Let's try to guess which one we are using now. */ uip_watchdog = jiffies; if (rtc_is_updating() != 0) while (jiffies - uip_watchdog < 2*HZ/100) { barrier(); cpu_relax(); } spin_lock_irq(&rtc_lock); year = CMOS_READ(RTC_YEAR); ctrl = CMOS_READ(RTC_CONTROL); spin_unlock_irq(&rtc_lock); if (!(ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD) BCD_TO_BIN(year); /* This should never happen... */ if (year < 20) { epoch = 2000; guess = "SRM (post-2000)"; } else if (year >= 20 && year < 48) { epoch = 1980; guess = "ARC console"; } else if (year >= 48 && year < 72) { epoch = 1952; guess = "Digital UNIX"; #if defined(__mips__) } else if (year >= 72 && year < 74) { epoch = 2000; guess = "Digital DECstation"; #else } else if (year >= 70) { epoch = 1900; guess = "Standard PC (1900)"; #endif } if (guess) printk(KERN_INFO "rtc: %s epoch (%lu) detected\n", guess, epoch); #endif #if RTC_IRQ if (rtc_has_irq == 0) goto no_irq2; init_timer(&rtc_irq_timer); rtc_irq_timer.function = rtc_dropped_irq; spin_lock_irq(&rtc_lock); /* Initialize periodic freq. to CMOS reset default, which is 1024Hz */ CMOS_WRITE(((CMOS_READ(RTC_FREQ_SELECT) & 0xF0) | 0x06), RTC_FREQ_SELECT); spin_unlock_irq(&rtc_lock); rtc_freq = 1024; no_irq2: #endif (void) init_sysctl(); printk(KERN_INFO "Real Time Clock Driver v" RTC_VERSION "\n"); return 0; }
static int INITSECTION cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) { struct cmos_rtc_board_info *info = dev->platform_data; int retval = 0; unsigned char rtc_control; /* there can be only one ... */ if (cmos_rtc.dev) return -EBUSY; if (!ports) return -ENODEV; cmos_rtc.irq = rtc_irq; cmos_rtc.iomem = ports; /* For ACPI systems extension info comes from the FADT. On others, * board specific setup provides it as appropriate. Systems where * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and * some almost-clones) can provide hooks to make that behave. */ if (info) { cmos_rtc.day_alrm = info->rtc_day_alarm; cmos_rtc.mon_alrm = info->rtc_mon_alarm; cmos_rtc.century = info->rtc_century; if (info->wake_on && info->wake_off) { cmos_rtc.wake_on = info->wake_on; cmos_rtc.wake_off = info->wake_off; } } cmos_rtc.rtc = rtc_device_register(driver_name, dev, &cmos_rtc_ops, THIS_MODULE); if (IS_ERR(cmos_rtc.rtc)) return PTR_ERR(cmos_rtc.rtc); cmos_rtc.dev = dev; dev_set_drvdata(dev, &cmos_rtc); /* platform and pnp busses handle resources incompatibly. * * REVISIT for non-x86 systems we may need to handle io memory * resources: ioremap them, and request_mem_region(). */ if (is_pnp()) { retval = request_resource(&ioport_resource, ports); if (retval < 0) { dev_dbg(dev, "i/o registers already in use\n"); goto cleanup0; } } rename_region(ports, cmos_rtc.rtc->dev.bus_id); #ifdef CONFIG_ARCH_GEN3 /* MOSAIC WORKAROUND * some of our boxes shipped with unexpected CMOS RTC mode bits * if this is detected, reset the RTC to a known point */ spin_lock_irq(&rtc_lock); rtc_control = CMOS_READ(RTC_CONTROL); if (!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY))) { struct rtc_time t; printk(KERN_INFO "Fixing bogus CMOS RTC mode\n"); rtc_control |= RTC_24H; rtc_control &= ~RTC_DM_BINARY; CMOS_WRITE(rtc_control, RTC_CONTROL); memset(&t, 0, sizeof(t)); t.tm_mday = 1; t.tm_year = 109; spin_unlock_irq(&rtc_lock); set_rtc_time(&t); } else { spin_unlock_irq(&rtc_lock); } #endif spin_lock_irq(&rtc_lock); /* force periodic irq to CMOS reset default of 1024Hz; * * REVISIT it's been reported that at least one x86_64 ALI mobo * doesn't use 32KHz here ... for portability we might need to * do something about other clock frequencies. */ CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); cmos_rtc.rtc->irq_freq = 1024; /* disable irqs. * * NOTE after changing RTC_xIE bits we always read INTR_FLAGS; * allegedly some older rtcs need that to handle irqs properly */ rtc_control = CMOS_READ(RTC_CONTROL); rtc_control &= ~(RTC_PIE | RTC_AIE | RTC_UIE); CMOS_WRITE(rtc_control, RTC_CONTROL); CMOS_READ(RTC_INTR_FLAGS); spin_unlock_irq(&rtc_lock); /* FIXME teach the alarm code how to handle binary mode; * <asm-generic/rtc.h> doesn't know 12-hour mode either. */ if (!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY))) { dev_dbg(dev, "only 24-hr BCD mode supported\n"); retval = -ENXIO; goto cleanup1; } if (is_valid_irq(rtc_irq)) retval = request_irq(rtc_irq, cmos_interrupt, IRQF_DISABLED, cmos_rtc.rtc->dev.bus_id, cmos_rtc.rtc); if (retval < 0) { dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq); goto cleanup1; } /* REVISIT optionally make 50 or 114 bytes NVRAM available, * like rtc-ds1553, rtc-ds1742 ... this will often include * registers for century, and day/month alarm. */ pr_info("%s: alarms up to one %s%s\n", cmos_rtc.rtc->dev.bus_id, is_valid_irq(rtc_irq) ? (cmos_rtc.mon_alrm ? "year" : (cmos_rtc.day_alrm ? "month" : "day")) : "no", cmos_rtc.century ? ", y3k" : "" ); return 0; cleanup1: rename_region(ports, NULL); cleanup0: rtc_device_unregister(cmos_rtc.rtc); return retval; }
static int INITSECTION cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) { struct cmos_rtc_board_info *info = dev->platform_data; int retval = 0; unsigned char rtc_control; unsigned address_space; /* there can be only one ... */ if (cmos_rtc.dev) return -EBUSY; if (!ports) return -ENODEV; /* Claim I/O ports ASAP, minimizing conflict with legacy driver. * * REVISIT non-x86 systems may instead use memory space resources * (needing ioremap etc), not i/o space resources like this ... */ ports = request_region(ports->start, resource_size(ports), driver_name); if (!ports) { dev_dbg(dev, "i/o registers already in use\n"); return -EBUSY; } cmos_rtc.irq = rtc_irq; cmos_rtc.iomem = ports; /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM * driver did, but don't reject unknown configs. Old hardware * won't address 128 bytes. Newer chips have multiple banks, * though they may not be listed in one I/O resource. */ #if defined(CONFIG_ATARI) address_space = 64; #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \ || defined(__sparc__) || defined(__mips__) \ || defined(__powerpc__) address_space = 128; #else #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. address_space = 128; #endif if (can_bank2 && ports->end > (ports->start + 1)) address_space = 256; /* For ACPI systems extension info comes from the FADT. On others, * board specific setup provides it as appropriate. Systems where * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and * some almost-clones) can provide hooks to make that behave. * * Note that ACPI doesn't preclude putting these registers into * "extended" areas of the chip, including some that we won't yet * expect CMOS_READ and friends to handle. */ if (info) { if (info->rtc_day_alarm && info->rtc_day_alarm < 128) cmos_rtc.day_alrm = info->rtc_day_alarm; if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128) cmos_rtc.mon_alrm = info->rtc_mon_alarm; if (info->rtc_century && info->rtc_century < 128) cmos_rtc.century = info->rtc_century; if (info->wake_on && info->wake_off) { cmos_rtc.wake_on = info->wake_on; cmos_rtc.wake_off = info->wake_off; } } cmos_rtc.dev = dev; dev_set_drvdata(dev, &cmos_rtc); cmos_rtc.rtc = rtc_device_register(driver_name, dev, &cmos_rtc_ops, THIS_MODULE); if (IS_ERR(cmos_rtc.rtc)) { retval = PTR_ERR(cmos_rtc.rtc); goto cleanup0; } rename_region(ports, dev_name(&cmos_rtc.rtc->dev)); spin_lock_irq(&rtc_lock); /* force periodic irq to CMOS reset default of 1024Hz; * * REVISIT it's been reported that at least one x86_64 ALI mobo * doesn't use 32KHz here ... for portability we might need to * do something about other clock frequencies. */ cmos_rtc.rtc->irq_freq = 1024; hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq); CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); /* disable irqs */ cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE); rtc_control = CMOS_READ(RTC_CONTROL); spin_unlock_irq(&rtc_lock); /* FIXME: * <asm-generic/rtc.h> doesn't know 12-hour mode either. */ if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) { dev_warn(dev, "only 24-hr supported\n"); retval = -ENXIO; goto cleanup1; } if (is_valid_irq(rtc_irq)) { irq_handler_t rtc_cmos_int_handler; if (is_hpet_enabled()) { int err; rtc_cmos_int_handler = hpet_rtc_interrupt; err = hpet_register_irq_handler(cmos_interrupt); if (err != 0) { dev_warn(dev, "hpet_register_irq_handler " " failed in rtc_init()."); goto cleanup1; } } else rtc_cmos_int_handler = cmos_interrupt; retval = request_irq(rtc_irq, rtc_cmos_int_handler, 0, dev_name(&cmos_rtc.rtc->dev), cmos_rtc.rtc); if (retval < 0) { dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq); goto cleanup1; } } hpet_rtc_timer_init(); /* export at least the first block of NVRAM */ nvram.size = address_space - NVRAM_OFFSET; retval = sysfs_create_bin_file(&dev->kobj, &nvram); if (retval < 0) { dev_dbg(dev, "can't create nvram file? %d\n", retval); goto cleanup2; } dev_info(dev, "%s%s, %zd bytes nvram%s\n", !is_valid_irq(rtc_irq) ? "no alarms" : cmos_rtc.mon_alrm ? "alarms up to one year" : cmos_rtc.day_alrm ? "alarms up to one month" : "alarms up to one day", cmos_rtc.century ? ", y3k" : "", nvram.size, is_hpet_enabled() ? ", hpet irqs" : ""); return 0; cleanup2: if (is_valid_irq(rtc_irq)) free_irq(rtc_irq, cmos_rtc.rtc); cleanup1: cmos_rtc.dev = NULL; rtc_device_unregister(cmos_rtc.rtc); cleanup0: release_region(ports->start, resource_size(ports)); return retval; }
/* * Set up timer interrupt. */ void __init footbridge_init_time(void) { if (machine_is_co285() || machine_is_personal_server()) /* * Add-in 21285s shouldn't access the RTC */ rtc_base = 0; else rtc_base = 0x70; if (rtc_base) { int reg_d, reg_b; /* * Probe for the RTC. */ reg_d = CMOS_READ(RTC_REG_D); /* * make sure the divider is set */ CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_REG_A); /* * Set control reg B * (24 hour mode, update enabled) */ reg_b = CMOS_READ(RTC_REG_B) & 0x7f; reg_b |= 2; CMOS_WRITE(reg_b, RTC_REG_B); if ((CMOS_READ(RTC_REG_A) & 0x7f) == RTC_REF_CLCK_32KHZ && CMOS_READ(RTC_REG_B) == reg_b) { struct timespec tv; /* * We have a RTC. Check the battery */ if ((reg_d & 0x80) == 0) printk(KERN_WARNING "RTC: *** warning: CMOS battery bad\n"); tv.tv_nsec = 0; tv.tv_sec = get_isa_cmos_time(); do_settimeofday(&tv); set_rtc = set_isa_cmos_time; } else rtc_base = 0; } if (machine_is_ebsa285() || machine_is_co285() || machine_is_personal_server()) { gettimeoffset = timer1_gettimeoffset; timer1_latch = (mem_fclk_21285 + 8 * HZ) / (16 * HZ); *CSR_TIMER1_CLR = 0; *CSR_TIMER1_LOAD = timer1_latch; *CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16; footbridge_timer_irq.name = "Timer1 Timer Tick"; footbridge_timer_irq.handler = timer1_interrupt; setup_irq(IRQ_TIMER1, &footbridge_timer_irq); } else { /* enable PIT timer */ /* set for periodic (4) and LSB/MSB write (0x30) */ outb(0x34, 0x43); outb((mSEC_10_from_14/6) & 0xFF, 0x40); outb((mSEC_10_from_14/6) >> 8, 0x40); gettimeoffset = isa_gettimeoffset; footbridge_timer_irq.name = "ISA Timer Tick"; footbridge_timer_irq.handler = isa_timer_interrupt; setup_irq(IRQ_ISA_TIMER, &footbridge_timer_irq); } }