/** * \brief Run TRNG driver unit tests. */ int main(void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS }; sysclk_init(); board_init(); sysclk_enable_peripheral_clock(CONSOLE_UART_ID); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); /* Define all the test cases */ DEFINE_TEST_CASE(trng_test, NULL, run_trng_test, NULL, "trng random value generate test"); /* Put test case addresses in an array */ DEFINE_TEST_ARRAY(trng_test_array) = { &trng_test,}; /* Define the test suite */ DEFINE_TEST_SUITE(trng_suite, trng_test_array, "trng driver test suite"); /* Run all tests in the test suite */ test_suite_run(&trng_suite); while (1) { /* Busy-wait forever */ } }
/** * \brief Run unit tests for MT48LC16m16a2tg7 SDRAM * \return 0 which should never occur. */ int main (void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; sysclk_init(); board_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); sdramc_init(sysclk_get_cpu_hz()); // Define all the test cases DEFINE_TEST_CASE(data_integrity_test, NULL, run_data_integrity_test, NULL, "Data integrity test"); // Put test case addresses in an array DEFINE_TEST_ARRAY(ebi_sdram_tests) = { &data_integrity_test, }; // Define the test suite DEFINE_TEST_SUITE(ebi_sdram_suite, ebi_sdram_tests, "UC3 EBI driver w/ SDRAM test suite"); // Set up the test data pointer and run all tests in the suite test_set_data(¶ms); test_suite_run(&ebi_sdram_suite); while (true); return (0); }
/** * \brief Run GPBR driver unit tests */ int main(void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .paritytype = CONF_TEST_PARITY }; /* Initialize the system clock and board */ sysclk_init(); board_init(); /* Enable the debug uart */ sysclk_enable_peripheral_clock(CONSOLE_UART_ID); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); /* Define all the test cases */ DEFINE_TEST_CASE(gpbr_test, NULL, run_gpbr_test, NULL, "GPBR read/write test"); /* Put test case addresses in an array */ DEFINE_TEST_ARRAY(gpbr_tests) = { &gpbr_test}; /* Define the test suite */ DEFINE_TEST_SUITE(gpbr_suite, gpbr_tests, "SAM GPBR driver test suite"); /* Run all tests in the test suite */ test_suite_run(&gpbr_suite); while (1) { /* Busy-wait forever. */ } }
/** * \brief Run Sleep Manager unit tests * * Initializes the clock system, board and serial output, then sets up the * Sleep Manager unit test suite and runs it. */ int main(void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; board_init(); sysclk_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); DEFINE_TEST_CASE(sleep_trigger_test, NULL, run_sleep_trigger_test, NULL, "Test sleep interrupt is getting triggered"); DEFINE_TEST_CASE(set_functions_test, NULL, run_set_functions_test, NULL, "Test setting of various lock modes"); /* Put test case addresses in an array */ DEFINE_TEST_ARRAY(sleep_manager_tests) = { &set_functions_test, &sleep_trigger_test, }; /* Define the test suite */ DEFINE_TEST_SUITE(sleep_manager_suite, sleep_manager_tests, "MEGARF SLEEP MANAGER test suite"); /* Run all tests in the suite */ test_suite_run(&sleep_manager_suite); while (1) { /* Intentionally left empty. */ } }
/** * \brief Run IISC driver unit tests. */ int main(void) { sysclk_init(); board_init(); const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS }; stdio_serial_init(CONF_TEST_USART, &usart_serial_options); /* Define all the test cases. */ DEFINE_TEST_CASE(iis_test, NULL, run_iis_test, NULL, "SAM IIS transfer test"); /* Put test case addresses in an array. */ DEFINE_TEST_ARRAY(iis_tests) = { &iis_test, }; /* Define the test suite. */ DEFINE_TEST_SUITE(iis_suite, iis_tests, "SAM IIS driver test suite"); /* Run all tests in the test suite. */ test_suite_run(&iis_suite); while (1) { /* Busy-wait forever. */ } }
/** * \brief Run SSC driver unit tests. */ int main(void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .paritytype = CONF_TEST_PARITY }; sysclk_init(); board_init(); sysclk_enable_peripheral_clock(CONSOLE_UART_ID); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); /* Define all the test cases. */ DEFINE_TEST_CASE(ssc_test, NULL, run_ssc_test, NULL, "Init SSC in loop mode and check the received data with transmit data"); /* Put test case addresses in an array. */ DEFINE_TEST_ARRAY(ssc_tests) = { &ssc_test, }; /* Define the test suite */ DEFINE_TEST_SUITE(ssc_suite, ssc_tests, "SAM SSC driver test suite"); /* Run all tests in the test suite. */ test_suite_run(&ssc_suite); while (1) { /* Busy-wait forever. */ } }
void main_cdc_set_dtr(bool b_enable) { if (b_enable) { DEFINE_TEST_CASE(nlme_reset_test, NULL, run_nlme_reset_test, NULL, "NWK Reset request"); DEFINE_TEST_CASE(nlme_start_test, NULL, run_nlme_start_test, NULL, "NWK Start request"); DEFINE_TEST_CASE(zid_rec_connect_test, NULL, run_zid_rec_connect_test, NULL, "Push button pairing Request"); /* Put test case addresses in an array. */ DEFINE_TEST_ARRAY(nwk_tests) = { &nlme_reset_test, &nlme_start_test, &zid_rec_connect_test }; /* Define the test suite. */ DEFINE_TEST_SUITE(nwk_suite, nwk_tests, "NWK unit test suite"); /* Run all tests in the test suite. */ test_suite_run(&nwk_suite); } else { } }
void main_cdc_set_dtr(bool b_enable) { if (b_enable) { DEFINE_TEST_CASE(at86rfx_init_test, NULL, run_at86rfx_init_test, NULL, "AT86RFx initialization"); DEFINE_TEST_CASE(at86rfx_reg_access_test, NULL, run_at86rfx_reg_access_test, NULL, "Read/write AT86RFx register access"); DEFINE_TEST_CASE(at86rfx_tx_test, NULL, run_at86rfx_tx_test, NULL, "AT86RFx frame transmission"); // Put test case addresses in an array. DEFINE_TEST_ARRAY(at86rfx_tests) = { &at86rfx_init_test, &at86rfx_reg_access_test, &at86rfx_tx_test}; // Define the test suite. DEFINE_TEST_SUITE(at86rfx_suite, at86rfx_tests, "AT86RFx component unit test suite"); // Run all tests in the test suite. test_suite_run(&at86rfx_suite); } else { } }
/** * \brief Run IOPORT unit tests * * Initializes the clock system, board and serial output, then sets up the * IOPORT Service unit test suite and runs it. */ int main(void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; board_init(); sysclk_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); DEFINE_TEST_CASE(ioport_port_test, NULL, run_ioport_port_test, NULL, "Test setting of various IOPORT functions"); DEFINE_TEST_CASE(ioport_pin_test, NULL, run_ioport_pin_test, NULL, "Test IOPORT pin level is getting changed"); /* Put test case addresses in an array */ DEFINE_TEST_ARRAY(ioport_test) = { &ioport_port_test, &ioport_pin_test, }; /* Define the test suite */ DEFINE_TEST_SUITE(ioport_suite, ioport_test, "MEGARF IOPORT test suite"); /* Run all tests in the suite */ test_suite_run(&ioport_suite); while (1) { /* Intentionally left empty. */ } }
/** * \brief Run PICOUART driver unit tests. */ int main(void) { struct ast_config ast_conf; const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS }; sysclk_init(); board_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); /* Enable osc32 oscillator*/ if (!osc_is_ready(OSC_ID_OSC32)) { osc_enable(OSC_ID_OSC32); osc_wait_ready(OSC_ID_OSC32); } /* Disable all AST wake enable bits for safety since the AST is reset only by a POR. */ ast_enable(AST); ast_conf.mode = AST_COUNTER_MODE; ast_conf.osc_type = AST_OSC_32KHZ; ast_conf.psel = AST_PSEL_32KHZ_1HZ; ast_conf.counter = 0; ast_set_config(AST, &ast_conf); ast_disable_wakeup(AST, AST_WAKEUP_ALARM); ast_disable_wakeup(AST, AST_WAKEUP_PER); ast_disable_wakeup(AST, AST_WAKEUP_OVF); ast_disable(AST); /* Configurate the USART to board monitor */ bm_init(); /* Define all the test cases. */ DEFINE_TEST_CASE(picouart_test, NULL, run_picouart_test, NULL, "SAM PICOUART wakeup test."); DEFINE_TEST_CASE(getversion_test, NULL, run_getversion_test, NULL, "SAM get version test."); /* Put test case addresses in an array. */ DEFINE_TEST_ARRAY(picouart_tests) = { &getversion_test, &picouart_test, }; /* Define the test suite. */ DEFINE_TEST_SUITE(picouart_suite, picouart_tests, "SAM PICOUART driver test suite"); /* Run all tests in the test suite. */ test_suite_run(&picouart_suite); while (1) { /* Busy-wait forever. */ } }
/** * \brief Run TRNG unit tests * * Initializes the system and serial output, then sets up the * TRNG unit test suite and runs it. */ int main(void) { system_init(); cdc_uart_init(); /* Define Test Cases */ DEFINE_TEST_CASE(trng_polling_read_test, NULL, run_trng_polling_read_test, NULL, "Testing TRNG polling read"); DEFINE_TEST_CASE(trng_callback_read_test, NULL, run_trng_callback_read_test, NULL, "Testing TRNG callback read"); /* Put test case addresses in an array */ DEFINE_TEST_ARRAY(trng_tests) = { &trng_polling_read_test, &trng_callback_read_test, }; /* Define the test suite */ DEFINE_TEST_SUITE(trng_test_suite, trng_tests, "SAM TRNG driver test suite"); /* Run all tests in the suite*/ test_suite_run(&trng_test_suite); while (true) { /* Intentionally left empty */ } }
/** * \brief Run Event driver unit tests. */ int main(void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS }; sysclk_init(); board_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); /* Define all the test cases */ DEFINE_TEST_CASE(events_ast_test, NULL, run_events_ast_test, NULL, "Test Event driver with AST trigger."); DEFINE_TEST_CASE(events_software_test, NULL, run_events_software_test, NULL, "Test Event driver with software trigger."); /* Put test case addresses in an array */ DEFINE_TEST_ARRAY(events_tests) = { &events_ast_test, &events_software_test }; /* Define the test suite */ DEFINE_TEST_SUITE(events_suite, events_tests, "Events driver test suite"); /* Run all tests in the test suite */ test_suite_run(&events_suite); while (1) { /* Busy-wait forever. */ } }
/** * \brief Run GPIO driver unit tests. */ int main(void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS }; sysclk_init(); board_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); /* Define all the test cases */ DEFINE_TEST_CASE(gpio_int_test, NULL, run_gpio_int_test, NULL, "Test GPIO driver with interrupt support."); /* Put test case addresses in an array */ DEFINE_TEST_ARRAY(gpio_tests) = { &gpio_int_test }; /* Define the test suite */ DEFINE_TEST_SUITE(gpio_suite, gpio_tests, "GPIO driver test suite"); /* Run all tests in the test suite */ test_suite_run(&gpio_suite); while (1) { /* Busy-wait forever. */ } }
/** * \brief Run LCDCA unit tests * * Initializes board, serial output, then sets up the * LCDCA unit test suite and runs it. */ int main(void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; sysclk_init(); board_init(); sleepmgr_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); /* Define all the test cases. */ DEFINE_TEST_CASE(lcdca_init_test, NULL, run_lcdca_init_test, NULL, "LCDCA initialization test"); DEFINE_TEST_CASE(lcdca_blink_test, NULL, run_lcdca_blink_test, NULL, "LCDCA blink test"); DEFINE_TEST_CASE(lcdca_automated_sequential_test, NULL, run_lcdca_automated_sequential_test, NULL, "LCDCA automated sequential test"); DEFINE_TEST_CASE(lcdca_automated_scrolling_test, NULL, run_lcdca_automated_scrolling_test, NULL, "LCDCA automated scrolling test"); DEFINE_TEST_CASE(lcdca_autonomous_test, NULL, run_lcdca_autonomous_test, NULL, "LCDCA autonomous segment test"); DEFINE_TEST_CASE(lcdca_contrast_change_test, NULL, run_lcdca_contrast_change_test, run_lcdca_end_test, "LCDCA contrast change test"); /* Put test case addresses in an array. */ DEFINE_TEST_ARRAY(lcdca_tests) = { &lcdca_init_test, &lcdca_blink_test, &lcdca_automated_sequential_test, &lcdca_automated_scrolling_test, &lcdca_autonomous_test, &lcdca_contrast_change_test, }; /* Define the test suite. */ DEFINE_TEST_SUITE(lcdca_suite, lcdca_tests, "LCDCA driver unit test suite"); /* Run all tests in the test suite. */ test_suite_run(&lcdca_suite); while (true) { __asm__("nop"); } }
/** * \brief Run TCC unit tests * * Initializes the system and serial output, then sets up the TCC unit test * suite and runs it. */ int main(void) { system_init(); cdc_uart_init(); /* Define Test Cases */ DEFINE_TEST_CASE(init_test, NULL, run_init_test, NULL, "Initialize tcc_xmodules"); DEFINE_TEST_CASE(basic_functionality_test, NULL, run_basic_functionality_test, NULL, "test start stop and getters and setters"); DEFINE_TEST_CASE(callback_test, NULL, run_callback_test, NULL, "test callback API"); DEFINE_TEST_CASE(reset_test, NULL, run_reset_test, NULL, "Setup, reset TCC module"); DEFINE_TEST_CASE(capture_and_compare_test, NULL, run_capture_and_compare_test, NULL, "Test capture and compare"); DEFINE_TEST_CASE(faultx_test, NULL, run_faultx_test, NULL, "Test Non-Recoverable Fault"); DEFINE_TEST_CASE(faultn_test, NULL, run_faultn_test, NULL, "Test Recoverable Fault"); /* Put test case addresses in an array */ DEFINE_TEST_ARRAY(tcc_tests) = { &init_test, &basic_functionality_test, &callback_test, &reset_test, &capture_and_compare_test, &faultx_test, &faultn_test, }; /* Define the test suite */ DEFINE_TEST_SUITE(tcc_suite, tcc_tests, "SAM D21/R21 TCC driver test suite"); /* Run all tests in the suite*/ test_suite_run(&tcc_suite); tcc_reset(&tcc_test0_module); tcc_reset(&tcc_test1_module); while (true) { /* Intentionally left empty */ } }
/** * \brief Run SPI unit tests * * Initializes the system and serial output, then sets up the * SPI unit test suite and runs it. */ int main(void) { system_init(); cdc_uart_init(); cpu_irq_enable(); /* Fill the transmit buffers with some data */ for (uint16_t i = 0; i < BUFFER_LENGTH; i++) { tx_buf[i] = i + 1; slave_tx_buf[i] = i + 1; } /* Define Test Cases */ DEFINE_TEST_CASE(spi_init_test, NULL, run_spi_init_test, NULL, "Initialization test for SPI master & slave"); DEFINE_TEST_CASE(single_byte_polled_test, NULL, run_single_byte_polled_test, NULL, "Transfer single byte and readback by polling"); DEFINE_TEST_CASE(buffer_polled_write_interrupt_read_test, setup_buffer_polled_write_interrupt_read_test, run_buffer_polled_write_interrupt_read_test, cleanup_buffer_polled_write_interrupt_read_test, "Transfer bytes by polling and read back with interrupt"); DEFINE_TEST_CASE(transceive_buffer_test, NULL, run_transceive_buffer_test, NULL, "Transmit & receive bytes using transceive functions"); DEFINE_TEST_CASE(baud_test, NULL, run_baud_test, NULL, "Transfer byte at different baud rates"); DEFINE_TEST_CASE(transfer_9bit_test, setup_transfer_9bit_test, run_transfer_9bit_test, NULL, "Transfer 9-bit character and readback by polling"); /* Put test case addresses in an array */ DEFINE_TEST_ARRAY(spi_tests) = { &spi_init_test, &single_byte_polled_test, &buffer_polled_write_interrupt_read_test, &transceive_buffer_test, &baud_test, &transfer_9bit_test, }; /* Define the test suite */ DEFINE_TEST_SUITE(spi_test_suite, spi_tests, "SAM SPI driver test suite"); /* Run all tests in the suite*/ test_suite_run(&spi_test_suite); while (true) { /* Intentionally left empty */ } }
/** * \brief Run ADC unit tests * * Initializes the system and serial output, then sets up the * ADC unit test suite and runs it. */ int main(void) { system_init(); delay_init(); cdc_uart_init(); test_dac_init(); /* Define Test Cases */ DEFINE_TEST_CASE(adc_init_test, NULL, run_adc_init_test, NULL, "Testing ADC Initialization"); DEFINE_TEST_CASE(adc_polled_mode_test, NULL, run_adc_polled_mode_test, NULL, "Testing ADC single ended mode by polling"); DEFINE_TEST_CASE(adc_callback_mode_test, setup_adc_callback_mode_test, run_adc_callback_mode_test, cleanup_adc_callback_mode_test, "Testing ADC single ended mode by interrupt"); DEFINE_TEST_CASE(adc_average_mode_test, setup_adc_average_mode_test, run_adc_average_mode_test, NULL, "Testing ADC average mode"); DEFINE_TEST_CASE(adc_window_mode_test, setup_adc_window_mode_test, run_adc_window_mode_test, cleanup_adc_window_mode_test, "Testing ADC window mode"); /* Put test case addresses in an array */ DEFINE_TEST_ARRAY(adc_tests) = { &adc_init_test, &adc_polled_mode_test, &adc_callback_mode_test, &adc_average_mode_test, &adc_window_mode_test, }; /* Define the test suite */ DEFINE_TEST_SUITE(adc_test_suite, adc_tests, "SAM ADC driver test suite"); /* Run all tests in the suite*/ test_suite_run(&adc_test_suite); while (true) { /* Intentionally left empty */ } }
//! \brief Set up and run test suite int main(void) { /* USART init values */ const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; /* Start services */ pmic_init(); sysclk_init(); board_init(); sleepmgr_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); /* Enable the clock for the AES module */ sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_AES); /* Enable global interrupts */ cpu_irq_enable(); // Set callback for AES module aes_set_callback(&int_callback_aes); /* Define test cases */ DEFINE_TEST_CASE(aes_get_set_test, NULL, run_aes_set_and_get_key_test, NULL, "Get and set functions"); DEFINE_TEST_CASE(aes_state_interface_test, NULL, run_aes_state_interface_test, NULL, "Test of AES state functions"); DEFINE_TEST_CASE(aes_encryption_test, NULL, run_aes_encryption_test, NULL, "Encryption with known result"); DEFINE_TEST_CASE(aes_decryption_test, NULL, run_aes_decryption_test, NULL, "Decryption function known result"); DEFINE_TEST_CASE(aes_enc_dec_test, NULL, run_aes_encrypt_and_decrypt_test, NULL, "Encryption and decryption with interrupt and auto mode"); DEFINE_TEST_ARRAY(aes_tests) = { &aes_get_set_test, &aes_state_interface_test, &aes_encryption_test, &aes_decryption_test, &aes_enc_dec_test }; DEFINE_TEST_SUITE(aes_suite, aes_tests, "XMEGA AES driver test suite"); /* Run all test in the suite */ test_suite_run(&aes_suite); while (1) { /* Intentionally left blank */ } }
/** * \brief Run AFEC driver unit tests. */ int main(void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .paritytype = CONF_TEST_PARITY }; /* Initialize the system clock and board */ sysclk_init(); board_init(); sysclk_enable_peripheral_clock(CONSOLE_UART_ID); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); afec_enable(AFEC0); struct afec_config afec_cfg; afec_get_config_defaults(&afec_cfg); afec_init(AFEC0, &afec_cfg); /* * Because the internal ADC offset is 0x800, it should cancel it and shift * down to 0. */ afec_channel_set_analog_offset(AFEC0, AFEC_CHANNEL_1, 0x800); afec_channel_enable(AFEC0, AFEC_CHANNEL_1); #if defined(__GNUC__) setbuf(stdout, NULL); #endif /* Define all the test cases */ DEFINE_TEST_CASE(afec_tc_trig_test, NULL, run_afec_tc_trig_test, NULL, "AFEC TC Trig test"); DEFINE_TEST_CASE(afec_comp_test, NULL, run_afec_comp_test, NULL, "AFEC Comparison Window test"); /* Put test case addresses in an array */ DEFINE_TEST_ARRAY(afec_tests) = { &afec_tc_trig_test, &afec_comp_test, }; /* Define the test suite */ DEFINE_TEST_SUITE(afec_suite, afec_tests, "SAM AFEC driver test suite"); /* Run all tests in the test suite */ test_suite_run(&afec_suite); while (1) { /* Busy-wait forever. */ } }
/** * \brief Run AES driver unit tests. */ int main(void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS }; sysclk_init(); board_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); /* Enable the AES module. */ aes_get_config_defaults(&g_aes_cfg); aes_init(&g_aes_inst, AESA, &g_aes_cfg); aes_enable(&g_aes_inst); /* Enable AES interrupt. */ aes_set_callback(&g_aes_inst, AES_INTERRUPT_INPUT_BUFFER_READY, aes_callback, 1); /* Define all the test cases. */ DEFINE_TEST_CASE(ecb_mode_test, NULL, run_ecb_mode_test, NULL, "SAM AES ECB mode encryption and decryption test."); DEFINE_TEST_CASE(cbc_mode_test, NULL, run_cbc_mode_test, NULL, "SAM AES CBC mode encryption and decryption test."); DEFINE_TEST_CASE(cfb128_mode_test, NULL, run_cfb128_mode_test, NULL, "SAM AES CFB128 mode encryption and decryption test."); DEFINE_TEST_CASE(ofb_mode_test, NULL, run_ofb_mode_test, NULL, "SAM AES OFB mode encryption and decryption test."); DEFINE_TEST_CASE(ctr_mode_test, NULL, run_ctr_mode_test, NULL, "SAM AES CTR mode encryption and decryption test."); DEFINE_TEST_CASE(ecb_mode_test_pdca, NULL, run_ecb_mode_test_pdca, NULL, "SAM AES ECB mode encryption and decryption with PDCA test."); /* Put test case addresses in an array. */ DEFINE_TEST_ARRAY(aes_tests) = { &ecb_mode_test, &cbc_mode_test, &cfb128_mode_test, &ofb_mode_test, &ctr_mode_test, &ecb_mode_test_pdca, }; /* Define the test suite. */ DEFINE_TEST_SUITE(aes_suite, aes_tests, "SAM AES driver test suite"); /* Run all tests in the test suite. */ test_suite_run(&aes_suite); while (1) { /* Busy-wait forever. */ } }
/** * \brief Run NVM driver unit tests */ int main (void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; sysclk_init(); board_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); // Define all the test cases DEFINE_TEST_CASE(dev_id_test, NULL, run_device_id_test, NULL, "Device ID readout"); DEFINE_TEST_CASE(dev_sn_test, NULL, run_device_serial_test, NULL, "Device serial number readout"); DEFINE_TEST_CASE(eeprom_erase_test, NULL, run_eeprom_erase_test, NULL, "EEPROM erase"); DEFINE_TEST_CASE(eeprom_write_test, NULL, run_eeprom_write_test, NULL, "EEPROM write"); DEFINE_TEST_CASE(eeprom_atomic_write_test, NULL, run_eeprom_atomic_write_test, NULL, "EEPROM atomic write"); DEFINE_TEST_CASE(eeprom_split_write_test, NULL, run_eeprom_split_write_test, NULL, "EEPROM split write"); DEFINE_TEST_CASE(eeprom_erase_byte_test, NULL, run_eeprom_erase_byte_test, NULL, "EEPROM erase byte"); DEFINE_TEST_CASE(eeprom_read_buffer_test, NULL, run_eeprom_read_buffer_test, NULL, "EEPROM read buffer"); DEFINE_TEST_CASE(eeprom_write_buffer_test, NULL, run_eeprom_write_buffer_test, NULL, "EEPROM write buffer"); // Put test case addresses in an array DEFINE_TEST_ARRAY(nvm_tests) = { &dev_id_test, &dev_sn_test, &eeprom_erase_test, &eeprom_write_test, &eeprom_atomic_write_test, &eeprom_split_write_test, &eeprom_erase_byte_test, &eeprom_read_buffer_test, &eeprom_write_buffer_test, }; // Define the test suite DEFINE_TEST_SUITE(nvm_suite, nvm_tests, "XMEGA NVM driver test suite"); // Run all tests in the test suite test_suite_run(&nvm_suite); while (1); }
/** * \brief Run WDT unit tests * * Initializes the system and serial output, then sets up the * WDT unit test suite and runs it. */ int main(void) { /* Check whether reset cause was Watchdog */ #if (SAML21) wdr_flag = (system_get_reset_cause() & RSTC_RCAUSE_WDT); #else wdr_flag = (system_get_reset_cause() & PM_RCAUSE_WDT); #endif system_init(); /* Reset the Watchdog count */ wdt_reset_count(); struct wdt_conf config_wdt; /* Get the Watchdog default configuration */ wdt_get_config_defaults(&config_wdt); if(wdr_flag) { config_wdt.enable = false; } /* Set the desired configuration */ #if !(SAML21) config_wdt.clock_source = CONF_WDT_GCLK_GEN; #endif config_wdt.timeout_period = CONF_WDT_TIMEOUT_PERIOD; config_wdt.early_warning_period = CONF_WDT_EARLY_WARNING_PERIOD; wdt_set_config(&config_wdt); cdc_uart_init(); DEFINE_TEST_CASE(wdt_early_warning_test, NULL, run_wdt_early_warning_test, wait_for_wdt_reset, "WDT Early Warning Test"); DEFINE_TEST_CASE(reset_cause_test, NULL, run_reset_cause_test, NULL, "Confirming Watchdog Reset"); /* Put test case addresses in an array */ DEFINE_TEST_ARRAY(wdt_tests) = { &wdt_early_warning_test, &reset_cause_test, }; /* Define the test suite */ DEFINE_TEST_SUITE(wdt_suite, wdt_tests, "SAM WDT driver test suite"); /* Run all tests in the suite*/ test_suite_run(&wdt_suite); while (1) { /* Intentionally left empty */ } }
/** * \brief Run spinner widget unit tests */ int main (void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; sysclk_init(); board_init(); gfx_mono_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); // Define all the test cases DEFINE_TEST_CASE(single_spinner_spincollection_test, NULL, run_single_spinner_spincollection_test, NULL, "Single spinners in spincollection test"); DEFINE_TEST_CASE(two_spinners_spincollection_test, NULL, run_two_spinners_spincollection_test, NULL, "Two spinners in spincollection test"); DEFINE_TEST_CASE(three_spinners_spincollection_test, NULL, run_three_spinners_spincollection_test, NULL, "Three spinners in spincollection test"); DEFINE_TEST_CASE(cancel_spinner_spincollection_test, NULL, run_cancel_spinner_spincollection_test, NULL, "Cancel spinner choice test"); DEFINE_TEST_CASE(event_back_spincollection_test, NULL, run_event_back_spincollection_test, NULL, "Event back spincollection test"); // Put test case addresses in an array DEFINE_TEST_ARRAY(spinctrl_tests) = { &single_spinner_spincollection_test, &two_spinners_spincollection_test, &three_spinners_spincollection_test, &event_back_spincollection_test, &cancel_spinner_spincollection_test, }; // Define the test suite DEFINE_TEST_SUITE(spinctrl_suite, spinctrl_tests, "Spinner widget with test suite"); // Set up the test data pointer and run all tests in the suite test_suite_run(&spinctrl_suite); while (1) { /* Intentionally left empty. */ } }
int main(void) { system_init(); cdc_uart_init(); test_at25dfx_init(); DEFINE_TEST_CASE(check_presence_test, NULL, run_check_presence_test, NULL, "Testing presence checking"); DEFINE_TEST_CASE(read_write_buffer_test, NULL, run_read_write_buffer_test, NULL, "Testing read and write"); DEFINE_TEST_CASE(erase_test, NULL, run_erase_test, NULL, "Testing chip erase"); DEFINE_TEST_CASE(erase_block_test, NULL, run_erase_block_test, NULL, "Testing block erase"); DEFINE_TEST_CASE(global_sector_protect_test, NULL, run_global_sector_protect_test, NULL, "Testing global sector protect setting"); DEFINE_TEST_CASE(set_get_sector_protect_test, NULL, run_set_get_sector_protect_test, NULL, "Testing sector protect setting and getting"); DEFINE_TEST_CASE(sleep_wake_test, NULL, run_sleep_wake_test, NULL, "Testing sleep and wake"); DEFINE_TEST_ARRAY(at25dfx_tests) = { &check_presence_test, &read_write_buffer_test, &erase_test, &erase_block_test, &global_sector_protect_test, &set_get_sector_protect_test, &sleep_wake_test, }; DEFINE_TEST_SUITE(at25dfx_test_suite, at25dfx_tests, "AT25DFx driver test suite"); test_suite_run(&at25dfx_test_suite); while (true) { /* Intentionally left empty */ } }
int main() { /* USART init values */ const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; // Initialize the board and all the peripheral required sysclk_init(); board_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); #if XMEGA pmic_init(); sleepmgr_init(); #endif DEFINE_TEST_CASE(membag_init_test, NULL, run_membag_init_test, NULL, "Test membag initialization"); DEFINE_TEST_CASE(membag_alloc_test, NULL, run_membag_alloc_test, NULL, "Test membag memory allocation"); DEFINE_TEST_CASE(membag_free_test, NULL, run_membag_free_test, NULL, "Test membag memory freeing"); DEFINE_TEST_CASE(membag_get_test, NULL, run_membag_get_test, NULL, "Test membag get functions"); DEFINE_TEST_CASE(membag_alloc_when_full_test, NULL, run_membag_alloc_when_full_test, NULL, "Test membag allocation when all membags are full"); DEFINE_TEST_CASE(membag_realloc_test, NULL, run_membag_realloc_test, NULL, "Test membag allocation and reallocation"); DEFINE_TEST_ARRAY(membag_tests) = { &membag_init_test, &membag_alloc_test, &membag_free_test, &membag_get_test, &membag_alloc_when_full_test, &membag_realloc_test }; DEFINE_TEST_SUITE(membag_suite, membag_tests, "Common util membag test suite"); test_suite_run(&membag_suite); while (1) { /* Intentionally left blank */ } }
/** * \brief Run MEM2MEM driver unit tests. */ int main(void) { uint32_t i; const usart_serial_options_t uart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .paritytype = CONF_TEST_PARITY }; /* Initialize the system. */ sysclk_init(); board_init(); /* Configure console UART. */ sysclk_enable_peripheral_clock(CONSOLE_UART_ID); stdio_serial_init(CONF_TEST_UART, &uart_serial_options); /* Initialize src buffer */ for (i = 0; i < MEM_SIZE8/2; i ++) { src_mem8[i] = (i % 10) + '0'; } for (;i < MEM_SIZE8; i ++) { src_mem8[i] = (i % ('z'-'a')) + 'a'; } /* Define all the test cases */ DEFINE_TEST_CASE(low_level_test, NULL, run_low_level_transfer_test, NULL, "Low Level APIs data transfer test"); DEFINE_TEST_CASE(transfer_wait_test, NULL, run_transfer_wait_test, NULL, "M2M APIs data transfer wait test"); DEFINE_TEST_CASE(transfer_job_test, NULL, run_transfer_job_test, NULL, "M2M APIs data transfer job test"); /* Put test case addresses in an array */ DEFINE_TEST_ARRAY(mem2mem_tests) = { &low_level_test, &transfer_wait_test, &transfer_job_test }; /* Define the test suite */ DEFINE_TEST_SUITE(mem2mem_suite, mem2mem_tests, "SAM MEM2MEM driver test suite"); /* Run all tests in the test suite */ test_suite_run(&mem2mem_suite); while (1) { /* Busy-wait forever */ } }
/** * \brief Run CRC driver unit tests */ int main (void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; sysclk_init(); board_init(); sleepmgr_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); DEFINE_TEST_CASE(crc_32bit_io_test, NULL, run_32bit_io_test, NULL, "32bit CRC on simulated IO data test"); DEFINE_TEST_CASE(crc_16bit_io_test, NULL, run_16bit_io_test, NULL, "16bit CRC on simulated IO data test"); DEFINE_TEST_CASE(crc_32bit_dma_test, NULL, run_32bit_dma_test, NULL, "32bit CRC DMA data test"); DEFINE_TEST_CASE(crc_16bit_dma_test, NULL, run_16bit_dma_test, NULL, "16bit CRC DMA data test"); DEFINE_TEST_CASE(crc_32bit_flash_range_test, NULL, run_flash_test, NULL, "32bit CRC flash range test"); // Put test case addresses in an array DEFINE_TEST_ARRAY(crc_tests) = { &crc_32bit_io_test, &crc_16bit_io_test, &crc_32bit_dma_test, &crc_16bit_dma_test, &crc_32bit_flash_range_test, }; // Define the test suite DEFINE_TEST_SUITE(crc_suite, crc_tests, "XMEGA CRC driver test suite"); test_suite_run(&crc_suite); while (1) { // Intentionally left blank } }
/** * \brief Run ADC unit tests * * Initializes the clock system, board and serial output, then sets up the * ADC unit test suite and runs it. */ int main(void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; board_init(); sysclk_init(); sleepmgr_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); // Define single ended conversion test cases DEFINE_TEST_CASE(single_ended_12bit_conversion_test, NULL, run_single_ended_12bit_conversion_test, NULL, "Single ended conversion with 12-bit result"); DEFINE_TEST_CASE(single_ended_8bit_conversion_test, NULL, run_single_ended_8bit_conversion_test, NULL, "Single ended conversion with 8-bit result"); // Define differential conversion test cases DEFINE_TEST_CASE(differential_conversion_test, NULL, run_differential_12bit_conversion_test, NULL, "Differential conversion with 12-bit result"); DEFINE_TEST_CASE(differential_conversion_with_gain_test, NULL, run_differential_12bit_with_gain_conversion_test, NULL, "Differential conversion with 12-bit result and gain"); // Put test case addresses in an array DEFINE_TEST_ARRAY(adc_tests) = { &single_ended_12bit_conversion_test, &single_ended_8bit_conversion_test, &differential_conversion_test, &differential_conversion_with_gain_test, }; // Define the test suite DEFINE_TEST_SUITE(adc_suite, adc_tests, "XMEGA ADC driver test suite"); // Run all tests in the suite test_suite_run(&adc_suite); while (1) { // Intentionally left empty. } }
/** * \brief Run DataFlash component unit tests * * Initializes the clock system, board, serial output and DataFlash, then sets * up the DataFlash unit test suite and runs it. */ int main(void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; // Initialize the board and all the peripheral required sysclk_init(); board_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); at45dbx_init(); // Define all the test cases DEFINE_TEST_CASE(memory_check_test, NULL, run_memory_check_test, NULL, "Memory check"); DEFINE_TEST_CASE(byte_access_test, NULL, run_byte_access_test, NULL, "Read/write byte access"); DEFINE_TEST_CASE(sector_access_test, NULL, run_sector_access_test, NULL, "Read/write sector access"); DEFINE_TEST_CASE(multiple_sector_access_test, NULL, run_multiple_sector_access_test, NULL, "Read/write multiple sector access"); DEFINE_TEST_CASE(memory_range_check_test, NULL, run_memory_range_check_test, NULL, "Memory range address check"); // Put test case addresses in an array. DEFINE_TEST_ARRAY(memory_tests) = { &memory_check_test, &byte_access_test, §or_access_test, &multiple_sector_access_test, &memory_range_check_test }; // Define the test suite. DEFINE_TEST_SUITE(memory_suite, memory_tests, "AT45dbx component unit test suite"); // Run all tests in the test suite. test_suite_run(&memory_suite); while (1) { // Intentionally left empty. }; }
/** * \brief Run Common Clock service unit tests * * Initializes board, serial output, then sets up the * clock unit test suite and runs it. */ int main (void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; board_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); //set the low level write function //usart can work only after we call sysclk_init, because the //PBA clock initialized with correct value which used by usart //So, we output the information to one buffer before usart can work. ptr_put = (int (*)(void volatile*,char))&usart_write_char_buf; // Define all the test cases. DEFINE_TEST_CASE(osc_test, NULL, run_osc_test, cleanup_osc_test, "Oscillator0/1 test"); DEFINE_TEST_CASE(osc32_test, NULL, run_osc32_test, cleanup_osc32_test, "32KHz oscillator test"); DEFINE_TEST_CASE(pll_dfll_test, NULL, run_pll_dfll_test, cleanup_pll_dfll_test, "Pll or Dfll test"); DEFINE_TEST_CASE(sync_clock_test, NULL, run_sync_clock_test, NULL, "CPU/HSB, peripheral bridge clock test"); DEFINE_TEST_CASE(generic_clock_test, NULL, run_generic_clock_test, cleanup_generic_clock_test, "Generic clock test"); // Put test case addresses in an array. DEFINE_TEST_ARRAY(clock_tests) = { &osc_test, &osc32_test, &pll_dfll_test, &sync_clock_test, &generic_clock_test, }; // Define the test suite. DEFINE_TEST_SUITE(clock_suite, clock_tests, "Clock service unit test suite"); // Run all tests in the test suite. test_suite_run(&clock_suite); while (true) { __asm__("nop"); }; }