INT32 wmt_plat_i2s_ctrl(ENUM_PIN_STATE state) { #ifndef FM_ANALOG_INPUT switch(state) { case PIN_STA_INIT: case PIN_STA_MUX: /*set to I2S function*/ WMT_DBG_FUNC("WMT-PLAT:I2S init \n"); break; case PIN_STA_IN_L: case PIN_STA_DEINIT: /*set to gpio input low, pull down enable*/ WMT_DBG_FUNC("WMT-PLAT:I2S deinit (out 0) \n"); break; default: WMT_WARN_FUNC("WMT-PLAT:Warnning, invalid state(%d) on I2S Group\n", state); break; } #else WMT_INFO_FUNC( "[MT6620]warnning:FM analog mode is set, no I2S GPIO settings should be modified by combo driver\n"); #endif return 0; }
UINT32 mtk_wcn_consys_hw_osc_en_ctrl(UINT32 en) { if(en) { WMT_INFO_FUNC("enable consys sleep mode(turn off 26M)\n"); CONSYS_REG_WRITE(CONSYS_AP2CONN_OSC_EN_REG, CONSYS_REG_READ(CONSYS_AP2CONN_OSC_EN_REG) & ~CONSYS_AP2CONN_OSC_EN_BIT); }else { WMT_INFO_FUNC("disable consys sleep mode\n"); CONSYS_REG_WRITE(CONSYS_AP2CONN_OSC_EN_REG, CONSYS_REG_READ(CONSYS_AP2CONN_OSC_EN_REG) | CONSYS_AP2CONN_OSC_EN_BIT); } WMT_INFO_FUNC("dump CONSYS_AP2CONN_OSC_EN_REG(0x%x)\n",CONSYS_REG_READ(CONSYS_AP2CONN_OSC_EN_REG)); return 0; }
INT32 wmt_plat_wifi_eint_ctrl(ENUM_PIN_STATE state) { #if 1 switch(state) { case PIN_STA_INIT: break; case PIN_STA_MUX: break; case PIN_STA_EINT_EN: break; case PIN_STA_EINT_DIS: break; case PIN_STA_IN_L: case PIN_STA_DEINIT: /*set to gpio input low, pull down enable*/ break; default: WMT_WARN_FUNC("WMT-PLAT:Warnning, invalid state(%d) on WIFI EINT\n", state); break; } #else WMT_INFO_FUNC("WMT-PLAT:WIFI EINT is controlled by MSDC driver \n"); #endif return 0; }
static void WMT_exit (void) { dev_t dev = MKDEV(gWmtMajor, 0); #if defined(CONFIG_THERMAL) && defined(CONFIG_THERMAL_OPEN) wmt_tm_deinit_rt(); wmt_tm_deinit(); #endif wmt_lib_deinit(); #if CFG_WMT_DBG_SUPPORT wmt_dev_dbg_remove(); #endif cdev_del(&gWmtCdev); unregister_chrdev_region(dev, WMT_DEV_NUM); gWmtMajor = -1; #ifdef MTK_WMT_WAKELOCK_SUPPORT WMT_WARN_FUNC("destroy func_on_off_wake_lock\n"); wake_lock_destroy(&func_on_off_wake_lock); #endif stp_drv_exit(); WMT_INFO_FUNC("done\n"); }
UINT32 mtk_wcn_consys_jtag_flag_ctrl(UINT32 en) { WMT_INFO_FUNC("%s jtag set for MCU\n",en ? "enable" : "disable"); gJtagCtrl = en; return 0; }
INT32 wmt_dbg_sdio_ctrl(INT32 par1, INT32 par2, INT32 par3) { INT32 iRet = -1; iRet = wmt_lib_sdio_ctrl (0 != par2 ? 1 : 0); WMT_INFO_FUNC("ctrl SDIO function %s\n", 0 == iRet ? "succeed" : "failed"); return 0; }
static INT32 wmt_dev_dbg_read(CHAR *page, CHAR **start, off_t off, INT32 count, INT32 *eof, void *data){ INT32 len = 0; if(off > 0){ len = 0; } else { /*len = sprintf(page, "%d\n", g_psm_enable);*/ if ( gCoexBuf.availSize <= 0) { WMT_INFO_FUNC("no data available, please run echo 15 xx > /proc/driver/wmt_psm first\n"); len = osal_sprintf(page, "no data available, please run echo 15 xx > /proc/driver/wmt_psm first\n"); } else { INT32 i = 0; /*we do not check page buffer, because there are only 100 bytes in g_coex_buf, no reason page buffer is not enough, a bomb is placed here on unexpected condition*/ for (i = 0; i < gCoexBuf.availSize; i++) { len += osal_sprintf(page + len, "0x%02x ", gCoexBuf.buffer[i]); } len += osal_sprintf(page + len, "\n"); } } gCoexBuf.availSize = 0; return len; }
INT32 wmt_dbg_wmt_dbg_level(INT32 par1, INT32 par2, INT32 par3) { par2 = (WMT_LOG_ERR <= par2 && WMT_LOG_LOUD >= par2) ? par2 : WMT_LOG_INFO; wmt_lib_dbg_level_set(par2); WMT_INFO_FUNC("set wmt log level to %d\n", par2); return 0; }
INT32 wmt_func_fm_on(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf) { /* return wmt_func_fm_ctrl(FUNC_ON); */ UINT32 ctrlPa1 = 0; UINT32 ctrlPa2 = 0; INT32 iRet = -1; UINT8 co_clock_type = (pConf->co_clock_flag & 0x0f); if (co_clock_type) { if (!osal_test_bit(WMT_GPS_ON, &gGpsFmState)) { ctrlPa1 = FM_PALDO; ctrlPa2 = PALDO_ON; wmt_core_ctrl(WMT_CTRL_SOC_PALDO_CTRL, &ctrlPa1, &ctrlPa2); } else { WMT_INFO_FUNC("LDO VCN28 has been turn on by GPS\n"); } } iRet = wmt_core_func_ctrl_cmd(WMTDRV_TYPE_FM, MTK_WCN_BOOL_TRUE); if (!iRet) { if (co_clock_type) osal_set_bit(WMT_FM_ON, &gGpsFmState); } return iRet; }
INT32 wmt_ctrl_host_baudrate_set(P_WMT_CTRL_DATA pWmtCtrlData) { INT32 iRet = -1; CHAR cmdStr[NAME_MAX + 1] = {0}; UINT32 u4Baudrate = pWmtCtrlData->au4CtrlData[0]; UINT32 u4FlowCtrl = pWmtCtrlData->au4CtrlData[1]; WMT_DBG_FUNC("baud(%d), flowctrl(%d) \n", u4Baudrate, u4FlowCtrl); if (osal_test_bit(WMT_STAT_STP_OPEN, &gDevWmt.state)) { osal_snprintf(cmdStr, NAME_MAX, "baud_%d_%d", u4Baudrate, u4FlowCtrl); iRet = wmt_ctrl_ul_cmd(&gDevWmt, cmdStr); if (iRet) { WMT_WARN_FUNC("CTRL_BAUDRATE baud(%d), flowctrl(%d) fail(%d) \n", u4Baudrate, pWmtCtrlData->au4CtrlData[1], iRet); } else { WMT_DBG_FUNC("CTRL_BAUDRATE baud(%d), flowctrl(%d) ok\n", u4Baudrate, u4FlowCtrl); } } else { WMT_INFO_FUNC("CTRL_BAUDRATE but invalid Handle of WmtStp \n"); } return iRet; }
INT32 wmt_plat_bgf_eint_ctrl ( ENUM_PIN_STATE state ) { #if CFG_WMT_PS_SUPPORT switch(state) { case PIN_STA_INIT: /*set to gpio input low, pull down eanble*/ aml_gpio_input_mtk(MTK_BGF_INT); WMT_DBG_FUNC("WMT-PLAT:BGFInt init(in pd) \n"); break; case PIN_STA_MUX: /*set to EINT mode,interrupt input, pull up enable*/ gpio_set_status(MTK_BGF_INT,gpio_status_in); aml_clr_reg32_mask(P_PAD_PULL_UP_REG4,0x1<<10);//pull up resister gpio_irq_set(MTK_BGF_INT,GPIO_IRQ(mtk_bgf_irq_no,GPIO_IRQ_LOW)); WMT_DBG_FUNC("WMT-PLAT:BGFInt mux (eint) \n"); break; case PIN_STA_IN_L: case PIN_STA_DEINIT: /*first: disable bgf inq wake up host function*/ do { int iret; iret = disable_irq_wake(mtk_bgf_irq_no); if(iret){ WMT_WARN_FUNC("disable_irq_wake(bgf:%d) fail(%d)\n",mtk_bgf_irq_no,iret); iret = 0; } else{ WMT_INFO_FUNC("disable_irq_wake(bgf:%d)--,ret(%d)\n",mtk_bgf_irq_no,iret); } } while (0); /*second: set to gpio input low, pull down eanble*/ //aml_set_reg32_mask(P_PAD_PULL_UP_REG4,0x1<<10); aml_gpio_input_mtk(MTK_BGF_INT); WMT_DBG_FUNC("WMT-PLAT:BGFInt deinit(in pd) \n"); break; default: WMT_WARN_FUNC("WMT-PLAT:Warnning, invalid state(%d) on BGF EINT\n", state); break; } #endif return 0; }
INT32 mtk_wcn_consys_hw_pwr_on(UINT32 co_clock_en) { INT32 iRet = 0; WMT_INFO_FUNC("CONSYS-HW-PWR-ON, start\n"); iRet += mtk_wcn_consys_hw_reg_ctrl(1,co_clock_en); iRet += mtk_wcn_consys_hw_gpio_ctrl(1); #if CONSYS_ENALBE_SET_JTAG if(gJtagCtrl) { mtk_wcn_consys_jtag_set_for_mcu(); } #endif WMT_INFO_FUNC("CONSYS-HW-PWR-ON, finish(%d)\n",iRet); return iRet; }
INT32 mtk_wcn_consys_hw_vcn28_ctrl(UINT32 enable) { if(enable){ /*in co-clock mode,need to turn on vcn28 when fm on*/ #if CONSYS_PMIC_CTRL_ENABLE hwPowerOn(MT6323_POWER_LDO_VCN28,VOL_DEFAULT,"MOD_WMT"); #endif WMT_INFO_FUNC("turn on vcn28 for fm/gps usage in co-clock mode\n"); }else{ /*in co-clock mode,need to turn off vcn28 when fm off*/ #if CONSYS_PMIC_CTRL_ENABLE hwPowerDown(MT6323_POWER_LDO_VCN28,"MOD_WMT"); #endif WMT_INFO_FUNC("turn off vcn28 for fm/gps usage in co-clock mode\n"); } return 0; }
static MTK_WCN_BOOL mtk_wcn_wmt_func_ctrl ( ENUM_WMTDRV_TYPE_T type, ENUM_WMT_OPID_T opId ) { P_OSAL_OP pOp; MTK_WCN_BOOL bRet; P_OSAL_SIGNAL pSignal; pOp = wmt_lib_get_free_op(); if (!pOp) { WMT_WARN_FUNC("get_free_lxop fail\n"); return MTK_WCN_BOOL_FALSE; } pSignal = &pOp->signal; pOp->op.opId = opId; pOp->op.au4OpData[0] = type; pSignal->timeoutValue= (WMT_OPID_FUNC_ON == pOp->op.opId) ? MAX_FUNC_ON_TIME : MAX_FUNC_OFF_TIME; WMT_INFO_FUNC("OPID(%d) type(%d) start\n", pOp->op.opId, pOp->op.au4OpData[0]); /*do not check return value, we will do this either way*/ wmt_lib_host_awake_get(); /*wake up chip first*/ DISABLE_PSM_MONITOR(); bRet = wmt_lib_put_act_op(pOp); ENABLE_PSM_MONITOR(); wmt_lib_host_awake_put(); if (MTK_WCN_BOOL_FALSE == bRet) { WMT_WARN_FUNC("OPID(%d) type(%d) fail\n", pOp->op.opId, pOp->op.au4OpData[0]); } else { WMT_INFO_FUNC("OPID(%d) type(%d) ok\n", pOp->op.opId, pOp->op.au4OpData[0]); } return bRet; }
INT32 wmt_dbg_stp_dbg_level(INT32 par1, INT32 par2, INT32 par3) { par2 = (0 <= par2 && 4 >= par2) ? par2 : 2; mtk_wcn_stp_dbg_level(par2); WMT_INFO_FUNC("set stp log level to %d\n", par2); return 0; }
static void wmt_dev_late_resume(struct early_suspend *h) { WMT_INFO_FUNC("@@@@@@@@@@wmt enter late resume@@@@@@@@@@@@@@\n"); osal_lock_sleepable_lock(&g_es_lr_lock); g_early_suspend_flag = 0; osal_unlock_sleepable_lock(&g_es_lr_lock); mtk_wmt_func_on_background(); }
INT32 wmt_ctrl_rx_flush(P_WMT_CTRL_DATA pWmtCtrlData) { UINT32 type = pWmtCtrlData->au4CtrlData[0]; WMT_INFO_FUNC("flush rx %d queue\n", type); mtk_wcn_stp_flush_rx_queue(type); return 0; }
static INT32 wmt_ctrl_bgw_desense_ctrl(P_WMT_CTRL_DATA pWmtCtrlData) { UINT32 cmd = pWmtCtrlData->au4CtrlData[0]; WMT_INFO_FUNC("wmt-ctrl:send native cmd(%d)\n",cmd); wmt_dev_send_cmd_to_daemon(cmd); return 0; }
INT32 wmt_plat_rtc_ctrl(ENUM_PIN_STATE state) { switch (state) { case PIN_STA_INIT: rtc_gpio_enable_32k(RTC_GPIO_USER_GPS); WMT_DBG_FUNC("WMT-PLAT:RTC init\n"); break; case PIN_STA_SHOW: WMT_INFO_FUNC("WMT-PLAT:RTC PIN_STA_SHOW start\n"); /* TakMan: Temp. solution for building pass. Hongcheng Xia should check with vend_ownen.chen */ /* WMT_INFO_FUNC("WMT-PLAT:RTC Status(%d)\n", rtc_gpio_32k_status()); */ WMT_INFO_FUNC("WMT-PLAT:RTC PIN_STA_SHOW end\n"); break; default: WMT_WARN_FUNC("WMT-PLAT:Warnning, invalid state(%d) on RTC\n", state); break; } return 0; }
static INT32 wmt_ctrl_evt_err_trg_assert(P_WMT_CTRL_DATA pWmtCtrlData) { INT32 iRet = -1; WMT_INFO_FUNC("++\n"); if(0 == mtk_wcn_stp_get_wmt_evt_err_trg_assert()) { mtk_wcn_stp_set_wmt_evt_err_trg_assert(1); iRet = mtk_wcn_stp_wmt_evt_err_trg_assert(); if(iRet) { mtk_wcn_stp_set_wmt_evt_err_trg_assert(0); } }else { WMT_INFO_FUNC("do trigger assert & chip reset in stp noack \n"); } return 0; }
irqreturn_t wmt_plat_bgf_irq_isr(INT32 i,VOID *arg) { #if CFG_WMT_PS_SUPPORT wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_EINT_DIS); wmt_plat_bgf_eirq_cb(); #else WMT_INFO_FUNC("skip irq handing becasue psm is disable"); #endif return IRQ_HANDLED; }
static int wmt_dev_proc_for_aee_read(char *page, char **start, off_t off, int count, int *eof, void *data) { UINT32 len = 0; WMT_INFO_FUNC("wmt-dev:wmt for aee page(%p)off(%d)count(%d)\n", page, off, count); if (off == 0) { pBuf = wmt_lib_get_cpupcr_xml_format(&len); g_buf_len = len; /*pass 3k buffer for each proc read */ passCnt = g_buf_len / WMT_PROC_AEE_SIZE; passCnt = (g_buf_len % WMT_PROC_AEE_SIZE) ? (passCnt + 1) : passCnt; WMT_INFO_FUNC("wmt_dev:wmt for aee buffer len(%d)passCnt(%d)\n", g_buf_len, passCnt); } if (passCnt) { if (g_buf_len > WMT_PROC_AEE_SIZE) { osal_memcpy(page, pBuf, WMT_PROC_AEE_SIZE); *start += WMT_PROC_AEE_SIZE; g_buf_len -= WMT_PROC_AEE_SIZE; pBuf += WMT_PROC_AEE_SIZE; WMT_INFO_FUNC("wmt_dev:after read,wmt for aee buffer len(%d)\n", g_buf_len); *eof = 1; passCnt--; return WMT_PROC_AEE_SIZE; } else { osal_memcpy(page, pBuf, g_buf_len); *start += g_buf_len; len = g_buf_len; g_buf_len = 0; *eof = 1; passCnt--; pBuf += len; return len; } } return len; }
INT32 mtk_wcn_consys_hw_gpio_ctrl (UINT32 on) { INT32 iRet = 0; WMT_INFO_FUNC("CONSYS-HW-GPIO-CTRL(0x%08x), start\n",on); if(on) { /*if external modem used,GPS_SYNC still needed to control*/ iRet += wmt_plat_gpio_ctrl(PIN_GPS_SYNC, PIN_STA_INIT); iRet += wmt_plat_gpio_ctrl(PIN_GPS_LNA, PIN_STA_INIT); iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP,PIN_STA_INIT); /*set EINT< -ommited-> move this to WMT-IC module, where common sdio interface will be identified and do proper operation*/ // TODO: [FixMe][GeorgeKuo] double check if BGF_INT is implemented ok //iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_MUX); iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_INIT); iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_EINT_DIS); WMT_INFO_FUNC("CONSYS-HW, BGF IRQ registered and disabled \n"); }else{ /* set bgf eint/all eint to deinit state, namely input low state*/ iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_EINT_DIS); iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_DEINIT); WMT_INFO_FUNC("CONSYS-HW, BGF IRQ unregistered and disabled\n"); //iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_DEINIT); /*if external modem used,GPS_SYNC still needed to control*/ iRet += wmt_plat_gpio_ctrl(PIN_GPS_SYNC, PIN_STA_DEINIT); iRet += wmt_plat_gpio_ctrl(PIN_I2S_GRP,PIN_STA_DEINIT); /* deinit gps_lna*/ iRet += wmt_plat_gpio_ctrl(PIN_GPS_LNA, PIN_STA_DEINIT); } WMT_INFO_FUNC("CONSYS-HW-GPIO-CTRL(0x%08x), finish\n",on); return iRet; }
INT32 wmt_dbg_psm_ctrl(INT32 par1, INT32 par2, INT32 par3) { #if CFG_WMT_PS_SUPPORT if (0 == par2) { wmt_lib_ps_disable(); WMT_INFO_FUNC("call wmt_lib_psm_disable\n"); } else { par2 = (1 > par2 || 20000 < par2) ? STP_PSM_IDLE_TIME_SLEEP : par2; wmt_lib_ps_set_idle_time(par2); wmt_lib_ps_enable(); WMT_INFO_FUNC("call wmt_lib_psm_enable, idle to sleep time = %d ms\n", par2); } #else WMT_INFO_FUNC("WMT PS not supported\n"); #endif return 0; }
INT32 wmt_plat_uart_ctrl(ENUM_PIN_STATE state) { switch(state) { case PIN_STA_MUX: case PIN_STA_INIT: WMT_INFO_FUNC("WMT-PLAT:UART init (mode_01, uart) \n"); break; case PIN_STA_IN_L: case PIN_STA_DEINIT: WMT_INFO_FUNC("WMT-PLAT:UART deinit (out 0) \n"); break; default: WMT_WARN_FUNC("WMT-PLAT:Warnning, invalid state(%d) on UART Group\n", state); break; } return 0; }
static INT32 mtk_wmt_func_off_background(void) { if (MTK_WCN_BOOL_FALSE == mtk_wcn_wmt_func_off(WMTDRV_TYPE_LPBK)) { WMT_WARN_FUNC("WMT turn off LPBK fail\n"); } else { WMT_INFO_FUNC("WMT turn off LPBK suceed"); } return 0; }
/******************************************************************************* * F U N C T I O N S ******************************************************************************** */ INT32 mtk_wcn_cmb_hw_pwr_off(VOID) { INT32 iRet = 0; WMT_INFO_FUNC("CMB-HW, hw_pwr_off start\n"); /*1. disable irq --> should be done when do wmt-ic swDeinit period*/ /* TODO:[FixMe][GeorgeKuo] clarify this */ /*2. set bgf eint/all eint to deinit state, namely input low state*/ iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_DEINIT); iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_DEINIT); WMT_INFO_FUNC ("CMB-HW, BGF_EINT IRQ unregistered and set BGF_EINT GPIO to correct state!\n"); /* 2.1 set ALL_EINT pin to correct state even it is not used currently */ iRet += wmt_plat_eirq_ctrl(PIN_ALL_EINT, PIN_STA_EINT_DIS); WMT_INFO_FUNC("CMB-HW, ALL_EINT IRQ unregistered and disabled\n"); iRet += wmt_plat_gpio_ctrl(PIN_ALL_EINT, PIN_STA_DEINIT); /* 2.2 deinit gps sync */ iRet += wmt_plat_gpio_ctrl(PIN_GPS_SYNC, PIN_STA_DEINIT); /*3. set audio interface to CMB_STUB_AIF_0, BT PCM OFF, I2S OFF*/ iRet += wmt_plat_audio_ctrl(CMB_STUB_AIF_0, CMB_STUB_AIF_CTRL_DIS); /*4. set control gpio into deinit state, namely input low state*/ iRet += wmt_plat_gpio_ctrl(PIN_SDIO_GRP, PIN_STA_DEINIT); iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_L); iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_L); /*5. set uart tx/rx into deinit state, namely input low state*/ iRet += wmt_plat_gpio_ctrl(PIN_UART_GRP, PIN_STA_DEINIT); /* 6. Last, LDO output low */ iRet += wmt_plat_gpio_ctrl(PIN_LDO, PIN_STA_OUT_L); /*7. deinit gps_lna*/ iRet += wmt_plat_gpio_ctrl(PIN_GPS_LNA, PIN_STA_DEINIT); WMT_INFO_FUNC("CMB-HW, hw_pwr_off finish\n"); return iRet; }
INT32 mtk_wcn_cmb_hw_rst (VOID) { INT32 iRet = 0; WMT_INFO_FUNC("CMB-HW, hw_rst start, eirq should be disabled before this step\n"); /*1. PMU->output low, RST->output low, sleep off stable time*/ iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_L); iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_L); osal_msleep(gPwrSeqTime.offStableTime); /*2. PMU->output high, sleep rst stable time*/ iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_H); osal_msleep(gPwrSeqTime.rstStableTime); /*3. RST->output high, sleep on stable time*/ iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_H); osal_msleep(gPwrSeqTime.onStableTime); WMT_INFO_FUNC("CMB-HW, hw_rst finish, eirq should be enabled after this step\n"); return 0; }
INT32 wmt_dbg_func_ctrl(INT32 par1, INT32 par2, INT32 par3) { if (WMTDRV_TYPE_WMT > par2 || WMTDRV_TYPE_LPBK == par2) { if (0 == par3) { WMT_INFO_FUNC("function off test, type(%d)\n", par2); mtk_wcn_wmt_func_off(par2); } else { WMT_INFO_FUNC("function on test, type(%d)\n", par2); mtk_wcn_wmt_func_on(par2); } } else { WMT_INFO_FUNC("function ctrl test, invalid type(%d)\n", par2); } return 0; }
INT32 mtk_wcn_consys_hw_wifi_paldo_ctrl(UINT32 enable) { if(enable){ /*do WIFI PMIC on,depenency PMIC API ready*/ /*switch WIFI PALDO control from SW mode to HW mode:0x418[14]-->0x1*/ #if CONSYS_PMIC_CTRL_ENABLE hwPowerOn(MT6323_POWER_LDO_VCN33_WIFI,VOL_3300,"MOD_WMT"); upmu_set_vcn33_on_ctrl_wifi(1); #endif WMT_INFO_FUNC("WMT do WIFI PMIC on\n"); }else{ /*do WIFI PMIC off*/ /*switch WIFI PALDO control from HW mode to SW mode:0x418[14]-->0x0*/ #if CONSYS_PMIC_CTRL_ENABLE upmu_set_vcn33_on_ctrl_wifi(0); hwPowerDown(MT6323_POWER_LDO_VCN33_WIFI,"MOD_WMT"); #endif WMT_INFO_FUNC("WMT do WIFI PMIC off\n"); } return 0; }