static INT8 josvolly_8741_r(int num,int offset,int log) { JV8741 *mcu = &i8741[num]; int ret; if(offset==1) { if(mcu->rst) mcu->rxd = (mcu->initReadPort)(0); /* port in */ ret = mcu->sts; #if __log__ if(log) logerror("PC=%04X 8741[%d] SR %02X\n",activecpu_get_pc(),num,ret); #endif } else { /* clear status port */ mcu->sts &= ~0x01; /* RD ready */ ret = mcu->rxd; #if __log__ if(log) logerror("PC=%04X 8741[%d] DR %02X\n",activecpu_get_pc(),num,ret); #endif mcu->rst = 0; } return ret; }
void TTL74181_write( int chip, int startline, int lines, int data ) { int line; struct TTL74181_chip *c; if( chip >= TTL74181_MAX_CHIPS ) { logerror( "%08x: TTL74181_write( %d, %d, %d, %d ) chip out of range\n", activecpu_get_pc(), chip, startline, lines, data ); return; } if( startline + lines > TTL74181_INPUT_TOTAL ) { logerror( "%08x: TTL74181_read( %d, %d, %d, %d ) line out of range\n", activecpu_get_pc(), chip, startline, lines, data ); return; } c = chips[ chip ]; if( c == NULL ) { logerror( "%08x: TTL74181_write( %d, %d, %d, %d ) chip not initialised\n", activecpu_get_pc(), chip, startline, lines, data ); return; } for( line = 0; line < lines; line++ ) { int input = data >> line; if( c->inputs[ startline + line ] != input ) { c->inputs[ startline + line ] = input; c->dirty = 1; } } }
static READ8_HANDLER( r3 ) { int pc = activecpu_get_pc(); if(pc != 0x81cb && pc != 0x90fa && pc != 0x911b && pc != 0x90d3 && pc != 0x90c4) printf("r3 @ %X\n",activecpu_get_pc()); return rand() & ~1; //with 1 jumps back (infinite loop): a status ready for something? }
static READ8_HANDLER( r5 ) { int pc = activecpu_get_pc(); if(pc != 0x81cb) printf("r5 @ %X\n",activecpu_get_pc()); return mame_rand(Machine); }
int TTL74181_read( int chip, int startline, int lines ) { int line; int data; struct TTL74181_chip *c; if( chip >= TTL74181_MAX_CHIPS ) { logerror( "%08x: TTL74181_read( %d, %d, %d ) chip out of range\n", activecpu_get_pc(), chip, startline, lines ); return 0; } if( startline + lines > TTL74181_OUTPUT_TOTAL ) { logerror( "%08x: TTL74181_read( %d, %d, %d ) line out of range\n", activecpu_get_pc(), chip, startline, lines ); return 0; } c = chips[ chip ]; if( c == NULL ) { logerror( "%08x: TTL74181_read( %d, %d, %d ) chip not initialised\n", activecpu_get_pc(), chip, startline, lines ); return 0; } if( c->dirty ) { TTL74181_update( chip ); c->dirty = 0; } data = 0; for( line = 0; line < lines; line++ ) { data |= c->outputs[ startline + line ] << line; } return data; }
static READ8_HANDLER( r1 ) { int pc = activecpu_get_pc(); if(pc != 0x81cb) printf("r1 @ %X\n",activecpu_get_pc()); return rand(); }
unsigned char AYReadReg(int n, int r) { struct AY8910 *PSG = &AYPSG[n]; if (r > 15) return 0; switch (r) { case AY_PORTA: if ((PSG->Regs[AY_ENABLE] & 0x40) != 0) { LOG(("warning: read from 8910 #%d Port A set as output\n",n)); } /* even if the port is set as output, we still need to return the external data. Some games, like kidniki, need this to work. */ if (PSG->PortAread) PSG->Regs[AY_PORTA] = (*PSG->PortAread)(0); else { LOG(("PC %04x: warning - read 8910 #%d Port A\n",activecpu_get_pc(),n)); } break; case AY_PORTB: if ((PSG->Regs[AY_ENABLE] & 0x80) != 0) { LOG(("warning: read from 8910 #%d Port B set as output\n",n)); } if (PSG->PortBread) PSG->Regs[AY_PORTB] = (*PSG->PortBread)(0); else { LOG(("PC %04x: warning - read 8910 #%d Port B\n",activecpu_get_pc(),n)); } break; } return PSG->Regs[r]; }
int ay8910_read_ym(void *chip) { ay8910_context *psg = chip; int r = psg->register_latch; if (r > 15) return 0; switch (r) { case AY_PORTA: if ((psg->regs[AY_ENABLE] & 0x40) != 0) logerror("warning: read from 8910 #%d Port A set as output\n",psg->index); /* even if the port is set as output, we still need to return the external data. Some games, like kidniki, need this to work. */ if (psg->intf->portAread) psg->regs[AY_PORTA] = (*psg->intf->portAread)(Machine, 0); else logerror("PC %04x: warning - read 8910 #%d Port A\n",activecpu_get_pc(),psg->index); break; case AY_PORTB: if ((psg->regs[AY_ENABLE] & 0x80) != 0) logerror("warning: read from 8910 #%d Port B set as output\n",psg->index); if (psg->intf->portBread) psg->regs[AY_PORTB] = (*psg->intf->portBread)(Machine, 0); else logerror("PC %04x: warning - read 8910 #%d Port B\n",activecpu_get_pc(),psg->index); break; } return psg->regs[r]; }
static READ8_HANDLER( popflame_protection_r ) /* Not used by bootleg/hack */ { static const int values[4] = { 0x78, 0x68, 0x48, 0x38|0x80 }; static int count; count = (count + 1) % 4; return values[count]; #if 0 if ( activecpu_get_pc() == (0x26F2 + 0x03) ) { popflame_prot_count = 0; return 0x01; } /* Must not carry when rotated left */ if ( activecpu_get_pc() == (0x26F9 + 0x03) ) return 0x80; /* Must carry when rotated left */ if ( activecpu_get_pc() == (0x270F + 0x03) ) { switch( popflame_prot_count++ ) { case 0: return 0x78; /* x111 1xxx, matches 0x0F at $2690, stored in $400A */ case 1: return 0x68; /* x110 1xxx, matches 0x0D at $2691, stored in $400B */ case 2: return 0x48; /* x100 1xxx, matches 0x09 at $2692, stored in $400C */ case 3: return 0x38; /* x011 1xxx, matches 0x07 at $2693, stored in $400D */ } } logerror("CPU #0 PC %06x: unmapped protection read\n", activecpu_get_pc()); return 0x00; #endif }
// This routine is a big hack, but the only way I can get the game working // without knowing anything about the way the protection chip works. // These values were derived based on disassembly of the code. Usually, it // was pretty obvious what the values should be. Of course, this will have // to change if a different ROM set ever surfaces. static READ_HANDLER( fastfred_custom_io_r ) { switch (activecpu_get_pc()) { case 0x03c0: return 0x9d; case 0x03e6: return 0x9f; case 0x0407: return 0x00; case 0x0446: return 0x94; case 0x049f: return 0x01; case 0x04b1: return 0x00; case 0x0dd2: return 0x00; case 0x0de4: return 0x20; case 0x122b: return 0x10; case 0x123d: return 0x00; case 0x1a83: return 0x10; case 0x1a93: return 0x00; case 0x1b26: return 0x00; case 0x1b37: return 0x80; case 0x2491: return 0x10; case 0x24a2: return 0x00; case 0x46ce: return 0x20; case 0x46df: return 0x00; case 0x7b18: return 0x01; case 0x7b29: return 0x00; case 0x7b47: return 0x00; case 0x7b58: return 0x20; } logerror("Uncaught custom I/O read %04X at %04X\n", 0xc800+offset, activecpu_get_pc()); return 0x00; }
static void galpani2_mcu_nmi(void) { UINT32 mcu_list, mcu_command, mcu_address, mcu_src, mcu_dst, mcu_size; /* "Last Check" */ galpani2_write_kaneko(); for ( mcu_list = 0x100020; mcu_list < (0x100020 + 0x40); mcu_list += 4 ) { mcu_command = cpunum_read_byte(0, mcu_list + 1 ); mcu_address = 0x100000 + (cpunum_read_byte(0, mcu_list + 2)<<8) + (cpunum_read_byte(0, mcu_list + 3)<<0) ; switch (mcu_command) { case 0x00: break; case 0x0a: // Copy N bytes from RAM1 to RAM2 mcu_src = (cpunum_read_byte(0, mcu_address + 2)<<8) + (cpunum_read_byte(0, mcu_address + 3)<<0) ; mcu_dst = (cpunum_read_byte(0, mcu_address + 6)<<8) + (cpunum_read_byte(0, mcu_address + 7)<<0) ; mcu_size = (cpunum_read_byte(0, mcu_address + 8)<<8) + (cpunum_read_byte(0, mcu_address + 9)<<0) ; logerror("CPU #0 PC %06X : MCU executes command $A, %04X %02X-> %04x\n",activecpu_get_pc(),mcu_src,mcu_size,mcu_dst); for( ; mcu_size > 0 ; mcu_size-- ) { mcu_src &= 0xffff; mcu_dst &= 0xffff; cpunum_write_byte(1,0x100000 + mcu_dst,cpunum_read_byte(0,0x100000 + mcu_src)); mcu_src ++; mcu_dst ++; } /* Raise a "job done" flag */ cpunum_write_byte(0,mcu_address+0,0xff); cpunum_write_byte(0,mcu_address+1,0xff); break; default: /* Raise a "job done" flag */ cpunum_write_byte(0,mcu_address+0,0xff); cpunum_write_byte(0,mcu_address+1,0xff); logerror("CPU #0 PC %06X : MCU ERROR, unknown command %02X\n",activecpu_get_pc(),mcu_command); } /* Erase command? */ cpunum_write_byte(0,mcu_list + 1,0x00); } }
static READ32_HANDLER( kinst_speedup_r ) { if (activecpu_get_pc() == 0x88029890 || /* KI */ activecpu_get_pc() == 0x8802c2d0 /* KI2 */) { UINT32 r3 = activecpu_get_reg(MIPS3_R3); UINT32 r26 = activecpu_get_reg(MIPS3_R26) - *kinst_speedup; if (r26 < r3) { timer_set(TIME_IN_CYCLES((r3 - r26) * 2, 0), 0, end_spin); cpu_spinuntil_int(); } } return *kinst_speedup; }
static WRITE_HANDLER( uballoon_pcm_1_bankswitch_w ) { unsigned char *RAM = memory_region(REGION_CPU2); int bank = data & 1; if (bank & ~1) logerror((char *)"CPU#2 PC %06X - ROM bank unknown bits: %02X\n", activecpu_get_pc(), data); cpu_setbank(1, &RAM[bank * 0x10000 + 0x400]); }
static WRITE_HANDLER(u16_w) { static int count; logerror("U16 WRITE @%04x: %02x\n", activecpu_get_pc(), data); u16_addr[count] = data; if (!count) coreGlobals.tmpLampMatrix[8] = data; count = (count + 1) % 2; }
static WRITE_HANDLER( esd16_sound_rombank_w ) { int bank = data & 0xf; if (data != bank) logerror("CPU #1 - PC %04X: unknown bank bits: %02X\n",activecpu_get_pc(),data); if (bank >= 3) bank += 1; cpu_setbank(1, memory_region(REGION_CPU2) + 0x4000 * bank); }
static WRITE16_HANDLER( darius_ioc_w ) { switch (offset) { case 0x00: /* sound interface write */ taitosound_port_w (0, data & 0xff); return; case 0x01: /* sound interface write */ taitosound_comm_w (0, data & 0xff); return; case 0x28: /* unknown, written by both cpus - always 0? */ //usrintf_showmessage(" address %04x value %04x",offset,data); return; case 0x30: /* coin control */ /* bits 7,5,4,0 used on reset */ /* bit 4 used whenever bg is blanked ? */ coin_lockout_w(0, ~data & 0x02); coin_lockout_w(1, ~data & 0x04); coin_counter_w(0, data & 0x08); coin_counter_w(1, data & 0x40); coin_word = data &0xffff; //usrintf_showmessage(" address %04x value %04x",offset,data); return; } logerror("CPU #0 PC %06x: warning - write unmapped ioc offset %06x with %04x\n",activecpu_get_pc(),offset,data); }
static WRITE8_HANDLER( bssoccer_pcm_2_bankswitch_w ) { unsigned char *RAM = memory_region(REGION_CPU4); int bank = data & 7; if (bank & ~7) logerror("CPU#3 PC %06X - ROM bank unknown bits: %02X\n", activecpu_get_pc(), data); memory_set_bankptr(2, &RAM[bank * 0x10000 + 0x1000]); }
static WRITE16_HANDLER( hypr_subcpu_control_w ) { int pc = activecpu_get_pc(); if (data & 0x01) { if (!subcpu_resetline) { if (pc != 0x95f2) { cpunum_set_input_line(1, INPUT_LINE_RESET, ASSERT_LINE); subcpu_resetline = 1; } else { cpunum_set_input_line(1, INPUT_LINE_HALT, ASSERT_LINE); subcpu_resetline = -1; } } } else { if (subcpu_resetline == 1 && (data != 0x0c)) { cpunum_set_input_line(1, INPUT_LINE_RESET, CLEAR_LINE); subcpu_resetline = 0; if (pc == 0xbb0 || pc == 0x9d30 || pc == 0xb19c) cpu_spinuntil_time(ATTOTIME_IN_USEC(15000)); /* sync semaphore */ } else if (subcpu_resetline == -1) { cpunum_set_input_line(1, INPUT_LINE_HALT, CLEAR_LINE); subcpu_resetline = 0; } } }
static READ32_HANDLER( kinst_control_r ) { UINT32 result; /* apply shuffling */ offset = control_map[offset / 2]; result = kinst_control[offset]; switch (offset) { case 2: /* $90 -- sound return */ result = 0xffff0000 | readinputport(offset); result &= ~0x0002; if (dcs_control_r() & 0x800) result |= 0x0002; break; case 0: /* $80 */ case 1: /* $88 */ case 3: /* $98 */ result = 0xffff0000 | readinputport(offset); break; case 4: /* $a0 */ result = 0xffff0000 | readinputport(offset); if (activecpu_get_pc() == 0x802d428) cpu_spinuntil_int(); break; } return result; }
static READ8_HANDLER( unknown_r1 ) { if( activecpu_get_pc() == 0x7e5 ) return 0xaa; else return 0xf4; }
static READ16_HANDLER( sub_cycle_r ) { if (activecpu_get_pc()==0x454) cpu_spinuntil_int(); return superchs_ram[2]&0xffff; }
static READ8_HANDLER( checkmaj_protection_r ) { switch (activecpu_get_pc()) { case 0x0f15: return 0xf5; case 0x0f8f: return 0x7c; case 0x10b3: return 0x7c; case 0x10e0: return 0x00; case 0x10f1: return 0xaa; case 0x1402: return 0xaa; default: logerror("Unknown protection read. PC=%04X\n",activecpu_get_pc()); } return 0; }
static WRITE8_HANDLER( prot_fc44_w ) { logerror("%04x: prot_fc44_w(%02x)\n",activecpu_get_pc(),data); ram[0x0419] = 0x5b; ram[0x041a] = 0x3f; ram[0x041b] = 0x6d; }
static WRITE8_HANDLER( pandoras_int_control_w ){ /* byte 0: irq enable (CPU A) byte 2: coin counter 1 byte 3: coin counter 2 byte 5: flip screen byte 6: irq enable (CPU B) byte 7: NMI to CPU B other bytes unknown */ switch (offset){ case 0x00: if (!data) cpunum_set_input_line(0, M6809_IRQ_LINE, CLEAR_LINE); irq_enable_a = data; break; case 0x02: coin_counter_w(0,data & 0x01); break; case 0x03: coin_counter_w(1,data & 0x01); break; case 0x05: pandoras_flipscreen_w(0, data); break; case 0x06: if (!data) cpunum_set_input_line(1, M6809_IRQ_LINE, CLEAR_LINE); irq_enable_b = data; break; case 0x07: cpunum_set_input_line(1,INPUT_LINE_NMI,PULSE_LINE); break; default: logerror("%04x: (irq_ctrl) write %02x to %02x\n",activecpu_get_pc(), data, offset); } }
static READ8_HANDLER( solomon_0xe603_r ) { if (activecpu_get_pc()==0x161) // all the time .. return 0 to act as before for coin / startup etc. { return 0; } else if (activecpu_get_pc()==0x4cf0) // stop it clearing the screen at certain scores { return (activecpu_get_reg(Z80_BC) & 0x08); } else { mame_printf_debug("unhandled solomon_0xe603_r %04x\n",activecpu_get_pc()); return 0; } }
ADDRESS_MAP_END /*************************************************************************** Z80 #2 & #3 Dumb PCM samples players (e.g they don't even have RAM!) ***************************************************************************/ /*************************************************************************** Back Street Soccer ***************************************************************************/ /* Bank Switching */ static WRITE8_HANDLER( bssoccer_pcm_1_bankswitch_w ) { unsigned char *RAM = memory_region(REGION_CPU3); int bank = data & 7; if (bank & ~7) logerror("CPU#2 PC %06X - ROM bank unknown bits: %02X\n", activecpu_get_pc(), data); memory_set_bankptr(1, &RAM[bank * 0x10000 + 0x1000]); }
static WRITE8_HANDLER( paradise_okibank_w ) { if (data & ~0x02) logerror("CPU #0 - PC %04X: unknown oki bank bits %02X\n",activecpu_get_pc(),data); if (sndti_to_sndnum(SOUND_OKIM6295, 1) >= 0) OKIM6295_set_bank_base(1, (data & 0x02) ? 0x40000 : 0); }
static WRITE32_HANDLER ( a_bus_ctrl_w ) { COMBINE_DATA(&a_bus[offset]); logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",activecpu_get_pc(),offset,data); if(offset == 3) { switch(a_bus[3]) { /*astrass,I need an original test mode screen to compare...*/ case 0x01230000: char_offset = 0; internal_counter = 0; ctrl_index = ((0x400000)/4)-1; break; /*ffreveng*/ case 0x10d70000: ctrl_index = 0; break; case 0x10da0000: ctrl_index = 0; break; /*sss,TRUSTED*/ case 0x2c5b0000: ctrl_index = (0x145ffac/4)-1; break; /*sss,might be offset...*/ case 0x47f10000: ctrl_index = ((0x145ffac+0xbaf0)/4)-1; break; case 0xfcda0000: ctrl_index = ((0x145ffac+0x12fd0)/4)-1; break; case 0xb5e60000: ctrl_index = ((0x145ffac+0x1a4c4)/4)-1; break; case 0x392c0000: ctrl_index = ((0x145ffac+0x219b0)/4)-1; break; case 0x77c30000: ctrl_index = ((0x145ffac+0x28ea0)/4)-1; break; case 0x8a620000: ctrl_index = ((0x145ffac+0x30380)/4)-1; break; /*rsgun*/ case 0x77770000: ctrl_index = 0; break; /*elandore*/ case 0xff7f0000: ctrl_index = ((0x400000)/4)-1; break; case 0xffbf0000: ctrl_index = (0x1c40000/4)-1; break; } } //popmessage("%04x %04x",data,offset/4); }
static READ8_HANDLER( usb_p1_r ) { /* bits 0-6 are inputs and map to bits 0-6 of the input latch */ if ((usb.in_latch & 0x7f) != 0) LOG(("%03X: P1 read = %02X\n", activecpu_get_pc(), usb.in_latch & 0x7f)); return usb.in_latch & 0x7f; }
static READ16_HANDLER( darius_ioc_r ) { switch (offset) { case 0x01: return (taitosound_comm_r(0) & 0xff); /* sound interface read */ case 0x04: return input_port_0_word_r(0,mem_mask); /* IN0 */ case 0x05: return input_port_1_word_r(0,mem_mask); /* IN1 */ case 0x06: return input_port_2_word_r(0,mem_mask); /* IN2 */ case 0x07: return coin_word; /* bits 3&4 coin lockouts, must return zero */ case 0x08: return input_port_3_word_r(0,mem_mask); /* DSW */ } logerror("CPU #0 PC %06x: warning - read unmapped ioc offset %06x\n",activecpu_get_pc(),offset); return 0xff; }