size_t Texture::memory_usage() const
{
auto bpp = bits_per_pixel();
auto bytes = _size.x * _size.y * bpp / 8;
if (_params.filter == TexFilter::Mipmapped) {
bytes = bytes * 4 / 3;
}
return bytes;
}
/**
* When a context is bound for the first time, we can finally finish
* initializing the context's visual and buffer information.
* \param v the XMesaVisual to initialize
* \param b the XMesaBuffer to initialize (may be NULL)
* \param rgb_flag TRUE = RGBA mode, FALSE = color index mode
* \param window the window/pixmap we're rendering into
* \param cmap the colormap associated with the window/pixmap
* \return GL_TRUE=success, GL_FALSE=failure
*/
static GLboolean
initialize_visual_and_buffer(XMesaVisual v, XMesaBuffer b,
GLboolean rgb_flag, Drawable window,
Colormap cmap)
{
ASSERT(!b || b->xm_visual == v);
/* Save true bits/pixel */
v->BitsPerPixel = bits_per_pixel(v);
assert(v->BitsPerPixel > 0);
if (rgb_flag == GL_FALSE) {
/* COLOR-INDEXED WINDOW: not supported*/
return GL_FALSE;
}
else {
/* RGB WINDOW:
* We support RGB rendering into almost any kind of visual.
*/
const int xclass = v->visualType;
if (xclass != GLX_TRUE_COLOR && xclass == !GLX_DIRECT_COLOR) {
_mesa_warning(NULL,
"XMesa: RGB mode rendering not supported in given visual.\n");
return GL_FALSE;
}
v->mesa_visual.indexBits = 0;
if (v->BitsPerPixel == 32) {
/* We use XImages for all front/back buffers. If an X Window or
* X Pixmap is 32bpp, there's no guarantee that the alpha channel
* will be preserved. For XImages we're in luck.
*/
v->mesa_visual.alphaBits = 8;
}
}
/*
* If MESA_INFO env var is set print out some debugging info
* which can help Brian figure out what's going on when a user
* reports bugs.
*/
if (_mesa_getenv("MESA_INFO")) {
printf("X/Mesa visual = %p\n", (void *) v);
printf("X/Mesa level = %d\n", v->mesa_visual.level);
printf("X/Mesa depth = %d\n", v->visinfo->depth);
printf("X/Mesa bits per pixel = %d\n", v->BitsPerPixel);
}
return GL_TRUE;
}
static int ldb_disp_init(struct mxc_dispdrv_handle *disp,
struct mxc_dispdrv_setting *setting)
{
int ret = 0, i;
struct ldb_data *ldb = mxc_dispdrv_getdata(disp);
struct fsl_mxc_ldb_platform_data *plat_data = ldb->pdev->dev.platform_data;
struct resource *res;
uint32_t base_addr;
uint32_t reg, setting_idx;
uint32_t ch_mask = 0, ch_val = 0;
uint32_t ipu_id, disp_id;
/* if input format not valid, make RGB666 as default*/
if (!valid_mode(setting->if_fmt)) {
dev_warn(&ldb->pdev->dev, "Input pixel format not valid"
" use default RGB666\n");
setting->if_fmt = IPU_PIX_FMT_RGB666;
}
if (!ldb->inited) {
char di_clk[] = "ipu1_di0_clk";
char ldb_clk[] = "ldb_di0_clk";
int lvds_channel = 0;
setting_idx = 0;
res = platform_get_resource(ldb->pdev, IORESOURCE_MEM, 0);
if (IS_ERR(res))
return -ENOMEM;
base_addr = res->start;
ldb->reg = ioremap(base_addr, res->end - res->start + 1);
ldb->control_reg = ldb->reg + 2;
ldb->gpr3_reg = ldb->reg + 3;
ldb->lvds_bg_reg = regulator_get(&ldb->pdev->dev, plat_data->lvds_bg_reg);
if (!IS_ERR(ldb->lvds_bg_reg)) {
regulator_set_voltage(ldb->lvds_bg_reg, 2500000, 2500000);
regulator_enable(ldb->lvds_bg_reg);
}
/* ipu selected by platform data setting */
setting->dev_id = plat_data->ipu_id;
reg = readl(ldb->control_reg);
/* refrence resistor select */
reg &= ~LDB_BGREF_RMODE_MASK;
if (plat_data->ext_ref)
reg |= LDB_BGREF_RMODE_EXT;
else
reg |= LDB_BGREF_RMODE_INT;
/* TODO: now only use SPWG data mapping for both channel */
reg &= ~(LDB_BIT_MAP_CH0_MASK | LDB_BIT_MAP_CH1_MASK);
reg |= LDB_BIT_MAP_CH0_SPWG | LDB_BIT_MAP_CH1_SPWG;
/* channel mode setting */
reg &= ~(LDB_CH0_MODE_MASK | LDB_CH1_MODE_MASK);
reg &= ~(LDB_DATA_WIDTH_CH0_MASK | LDB_DATA_WIDTH_CH1_MASK);
if (bits_per_pixel(setting->if_fmt) == 24)
reg |= LDB_DATA_WIDTH_CH0_24 | LDB_DATA_WIDTH_CH1_24;
else
reg |= LDB_DATA_WIDTH_CH0_18 | LDB_DATA_WIDTH_CH1_18;
if (g_ldb_mode)
ldb->mode = g_ldb_mode;
else
ldb->mode = plat_data->mode;
if ((ldb->mode == LDB_SIN0) || (ldb->mode == LDB_SIN1)) {
ret = ldb->mode - LDB_SIN0;
if (plat_data->disp_id != ret) {
dev_warn(&ldb->pdev->dev,
"change IPU DI%d to IPU DI%d for LDB "
"channel%d.\n",
plat_data->disp_id, ret, ret);
plat_data->disp_id = ret;
}
} else if (((ldb->mode == LDB_SEP0) || (ldb->mode == LDB_SEP1))
&& (cpu_is_mx6q() || cpu_is_mx6dl())) {
if (plat_data->disp_id == plat_data->sec_disp_id) {
dev_err(&ldb->pdev->dev,
"For LVDS separate mode,"
"two DIs should be different!\n");
return -EINVAL;
}
if (((!plat_data->disp_id) && (ldb->mode == LDB_SEP1))
|| ((plat_data->disp_id) &&
(ldb->mode == LDB_SEP0))) {
dev_dbg(&ldb->pdev->dev,
"LVDS separate mode:"
"swap DI configuration!\n");
ipu_id = plat_data->ipu_id;
disp_id = plat_data->disp_id;
plat_data->ipu_id = plat_data->sec_ipu_id;
plat_data->disp_id = plat_data->sec_disp_id;
plat_data->sec_ipu_id = ipu_id;
plat_data->sec_disp_id = disp_id;
}
}
if (ldb->mode == LDB_SPL_DI0) {
reg |= LDB_SPLIT_MODE_EN | LDB_CH0_MODE_EN_TO_DI0
| LDB_CH1_MODE_EN_TO_DI0;
setting->disp_id = 0;
} else if (ldb->mode == LDB_SPL_DI1) {
reg |= LDB_SPLIT_MODE_EN | LDB_CH0_MODE_EN_TO_DI1
| LDB_CH1_MODE_EN_TO_DI1;
setting->disp_id = 1;
} else if (ldb->mode == LDB_DUL_DI0) {
reg &= ~LDB_SPLIT_MODE_EN;
reg |= LDB_CH0_MODE_EN_TO_DI0 | LDB_CH1_MODE_EN_TO_DI0;
setting->disp_id = 0;
} else if (ldb->mode == LDB_DUL_DI1) {
reg &= ~LDB_SPLIT_MODE_EN;
reg |= LDB_CH0_MODE_EN_TO_DI1 | LDB_CH1_MODE_EN_TO_DI1;
setting->disp_id = 1;
} else if (ldb->mode == LDB_SIN0) {
reg &= ~LDB_SPLIT_MODE_EN;
setting->disp_id = plat_data->disp_id;
if (setting->disp_id == 0)
reg |= LDB_CH0_MODE_EN_TO_DI0;
else
reg |= LDB_CH0_MODE_EN_TO_DI1;
ch_mask = LDB_CH0_MODE_MASK;
ch_val = reg & LDB_CH0_MODE_MASK;
} else if (ldb->mode == LDB_SIN1) {
reg &= ~LDB_SPLIT_MODE_EN;
setting->disp_id = plat_data->disp_id;
if (setting->disp_id == 0)
reg |= LDB_CH1_MODE_EN_TO_DI0;
else
reg |= LDB_CH1_MODE_EN_TO_DI1;
ch_mask = LDB_CH1_MODE_MASK;
ch_val = reg & LDB_CH1_MODE_MASK;
} else { /* separate mode*/
setting->disp_id = plat_data->disp_id;
/* first output is LVDS0 or LVDS1 */
if (ldb->mode == LDB_SEP0)
lvds_channel = 0;
else
lvds_channel = 1;
reg &= ~LDB_SPLIT_MODE_EN;
if ((lvds_channel == 0) && (setting->disp_id == 0))
reg |= LDB_CH0_MODE_EN_TO_DI0;
else if ((lvds_channel == 0) && (setting->disp_id == 1))
reg |= LDB_CH0_MODE_EN_TO_DI1;
else if ((lvds_channel == 1) && (setting->disp_id == 0))
reg |= LDB_CH1_MODE_EN_TO_DI0;
else
reg |= LDB_CH1_MODE_EN_TO_DI1;
ch_mask = lvds_channel ? LDB_CH1_MODE_MASK :
LDB_CH0_MODE_MASK;
ch_val = reg & ch_mask;
if (bits_per_pixel(setting->if_fmt) == 24) {
if (lvds_channel == 0)
reg &= ~LDB_DATA_WIDTH_CH1_24;
else
reg &= ~LDB_DATA_WIDTH_CH0_24;
} else {
if (lvds_channel == 0)
reg &= ~LDB_DATA_WIDTH_CH1_18;
else
reg &= ~LDB_DATA_WIDTH_CH0_18;
}
}
writel(reg, ldb->control_reg);
if (ldb->mode < LDB_SIN0) {
ch_mask = LDB_CH0_MODE_MASK | LDB_CH1_MODE_MASK;
ch_val = reg & (LDB_CH0_MODE_MASK | LDB_CH1_MODE_MASK);
}
/* clock setting */
if ((cpu_is_mx6q() || cpu_is_mx6dl()) &&
((ldb->mode == LDB_SEP0) || (ldb->mode == LDB_SEP1)))
ldb_clk[6] += lvds_channel;
else
ldb_clk[6] += setting->disp_id;
ldb->setting[setting_idx].ldb_di_clk = clk_get(&ldb->pdev->dev,
ldb_clk);
if (IS_ERR(ldb->setting[setting_idx].ldb_di_clk)) {
dev_err(&ldb->pdev->dev, "get ldb clk0 failed\n");
iounmap(ldb->reg);
return PTR_ERR(ldb->setting[setting_idx].ldb_di_clk);
}
di_clk[3] += setting->dev_id;
di_clk[7] += setting->disp_id;
ldb->setting[setting_idx].di_clk = clk_get(&ldb->pdev->dev,
di_clk);
if (IS_ERR(ldb->setting[setting_idx].di_clk)) {
dev_err(&ldb->pdev->dev, "get di clk0 failed\n");
iounmap(ldb->reg);
return PTR_ERR(ldb->setting[setting_idx].di_clk);
}
dev_dbg(&ldb->pdev->dev, "ldb_clk to di clk: %s -> %s\n", ldb_clk, di_clk);
/* fb notifier for clk setting */
ldb->nb.notifier_call = ldb_fb_event,
ret = fb_register_client(&ldb->nb);
if (ret < 0) {
iounmap(ldb->reg);
return ret;
}
ldb->inited = true;
} else { /* second time for separate mode */
char di_clk[] = "ipu1_di0_clk";
char ldb_clk[] = "ldb_di0_clk";
int lvds_channel;
if ((ldb->mode == LDB_SPL_DI0) ||
(ldb->mode == LDB_SPL_DI1) ||
(ldb->mode == LDB_DUL_DI0) ||
(ldb->mode == LDB_DUL_DI1) ||
(ldb->mode == LDB_SIN0) ||
(ldb->mode == LDB_SIN1)) {
dev_err(&ldb->pdev->dev, "for second ldb disp"
"ldb mode should in separate mode\n");
return -EINVAL;
}
setting_idx = 1;
if (cpu_is_mx6q() || cpu_is_mx6dl()) {
setting->dev_id = plat_data->sec_ipu_id;
setting->disp_id = plat_data->sec_disp_id;
} else {
setting->dev_id = plat_data->ipu_id;
setting->disp_id = !plat_data->disp_id;
}
if (setting->disp_id == ldb->setting[0].di) {
dev_err(&ldb->pdev->dev, "Err: for second ldb disp in"
"separate mode, DI should be different!\n");
return -EINVAL;
}
/* second output is LVDS0 or LVDS1 */
if (ldb->mode == LDB_SEP0)
lvds_channel = 1;
else
lvds_channel = 0;
reg = readl(ldb->control_reg);
if ((lvds_channel == 0) && (setting->disp_id == 0))
reg |= LDB_CH0_MODE_EN_TO_DI0;
else if ((lvds_channel == 0) && (setting->disp_id == 1))
reg |= LDB_CH0_MODE_EN_TO_DI1;
else if ((lvds_channel == 1) && (setting->disp_id == 0))
reg |= LDB_CH1_MODE_EN_TO_DI0;
else
reg |= LDB_CH1_MODE_EN_TO_DI1;
ch_mask = lvds_channel ? LDB_CH1_MODE_MASK :
LDB_CH0_MODE_MASK;
ch_val = reg & ch_mask;
if (bits_per_pixel(setting->if_fmt) == 24) {
if (lvds_channel == 0)
reg |= LDB_DATA_WIDTH_CH0_24;
else
reg |= LDB_DATA_WIDTH_CH1_24;
} else {
if (lvds_channel == 0)
reg |= LDB_DATA_WIDTH_CH0_18;
else
reg |= LDB_DATA_WIDTH_CH1_18;
}
writel(reg, ldb->control_reg);
/* clock setting */
if (cpu_is_mx6q() || cpu_is_mx6dl())
ldb_clk[6] += lvds_channel;
else
ldb_clk[6] += setting->disp_id;
ldb->setting[setting_idx].ldb_di_clk = clk_get(&ldb->pdev->dev,
ldb_clk);
if (IS_ERR(ldb->setting[setting_idx].ldb_di_clk)) {
dev_err(&ldb->pdev->dev, "get ldb clk1 failed\n");
return PTR_ERR(ldb->setting[setting_idx].ldb_di_clk);
}
di_clk[3] += setting->dev_id;
di_clk[7] += setting->disp_id;
ldb->setting[setting_idx].di_clk = clk_get(&ldb->pdev->dev,
di_clk);
if (IS_ERR(ldb->setting[setting_idx].di_clk)) {
dev_err(&ldb->pdev->dev, "get di clk1 failed\n");
return PTR_ERR(ldb->setting[setting_idx].di_clk);
}
dev_dbg(&ldb->pdev->dev, "ldb_clk to di clk: %s -> %s\n", ldb_clk, di_clk);
}
ldb->setting[setting_idx].ch_mask = ch_mask;
ldb->setting[setting_idx].ch_val = ch_val;
if (cpu_is_mx6q() || cpu_is_mx6dl())
ldb_ipu_ldb_route(setting->dev_id, setting->disp_id, ldb);
/*
* ldb_di0_clk -> ipux_di0_clk
* ldb_di1_clk -> ipux_di1_clk
*/
clk_set_parent(ldb->setting[setting_idx].di_clk,
ldb->setting[setting_idx].ldb_di_clk);
/* must use spec video mode defined by driver */
ret = fb_find_mode(&setting->fbi->var, setting->fbi, setting->dft_mode_str,
ldb_modedb, ldb_modedb_sz, NULL, setting->default_bpp);
if (ret != 1)
fb_videomode_to_var(&setting->fbi->var, &ldb_modedb[0]);
INIT_LIST_HEAD(&setting->fbi->modelist);
for (i = 0; i < ldb_modedb_sz; i++) {
struct fb_videomode m;
fb_var_to_videomode(&m, &setting->fbi->var);
if (fb_mode_is_equal(&m, &ldb_modedb[i])) {
fb_add_videomode(&ldb_modedb[i],
&setting->fbi->modelist);
break;
}
}
/* save current ldb setting for fb notifier */
ldb->setting[setting_idx].active = true;
ldb->setting[setting_idx].ipu = setting->dev_id;
ldb->setting[setting_idx].di = setting->disp_id;
return ret;
}
/*!
* This function is called by the driver framework to initialize the LDB
* device.
*
* @param dev The device structure for the LDB passed in by the
* driver framework.
*
* @return Returns 0 on success or negative error code on error
*/
static int ldb_probe(struct platform_device *pdev)
{
int ret = 0, i, ipu_di, ipu_di_pix_fmt[2];
bool primary = false, find_1080p = false;
struct resource *res;
struct ldb_platform_data *plat_data = pdev->dev.platform_data;
mm_segment_t old_fs;
struct clk *ldb_clk_parent;
unsigned long ldb_clk_prate = 455000000;
struct fb_var_screeninfo *var[2];
uint32_t reg;
struct device *temp;
int mxc_ldb_major;
const struct fb_videomode *mode;
struct class *mxc_ldb_class;
if (g_enable_ldb == false)
return -ENODEV;
spin_lock_init(&ldb_lock);
g_ldb_dev = &pdev->dev;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (IS_ERR(res))
return -ENODEV;
memset(&ldb, 0, sizeof(struct ldb_data));
enabled[0] = enabled[1] = false;
var[0] = var[1] = NULL;
if (g_boot_cmd) {
ldb.chan_mode_opt = g_chan_mode_opt;
ldb.chan_bit_map[0] = g_chan_bit_map[0];
ldb.chan_bit_map[1] = g_chan_bit_map[1];
}
ldb.base_addr = res->start;
ldb_reg = ioremap(ldb.base_addr, res->end - res->start + 1);
ldb.control_reg = ldb_reg + 2;
INIT_LIST_HEAD(&ldb.modelist);
for (i = 0; i < mxcfb_ldb_modedb_sz; i++)
fb_add_videomode(&mxcfb_ldb_modedb[i], &ldb.modelist);
for (i = 0; i < num_registered_fb; i++) {
if ((registered_fb[i]->var.sync & FB_SYNC_EXT) &&
(registered_fb[i]->var.vmode == FB_VMODE_NONINTERLACED)) {
ldb.fbi[i] = registered_fb[i];
mode = fb_match_mode(&ldb.fbi[i]->var, &ldb.modelist);
if (mode) {
dev_dbg(g_ldb_dev, "fb mode found\n");
fb_videomode_to_var(&ldb.fbi[i]->var, mode);
} else {
dev_warn(g_ldb_dev,
"can't find video mode\n");
goto err0;
}
/*
* Default ldb mode:
* 1080p: DI0 split, SPWG or DI1 split, SPWG
* others: single, SPWG
*/
if (g_boot_cmd == false) {
if (fb_mode_is_equal(mode, &mxcfb_ldb_modedb[0])) {
if (strcmp(ldb.fbi[i]->fix.id,
"DISP3 BG") == 0) {
ldb.chan_mode_opt = LDB_SPL_DI0;
dev_warn(g_ldb_dev,
"default di0 split mode\n");
} else if (strcmp(ldb.fbi[i]->fix.id,
"DISP3 BG - DI1") == 0) {
ldb.chan_mode_opt = LDB_SPL_DI1;
dev_warn(g_ldb_dev,
"default di1 split mode\n");
}
ldb.chan_bit_map[0] = LDB_BIT_MAP_SPWG;
ldb.chan_bit_map[1] = LDB_BIT_MAP_SPWG;
find_1080p = true;
} else if (!find_1080p) {
if (strcmp(ldb.fbi[i]->fix.id,
"DISP3 BG") == 0) {
ldb.chan_mode_opt = LDB_SIN_DI0;
ldb.chan_bit_map[0] = LDB_BIT_MAP_SPWG;
dev_warn(g_ldb_dev,
"default di0 single mode\n");
} else if (strcmp(ldb.fbi[i]->fix.id,
"DISP3 BG - DI1") == 0) {
ldb.chan_mode_opt = LDB_SIN_DI1;
ldb.chan_bit_map[1] = LDB_BIT_MAP_SPWG;
dev_warn(g_ldb_dev,
"default di1 single mode\n");
}
}
}
acquire_console_sem();
fb_blank(ldb.fbi[i], FB_BLANK_POWERDOWN);
release_console_sem();
if (i == 0)
primary = true;
if (ldb.fbi[1] != NULL)
break;
}
}
/*
* We cannot support two LVDS panel with different pixel clock rates
* except that one's pixel clock rate is two times of the others'.
*/
if (ldb.fbi[1] && ldb.fbi[0] != NULL) {
if (ldb.fbi[0]->var.pixclock != ldb.fbi[1]->var.pixclock &&
ldb.fbi[0]->var.pixclock != 2 * ldb.fbi[1]->var.pixclock &&
ldb.fbi[1]->var.pixclock != 2 * ldb.fbi[0]->var.pixclock)
return -EINVAL;
}
ldb.bgref_rmode = plat_data->ext_ref;
ldb.lvds_bg_reg = regulator_get(&pdev->dev, plat_data->lvds_bg_reg);
if (!IS_ERR(ldb.lvds_bg_reg)) {
regulator_set_voltage(ldb.lvds_bg_reg, 2500000, 2500000);
regulator_enable(ldb.lvds_bg_reg);
}
for (i = 0; i < 2; i++) {
if (ldb.fbi[i] != NULL) {
if (strcmp(ldb.fbi[i]->fix.id, "DISP3 BG") == 0)
ipu_di = 0;
else if (strcmp(ldb.fbi[i]->fix.id, "DISP3 BG - DI1")
== 0)
ipu_di = 1;
else {
dev_err(g_ldb_dev, "Wrong framebuffer\n");
goto err0;
}
var[ipu_di] = &ldb.fbi[i]->var;
if (ldb.fbi[i]->fbops->fb_ioctl) {
old_fs = get_fs();
set_fs(KERNEL_DS);
ldb.fbi[i]->fbops->fb_ioctl(ldb.fbi[i],
MXCFB_GET_DIFMT,
(unsigned long)&(ipu_di_pix_fmt[ipu_di]));
set_fs(old_fs);
} else {
dev_err(g_ldb_dev, "Can't get framebuffer "
"information\n");
goto err0;
}
if (!valid_mode(ipu_di_pix_fmt[ipu_di])) {
dev_err(g_ldb_dev, "Unsupport pixel format "
"for ldb input\n");
goto err0;
}
reg = __raw_readl(ldb.control_reg);
if (var[ipu_di]->sync & FB_SYNC_VERT_HIGH_ACT) {
if (ipu_di == 0)
__raw_writel((reg &
~LDB_DI0_VS_POL_MASK) |
LDB_DI0_VS_POL_ACT_HIGH,
ldb.control_reg);
else
__raw_writel((reg &
~LDB_DI1_VS_POL_MASK) |
LDB_DI1_VS_POL_ACT_HIGH,
ldb.control_reg);
} else {
if (ipu_di == 0)
__raw_writel((reg &
~LDB_DI0_VS_POL_MASK) |
LDB_DI0_VS_POL_ACT_LOW,
ldb.control_reg);
else
__raw_writel((reg &
~LDB_DI1_VS_POL_MASK) |
LDB_DI1_VS_POL_ACT_LOW,
ldb.control_reg);
}
/* TODO:Set the correct pll4 rate for all situations */
if (ipu_di == 1) {
ldb.ldb_di_clk[1] =
clk_get(&pdev->dev, "ldb_di1_clk");
ldb_clk_parent =
clk_get_parent(ldb.ldb_di_clk[1]);
clk_set_rate(ldb_clk_parent, ldb_clk_prate);
clk_put(ldb.ldb_di_clk[1]);
} else {
ldb.ldb_di_clk[0] =
clk_get(&pdev->dev, "ldb_di0_clk");
ldb_clk_parent =
clk_get_parent(ldb.ldb_di_clk[0]);
clk_set_rate(ldb_clk_parent, ldb_clk_prate);
clk_put(ldb.ldb_di_clk[0]);
}
}
}
reg = __raw_readl(ldb.control_reg);
if (ldb.bgref_rmode == LDB_EXT_REF)
__raw_writel((reg & ~LDB_BGREF_RMODE_MASK) |
LDB_BGREF_RMODE_EXT, ldb.control_reg);
else
__raw_writel((reg & ~LDB_BGREF_RMODE_MASK) |
LDB_BGREF_RMODE_INT, ldb.control_reg);
switch (ldb.chan_mode_opt) {
case LDB_SIN_DI0:
if (var[0] == NULL) {
dev_err(g_ldb_dev, "Can't find framebuffer on DI0\n");
break;
}
reg = __raw_readl(ldb.control_reg);
if (bits_per_pixel(ipu_di_pix_fmt[0]) == 24)
__raw_writel((reg & ~LDB_DATA_WIDTH_CH0_MASK) |
LDB_DATA_WIDTH_CH0_24,
ldb.control_reg);
else if (bits_per_pixel(ipu_di_pix_fmt[0]) == 18)
__raw_writel((reg & ~LDB_DATA_WIDTH_CH0_MASK) |
LDB_DATA_WIDTH_CH0_18,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_bit_map[0] == LDB_BIT_MAP_SPWG)
__raw_writel((reg & ~LDB_BIT_MAP_CH0_MASK) |
LDB_BIT_MAP_CH0_SPWG,
ldb.control_reg);
else
__raw_writel((reg & ~LDB_BIT_MAP_CH0_MASK) |
LDB_BIT_MAP_CH0_JEIDA,
ldb.control_reg);
ldb.ldb_di_clk[0] = clk_get(NULL, "ldb_di0_clk");
clk_set_rate(ldb.ldb_di_clk[0], ldb_clk_prate/7);
clk_enable(ldb.ldb_di_clk[0]);
clk_put(ldb.ldb_di_clk[0]);
reg = __raw_readl(ldb.control_reg);
__raw_writel((reg & ~LDB_CH0_MODE_MASK) |
LDB_CH0_MODE_EN_TO_DI0, ldb.control_reg);
ldb.ch_working[0] = true;
break;
case LDB_SIN_DI1:
if (var[1] == NULL) {
dev_err(g_ldb_dev, "Can't find framebuffer on DI1\n");
break;
}
reg = __raw_readl(ldb.control_reg);
if (bits_per_pixel(ipu_di_pix_fmt[1]) == 24)
__raw_writel((reg & ~LDB_DATA_WIDTH_CH1_MASK) |
LDB_DATA_WIDTH_CH1_24,
ldb.control_reg);
else if (bits_per_pixel(ipu_di_pix_fmt[1]) == 18)
__raw_writel((reg & ~LDB_DATA_WIDTH_CH1_MASK) |
LDB_DATA_WIDTH_CH1_18,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_bit_map[1] == LDB_BIT_MAP_SPWG)
__raw_writel((reg & ~LDB_BIT_MAP_CH1_MASK) |
LDB_BIT_MAP_CH1_SPWG,
ldb.control_reg);
else
__raw_writel((reg & ~LDB_BIT_MAP_CH1_MASK) |
LDB_BIT_MAP_CH1_JEIDA,
ldb.control_reg);
ldb.ldb_di_clk[1] = clk_get(NULL, "ldb_di1_clk");
clk_set_rate(ldb.ldb_di_clk[1], ldb_clk_prate/7);
clk_enable(ldb.ldb_di_clk[1]);
clk_put(ldb.ldb_di_clk[1]);
reg = __raw_readl(ldb.control_reg);
__raw_writel((reg & ~LDB_CH1_MODE_MASK) |
LDB_CH1_MODE_EN_TO_DI1, ldb.control_reg);
ldb.ch_working[1] = true;
break;
case LDB_SEP:
if (var[0] == NULL || var[1] == NULL) {
dev_err(g_ldb_dev, "Can't find framebuffers on DI0/1\n");
break;
}
reg = __raw_readl(ldb.control_reg);
if (bits_per_pixel(ipu_di_pix_fmt[0]) == 24)
__raw_writel((reg & ~LDB_DATA_WIDTH_CH0_MASK) |
LDB_DATA_WIDTH_CH0_24,
ldb.control_reg);
else if (bits_per_pixel(ipu_di_pix_fmt[0]) == 18)
__raw_writel((reg & ~LDB_DATA_WIDTH_CH0_MASK) |
LDB_DATA_WIDTH_CH0_18,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (bits_per_pixel(ipu_di_pix_fmt[1]) == 24)
__raw_writel((reg & ~LDB_DATA_WIDTH_CH1_MASK) |
LDB_DATA_WIDTH_CH1_24,
ldb.control_reg);
else if (bits_per_pixel(ipu_di_pix_fmt[1]) == 18)
__raw_writel((reg & ~LDB_DATA_WIDTH_CH1_MASK) |
LDB_DATA_WIDTH_CH1_18,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_bit_map[0] == LDB_BIT_MAP_SPWG)
__raw_writel((reg & ~LDB_BIT_MAP_CH0_MASK) |
LDB_BIT_MAP_CH0_SPWG,
ldb.control_reg);
else
__raw_writel((reg & ~LDB_BIT_MAP_CH0_MASK) |
LDB_BIT_MAP_CH0_JEIDA,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_bit_map[1] == LDB_BIT_MAP_SPWG)
__raw_writel((reg & ~LDB_BIT_MAP_CH1_MASK) |
LDB_BIT_MAP_CH1_SPWG,
ldb.control_reg);
else
__raw_writel((reg & ~LDB_BIT_MAP_CH1_MASK) |
LDB_BIT_MAP_CH1_JEIDA,
ldb.control_reg);
ldb.ldb_di_clk[0] = clk_get(NULL, "ldb_di0_clk");
clk_set_rate(ldb.ldb_di_clk[0], ldb_clk_prate/7);
clk_enable(ldb.ldb_di_clk[0]);
clk_put(ldb.ldb_di_clk[0]);
ldb.ldb_di_clk[1] = clk_get(NULL, "ldb_di1_clk");
clk_set_rate(ldb.ldb_di_clk[1], ldb_clk_prate/7);
clk_enable(ldb.ldb_di_clk[1]);
clk_put(ldb.ldb_di_clk[1]);
reg = __raw_readl(ldb.control_reg);
__raw_writel((reg & ~(LDB_CH0_MODE_MASK |
LDB_CH1_MODE_MASK)) |
LDB_CH0_MODE_EN_TO_DI0 |
LDB_CH1_MODE_EN_TO_DI1, ldb.control_reg);
ldb.ch_working[0] = true;
ldb.ch_working[1] = true;
break;
case LDB_DUL_DI0:
case LDB_SPL_DI0:
if (var[0] == NULL) {
dev_err(g_ldb_dev, "Can't find framebuffer on DI0\n");
break;
}
reg = __raw_readl(ldb.control_reg);
if (bits_per_pixel(ipu_di_pix_fmt[0]) == 24)
__raw_writel((reg & ~(LDB_DATA_WIDTH_CH0_MASK |
LDB_DATA_WIDTH_CH1_MASK)) |
LDB_DATA_WIDTH_CH0_24 |
LDB_DATA_WIDTH_CH1_24,
ldb.control_reg);
else if (bits_per_pixel(ipu_di_pix_fmt[0]) == 18)
__raw_writel((reg & ~(LDB_DATA_WIDTH_CH0_MASK |
LDB_DATA_WIDTH_CH1_MASK)) |
LDB_DATA_WIDTH_CH0_18 |
LDB_DATA_WIDTH_CH1_18,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_bit_map[0] == LDB_BIT_MAP_SPWG)
__raw_writel((reg & ~LDB_BIT_MAP_CH0_MASK) |
LDB_BIT_MAP_CH0_SPWG,
ldb.control_reg);
else
__raw_writel((reg & ~LDB_BIT_MAP_CH0_MASK) |
LDB_BIT_MAP_CH0_JEIDA,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_bit_map[1] == LDB_BIT_MAP_SPWG)
__raw_writel((reg & ~LDB_BIT_MAP_CH1_MASK) |
LDB_BIT_MAP_CH1_SPWG,
ldb.control_reg);
else
__raw_writel((reg & ~LDB_BIT_MAP_CH1_MASK) |
LDB_BIT_MAP_CH1_JEIDA,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_mode_opt == LDB_SPL_DI0)
__raw_writel(reg | LDB_SPLIT_MODE_EN,
ldb.control_reg);
ldb.ldb_di_clk[0] = clk_get(NULL, "ldb_di0_clk");
ldb.ldb_di_clk[1] = clk_get(NULL, "ldb_di1_clk");
if (ldb.chan_mode_opt == LDB_DUL_DI0) {
clk_set_rate(ldb.ldb_di_clk[0], ldb_clk_prate/7);
} else {
clk_set_rate(ldb.ldb_di_clk[0], 2*ldb_clk_prate/7);
clk_set_rate(ldb.ldb_di_clk[1], 2*ldb_clk_prate/7);
}
clk_enable(ldb.ldb_di_clk[0]);
clk_enable(ldb.ldb_di_clk[1]);
clk_put(ldb.ldb_di_clk[0]);
clk_put(ldb.ldb_di_clk[1]);
reg = __raw_readl(ldb.control_reg);
__raw_writel((reg & ~(LDB_CH0_MODE_MASK |
LDB_CH1_MODE_MASK)) |
LDB_CH0_MODE_EN_TO_DI0 |
LDB_CH1_MODE_EN_TO_DI0, ldb.control_reg);
ldb.ch_working[0] = true;
ldb.ch_working[1] = true;
break;
case LDB_DUL_DI1:
case LDB_SPL_DI1:
if (var[1] == NULL) {
dev_err(g_ldb_dev, "Can't find framebuffer on DI1\n");
break;
}
reg = __raw_readl(ldb.control_reg);
if (bits_per_pixel(ipu_di_pix_fmt[1]) == 24)
__raw_writel((reg & ~(LDB_DATA_WIDTH_CH0_MASK |
LDB_DATA_WIDTH_CH1_MASK)) |
LDB_DATA_WIDTH_CH0_24 |
LDB_DATA_WIDTH_CH1_24,
ldb.control_reg);
else if (bits_per_pixel(ipu_di_pix_fmt[1]) == 18)
__raw_writel((reg & ~(LDB_DATA_WIDTH_CH0_MASK |
LDB_DATA_WIDTH_CH1_MASK)) |
LDB_DATA_WIDTH_CH0_18 |
LDB_DATA_WIDTH_CH1_18,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_bit_map[0] == LDB_BIT_MAP_SPWG)
__raw_writel((reg & ~LDB_BIT_MAP_CH0_MASK) |
LDB_BIT_MAP_CH0_SPWG,
ldb.control_reg);
else
__raw_writel((reg & ~LDB_BIT_MAP_CH0_MASK) |
LDB_BIT_MAP_CH0_JEIDA,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_bit_map[1] == LDB_BIT_MAP_SPWG)
__raw_writel((reg & ~LDB_BIT_MAP_CH1_MASK) |
LDB_BIT_MAP_CH1_SPWG,
ldb.control_reg);
else
__raw_writel((reg & ~LDB_BIT_MAP_CH1_MASK) |
LDB_BIT_MAP_CH1_JEIDA,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_mode_opt == LDB_SPL_DI1)
__raw_writel(reg | LDB_SPLIT_MODE_EN,
ldb.control_reg);
ldb.ldb_di_clk[0] = clk_get(NULL, "ldb_di0_clk");
ldb.ldb_di_clk[1] = clk_get(NULL, "ldb_di1_clk");
if (ldb.chan_mode_opt == LDB_DUL_DI1) {
clk_set_rate(ldb.ldb_di_clk[1], ldb_clk_prate/7);
} else {
clk_set_rate(ldb.ldb_di_clk[0], 2*ldb_clk_prate/7);
clk_set_rate(ldb.ldb_di_clk[1], 2*ldb_clk_prate/7);
}
clk_enable(ldb.ldb_di_clk[0]);
clk_enable(ldb.ldb_di_clk[1]);
clk_put(ldb.ldb_di_clk[0]);
clk_put(ldb.ldb_di_clk[1]);
reg = __raw_readl(ldb.control_reg);
__raw_writel((reg & ~(LDB_CH0_MODE_MASK |
LDB_CH1_MODE_MASK)) |
LDB_CH0_MODE_EN_TO_DI1 |
LDB_CH1_MODE_EN_TO_DI1, ldb.control_reg);
ldb.ch_working[0] = true;
ldb.ch_working[1] = true;
break;
default:
break;
}
mxc_ldb_major = register_chrdev(0, "mxc_ldb", &mxc_ldb_fops);
if (mxc_ldb_major < 0) {
dev_err(g_ldb_dev, "Unable to register MXC LDB as a char "
"device\n");
ret = mxc_ldb_major;
goto err0;
}
mxc_ldb_class = class_create(THIS_MODULE, "mxc_ldb");
if (IS_ERR(mxc_ldb_class)) {
dev_err(g_ldb_dev, "Unable to create class for MXC LDB\n");
ret = PTR_ERR(mxc_ldb_class);
goto err1;
}
temp = device_create(mxc_ldb_class, NULL, MKDEV(mxc_ldb_major, 0),
NULL, "mxc_ldb");
if (IS_ERR(temp)) {
dev_err(g_ldb_dev, "Unable to create class device for "
"MXC LDB\n");
ret = PTR_ERR(temp);
goto err2;
}
ret = fb_register_client(&nb);
if (ret < 0)
goto err2;
if (primary && ldb.fbi[0] != NULL) {
acquire_console_sem();
fb_blank(ldb.fbi[0], FB_BLANK_UNBLANK);
release_console_sem();
fb_show_logo(ldb.fbi[0], 0);
}
return ret;
err2:
class_destroy(mxc_ldb_class);
err1:
unregister_chrdev(mxc_ldb_major, "mxc_ldb");
err0:
iounmap(ldb_reg);
return ret;
}
fb2_overlay_t::fb2_overlay_t(unsigned outx, unsigned outy,
unsigned outw, unsigned outh,
unsigned transparency,
unsigned long outformat )
: fd_(open(DEVNAME,O_RDWR|O_NONBLOCK))
, mem_(MAP_FAILED)
, memSize_(0)
{
if ( 0 > fd_ ) {
ERRMSG(DEVNAME);
return ;
}
fcntl( fd_, F_SETFD, FD_CLOEXEC );
struct fb_fix_screeninfo fixed_info;
int err = ioctl( fd_, FBIOGET_FSCREENINFO, &fixed_info);
if ( 0 == err ) {
struct fb_var_screeninfo variable_info;
err = ioctl( fd_, FBIOGET_VSCREENINFO, &variable_info );
if ( 0 == err ) {
if ((outw != variable_info.xres)
||
(outh != variable_info.yres)
||
(outformat != variable_info.nonstd)) {
variable_info.xres = variable_info.xres_virtual = outw ;
variable_info.yres = outh ;
variable_info.yres_virtual = outh*2 ;
variable_info.nonstd = outformat ;
variable_info.bits_per_pixel = bits_per_pixel(outformat);
err = ioctl( fd_, FBIOPUT_VSCREENINFO, &variable_info );
if (err) {
perror( "FBIOPUT_VSCREENINFO");
close();
return ;
}
} // need to change output size
struct mxcfb_pos pos ;
pos.x = outx ;
pos.y = outy ;
err = ioctl(fd_,MXCFB_SET_OVERLAY_POS, &pos);
if (err) {
perror("MXCFB_SET_OVERLAY_POS");
close();
return ;
}
struct mxcfb_gbl_alpha a ;
a.enable = (NO_TRANSPARENCY != transparency);
a.alpha = transparency ;
int err = ioctl(fd_,MXCFB_SET_GBL_ALPHA,&a);
if ( err ) {
perror( "MXCFB_SET_GBL_ALPHA");
close();
return ;
}
struct mxcfb_color_key key;
key.enable = 0;
key.color_key = 0x00000000; // Black
if (ioctl(fd_,MXCFB_SET_CLR_KEY, &key) <0) {
perror("MXCFB_SET_CLR_KEY error!");
::close(fd_);
close();
return ;
}
memSize_ = fixed_info.smem_len ;
mem_ = mmap( 0, fixed_info.smem_len, PROT_WRITE|PROT_WRITE, MAP_SHARED, fd_, 0 );
if ( MAP_FAILED != mem_ ) {
printf( "mapped %lu (0x%lx) bytes\n", fixed_info.smem_len, memSize_ );
err = ioctl( fd_, FBIOBLANK, VESA_NO_BLANKING );
if ( err ) {
perror("FBIOBLANK");
close();
return ;
}
}
else
perror( "VSCREENINFO" );
}
else
perror( "FSCREENINFO" );
}
else
perror(DEVNAME);
}
/**
* When a context is bound for the first time, we can finally finish
* initializing the context's visual and buffer information.
* \param v the XMesaVisual to initialize
* \param b the XMesaBuffer to initialize (may be NULL)
* \param rgb_flag TRUE = RGBA mode, FALSE = color index mode
* \param window the window/pixmap we're rendering into
* \param cmap the colormap associated with the window/pixmap
* \return GL_TRUE=success, GL_FALSE=failure
*/
static GLboolean
initialize_visual_and_buffer(XMesaVisual v, XMesaBuffer b,
XMesaDrawable window,
XMesaColormap cmap)
{
const int xclass = v->visualType;
ASSERT(!b || b->xm_visual == v);
/* Save true bits/pixel */
v->BitsPerPixel = bits_per_pixel(v);
assert(v->BitsPerPixel > 0);
/* RGB WINDOW:
* We support RGB rendering into almost any kind of visual.
*/
if (xclass == GLX_TRUE_COLOR || xclass == GLX_DIRECT_COLOR) {
setup_truecolor( v, b, cmap );
}
else {
_mesa_warning(NULL, "XMesa: RGB mode rendering not supported in given visual.\n");
return GL_FALSE;
}
v->mesa_visual.indexBits = 0;
if (_mesa_getenv("MESA_NO_DITHER")) {
v->dithered_pf = v->undithered_pf;
}
/*
* If MESA_INFO env var is set print out some debugging info
* which can help Brian figure out what's going on when a user
* reports bugs.
*/
if (_mesa_getenv("MESA_INFO")) {
printf("X/Mesa visual = %p\n", (void *) v);
printf("X/Mesa dithered pf = %u\n", v->dithered_pf);
printf("X/Mesa undithered pf = %u\n", v->undithered_pf);
printf("X/Mesa level = %d\n", v->mesa_visual.level);
printf("X/Mesa depth = %d\n", GET_VISUAL_DEPTH(v));
printf("X/Mesa bits per pixel = %d\n", v->BitsPerPixel);
}
if (b && window) {
/* Do window-specific initializations */
/* these should have been set in create_xmesa_buffer */
ASSERT(b->frontxrb->drawable == window);
ASSERT(b->frontxrb->pixmap == (XMesaPixmap) window);
/* Setup for single/double buffering */
if (v->mesa_visual.doubleBufferMode) {
/* Double buffered */
b->shm = check_for_xshm( v->display );
}
/* X11 graphics contexts */
b->gc = XCreateGC( v->display, window, 0, NULL );
XMesaSetFunction( v->display, b->gc, GXcopy );
/* cleargc - for glClear() */
b->cleargc = XCreateGC( v->display, window, 0, NULL );
XMesaSetFunction( v->display, b->cleargc, GXcopy );
/*
* Don't generate Graphics Expose/NoExpose events in swapbuffers().
* Patch contributed by Michael Pichler May 15, 1995.
*/
{
XGCValues gcvalues;
gcvalues.graphics_exposures = False;
b->swapgc = XCreateGC(v->display, window,
GCGraphicsExposures, &gcvalues);
}
XMesaSetFunction( v->display, b->swapgc, GXcopy );
}
return GL_TRUE;
}
SaveResult write_bmp(const FilePath& filePath,
const Bitmap& bmp,
BitmapQuality quality)
{
BinaryWriter out(filePath);
if (!out.good()){
return SaveResult::SaveFailed(error_open_file_write(filePath));
}
const auto bitsPerPixel = bits_per_pixel(quality);
const IntSize size(bmp.GetSize());
const int rowStride = bmp_row_stride(bitsPerPixel, size.w);
switch(quality){
// Note: No default, to ensure warning if unhandled enum value
case BitmapQuality::COLOR_8BIT:
{
const auto pixelData = quantized(bmp, Dithering::ON);
PaletteColors paletteColors(pixelData.palette.size());
write_struct(out,
create_bitmap_file_header(paletteColors, rowStride, size.h));
write_struct(out,
create_bitmap_info_header_8bipp(bmp.GetSize(),
default_DPI(),
PaletteColors(pixelData.palette.size()),
false));
write_8bipp_BI_RGB(out, pixelData);
return SaveResult::SaveSuccessful();
}
case BitmapQuality::GRAY_8BIT:
{
MappedColors pixelData(desaturate_AlphaMap(bmp), grayscale_color_table());
PaletteColors paletteColors(pixelData.palette.size());
write_struct(out,
create_bitmap_file_header(paletteColors, rowStride, size.h));
write_struct(out,
create_bitmap_info_header_8bipp(bmp.GetSize(),
default_DPI(),
PaletteColors(pixelData.palette.size()),
false));
write_8bipp_BI_RGB(out, pixelData);
return SaveResult::SaveSuccessful();
}
case BitmapQuality::COLOR_24BIT:
{
write_struct(out,
create_bitmap_file_header(PaletteColors(0), rowStride, size.h));
write_struct(out,
create_bitmap_info_header_24bipp(bmp.GetSize(),
default_DPI(),
false));
write_24bipp_BI_RGB(out, bmp);
return SaveResult::SaveSuccessful();
}
}
assert(false);
return SaveResult::SaveFailed(utf8_string("Internal error in save_bitmap"));
}
int ldb_fb_event(struct notifier_block *nb, unsigned long val, void *v)
{
struct fb_event *event = v;
struct fb_info *fbi = event->info;
mm_segment_t old_fs;
int ipu_di = 0;
/* Get rid of impact from FG fb */
if (strcmp(fbi->fix.id, "DISP3 FG") == 0)
return 0;
if (fbi->fbops->fb_ioctl) {
old_fs = get_fs();
set_fs(KERNEL_DS);
fbi->fbops->fb_ioctl(fbi,
MXCFB_GET_FB_IPU_DI,
(unsigned long)&ipu_di);
set_fs(old_fs);
} else
return 0;
if ((ipu_di == 0 && !g_di0_used) ||
(ipu_di == 1 && !g_di1_used) ||
ipu_di > 1)
return 0;
fbi->mode = (struct fb_videomode *)fb_match_mode(&fbi->var,
&fbi->modelist);
if (!fbi->mode) {
dev_warn(g_ldb_dev, "can not find mode for xres=%d, yres=%d\n",
fbi->var.xres, fbi->var.yres);
return 0;
}
switch (val) {
case FB_EVENT_MODE_CHANGE: {
int ipu_di_pix_fmt;
uint32_t reg;
if ((ldb.fbi[0] != NULL && ldb.chan_mode_opt != LDB_SEP) ||
ldb.fbi[1] != NULL)
return 0;
/*
* We cannot support two LVDS panels with different
* pixel clock rates except that one's pixel clock rate
* is two times of the others'.
*/
if (ldb.fbi[0]) {
if (ldb.fbi[0]->var.pixclock == fbi->var.pixclock ||
ldb.fbi[0]->var.pixclock ==
2 * fbi->var.pixclock ||
fbi->var.pixclock == 2 * ldb.fbi[0]->var.pixclock)
ldb.fbi[1] = fbi;
else
return 0;
} else
ldb.fbi[0] = fbi;
old_fs = get_fs();
set_fs(KERNEL_DS);
fbi->fbops->fb_ioctl(fbi, MXCFB_GET_DIFMT,
(unsigned long)&ipu_di_pix_fmt);
set_fs(old_fs);
if (!valid_mode(ipu_di_pix_fmt)) {
dev_err(g_ldb_dev, "Unsupport pixel format "
"for ldb input\n");
return 0;
}
reg = __raw_readl(ldb.control_reg);
if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT) {
if (ipu_di == 0)
__raw_writel((reg &
~LDB_DI0_VS_POL_MASK) |
LDB_DI0_VS_POL_ACT_HIGH,
ldb.control_reg);
else
__raw_writel((reg &
~LDB_DI1_VS_POL_MASK) |
LDB_DI1_VS_POL_ACT_HIGH,
ldb.control_reg);
} else {
if (ipu_di == 0)
__raw_writel((reg &
~LDB_DI0_VS_POL_MASK) |
LDB_DI0_VS_POL_ACT_LOW,
ldb.control_reg);
else
__raw_writel((reg &
~LDB_DI1_VS_POL_MASK) |
LDB_DI1_VS_POL_ACT_LOW,
ldb.control_reg);
}
switch (ldb.chan_mode_opt) {
case LDB_SIN_DI0:
reg = __raw_readl(ldb.control_reg);
if (bits_per_pixel(ipu_di_pix_fmt) == 24)
__raw_writel((reg & ~LDB_DATA_WIDTH_CH0_MASK) |
LDB_DATA_WIDTH_CH0_24,
ldb.control_reg);
else if (bits_per_pixel(ipu_di_pix_fmt) == 18)
__raw_writel((reg & ~LDB_DATA_WIDTH_CH0_MASK) |
LDB_DATA_WIDTH_CH0_18,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_bit_map[0] == LDB_BIT_MAP_SPWG)
__raw_writel((reg & ~LDB_BIT_MAP_CH0_MASK) |
LDB_BIT_MAP_CH0_SPWG,
ldb.control_reg);
else
__raw_writel((reg & ~LDB_BIT_MAP_CH0_MASK) |
LDB_BIT_MAP_CH0_JEIDA,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
__raw_writel((reg & ~LDB_CH0_MODE_MASK) |
LDB_CH0_MODE_EN_TO_DI0, ldb.control_reg);
if (ldb.blank[0] == FB_BLANK_UNBLANK)
ldb.ch_working[0] = true;
break;
case LDB_SIN_DI1:
reg = __raw_readl(ldb.control_reg);
if (bits_per_pixel(ipu_di_pix_fmt) == 24)
__raw_writel((reg & ~LDB_DATA_WIDTH_CH1_MASK) |
LDB_DATA_WIDTH_CH1_24,
ldb.control_reg);
else if (bits_per_pixel(ipu_di_pix_fmt) == 18)
__raw_writel((reg & ~LDB_DATA_WIDTH_CH1_MASK) |
LDB_DATA_WIDTH_CH1_18,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_bit_map[1] == LDB_BIT_MAP_SPWG)
__raw_writel((reg & ~LDB_BIT_MAP_CH1_MASK) |
LDB_BIT_MAP_CH1_SPWG,
ldb.control_reg);
else
__raw_writel((reg & ~LDB_BIT_MAP_CH1_MASK) |
LDB_BIT_MAP_CH1_JEIDA,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
__raw_writel((reg & ~LDB_CH1_MODE_MASK) |
LDB_CH1_MODE_EN_TO_DI1, ldb.control_reg);
if (ldb.blank[1] == FB_BLANK_UNBLANK)
ldb.ch_working[1] = true;
break;
case LDB_SEP:
reg = __raw_readl(ldb.control_reg);
if (ipu_di == 0) {
if (bits_per_pixel(ipu_di_pix_fmt) == 24)
__raw_writel((reg & ~LDB_DATA_WIDTH_CH0_MASK) |
LDB_DATA_WIDTH_CH0_24,
ldb.control_reg);
else if (bits_per_pixel(ipu_di_pix_fmt) == 18)
__raw_writel((reg & ~LDB_DATA_WIDTH_CH0_MASK) |
LDB_DATA_WIDTH_CH0_18,
ldb.control_reg);
} else {
if (bits_per_pixel(ipu_di_pix_fmt) == 24)
__raw_writel((reg & ~LDB_DATA_WIDTH_CH1_MASK) |
LDB_DATA_WIDTH_CH1_24,
ldb.control_reg);
else if (bits_per_pixel(ipu_di_pix_fmt) == 18)
__raw_writel((reg & ~LDB_DATA_WIDTH_CH1_MASK) |
LDB_DATA_WIDTH_CH1_18,
ldb.control_reg);
}
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_bit_map[0] == LDB_BIT_MAP_SPWG)
__raw_writel((reg & ~LDB_BIT_MAP_CH0_MASK) |
LDB_BIT_MAP_CH0_SPWG,
ldb.control_reg);
else
__raw_writel((reg & ~LDB_BIT_MAP_CH0_MASK) |
LDB_BIT_MAP_CH0_JEIDA,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_bit_map[1] == LDB_BIT_MAP_SPWG)
__raw_writel((reg & ~LDB_BIT_MAP_CH1_MASK) |
LDB_BIT_MAP_CH1_SPWG,
ldb.control_reg);
else
__raw_writel((reg & ~LDB_BIT_MAP_CH1_MASK) |
LDB_BIT_MAP_CH1_JEIDA,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
__raw_writel((reg & ~(LDB_CH0_MODE_MASK |
LDB_CH1_MODE_MASK)) |
LDB_CH0_MODE_EN_TO_DI0 |
LDB_CH1_MODE_EN_TO_DI1, ldb.control_reg);
if (ldb.blank[0] == FB_BLANK_UNBLANK)
ldb.ch_working[0] = true;
if (ldb.blank[1] == FB_BLANK_UNBLANK)
ldb.ch_working[1] = true;
break;
case LDB_DUL_DI0:
case LDB_SPL_DI0:
reg = __raw_readl(ldb.control_reg);
if (bits_per_pixel(ipu_di_pix_fmt) == 24)
__raw_writel((reg & ~(LDB_DATA_WIDTH_CH0_MASK |
LDB_DATA_WIDTH_CH1_MASK)) |
LDB_DATA_WIDTH_CH0_24 |
LDB_DATA_WIDTH_CH1_24,
ldb.control_reg);
else if (bits_per_pixel(ipu_di_pix_fmt) == 18)
__raw_writel((reg & ~(LDB_DATA_WIDTH_CH0_MASK |
LDB_DATA_WIDTH_CH1_MASK)) |
LDB_DATA_WIDTH_CH0_18 |
LDB_DATA_WIDTH_CH1_18,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_bit_map[0] == LDB_BIT_MAP_SPWG)
__raw_writel((reg & ~LDB_BIT_MAP_CH0_MASK) |
LDB_BIT_MAP_CH0_SPWG,
ldb.control_reg);
else
__raw_writel((reg & ~LDB_BIT_MAP_CH0_MASK) |
LDB_BIT_MAP_CH0_JEIDA,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_bit_map[1] == LDB_BIT_MAP_SPWG)
__raw_writel((reg & ~LDB_BIT_MAP_CH1_MASK) |
LDB_BIT_MAP_CH1_SPWG,
ldb.control_reg);
else
__raw_writel((reg & ~LDB_BIT_MAP_CH1_MASK) |
LDB_BIT_MAP_CH1_JEIDA,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_mode_opt == LDB_SPL_DI0)
__raw_writel(reg | LDB_SPLIT_MODE_EN,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
__raw_writel((reg & ~(LDB_CH0_MODE_MASK |
LDB_CH1_MODE_MASK)) |
LDB_CH0_MODE_EN_TO_DI0 |
LDB_CH1_MODE_EN_TO_DI0, ldb.control_reg);
if (ldb.blank[0] == FB_BLANK_UNBLANK) {
ldb.ch_working[0] = true;
ldb.ch_working[1] = true;
}
break;
case LDB_DUL_DI1:
case LDB_SPL_DI1:
reg = __raw_readl(ldb.control_reg);
if (bits_per_pixel(ipu_di_pix_fmt) == 24)
__raw_writel((reg & ~(LDB_DATA_WIDTH_CH0_MASK |
LDB_DATA_WIDTH_CH1_MASK)) |
LDB_DATA_WIDTH_CH0_24 |
LDB_DATA_WIDTH_CH1_24,
ldb.control_reg);
else if (bits_per_pixel(ipu_di_pix_fmt) == 18)
__raw_writel((reg & ~(LDB_DATA_WIDTH_CH0_MASK |
LDB_DATA_WIDTH_CH1_MASK)) |
LDB_DATA_WIDTH_CH0_18 |
LDB_DATA_WIDTH_CH1_18,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_bit_map[0] == LDB_BIT_MAP_SPWG)
__raw_writel((reg & ~LDB_BIT_MAP_CH0_MASK) |
LDB_BIT_MAP_CH0_SPWG,
ldb.control_reg);
else
__raw_writel((reg & ~LDB_BIT_MAP_CH0_MASK) |
LDB_BIT_MAP_CH0_JEIDA,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_bit_map[1] == LDB_BIT_MAP_SPWG)
__raw_writel((reg & ~LDB_BIT_MAP_CH1_MASK) |
LDB_BIT_MAP_CH1_SPWG,
ldb.control_reg);
else
__raw_writel((reg & ~LDB_BIT_MAP_CH1_MASK) |
LDB_BIT_MAP_CH1_JEIDA,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
if (ldb.chan_mode_opt == LDB_SPL_DI1)
__raw_writel(reg | LDB_SPLIT_MODE_EN,
ldb.control_reg);
reg = __raw_readl(ldb.control_reg);
__raw_writel((reg & ~(LDB_CH0_MODE_MASK |
LDB_CH1_MODE_MASK)) |
LDB_CH0_MODE_EN_TO_DI1 |
LDB_CH1_MODE_EN_TO_DI1, ldb.control_reg);
if (ldb.blank[1] == FB_BLANK_UNBLANK) {
ldb.ch_working[0] = true;
ldb.ch_working[1] = true;
}
break;
default:
break;
}
break;
}
case FB_EVENT_BLANK: {
if (ldb.fbi[0] != fbi && ldb.fbi[1] != fbi)
return 0;
if (*((int *)event->data) == ldb.blank[ipu_di])
return 0;
if (*((int *)event->data) == FB_BLANK_UNBLANK)
ldb_enable(ipu_di);
else
ldb_disable(ipu_di);
ldb.blank[ipu_di] = *((int *)event->data);
break;
}
default:
break;
}
return 0;
}