static READ32_HANDLER( speedup_r )
{
int result = *speedup_data;
if ((cpu_get_previouspc(space->cpu) & 0xfffff) == 0x006f0 && result == cpu_get_reg(space->cpu, ASAP_R3))
cpu_spinuntil_int(space->cpu);
return result;
}
static READ16_HANDLER( bmc_protection_r )
{
switch(cpu_get_previouspc(&space->device()))
{
case 0xca68:
switch(cpu_get_reg(&space->device(), M68K_D2))
{
case 0: return 0x37<<8;
case 0x1013: return 0;
default: return 0x46<<8;
}
break;
}
logerror("Protection read @ %X\n",cpu_get_previouspc(&space->device()));
return space->machine().rand();
}
static WRITE32_HANDLER( control_w )
{
UINT32 old = control_data;
// bit $80000000 = BSMT access/ROM read
// bit $20000000 = toggled every 64 IRQ4's
// bit $10000000 = ????
// bit $00800000 = EEPROM data
// bit $00400000 = EEPROM clock
// bit $00200000 = EEPROM enable (on 1)
COMBINE_DATA(&control_data);
/* handle EEPROM I/O */
if (ACCESSING_BITS_16_23)
{
eeprom_write_bit(data & 0x00800000);
eeprom_set_cs_line((data & 0x00200000) ? CLEAR_LINE : ASSERT_LINE);
eeprom_set_clock_line((data & 0x00400000) ? ASSERT_LINE : CLEAR_LINE);
}
/* toggling BSMT off then on causes a reset */
if (!(old & 0x80000000) && (control_data & 0x80000000))
{
const device_config *device = devtag_get_device(space->machine, "bsmt");
bsmt2000_data_w(device, bsmt_data_bank, 0, 0xffff);
device_reset(device);
}
/* log any unknown bits */
if (data & 0x4f1fffff)
logerror("%08X: control_w = %08X & %08X\n", cpu_get_previouspc(space->cpu), data, mem_mask);
}
static WRITE32_HANDLER( speedup_w )
{
policetr_state *state = space->machine().driver_data<policetr_state>();
COMBINE_DATA(state->m_speedup_data);
/* see if the PC matches */
if ((cpu_get_previouspc(&space->device()) & 0x1fffffff) == state->m_speedup_pc)
{
UINT64 curr_cycles = space->machine().firstcpu->total_cycles();
/* if less than 50 cycles from the last time, count it */
if (curr_cycles - state->m_last_cycles < 50)
{
state->m_loop_count++;
/* more than 2 in a row and we spin */
if (state->m_loop_count > 2)
device_spin_until_interrupt(&space->device());
}
else
state->m_loop_count = 0;
state->m_last_cycles = curr_cycles;
}
}
static WRITE32_HANDLER( control_w )
{
policetr_state *state = space->machine().driver_data<policetr_state>();
UINT32 old = state->m_control_data;
// bit $80000000 = BSMT access/ROM read
// bit $20000000 = toggled every 64 IRQ4's
// bit $10000000 = ????
// bit $00800000 = EEPROM data
// bit $00400000 = EEPROM clock
// bit $00200000 = EEPROM enable (on 1)
COMBINE_DATA(&state->m_control_data);
/* handle EEPROM I/O */
if (ACCESSING_BITS_16_23)
{
eeprom_device *eeprom = space->machine().device<eeprom_device>("eeprom");
eeprom->write_bit(data & 0x00800000);
eeprom->set_cs_line((data & 0x00200000) ? CLEAR_LINE : ASSERT_LINE);
eeprom->set_clock_line((data & 0x00400000) ? ASSERT_LINE : CLEAR_LINE);
}
/* toggling BSMT off then on causes a reset */
if (!(old & 0x80000000) && (state->m_control_data & 0x80000000))
{
bsmt2000_device *bsmt = space->machine().device<bsmt2000_device>("bsmt");
bsmt->reset();
}
/* log any unknown bits */
if (data & 0x4f1fffff)
logerror("%08X: control_w = %08X & %08X\n", cpu_get_previouspc(&space->device()), data, mem_mask);
}
static READ16_HANDLER( bankrom_r )
{
offtwall_state *state = space->machine().driver_data<offtwall_state>();
/* this is the banked ROM read */
logerror("%06X: %04X\n", cpu_get_previouspc(&space->device()), offset);
/* if the values are $3e000 or $3e002 are being read by code just below the
ROM bank area, we need to return the correct value to give the proper checksum */
if ((offset == 0x3000 || offset == 0x3001) && cpu_get_previouspc(&space->device()) > 0x37000)
{
UINT32 checksum = (space->read_word(0x3fd210) << 16) | space->read_word(0x3fd212);
UINT32 us = 0xaaaa5555 - checksum;
if (offset == 0x3001)
return us & 0xffff;
else
return us >> 16;
}
static READ32_HANDLER( movie_speedup_r )
{
int result = *movie_speedup_data;
if ((cpu_get_previouspc(space->cpu) & 0xfffff) == 0x00a88 && (cpu_get_reg(space->cpu, ASAP_R28) & 0xfffff) == 0x397c0 &&
movie_speedup_data[4] == cpu_get_reg(space->cpu, ASAP_R1))
{
UINT32 temp = (INT16)result + movie_speedup_data[4] * 262;
if (temp - (UINT32)cpu_get_reg(space->cpu, ASAP_R15) < (UINT32)cpu_get_reg(space->cpu, ASAP_R23))
cpu_spinuntil_int(space->cpu);
}
return result;
}
static READ16_HANDLER(prot_r)
{
switch(prot_data)
{
case 0x0000: return 0x0d00;
case 0xff00: return 0x8d00;
case 0x8000: return 0x0f0f;
}
logerror("unk prot r %x %x\n",prot_data, cpu_get_previouspc(space->cpu));
return mame_rand(space->machine);
}
static READ16_HANDLER(prot_r)
{
koftball_state *state = space->machine().driver_data<koftball_state>();
switch(state->m_prot_data)
{
case 0x0000: return 0x0d00;
case 0xff00: return 0x8d00;
case 0x8000: return 0x0f0f;
}
logerror("unk prot r %x %x\n",state->m_prot_data, cpu_get_previouspc(&space->device()));
return space->machine().rand();
}
/* Above prom also at 16s and 17s */
ROM_REGION( 0x1000, "plds", 0 )
ROM_LOAD( "pal16r8a 1h", 0x0000, 0x0104, NO_DUMP ) /* PAL is read protected */
ROM_LOAD( "pal16l8b.7c", 0x0200, 0x0104, NO_DUMP ) /* PAL is read protected */
ROM_LOAD( "pal16l8b.7d", 0x0400, 0x0104, CRC(199e83fd) SHA1(ebb5d66f29935b0a58e79b0db30611b5dce328a6) ) /* PAL is read protected */
ROM_LOAD( "pal16l8b.7e", 0x0600, 0x0104, NO_DUMP ) /* PAL is read protected */
ROM_LOAD( "pal16l8b.7l", 0x0800, 0x0104, NO_DUMP ) /* PAL is read protected */
ROM_LOAD( "pal16l8b.8e", 0x0a00, 0x0104, NO_DUMP ) /* PAL is read protected */
ROM_LOAD( "pal16l8b.9d", 0x0c00, 0x0104, NO_DUMP ) /* PAL is read protected */
ROM_LOAD( "pal16l8b.10c", 0x0e00, 0x0104, NO_DUMP ) /* PAL is read protected */
ROM_END
/**********************************************************************************/
static READ16_HANDLER( dassault_main_skip )
{
dassault_state *state = space->machine().driver_data<dassault_state>();
int ret = state->m_ram[0];
if (cpu_get_previouspc(&space->device()) == 0x1170 && ret & 0x8000)
device_spin_until_interrupt(&space->device());
return ret;
}
/* Above prom also at 16s and 17s */
ROM_REGION( 0x1000, "plds", 0 )
ROM_LOAD( "pal16r8a 1h", 0x0000, 0x0104, NO_DUMP ) /* PAL is read protected */
ROM_LOAD( "pal16l8b.7c", 0x0200, 0x0104, NO_DUMP ) /* PAL is read protected */
ROM_LOAD( "pal16l8b.7d", 0x0400, 0x0104, CRC(199e83fd) SHA1(ebb5d66f29935b0a58e79b0db30611b5dce328a6) ) /* PAL is read protected */
ROM_LOAD( "pal16l8b.7e", 0x0600, 0x0104, NO_DUMP ) /* PAL is read protected */
ROM_LOAD( "pal16l8b.7l", 0x0800, 0x0104, NO_DUMP ) /* PAL is read protected */
ROM_LOAD( "pal16l8b.8e", 0x0a00, 0x0104, NO_DUMP ) /* PAL is read protected */
ROM_LOAD( "pal16l8b.9d", 0x0c00, 0x0104, NO_DUMP ) /* PAL is read protected */
ROM_LOAD( "pal16l8b.10c", 0x0e00, 0x0104, NO_DUMP ) /* PAL is read protected */
ROM_END
/**********************************************************************************/
static READ16_HANDLER( dassault_main_skip )
{
dassault_state *state = space->machine->driver_data<dassault_state>();
int ret = state->ram[0];
if (cpu_get_previouspc(space->cpu) == 0x1170 && ret & 0x8000)
cpu_spinuntil_int(space->cpu);
return ret;
}
static WRITE8_HANDLER( trvmadns_tileram_w )
{
if(offset==0)
{
if(cpu_get_previouspc(space->cpu)==0x29e9)// || cpu_get_previouspc(space->cpu)==0x1b3f) //29f5
{
cputag_set_input_line(space->machine, "maincpu", 0, HOLD_LINE);
}
// else
// logerror("%x \n", cpu_get_previouspc(space->cpu));
}
trvmadns_tileram[offset] = data;
tilemap_mark_tile_dirty(bg_tilemap,offset >> 1);
}
//READ8_DEVICE_HANDLER( threecom3c505_r )
UINT8 threecom3c505_device::read_port(offs_t offset)
{
// data to omit excessive logging
static UINT8 last_data = 0xff;
static UINT32 last_pc = 0;
UINT8 data = m_reg[offset & 0x0f];
switch (offset)
{
case PORT_COMMAND: /* 0x00 read/write, 8-bit */
data = read_command_port();
break;
case PORT_STATUS: /* 0x02 read only, 8-bit */
data=read_status_port();
set_interrupt(CLEAR_LINE);
// omit excessive logging
if (data == last_data)
{
UINT32 pc = cpu_get_previouspc(machine().device(MAINCPU));
if (pc == last_pc) {
return data;
}
last_pc = pc;
}
last_data = data;
break;
case PORT_DATA: /* 0x04 read/write, 16-bit */
case PORT_DATA + 1: /* 0x04 read/write, 16-bit */
data = read_data_port();
break;
case PORT_CONTROL: /* 0x06 read/write, 8-bit */
// just return current value
break;
default:
break;
}
LOG2(("reading 3C505 Register at offset %02x = %02x", offset, data));
return data;
}
const char *threecom3c505_device::cpu_context()
{
static char statebuf[64]; /* string buffer containing state description */
device_t *cpu = machine().device(MAINCPU);
osd_ticks_t t = osd_ticks();
int s = t / osd_ticks_per_second();
int ms = (t % osd_ticks_per_second()) / 1000;
/* if we have an executing CPU, output data */
if (cpu != NULL)
{
sprintf(statebuf, "%d.%03d %s pc=%08x - %s", s, ms, cpu->tag(),
cpu_get_previouspc(cpu), tag());
}
else
{
sprintf(statebuf, "%d.%03d", s, ms);
}
return statebuf;
}
ROM_END
/*************************************
*
* Driver speedups
*
*************************************/
/*
In-game hotspot @ 0180F8D8
*/
READ32_MEMBER( beathead_state::speedup_r )
{
int result = *m_speedup_data;
if ((cpu_get_previouspc(&space.device()) & 0xfffff) == 0x006f0 && result == cpu_get_reg(&space.device(), ASAP_R3))
device_spin_until_interrupt(&space.device());
return result;
}
static WRITE32_HANDLER( speedup_w )
{
COMBINE_DATA(speedup_data);
/* see if the PC matches */
if ((cpu_get_previouspc(space->cpu) & 0x1fffffff) == speedup_pc)
{
UINT64 curr_cycles = cpu_get_total_cycles(space->cpu);
/* if less than 50 cycles from the last time, count it */
if (curr_cycles - last_cycles < 50)
{
loop_count++;
/* more than 2 in a row and we spin */
if (loop_count > 2)
cpu_spinuntil_int(space->cpu);
}
else
loop_count = 0;
last_cycles = curr_cycles;
}
}
static WRITE8_HANDLER( spunchout_rp5c01_w )
{
data &= 0x0f;
logerror("%04x: prot_w %x = %02x\n",cpu_get_previouspc(space->cpu),offset,data);
if (offset <= 0x0c)
{
rp5c01_mem[0x10 * (rp5c01_mode_sel & 3) + offset] = data;
}
else if (offset == 0x0d)
{
rp5c01_mode_sel = data;
logerror("MODE: Timer EN = %d Alarm EN = %d MODE %d\n",BIT(data,3),BIT(data,2),data&3);
}
else if (offset == 0x0e)
{
logerror("TEST = %d",data);
}
else if (offset == 0x0f)
{
logerror("RESET: /1Hz = %d /16Hz = %d Timer = %d Timer = %d\n",BIT(data,3),BIT(data,2),BIT(data,1),BIT(data,0));
}
}
static READ16_HANDLER( jchan_mcu_status_r )
{
logerror("cpu '%s' (PC=%06X): read mcu status\n", space->cpu->tag(), cpu_get_previouspc(space->cpu));
return 0;
}
static READ8_HANDLER( spunchout_rp5c01_r )
{
logerror("%04x: prot_r %x\n", cpu_get_previouspc(space->cpu), offset);
if (offset <= 0x0c)
{
switch (rp5c01_mode_sel & 3)
{
case 0: // time
switch ( offset )
{
case 0x00: // 1-second counter
return rp5c01_mem[0x00];
case 0x01: // 10-second counter
return rp5c01_mem[0x01] & 0x7;
case 0x02: // 1-minute counter
return rp5c01_mem[0x02];
case 0x03: // 10-minute counter
return rp5c01_mem[0x03] & 0x07;
case 0x04: // 1-hour counter
return rp5c01_mem[0x04];
case 0x05: // 10-hour counter
return rp5c01_mem[0x05] & 0x03;
case 0x06: // day-of-the-week counter
return rp5c01_mem[0x06] & 0x07;
case 0x07: // 1-day counter
return rp5c01_mem[0x07];
case 0x08: // 10-day counter
return rp5c01_mem[0x08] & 0x03;
case 0x09: // 1-month counter
return rp5c01_mem[0x09];
case 0x0a: // 10-month counter
return rp5c01_mem[0x0a] & 0x01;
case 0x0b: // 1-year counter
return rp5c01_mem[0x0b];
case 0x0c: // 10-year counter
return rp5c01_mem[0x0c];
}
break;
case 1: // alarm
switch ( offset )
{
case 0x00: // n/a
return 0x00;
case 0x01: // n/a
return 0x00;
case 0x02: // 1-minute alarm register
return rp5c01_mem[0x12];
case 0x03: // 10-minute alarm register
return rp5c01_mem[0x13] & 0x07;
case 0x04: // 1-hour alarm register
return rp5c01_mem[0x14];
case 0x05: // 10-hour alarm register
return rp5c01_mem[0x15] & 0x03;
case 0x06: // day-of-the-week alarm register
return rp5c01_mem[0x16] & 0x07;
case 0x07: // 1-day alarm register
return rp5c01_mem[0x17];
case 0x08: // 10-day alarm register
return rp5c01_mem[0x18] & 0x03;
case 0x09: // n/a
return 0x00;
case 0x0a: // /12/24 select register
return rp5c01_mem[0x1a] & 0x01;
case 0x0b: // leap year count
return rp5c01_mem[0x1b] & 0x03;
case 0x0c: // n/a
return 0x00;
}
break;
case 2: // RAM BLOCK 10
case 3: // RAM BLOCK 11
return rp5c01_mem[0x10 * (rp5c01_mode_sel & 3) + offset];
}
}
else if (offset == 0x0d)
{
return rp5c01_mode_sel;
}
logerror("Read from unknown protection? port %02x ( selector = %02x )\n", offset, rp5c01_mode_sel );
return 0;
}
/***********************************************************
MEMORY handlers
***********************************************************/
static WRITE16_HANDLER( system_control_w )
{
if ((ACCESSING_BITS_0_7 == 0) && ACCESSING_BITS_8_15)
{
data >>= 8;
}
dsp_HOLD_signal = (data & 4) ? CLEAR_LINE : ASSERT_LINE;
cputag_set_input_line(space->machine, "dsp", INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
logerror("68K:%06x writing %04x to TMS32025. %s HOLD , %s RESET\n", cpu_get_previouspc(space->cpu), data, ((data & 4) ? "Clear" : "Assert"), ((data & 1) ? "Clear" : "Assert"));
}
static READ16_HANDLER( lineram_r )
{
return taitoair_line_ram[offset];
}
static WRITE16_HANDLER( lineram_w )
{
if (ACCESSING_BITS_8_15 && ACCESSING_BITS_0_7)
taitoair_line_ram[offset] = data;
}
static READ16_HANDLER( dspram_r )
{
UINT8 *mem = memory_region(space->machine, "maincpu");
while(length>0)
{
if( srcadr < srclen && (dstadr < ST0016_MAX_CHAR_BANK*ST0016_CHAR_BANK_SIZE))
{
st0016_char_bank=dstadr>>5;
st0016_character_ram_w(space,dstadr&0x1f,mem[0x10000+srcadr]);
srcadr++;
dstadr++;
length--;
}
else
{
/* samples ? sound dma ? */
// speaglsht: unknown DMA copy : src - 2B6740, dst - 4400, len - 1E400
logerror("unknown DMA copy : src - %X, dst - %X, len - %X, PC - %X\n",srcadr,dstadr,length,cpu_get_previouspc(space->cpu));
break;
}
}
}
}
static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect)
{
/*
object ram :
each entry is 8 bytes:
76543210 (bit)
0 llllllll