/** * cdns_i2c_probe - Platform registration call * @pdev: Handle to the platform device structure * * This function does all the memory allocation and registration for the i2c * device. User can modify the address mode to 10 bit address mode using the * ioctl call with option I2C_TENBIT. * * Return: 0 on success, negative error otherwise */ static int cdns_i2c_probe(struct platform_device *pdev) { struct resource *r_mem; struct cdns_i2c *id; int ret; const struct of_device_id *match; id = devm_kzalloc(&pdev->dev, sizeof(*id), GFP_KERNEL); if (!id) return -ENOMEM; platform_set_drvdata(pdev, id); match = of_match_node(cdns_i2c_of_match, pdev->dev.of_node); if (match && match->data) { const struct cdns_platform_data *data = match->data; id->quirks = data->quirks; } r_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); id->membase = devm_ioremap_resource(&pdev->dev, r_mem); if (IS_ERR(id->membase)) return PTR_ERR(id->membase); id->irq = platform_get_irq(pdev, 0); id->adap.dev.of_node = pdev->dev.of_node; id->adap.algo = &cdns_i2c_algo; id->adap.timeout = CDNS_I2C_TIMEOUT; id->adap.retries = 3; /* Default retry value. */ id->adap.algo_data = id; id->adap.dev.parent = &pdev->dev; init_completion(&id->xfer_done); snprintf(id->adap.name, sizeof(id->adap.name), "Cadence I2C at %08lx", (unsigned long)r_mem->start); id->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(id->clk)) { dev_err(&pdev->dev, "input clock not found.\n"); return PTR_ERR(id->clk); } ret = clk_prepare_enable(id->clk); if (ret) { dev_err(&pdev->dev, "Unable to enable clock.\n"); return ret; } id->clk_rate_change_nb.notifier_call = cdns_i2c_clk_notifier_cb; if (clk_notifier_register(id->clk, &id->clk_rate_change_nb)) dev_warn(&pdev->dev, "Unable to register clock notifier.\n"); id->input_clk = clk_get_rate(id->clk); ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency", &id->i2c_clk); if (ret || (id->i2c_clk > CDNS_I2C_SPEED_MAX)) id->i2c_clk = CDNS_I2C_SPEED_DEFAULT; cdns_i2c_writereg(CDNS_I2C_CR_ACK_EN | CDNS_I2C_CR_NEA | CDNS_I2C_CR_MS, CDNS_I2C_CR_OFFSET); ret = cdns_i2c_setclk(id->input_clk, id); if (ret) { dev_err(&pdev->dev, "invalid SCL clock: %u Hz\n", id->i2c_clk); ret = -EINVAL; goto err_clk_dis; } ret = devm_request_irq(&pdev->dev, id->irq, cdns_i2c_isr, 0, DRIVER_NAME, id); if (ret) { dev_err(&pdev->dev, "cannot get irq %d\n", id->irq); goto err_clk_dis; } ret = i2c_add_adapter(&id->adap); if (ret < 0) { dev_err(&pdev->dev, "reg adap failed: %d\n", ret); goto err_clk_dis; } /* * Cadence I2C controller has a bug wherein it generates * invalid read transaction after HW timeout in master receiver mode. * HW timeout is not used by this driver and the interrupt is disabled. * But the feature itself cannot be disabled. Hence maximum value * is written to this register to reduce the chances of error. */ cdns_i2c_writereg(CDNS_I2C_TIMEOUT_MAX, CDNS_I2C_TIME_OUT_OFFSET); dev_info(&pdev->dev, "%u kHz mmio %08lx irq %d\n", id->i2c_clk / 1000, (unsigned long)r_mem->start, id->irq); return 0; err_clk_dis: clk_disable_unprepare(id->clk); return ret; }
static int orion_mdio_probe(struct platform_device *pdev) { struct resource *r; struct mii_bus *bus; struct orion_mdio_dev *dev; int ret; r = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!r) { dev_err(&pdev->dev, "No SMI register address given\n"); return -ENODEV; } bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(struct orion_mdio_dev)); if (!bus) return -ENOMEM; bus->name = "orion_mdio_bus"; bus->read = orion_mdio_read; bus->write = orion_mdio_write; snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii", dev_name(&pdev->dev)); bus->parent = &pdev->dev; dev = bus->priv; dev->regs = devm_ioremap(&pdev->dev, r->start, resource_size(r)); if (!dev->regs) { dev_err(&pdev->dev, "Unable to remap SMI register\n"); ret = -ENODEV; goto out_mdio; } init_waitqueue_head(&dev->smi_busy_wait); dev->clk = devm_clk_get(&pdev->dev, NULL); if (!IS_ERR(dev->clk)) clk_prepare_enable(dev->clk); dev->err_interrupt = platform_get_irq(pdev, 0); if (dev->err_interrupt > 0) { ret = devm_request_irq(&pdev->dev, dev->err_interrupt, orion_mdio_err_irq, IRQF_SHARED, pdev->name, dev); if (ret) goto out_mdio; writel(MVMDIO_ERR_INT_SMI_DONE, dev->regs + MVMDIO_ERR_INT_MASK); } else if (dev->err_interrupt == -EPROBE_DEFER) { return -EPROBE_DEFER; } mutex_init(&dev->lock); if (pdev->dev.of_node) ret = of_mdiobus_register(bus, pdev->dev.of_node); else ret = mdiobus_register(bus); if (ret < 0) { dev_err(&pdev->dev, "Cannot register MDIO bus (%d)\n", ret); goto out_mdio; } platform_set_drvdata(pdev, bus); return 0; out_mdio: if (!IS_ERR(dev->clk)) clk_disable_unprepare(dev->clk); return ret; }
static int rockchip_saradc_probe(struct platform_device *pdev) { struct rockchip_saradc *info = NULL; struct device_node *np = pdev->dev.of_node; struct iio_dev *indio_dev = NULL; struct resource *mem; const struct of_device_id *match; int ret; int irq; if (!np) return -ENODEV; indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info)); if (!indio_dev) { dev_err(&pdev->dev, "failed allocating iio device\n"); return -ENOMEM; } info = iio_priv(indio_dev); match = of_match_device(rockchip_saradc_match, &pdev->dev); info->data = match->data; mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); info->regs = devm_ioremap_resource(&pdev->dev, mem); if (IS_ERR(info->regs)) return PTR_ERR(info->regs); /* * The reset should be an optional property, as it should work * with old devicetrees as well */ info->reset = devm_reset_control_get(&pdev->dev, "saradc-apb"); if (IS_ERR(info->reset)) { ret = PTR_ERR(info->reset); if (ret != -ENOENT) return ret; dev_dbg(&pdev->dev, "no reset control found\n"); info->reset = NULL; } init_completion(&info->completion); irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(&pdev->dev, "no irq resource?\n"); return irq; } ret = devm_request_irq(&pdev->dev, irq, rockchip_saradc_isr, 0, dev_name(&pdev->dev), info); if (ret < 0) { dev_err(&pdev->dev, "failed requesting irq %d\n", irq); return ret; } info->pclk = devm_clk_get(&pdev->dev, "apb_pclk"); if (IS_ERR(info->pclk)) { dev_err(&pdev->dev, "failed to get pclk\n"); return PTR_ERR(info->pclk); } info->clk = devm_clk_get(&pdev->dev, "saradc"); if (IS_ERR(info->clk)) { dev_err(&pdev->dev, "failed to get adc clock\n"); return PTR_ERR(info->clk); } info->vref = devm_regulator_get(&pdev->dev, "vref"); if (IS_ERR(info->vref)) { dev_err(&pdev->dev, "failed to get regulator, %ld\n", PTR_ERR(info->vref)); return PTR_ERR(info->vref); } if (info->reset) rockchip_saradc_reset_controller(info->reset); /* * Use a default value for the converter clock. * This may become user-configurable in the future. */ ret = clk_set_rate(info->clk, info->data->clk_rate); if (ret < 0) { dev_err(&pdev->dev, "failed to set adc clk rate, %d\n", ret); return ret; } ret = regulator_enable(info->vref); if (ret < 0) { dev_err(&pdev->dev, "failed to enable vref regulator\n"); return ret; } ret = clk_prepare_enable(info->pclk); if (ret < 0) { dev_err(&pdev->dev, "failed to enable pclk\n"); goto err_reg_voltage; } ret = clk_prepare_enable(info->clk); if (ret < 0) { dev_err(&pdev->dev, "failed to enable converter clock\n"); goto err_pclk; } platform_set_drvdata(pdev, indio_dev); indio_dev->name = dev_name(&pdev->dev); indio_dev->dev.parent = &pdev->dev; indio_dev->dev.of_node = pdev->dev.of_node; indio_dev->info = &rockchip_saradc_iio_info; indio_dev->modes = INDIO_DIRECT_MODE; indio_dev->channels = info->data->channels; indio_dev->num_channels = info->data->num_channels; ret = iio_device_register(indio_dev); if (ret) goto err_clk; return 0; err_clk: clk_disable_unprepare(info->clk); err_pclk: clk_disable_unprepare(info->pclk); err_reg_voltage: regulator_disable(info->vref); return ret; }
static int wmt_i2c_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; struct wmt_i2c_dev *i2c_dev; struct i2c_adapter *adap; struct resource *res; int err; u32 clk_rate; i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); if (!i2c_dev) return -ENOMEM; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); i2c_dev->base = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(i2c_dev->base)) return PTR_ERR(i2c_dev->base); i2c_dev->irq = irq_of_parse_and_map(np, 0); if (!i2c_dev->irq) { dev_err(&pdev->dev, "irq missing or invalid\n"); return -EINVAL; } i2c_dev->clk = of_clk_get(np, 0); if (IS_ERR(i2c_dev->clk)) { dev_err(&pdev->dev, "unable to request clock\n"); return PTR_ERR(i2c_dev->clk); } i2c_dev->mode = I2C_MODE_STANDARD; err = of_property_read_u32(np, "clock-frequency", &clk_rate); if ((!err) && (clk_rate == 400000)) i2c_dev->mode = I2C_MODE_FAST; i2c_dev->dev = &pdev->dev; err = devm_request_irq(&pdev->dev, i2c_dev->irq, wmt_i2c_isr, 0, "i2c", i2c_dev); if (err) { dev_err(&pdev->dev, "failed to request irq %i\n", i2c_dev->irq); return err; } adap = &i2c_dev->adapter; i2c_set_adapdata(adap, i2c_dev); strlcpy(adap->name, "WMT I2C adapter", sizeof(adap->name)); adap->owner = THIS_MODULE; adap->algo = &wmt_i2c_algo; adap->dev.parent = &pdev->dev; adap->dev.of_node = pdev->dev.of_node; init_completion(&i2c_dev->complete); err = wmt_i2c_reset_hardware(i2c_dev); if (err) { dev_err(&pdev->dev, "error initializing hardware\n"); return err; } err = i2c_add_adapter(adap); if (err) { dev_err(&pdev->dev, "failed to add adapter\n"); return err; } platform_set_drvdata(pdev, i2c_dev); return 0; }
static int mxs_mmc_probe(struct platform_device *pdev) { const struct of_device_id *of_id = of_match_device(mxs_mmc_dt_ids, &pdev->dev); struct device_node *np = pdev->dev.of_node; struct mxs_mmc_host *host; struct mmc_host *mmc; struct resource *iores; int ret = 0, irq_err; struct regulator *reg_vmmc; struct mxs_ssp *ssp; iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); irq_err = platform_get_irq(pdev, 0); if (!iores || irq_err < 0) return -EINVAL; mmc = mmc_alloc_host(sizeof(struct mxs_mmc_host), &pdev->dev); if (!mmc) return -ENOMEM; host = mmc_priv(mmc); ssp = &host->ssp; ssp->dev = &pdev->dev; ssp->base = devm_ioremap_resource(&pdev->dev, iores); if (IS_ERR(ssp->base)) { ret = PTR_ERR(ssp->base); goto out_mmc_free; } ssp->devid = (enum mxs_ssp_id) of_id->data; host->mmc = mmc; host->sdio_irq_en = 0; reg_vmmc = devm_regulator_get(&pdev->dev, "vmmc"); if (!IS_ERR(reg_vmmc)) { ret = regulator_enable(reg_vmmc); if (ret) { dev_err(&pdev->dev, "Failed to enable vmmc regulator: %d\n", ret); goto out_mmc_free; } } ssp->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(ssp->clk)) { ret = PTR_ERR(ssp->clk); goto out_mmc_free; } clk_prepare_enable(ssp->clk); ret = mxs_mmc_reset(host); if (ret) { dev_err(&pdev->dev, "Failed to reset mmc: %d\n", ret); goto out_clk_disable; } ssp->dmach = dma_request_slave_channel(&pdev->dev, "rx-tx"); if (!ssp->dmach) { dev_err(mmc_dev(host->mmc), "%s: failed to request dma\n", __func__); ret = -ENODEV; goto out_clk_disable; } /* set mmc core parameters */ mmc->ops = &mxs_mmc_ops; mmc->caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SDIO_IRQ | MMC_CAP_NEEDS_POLL; host->broken_cd = of_property_read_bool(np, "broken-cd"); mmc->f_min = 400000; mmc->f_max = 288000000; ret = mmc_of_parse(mmc); if (ret) goto out_clk_disable; mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; mmc->max_segs = 52; mmc->max_blk_size = 1 << 0xf; mmc->max_blk_count = (ssp_is_old(ssp)) ? 0xff : 0xffffff; mmc->max_req_size = (ssp_is_old(ssp)) ? 0xffff : 0xffffffff; mmc->max_seg_size = dma_get_max_seg_size(ssp->dmach->device->dev); platform_set_drvdata(pdev, mmc); ret = devm_request_irq(&pdev->dev, irq_err, mxs_mmc_irq_handler, 0, DRIVER_NAME, host); if (ret) goto out_free_dma; spin_lock_init(&host->lock); ret = mmc_add_host(mmc); if (ret) goto out_free_dma; dev_info(mmc_dev(host->mmc), "initialized\n"); return 0; out_free_dma: if (ssp->dmach) dma_release_channel(ssp->dmach); out_clk_disable: clk_disable_unprepare(ssp->clk); out_mmc_free: mmc_free_host(mmc); return ret; }
static int histb_pcie_probe(struct platform_device *pdev) { struct histb_pcie *hipcie; struct dw_pcie *pci; struct pcie_port *pp; struct resource *res; struct device_node *np = pdev->dev.of_node; struct device *dev = &pdev->dev; enum of_gpio_flags of_flags; unsigned long flag = GPIOF_DIR_OUT; int ret; hipcie = devm_kzalloc(dev, sizeof(*hipcie), GFP_KERNEL); if (!hipcie) return -ENOMEM; pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL); if (!pci) return -ENOMEM; hipcie->pci = pci; pp = &pci->pp; pci->dev = dev; pci->ops = &dw_pcie_ops; res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "control"); hipcie->ctrl = devm_ioremap_resource(dev, res); if (IS_ERR(hipcie->ctrl)) { dev_err(dev, "cannot get control reg base\n"); return PTR_ERR(hipcie->ctrl); } res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rc-dbi"); pci->dbi_base = devm_ioremap_resource(dev, res); if (IS_ERR(pci->dbi_base)) { dev_err(dev, "cannot get rc-dbi base\n"); return PTR_ERR(pci->dbi_base); } hipcie->reset_gpio = of_get_named_gpio_flags(np, "reset-gpios", 0, &of_flags); if (of_flags & OF_GPIO_ACTIVE_LOW) flag |= GPIOF_ACTIVE_LOW; if (gpio_is_valid(hipcie->reset_gpio)) { ret = devm_gpio_request_one(dev, hipcie->reset_gpio, flag, "PCIe device power control"); if (ret) { dev_err(dev, "unable to request gpio\n"); return ret; } } hipcie->aux_clk = devm_clk_get(dev, "aux"); if (IS_ERR(hipcie->aux_clk)) { dev_err(dev, "Failed to get PCIe aux clk\n"); return PTR_ERR(hipcie->aux_clk); } hipcie->pipe_clk = devm_clk_get(dev, "pipe"); if (IS_ERR(hipcie->pipe_clk)) { dev_err(dev, "Failed to get PCIe pipe clk\n"); return PTR_ERR(hipcie->pipe_clk); } hipcie->sys_clk = devm_clk_get(dev, "sys"); if (IS_ERR(hipcie->sys_clk)) { dev_err(dev, "Failed to get PCIEe sys clk\n"); return PTR_ERR(hipcie->sys_clk); } hipcie->bus_clk = devm_clk_get(dev, "bus"); if (IS_ERR(hipcie->bus_clk)) { dev_err(dev, "Failed to get PCIe bus clk\n"); return PTR_ERR(hipcie->bus_clk); } hipcie->soft_reset = devm_reset_control_get(dev, "soft"); if (IS_ERR(hipcie->soft_reset)) { dev_err(dev, "couldn't get soft reset\n"); return PTR_ERR(hipcie->soft_reset); } hipcie->sys_reset = devm_reset_control_get(dev, "sys"); if (IS_ERR(hipcie->sys_reset)) { dev_err(dev, "couldn't get sys reset\n"); return PTR_ERR(hipcie->sys_reset); } hipcie->bus_reset = devm_reset_control_get(dev, "bus"); if (IS_ERR(hipcie->bus_reset)) { dev_err(dev, "couldn't get bus reset\n"); return PTR_ERR(hipcie->bus_reset); } if (IS_ENABLED(CONFIG_PCI_MSI)) { pp->msi_irq = platform_get_irq_byname(pdev, "msi"); if (pp->msi_irq < 0) { dev_err(dev, "Failed to get MSI IRQ\n"); return pp->msi_irq; } ret = devm_request_irq(dev, pp->msi_irq, histb_pcie_msi_irq_handler, IRQF_SHARED, "histb-pcie-msi", pp); if (ret) { dev_err(dev, "cannot request MSI IRQ\n"); return ret; } } hipcie->phy = devm_phy_get(dev, "phy"); if (IS_ERR(hipcie->phy)) { dev_info(dev, "no pcie-phy found\n"); hipcie->phy = NULL; /* fall through here! * if no pcie-phy found, phy init * should be done under boot! */ } else { phy_init(hipcie->phy); } pp->root_bus_nr = -1; pp->ops = &histb_pcie_host_ops; platform_set_drvdata(pdev, hipcie); ret = histb_pcie_host_enable(pp); if (ret) { dev_err(dev, "failed to enable host\n"); return ret; } ret = dw_pcie_host_init(pp); if (ret) { dev_err(dev, "failed to initialize host\n"); return ret; } return 0; }
static int mmphw_probe(struct platform_device *pdev) { struct mmp_mach_plat_info *mi; struct resource *res; int ret, i, size, irq; struct mmphw_path_plat *path_plat; struct mmphw_ctrl *ctrl = NULL; /* get resources from platform data */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (res == NULL) { dev_err(&pdev->dev, "%s: no IO memory defined\n", __func__); ret = -ENOENT; goto failed; } irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(&pdev->dev, "%s: no IRQ defined\n", __func__); ret = -ENOENT; goto failed; } /* get configs from platform data */ mi = pdev->dev.platform_data; if (mi == NULL || !mi->path_num || !mi->paths) { dev_err(&pdev->dev, "%s: no platform data defined\n", __func__); ret = -EINVAL; goto failed; } /* allocate */ size = sizeof(struct mmphw_ctrl) + sizeof(struct mmphw_path_plat) * mi->path_num; ctrl = devm_kzalloc(&pdev->dev, size, GFP_KERNEL); if (!ctrl) { ret = -ENOMEM; goto failed; } ctrl->name = mi->name; ctrl->path_num = mi->path_num; ctrl->dev = &pdev->dev; ctrl->irq = irq; platform_set_drvdata(pdev, ctrl); mutex_init(&ctrl->access_ok); /* map registers.*/ if (!devm_request_mem_region(ctrl->dev, res->start, resource_size(res), ctrl->name)) { dev_err(ctrl->dev, "can't request region for resource %pR\n", res); ret = -EINVAL; goto failed; } ctrl->reg_base = devm_ioremap_nocache(ctrl->dev, res->start, resource_size(res)); if (ctrl->reg_base == NULL) { dev_err(ctrl->dev, "%s: res %x - %x map failed\n", __func__, res->start, res->end); ret = -ENOMEM; goto failed; } /* request irq */ ret = devm_request_irq(ctrl->dev, ctrl->irq, ctrl_handle_irq, IRQF_SHARED, "lcd_controller", ctrl); if (ret < 0) { dev_err(ctrl->dev, "%s unable to request IRQ %d\n", __func__, ctrl->irq); ret = -ENXIO; goto failed; } /* get clock */ ctrl->clk = devm_clk_get(ctrl->dev, mi->clk_name); if (IS_ERR(ctrl->clk)) { dev_err(ctrl->dev, "unable to get clk %s\n", mi->clk_name); ret = -ENOENT; goto failed_get_clk; } clk_prepare_enable(ctrl->clk); /* init global regs */ ctrl_set_default(ctrl); /* init pathes from machine info and register them */ for (i = 0; i < ctrl->path_num; i++) { /* get from config and machine info */ path_plat = &ctrl->path_plats[i]; path_plat->id = i; path_plat->ctrl = ctrl; /* path init */ if (!path_init(path_plat, &mi->paths[i])) { ret = -EINVAL; goto failed_path_init; } } #ifdef CONFIG_MMP_DISP_SPI ret = lcd_spi_register(ctrl); if (ret < 0) goto failed_path_init; #endif dev_info(ctrl->dev, "device init done\n"); return 0; failed_path_init: for (i = 0; i < ctrl->path_num; i++) { path_plat = &ctrl->path_plats[i]; path_deinit(path_plat); } if (ctrl->clk) { devm_clk_put(ctrl->dev, ctrl->clk); clk_disable_unprepare(ctrl->clk); } failed_get_clk: devm_free_irq(ctrl->dev, ctrl->irq, ctrl); failed: if (ctrl) { if (ctrl->reg_base) devm_iounmap(ctrl->dev, ctrl->reg_base); devm_release_mem_region(ctrl->dev, res->start, resource_size(res)); devm_kfree(ctrl->dev, ctrl); } platform_set_drvdata(pdev, NULL); dev_err(&pdev->dev, "device init failed\n"); return ret; }
static int dwc3_omap_probe(struct platform_device *pdev) { struct device_node *node = pdev->dev.of_node; struct dwc3_omap *omap; struct resource *res; struct device *dev = &pdev->dev; struct regulator *vbus_reg = NULL; int ret; int irq; u32 reg; void __iomem *base; if (!node) { dev_err(dev, "device node not found\n"); return -EINVAL; } omap = devm_kzalloc(dev, sizeof(*omap), GFP_KERNEL); if (!omap) { dev_err(dev, "not enough memory\n"); return -ENOMEM; } platform_set_drvdata(pdev, omap); irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(dev, "missing IRQ resource\n"); return -EINVAL; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); base = devm_ioremap_resource(dev, res); if (IS_ERR(base)) return PTR_ERR(base); if (of_property_read_bool(node, "vbus-supply")) { vbus_reg = devm_regulator_get(dev, "vbus"); if (IS_ERR(vbus_reg)) { dev_err(dev, "vbus init failed\n"); return PTR_ERR(vbus_reg); } } omap->dev = dev; omap->irq = irq; omap->base = base; omap->vbus_reg = vbus_reg; dev->dma_mask = &dwc3_omap_dma_mask; pm_runtime_enable(dev); ret = pm_runtime_get_sync(dev); if (ret < 0) { dev_err(dev, "get_sync failed with err %d\n", ret); goto err0; } dwc3_omap_map_offset(omap); dwc3_omap_set_utmi_mode(omap); /* check the DMA Status */ reg = dwc3_omap_readl(omap->base, USBOTGSS_SYSCONFIG); omap->dma_status = !!(reg & USBOTGSS_SYSCONFIG_DMADISABLE); ret = devm_request_irq(dev, omap->irq, dwc3_omap_interrupt, 0, "dwc3-omap", omap); if (ret) { dev_err(dev, "failed to request IRQ #%d --> %d\n", omap->irq, ret); goto err1; } dwc3_omap_enable_irqs(omap); ret = dwc3_omap_extcon_register(omap); if (ret < 0) goto err2; ret = of_platform_populate(node, NULL, NULL, dev); if (ret) { dev_err(&pdev->dev, "failed to create dwc3 core\n"); goto err3; } return 0; err3: if (omap->extcon_vbus_dev.edev) extcon_unregister_interest(&omap->extcon_vbus_dev); if (omap->extcon_id_dev.edev) extcon_unregister_interest(&omap->extcon_id_dev); err2: dwc3_omap_disable_irqs(omap); err1: pm_runtime_put_sync(dev); err0: pm_runtime_disable(dev); return ret; }
static int xlnx_rtc_probe(struct platform_device *pdev) { struct xlnx_rtc_dev *xrtcdev; struct resource *res; int ret; unsigned int calibvalue; xrtcdev = devm_kzalloc(&pdev->dev, sizeof(*xrtcdev), GFP_KERNEL); if (!xrtcdev) return -ENOMEM; platform_set_drvdata(pdev, xrtcdev); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); xrtcdev->reg_base = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(xrtcdev->reg_base)) return PTR_ERR(xrtcdev->reg_base); xrtcdev->alarm_irq = platform_get_irq_byname(pdev, "alarm"); if (xrtcdev->alarm_irq < 0) { dev_err(&pdev->dev, "no irq resource\n"); return xrtcdev->alarm_irq; } ret = devm_request_irq(&pdev->dev, xrtcdev->alarm_irq, xlnx_rtc_interrupt, 0, dev_name(&pdev->dev), xrtcdev); if (ret) { dev_err(&pdev->dev, "request irq failed\n"); return ret; } xrtcdev->sec_irq = platform_get_irq_byname(pdev, "sec"); if (xrtcdev->sec_irq < 0) { dev_err(&pdev->dev, "no irq resource\n"); return xrtcdev->sec_irq; } ret = devm_request_irq(&pdev->dev, xrtcdev->sec_irq, xlnx_rtc_interrupt, 0, dev_name(&pdev->dev), xrtcdev); if (ret) { dev_err(&pdev->dev, "request irq failed\n"); return ret; } ret = of_property_read_u32(pdev->dev.of_node, "calibration", &calibvalue); if (ret) calibvalue = RTC_CALIB_DEF; xlnx_init_rtc(xrtcdev, calibvalue); device_init_wakeup(&pdev->dev, 1); xrtcdev->rtc = devm_rtc_device_register(&pdev->dev, pdev->name, &xlnx_rtc_ops, THIS_MODULE); if (IS_ERR(xrtcdev->rtc)) { return PTR_ERR(xrtcdev->rtc); } return 0; }
static int imx_keypad_probe(struct platform_device *pdev) { const struct matrix_keymap_data *keymap_data = dev_get_platdata(&pdev->dev); struct imx_keypad *keypad; struct input_dev *input_dev; struct resource *res; int irq, error, i, row, col; if (!keymap_data && !pdev->dev.of_node) { dev_err(&pdev->dev, "no keymap defined\n"); return -EINVAL; } irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(&pdev->dev, "no irq defined in platform data\n"); return irq; } input_dev = devm_input_allocate_device(&pdev->dev); if (!input_dev) { dev_err(&pdev->dev, "failed to allocate the input device\n"); return -ENOMEM; } keypad = devm_kzalloc(&pdev->dev, sizeof(*keypad), GFP_KERNEL); if (!keypad) { dev_err(&pdev->dev, "not enough memory for driver data\n"); return -ENOMEM; } keypad->input_dev = input_dev; keypad->irq = irq; keypad->stable_count = 0; timer_setup(&keypad->check_matrix_timer, imx_keypad_check_for_events, 0); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); keypad->mmio_base = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(keypad->mmio_base)) return PTR_ERR(keypad->mmio_base); keypad->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(keypad->clk)) { dev_err(&pdev->dev, "failed to get keypad clock\n"); return PTR_ERR(keypad->clk); } /* Init the Input device */ input_dev->name = pdev->name; input_dev->id.bustype = BUS_HOST; input_dev->dev.parent = &pdev->dev; input_dev->open = imx_keypad_open; input_dev->close = imx_keypad_close; error = matrix_keypad_build_keymap(keymap_data, NULL, MAX_MATRIX_KEY_ROWS, MAX_MATRIX_KEY_COLS, keypad->keycodes, input_dev); if (error) { dev_err(&pdev->dev, "failed to build keymap\n"); return error; } /* Search for rows and cols enabled */ for (row = 0; row < MAX_MATRIX_KEY_ROWS; row++) { for (col = 0; col < MAX_MATRIX_KEY_COLS; col++) { i = MATRIX_SCAN_CODE(row, col, MATRIX_ROW_SHIFT); if (keypad->keycodes[i] != KEY_RESERVED) { keypad->rows_en_mask |= 1 << row; keypad->cols_en_mask |= 1 << col; } } } dev_dbg(&pdev->dev, "enabled rows mask: %x\n", keypad->rows_en_mask); dev_dbg(&pdev->dev, "enabled cols mask: %x\n", keypad->cols_en_mask); __set_bit(EV_REP, input_dev->evbit); input_set_capability(input_dev, EV_MSC, MSC_SCAN); input_set_drvdata(input_dev, keypad); /* Ensure that the keypad will stay dormant until opened */ error = clk_prepare_enable(keypad->clk); if (error) return error; imx_keypad_inhibit(keypad); clk_disable_unprepare(keypad->clk); error = devm_request_irq(&pdev->dev, irq, imx_keypad_irq_handler, 0, pdev->name, keypad); if (error) { dev_err(&pdev->dev, "failed to request IRQ\n"); return error; } /* Register the input device */ error = input_register_device(input_dev); if (error) { dev_err(&pdev->dev, "failed to register input device\n"); return error; } platform_set_drvdata(pdev, keypad); device_init_wakeup(&pdev->dev, 1); return 0; }
static int ds1511_rtc_probe(struct platform_device *pdev) { struct rtc_device *rtc; struct resource *res; struct rtc_plat_data *pdata; int ret = 0; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) return -ENODEV; pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); if (!pdata) return -ENOMEM; pdata->size = resource_size(res); if (!devm_request_mem_region(&pdev->dev, res->start, pdata->size, pdev->name)) return -EBUSY; ds1511_base = devm_ioremap(&pdev->dev, res->start, pdata->size); if (!ds1511_base) return -ENOMEM; pdata->ioaddr = ds1511_base; pdata->irq = platform_get_irq(pdev, 0); /* * turn on the clock and the crystal, etc. */ rtc_write(0, RTC_CMD); rtc_write(0, RTC_CMD1); /* * clear the wdog counter */ rtc_write(0, DS1511_WD_MSEC); rtc_write(0, DS1511_WD_SEC); /* * start the clock */ rtc_enable_update(); /* * check for a dying bat-tree */ if (rtc_read(RTC_CMD1) & DS1511_BLF1) dev_warn(&pdev->dev, "voltage-low detected.\n"); spin_lock_init(&pdata->lock); platform_set_drvdata(pdev, pdata); /* * if the platform has an interrupt in mind for this device, * then by all means, set it */ if (pdata->irq > 0) { rtc_read(RTC_CMD1); if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt, IRQF_SHARED, pdev->name, pdev) < 0) { dev_warn(&pdev->dev, "interrupt not available.\n"); pdata->irq = 0; } } rtc = devm_rtc_device_register(&pdev->dev, pdev->name, &ds1511_rtc_ops, THIS_MODULE); if (IS_ERR(rtc)) return PTR_ERR(rtc); pdata->rtc = rtc; ret = sysfs_create_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr); return ret; }
static int fsl_esai_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; struct fsl_esai *esai_priv; struct resource *res; const uint32_t *iprop; void __iomem *regs; int irq, ret; esai_priv = devm_kzalloc(&pdev->dev, sizeof(*esai_priv), GFP_KERNEL); if (!esai_priv) return -ENOMEM; esai_priv->pdev = pdev; strncpy(esai_priv->name, np->name, sizeof(esai_priv->name) - 1); /* Get the addresses and IRQ */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); regs = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(regs)) return PTR_ERR(regs); esai_priv->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "core", regs, &fsl_esai_regmap_config); if (IS_ERR(esai_priv->regmap)) { dev_err(&pdev->dev, "failed to init regmap: %ld\n", PTR_ERR(esai_priv->regmap)); return PTR_ERR(esai_priv->regmap); } esai_priv->coreclk = devm_clk_get(&pdev->dev, "core"); if (IS_ERR(esai_priv->coreclk)) { dev_err(&pdev->dev, "failed to get core clock: %ld\n", PTR_ERR(esai_priv->coreclk)); return PTR_ERR(esai_priv->coreclk); } esai_priv->extalclk = devm_clk_get(&pdev->dev, "extal"); if (IS_ERR(esai_priv->extalclk)) dev_warn(&pdev->dev, "failed to get extal clock: %ld\n", PTR_ERR(esai_priv->extalclk)); esai_priv->fsysclk = devm_clk_get(&pdev->dev, "fsys"); if (IS_ERR(esai_priv->fsysclk)) dev_warn(&pdev->dev, "failed to get fsys clock: %ld\n", PTR_ERR(esai_priv->fsysclk)); esai_priv->spbaclk = devm_clk_get(&pdev->dev, "spba"); if (IS_ERR(esai_priv->spbaclk)) dev_warn(&pdev->dev, "failed to get spba clock: %ld\n", PTR_ERR(esai_priv->spbaclk)); irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(&pdev->dev, "no irq for node %s\n", pdev->name); return irq; } ret = devm_request_irq(&pdev->dev, irq, esai_isr, 0, esai_priv->name, esai_priv); if (ret) { dev_err(&pdev->dev, "failed to claim irq %u\n", irq); return ret; } /* Set a default slot number */ esai_priv->slots = 2; /* Set a default master/slave state */ esai_priv->slave_mode = true; /* Determine the FIFO depth */ iprop = of_get_property(np, "fsl,fifo-depth", NULL); if (iprop) esai_priv->fifo_depth = be32_to_cpup(iprop); else esai_priv->fifo_depth = 64; esai_priv->dma_params_tx.maxburst = 16; esai_priv->dma_params_rx.maxburst = 16; esai_priv->dma_params_tx.addr = res->start + REG_ESAI_ETDR; esai_priv->dma_params_rx.addr = res->start + REG_ESAI_ERDR; esai_priv->synchronous = of_property_read_bool(np, "fsl,esai-synchronous"); /* Implement full symmetry for synchronous mode */ if (esai_priv->synchronous) { fsl_esai_dai.symmetric_rates = 1; fsl_esai_dai.symmetric_channels = 1; fsl_esai_dai.symmetric_samplebits = 1; } dev_set_drvdata(&pdev->dev, esai_priv); /* Reset ESAI unit */ ret = regmap_write(esai_priv->regmap, REG_ESAI_ECR, ESAI_ECR_ERST); if (ret) { dev_err(&pdev->dev, "failed to reset ESAI: %d\n", ret); return ret; } /* * We need to enable ESAI so as to access some of its registers. * Otherwise, we would fail to dump regmap from user space. */ ret = regmap_write(esai_priv->regmap, REG_ESAI_ECR, ESAI_ECR_ESAIEN); if (ret) { dev_err(&pdev->dev, "failed to enable ESAI: %d\n", ret); return ret; } ret = devm_snd_soc_register_component(&pdev->dev, &fsl_esai_component, &fsl_esai_dai, 1); if (ret) { dev_err(&pdev->dev, "failed to register DAI: %d\n", ret); return ret; } ret = imx_pcm_dma_init(pdev, IMX_ESAI_DMABUF_SIZE); if (ret) dev_err(&pdev->dev, "failed to init imx pcm dma: %d\n", ret); return ret; }
static int __devinit cs5520_init_one(struct pci_dev *pdev, const struct pci_device_id *id) { static const unsigned int cmd_port[] = { 0x1F0, 0x170 }; static const unsigned int ctl_port[] = { 0x3F6, 0x376 }; struct ata_port_info pi = { .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .port_ops = &cs5520_port_ops, }; const struct ata_port_info *ppi[2]; u8 pcicfg; void __iomem *iomap[5]; struct ata_host *host; struct ata_ioports *ioaddr; int i, rc; rc = pcim_enable_device(pdev); if (rc) return rc; /* IDE port enable bits */ pci_read_config_byte(pdev, 0x60, &pcicfg); /* Check if the ATA ports are enabled */ if ((pcicfg & 3) == 0) return -ENODEV; ppi[0] = ppi[1] = &ata_dummy_port_info; if (pcicfg & 1) ppi[0] = π if (pcicfg & 2) ppi[1] = π if ((pcicfg & 0x40) == 0) { dev_printk(KERN_WARNING, &pdev->dev, "DMA mode disabled. Enabling.\n"); pci_write_config_byte(pdev, 0x60, pcicfg | 0x40); } pi.mwdma_mask = id->driver_data; host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2); if (!host) return -ENOMEM; /* Perform set up for DMA */ if (pci_enable_device_bars(pdev, 1<<2)) { printk(KERN_ERR DRV_NAME ": unable to configure BAR2.\n"); return -ENODEV; } if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) { printk(KERN_ERR DRV_NAME ": unable to configure DMA mask.\n"); return -ENODEV; } if (pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) { printk(KERN_ERR DRV_NAME ": unable to configure consistent DMA mask.\n"); return -ENODEV; } /* Map IO ports and initialize host accordingly */ iomap[0] = devm_ioport_map(&pdev->dev, cmd_port[0], 8); iomap[1] = devm_ioport_map(&pdev->dev, ctl_port[0], 1); iomap[2] = devm_ioport_map(&pdev->dev, cmd_port[1], 8); iomap[3] = devm_ioport_map(&pdev->dev, ctl_port[1], 1); iomap[4] = pcim_iomap(pdev, 2, 0); if (!iomap[0] || !iomap[1] || !iomap[2] || !iomap[3] || !iomap[4]) return -ENOMEM; ioaddr = &host->ports[0]->ioaddr; ioaddr->cmd_addr = iomap[0]; ioaddr->ctl_addr = iomap[1]; ioaddr->altstatus_addr = iomap[1]; ioaddr->bmdma_addr = iomap[4]; ata_sff_std_ports(ioaddr); ata_port_desc(host->ports[0], "cmd 0x%x ctl 0x%x", cmd_port[0], ctl_port[0]); ata_port_pbar_desc(host->ports[0], 4, 0, "bmdma"); ioaddr = &host->ports[1]->ioaddr; ioaddr->cmd_addr = iomap[2]; ioaddr->ctl_addr = iomap[3]; ioaddr->altstatus_addr = iomap[3]; ioaddr->bmdma_addr = iomap[4] + 8; ata_sff_std_ports(ioaddr); ata_port_desc(host->ports[1], "cmd 0x%x ctl 0x%x", cmd_port[1], ctl_port[1]); ata_port_pbar_desc(host->ports[1], 4, 8, "bmdma"); /* activate the host */ pci_set_master(pdev); rc = ata_host_start(host); if (rc) return rc; for (i = 0; i < 2; i++) { static const int irq[] = { 14, 15 }; struct ata_port *ap = host->ports[i]; if (ata_port_is_dummy(ap)) continue; rc = devm_request_irq(&pdev->dev, irq[ap->port_no], ata_sff_interrupt, 0, DRV_NAME, host); if (rc) return rc; ata_port_desc(ap, "irq %d", irq[i]); } return ata_host_register(host, &cs5520_sht); } #ifdef CONFIG_PM /** * cs5520_reinit_one - device resume * @pdev: PCI device * * Do any reconfiguration work needed by a resume from RAM. We need * to restore DMA mode support on BIOSen which disabled it */ static int cs5520_reinit_one(struct pci_dev *pdev) { struct ata_host *host = dev_get_drvdata(&pdev->dev); u8 pcicfg; int rc; rc = ata_pci_device_do_resume(pdev); if (rc) return rc; pci_read_config_byte(pdev, 0x60, &pcicfg); if ((pcicfg & 0x40) == 0) pci_write_config_byte(pdev, 0x60, pcicfg | 0x40); ata_host_resume(host); return 0; } /** * cs5520_pci_device_suspend - device suspend * @pdev: PCI device * * We have to cut and waste bits from the standard method because * the 5520 is a bit odd and not just a pure ATA device. As a result * we must not disable it. The needed code is short and this avoids * chip specific mess in the core code. */ static int cs5520_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) { struct ata_host *host = dev_get_drvdata(&pdev->dev); int rc = 0; rc = ata_host_suspend(host, mesg); if (rc) return rc; pci_save_state(pdev); return 0; } #endif /* CONFIG_PM */ /* For now keep DMA off. We can set it for all but A rev CS5510 once the core ATA code can handle it */ static const struct pci_device_id pata_cs5520[] = { { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), }, { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), }, { }, }; static struct pci_driver cs5520_pci_driver = { .name = DRV_NAME, .id_table = pata_cs5520, .probe = cs5520_init_one, .remove = ata_pci_remove_one, #ifdef CONFIG_PM .suspend = cs5520_pci_device_suspend, .resume = cs5520_reinit_one, #endif }; static int __init cs5520_init(void) { return pci_register_driver(&cs5520_pci_driver); } static void __exit cs5520_exit(void) { pci_unregister_driver(&cs5520_pci_driver); }
/** * exynos_drd_switch_init - Initializes DRD role switch. * * @drd: Pointer to DRD controller structure. * * Returns 0 on success otherwise negative errno. */ int exynos_drd_switch_init(struct exynos_drd *drd) { struct dwc3_exynos_data *pdata = drd->pdata; struct exynos_drd_switch *drd_switch; int ret = 0; unsigned long irq_flags = 0; dev_dbg(drd->dev, "%s\n", __func__); drd_switch = devm_kzalloc(drd->dev, sizeof(struct exynos_drd_switch), GFP_KERNEL); if (!drd_switch) { dev_err(drd->dev, "not enough memory for DRD switch\n"); return -ENOMEM; } drd_switch->core = &drd->core; atomic_set(&drd_switch->sm_reset, 0); /* ID pin gpio IRQ */ drd_switch->id_irq = pdata->id_irq; if (drd_switch->id_irq < 0) dev_dbg(drd->dev, "cannot find ID irq\n"); init_timer(&drd_switch->id_db_timer); drd_switch->id_db_timer.data = (unsigned long) drd_switch; drd_switch->id_db_timer.function = exynos_drd_switch_debounce; /* VBus pin gpio IRQ */ drd_switch->vbus_irq = pdata->vbus_irq; if (drd_switch->vbus_irq < 0) dev_dbg(drd->dev, "cannot find VBUS irq\n"); init_timer(&drd_switch->vbus_db_timer); drd_switch->vbus_db_timer.data = (unsigned long) drd_switch; drd_switch->vbus_db_timer.function = exynos_drd_switch_debounce; irq_flags = pdata->irq_flags; drd_switch->otg.set_peripheral = exynos_drd_switch_set_peripheral; drd_switch->otg.set_host = exynos_drd_switch_set_host; /* Save for using by host and peripheral */ drd->core.otg = &drd_switch->otg; drd_switch->otg.phy = devm_kzalloc(drd->dev, sizeof(struct usb_phy), GFP_KERNEL); if (!drd_switch->otg.phy) { dev_err(drd->dev, "cannot allocate OTG phy\n"); return -ENOMEM; } drd_switch->otg.phy->otg = &drd_switch->otg; drd_switch->otg.phy->dev = drd->dev; #if 0 /* * TODO: we need to have support for multiple transceivers here. * Kernel > 3.5 should already have it. Now it works only for one * drd channel. */ ret = usb_set_transceiver(drd_switch->otg.phy); if (ret) { dev_err(drd->dev, "failed to set transceiver, already exists\n", __func__); goto err2; } #endif spin_lock_init(&drd_switch->lock); wake_lock_init(&drd_switch->wakelock, WAKE_LOCK_SUSPEND, "drd_switch"); exynos_drd_switch_reset(drd, 0); drd_switch->wq = create_freezable_workqueue("drd_switch"); if (!drd_switch->wq) { dev_err(drd->dev, "cannot create workqueue\n"); ret = -ENOMEM; goto err_wq; } INIT_DELAYED_WORK(&drd_switch->work, exynos_drd_switch_work); if (drd_switch->id_irq >= 0) { ret = devm_request_irq(drd->dev, drd_switch->id_irq, exynos_drd_switch_id_interrupt, irq_flags, "drd_switch_id", drd_switch); if (ret) { dev_err(drd->dev, "cannot claim ID irq\n"); goto err_irq; } } if (drd_switch->vbus_irq >= 0) { ret = devm_request_irq(drd->dev, drd_switch->vbus_irq, exynos_drd_switch_vbus_interrupt, irq_flags, "drd_switch_vbus", drd_switch); if (ret) { dev_err(drd->dev, "cannot claim VBUS irq\n"); goto err_irq; } } ret = sysfs_create_group(&drd->dev->kobj, &exynos_drd_switch_attr_group); if (ret) { dev_err(drd->dev, "cannot create switch attributes\n"); goto err_irq; } dev_dbg(drd->dev, "DRD switch initialization finished normally\n"); return 0; err_irq: cancel_delayed_work_sync(&drd_switch->work); destroy_workqueue(drd_switch->wq); err_wq: wake_lock_destroy(&drd_switch->wakelock); return ret; }
static int hisi_powerkey_probe(struct platform_device *pdev) { struct hisi_powerkey_info *info = NULL; struct device *dev = &pdev->dev; int ret = 0; if(NULL == pdev) { dev_err(dev, "[Pwrkey]parameter error!\n"); ret = -EINVAL; return ret; } #ifdef CONFIG_FB_HI6220_CLCD init_timer(&lcd_pwr_status.lcd_dsm_t); lcd_pwr_status.panel_power_on = true; #endif info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL); if (!info) return -ENOMEM; info->idev = input_allocate_device(); if (!info->idev) { dev_err(&pdev->dev, "Failed to allocate input device\n"); ret = -ENOENT; return ret; } info->idev->name = "hisi_on"; info->idev->phys = "hisi_on/input0"; info->idev->dev.parent = &pdev->dev; info->idev->evbit[0] = BIT_MASK(EV_KEY); __set_bit(KEY_POWER, info->idev->keybit); wake_lock_init(&info->pwr_wake_lock, WAKE_LOCK_SUSPEND, "android-pwr"); #if defined (CONFIG_HUAWEI_DSM) /* initialize the statistic variable */ powerkey_press_count = 0; powerkey_last_press_time = 0; setup_timer(&dsm_powerkey_timer, powerkey_timer_func, (unsigned long)info); #endif info->irq[0] = platform_get_irq_byname(pdev, "down"); if (info->irq[0] < 0) { dev_err(dev, "failed to get down irq id\n"); ret = -ENOENT; goto unregister_err; } ret = devm_request_irq(dev, info->irq[0], hisi_powerkey_handler, IRQF_NO_SUSPEND, "down", info); if (ret < 0) { dev_err(dev, "failed to request down irq\n"); ret = -ENOENT; goto unregister_err; } info->irq[1] = platform_get_irq_byname(pdev, "up"); if (info->irq[1] < 0) { dev_err(dev, "failed to get up irq id\n"); ret = -ENOENT; goto unregister_err; } ret = devm_request_irq(dev, info->irq[1], hisi_powerkey_handler, IRQF_NO_SUSPEND, "up", info); if (ret < 0) { dev_err(dev, "failed to request up irq\n"); ret = -ENOENT; goto unregister_err; } info->irq[2] = platform_get_irq_byname(pdev, "hold 1s"); if (info->irq[2] < 0) { dev_err(dev, "failed to get hold 1s irq id\n"); ret = -ENOENT; goto unregister_err; } ret = devm_request_irq(dev, info->irq[2], hisi_powerkey_handler, IRQF_DISABLED, "hold 1s", info); if (ret < 0) { dev_err(dev, "failed to request hold 1s irq\n"); ret = -ENOENT; goto unregister_err; } info->irq[3] = platform_get_irq_byname(pdev, "hold 8s"); if (info->irq[3] >= 0) { ret = devm_request_irq(dev, info->irq[3], hisi_powerkey_handler, IRQF_DISABLED, "hold 8s", info); if (ret < 0) { dev_err(dev, "failed to request hold 8s irq\n"); ret = -ENOENT; goto unregister_err; } } info->irq[4] = platform_get_irq_byname(pdev, "hold 10s"); if (info->irq[4] >= 0) { ret = devm_request_irq(dev, info->irq[4], hisi_powerkey_handler, IRQF_DISABLED, "hold 10s", info); if (ret < 0) { dev_err(dev, "failed to request hold 10s irq\n"); ret = -ENOENT; goto unregister_err; } } ret = input_register_device(info->idev); if (ret) { dev_err(&pdev->dev, "Can't register input device: %d\n", ret); ret = -ENOENT; goto input_err; } platform_set_drvdata(pdev, info); #if defined (CONFIG_HUAWEI_DSM) if (!power_key_dclient) { power_key_dclient = dsm_register_client(&dsm_power_key); } mod_timer(&dsm_powerkey_timer, jiffies + STATISTIC_INTERVAL * HZ); #endif return ret; input_err: unregister_err: wake_lock_destroy(&info->pwr_wake_lock); input_free_device(info->idev); return ret; }
static int hdmi_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct resource *res; struct hdmi_device *hdmi_dev = NULL; int ret; dev_info(dev, "probe start\n"); hdmi_dev = devm_kzalloc(&pdev->dev, sizeof(struct hdmi_device), GFP_KERNEL); if (!hdmi_dev) { dev_err(&pdev->dev, "no memory for hdmi device\n"); return -ENOMEM; } hdmi_dev->dev = dev; /* store platform data ptr to mixer context */ of_property_read_u32(dev->of_node, "ip_ver", &hdmi_dev->ip_ver); dev_info(dev, "HDMI ip version %d\n", hdmi_dev->ip_ver); /* mapping HDMI registers */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(dev, "get hdmi memory resource failed.\n"); return -ENXIO; } hdmi_dev->regs = devm_request_and_ioremap(&pdev->dev, res); if (hdmi_dev->regs == NULL) { dev_err(dev, "failed to claim register region for hdmi\n"); return -ENOENT; } /* mapping HDMIPHY_APB registers */ res = platform_get_resource(pdev, IORESOURCE_MEM, 1); if (!res) { dev_err(dev, "get hdmiphy memory resource failed.\n"); return -ENXIO; } hdmi_dev->phy_regs = devm_request_and_ioremap(&pdev->dev, res); if (hdmi_dev->phy_regs == NULL) { dev_err(dev, "failed to claim register region for hdmiphy\n"); return -ENOENT; } /* Internal hpd */ res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (!res) { dev_err(dev, "get internal interrupt resource failed.\n"); return -ENXIO; } ret = devm_request_irq(dev, res->start, hdmi_irq_handler, 0, "hdmi-int", hdmi_dev); if (ret) { dev_err(dev, "request int interrupt failed.\n"); return ret; } else { hdmi_dev->int_irq = res->start; disable_irq(hdmi_dev->int_irq); dev_info(dev, "success request hdmi-int irq\n"); } /* setting v4l2 name to prevent WARN_ON in v4l2_device_register */ strlcpy(hdmi_dev->v4l2_dev.name, dev_name(dev), sizeof(hdmi_dev->v4l2_dev.name)); /* passing NULL owner prevents driver from erasing drvdata */ ret = v4l2_device_register(NULL, &hdmi_dev->v4l2_dev); if (ret) { dev_err(dev, "could not register v4l2 device.\n"); goto fail; } INIT_WORK(&hdmi_dev->hpd_work, hdmi_hpd_work); INIT_DELAYED_WORK(&hdmi_dev->hpd_work_ext, hdmi_hpd_work_ext); /* setting the clocks */ ret = hdmi_resources_init(hdmi_dev); if (ret) goto fail_vdev; /* HDMI pin control */ hdmi_dev->pinctrl = devm_pinctrl_get(dev); if (IS_ERR(hdmi_dev->pinctrl)) { dev_err(dev, "could not set hdmi internal hpd pins\n"); goto fail_clk; } else { hdmi_dev->pin_int = pinctrl_lookup_state(hdmi_dev->pinctrl, "hdmi_hdmi_hpd"); if(IS_ERR(hdmi_dev->pin_int)) { dev_err(dev, "could not get hdmi internal hpd pin state\n"); goto fail_clk; } hdmi_dev->pin_ext = pinctrl_lookup_state(hdmi_dev->pinctrl, "hdmi_ext_hpd"); if(IS_ERR(hdmi_dev->pin_ext)) { dev_err(dev, "could not get hdmi external hpd pin state\n"); goto fail_clk; } } /* setting the GPIO */ ret = hdmi_set_gpio(hdmi_dev); if (ret) { dev_err(dev, "failed to get GPIO\n"); goto fail_clk; } /* register the switch device for HPD */ hdmi_dev->hpd_switch.name = "hdmi"; ret = switch_dev_register(&hdmi_dev->hpd_switch); if (ret) { dev_err(dev, "request switch class failed.\n"); goto fail_gpio; } dev_info(dev, "success register switch device\n"); /* External hpd */ hdmi_dev->ext_irq = gpio_to_irq(hdmi_dev->res.gpio_hpd); ret = devm_request_irq(dev, hdmi_dev->ext_irq, hdmi_irq_handler_ext, IRQ_TYPE_EDGE_BOTH, "hdmi-ext", hdmi_dev); if (ret) { dev_err(dev, "request ext interrupt failed.\n"); goto fail_switch; } else { dev_info(dev, "success request hdmi-ext irq\n"); } #ifdef CONFIG_SEC_MHL_SUPPORT hdmi_dev->audio_ch_switch.name = "ch_hdmi_audio"; ret = switch_dev_register(&hdmi_dev->audio_ch_switch); if (ret) { dev_err(dev, "request hdmi_audio_switch class failed.\n"); goto fail_switch; } #endif mutex_init(&hdmi_dev->mutex); hdmi_dev->cur_timings = hdmi_conf[HDMI_DEFAULT_TIMINGS_IDX].dv_timings; hdmi_dev->cur_conf = hdmi_conf[HDMI_DEFAULT_TIMINGS_IDX].conf; /* default audio configuration : disable audio */ hdmi_dev->audio_enable = 1; hdmi_dev->audio_channel_count = 2; hdmi_dev->sample_rate = DEFAULT_SAMPLE_RATE; hdmi_dev->color_range = HDMI_RGB709_0_255; hdmi_dev->bits_per_sample = DEFAULT_BITS_PER_SAMPLE; hdmi_dev->audio_codec = DEFAULT_AUDIO_CODEC; /* hdmi audio master clock */ ret = hdmi_get_audio_master(hdmi_dev); if (ret) { hdmi_dev->audio_master_clk = 0; dev_warn(dev, "failed to get audio master information\n"); } /* default aspect ratio is 16:9 */ hdmi_dev->aspect = HDMI_ASPECT_RATIO_16_9; /* default HDMI streaming is stoped */ hdmi_dev->streaming = HDMI_STOP; /* register hdmi subdev as entity */ ret = hdmi_register_entity(hdmi_dev); if (ret) goto fail_mutex; hdmi_entity_info_print(hdmi_dev); pm_runtime_enable(dev); /* initialize hdcp resource */ ret = hdcp_prepare(hdmi_dev); if (ret) goto fail_mutex; /* work after booting */ queue_delayed_work(system_nrt_wq, &hdmi_dev->hpd_work_ext, msecs_to_jiffies(1500)); /* mapping SYSTEM registers */ ret = hdmi_get_sysreg_addr(hdmi_dev); if (ret) goto fail_mutex; dev_info(dev, "probe sucessful\n"); hdmi_debugfs_init(hdmi_dev); return 0; fail_mutex: mutex_destroy(&hdmi_dev->mutex); fail_switch: switch_dev_unregister(&hdmi_dev->hpd_switch); fail_gpio: gpio_free(hdmi_dev->res.gpio_hpd); gpio_free(hdmi_dev->res.gpio_ls); gpio_free(hdmi_dev->res.gpio_dcdc); fail_clk: hdmi_resources_cleanup(hdmi_dev); fail_vdev: v4l2_device_unregister(&hdmi_dev->v4l2_dev); fail: dev_err(dev, "probe failed\n"); return ret; }
static int i2c_pnx_probe(struct platform_device *pdev) { unsigned long tmp; int ret = 0; struct i2c_pnx_algo_data *alg_data; unsigned long freq; struct resource *res; u32 speed = I2C_PNX_SPEED_KHZ_DEFAULT * 1000; alg_data = devm_kzalloc(&pdev->dev, sizeof(*alg_data), GFP_KERNEL); if (!alg_data) return -ENOMEM; platform_set_drvdata(pdev, alg_data); alg_data->adapter.dev.parent = &pdev->dev; alg_data->adapter.algo = &pnx_algorithm; alg_data->adapter.algo_data = alg_data; alg_data->adapter.nr = pdev->id; alg_data->timeout = I2C_PNX_TIMEOUT_DEFAULT; #ifdef CONFIG_OF alg_data->adapter.dev.of_node = of_node_get(pdev->dev.of_node); if (pdev->dev.of_node) { of_property_read_u32(pdev->dev.of_node, "clock-frequency", &speed); /* * At this point, it is planned to add an OF timeout property. * As soon as there is a consensus about how to call and handle * this, sth. like the following can be put here: * * of_property_read_u32(pdev->dev.of_node, "timeout", * &alg_data->timeout); */ } #endif alg_data->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(alg_data->clk)) return PTR_ERR(alg_data->clk); setup_timer(&alg_data->mif.timer, i2c_pnx_timeout, (unsigned long)alg_data); snprintf(alg_data->adapter.name, sizeof(alg_data->adapter.name), "%s", pdev->name); /* Register I/O resource */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); alg_data->ioaddr = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(alg_data->ioaddr)) return PTR_ERR(alg_data->ioaddr); ret = clk_prepare_enable(alg_data->clk); if (ret) return ret; freq = clk_get_rate(alg_data->clk); /* * Clock Divisor High This value is the number of system clocks * the serial clock (SCL) will be high. * For example, if the system clock period is 50 ns and the maximum * desired serial period is 10000 ns (100 kHz), then CLKHI would be * set to 0.5*(f_sys/f_i2c)-2=0.5*(20e6/100e3)-2=98. The actual value * programmed into CLKHI will vary from this slightly due to * variations in the output pad's rise and fall times as well as * the deglitching filter length. */ tmp = (freq / speed) / 2 - 2; if (tmp > 0x3FF) tmp = 0x3FF; iowrite32(tmp, I2C_REG_CKH(alg_data)); iowrite32(tmp, I2C_REG_CKL(alg_data)); iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data)); if (wait_reset(alg_data)) { ret = -ENODEV; goto out_clock; } init_completion(&alg_data->mif.complete); alg_data->irq = platform_get_irq(pdev, 0); if (alg_data->irq < 0) { dev_err(&pdev->dev, "Failed to get IRQ from platform resource\n"); ret = alg_data->irq; goto out_clock; } ret = devm_request_irq(&pdev->dev, alg_data->irq, i2c_pnx_interrupt, 0, pdev->name, alg_data); if (ret) goto out_clock; /* Register this adapter with the I2C subsystem */ ret = i2c_add_numbered_adapter(&alg_data->adapter); if (ret < 0) { dev_err(&pdev->dev, "I2C: Failed to add bus\n"); goto out_clock; } dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n", alg_data->adapter.name, res->start, alg_data->irq); return 0; out_clock: clk_disable_unprepare(alg_data->clk); return ret; }
static int em_gio_probe(struct platform_device *pdev) { struct gpio_em_config pdata_dt; struct gpio_em_config *pdata = dev_get_platdata(&pdev->dev); struct em_gio_priv *p; struct resource *io[2], *irq[2]; struct gpio_chip *gpio_chip; struct irq_chip *irq_chip; const char *name = dev_name(&pdev->dev); int ret; p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL); if (!p) { ret = -ENOMEM; goto err0; } p->pdev = pdev; platform_set_drvdata(pdev, p); spin_lock_init(&p->sense_lock); io[0] = platform_get_resource(pdev, IORESOURCE_MEM, 0); io[1] = platform_get_resource(pdev, IORESOURCE_MEM, 1); irq[0] = platform_get_resource(pdev, IORESOURCE_IRQ, 0); irq[1] = platform_get_resource(pdev, IORESOURCE_IRQ, 1); if (!io[0] || !io[1] || !irq[0] || !irq[1]) { dev_err(&pdev->dev, "missing IRQ or IOMEM\n"); ret = -EINVAL; goto err0; } p->base0 = devm_ioremap_nocache(&pdev->dev, io[0]->start, resource_size(io[0])); if (!p->base0) { dev_err(&pdev->dev, "failed to remap low I/O memory\n"); ret = -ENXIO; goto err0; } p->base1 = devm_ioremap_nocache(&pdev->dev, io[1]->start, resource_size(io[1])); if (!p->base1) { dev_err(&pdev->dev, "failed to remap high I/O memory\n"); ret = -ENXIO; goto err0; } if (!pdata) { memset(&pdata_dt, 0, sizeof(pdata_dt)); pdata = &pdata_dt; if (of_property_read_u32(pdev->dev.of_node, "ngpios", &pdata->number_of_pins)) { dev_err(&pdev->dev, "Missing ngpios OF property\n"); ret = -EINVAL; goto err0; } pdata->gpio_base = -1; } gpio_chip = &p->gpio_chip; gpio_chip->of_node = pdev->dev.of_node; gpio_chip->direction_input = em_gio_direction_input; gpio_chip->get = em_gio_get; gpio_chip->direction_output = em_gio_direction_output; gpio_chip->set = em_gio_set; gpio_chip->to_irq = em_gio_to_irq; gpio_chip->request = em_gio_request; gpio_chip->free = em_gio_free; gpio_chip->label = name; gpio_chip->dev = &pdev->dev; gpio_chip->owner = THIS_MODULE; gpio_chip->base = pdata->gpio_base; gpio_chip->ngpio = pdata->number_of_pins; irq_chip = &p->irq_chip; irq_chip->name = name; irq_chip->irq_mask = em_gio_irq_disable; irq_chip->irq_unmask = em_gio_irq_enable; irq_chip->irq_set_type = em_gio_irq_set_type; irq_chip->irq_request_resources = em_gio_irq_reqres; irq_chip->irq_release_resources = em_gio_irq_relres; irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND; p->irq_domain = irq_domain_add_simple(pdev->dev.of_node, pdata->number_of_pins, pdata->irq_base, &em_gio_irq_domain_ops, p); if (!p->irq_domain) { ret = -ENXIO; dev_err(&pdev->dev, "cannot initialize irq domain\n"); goto err0; } if (devm_request_irq(&pdev->dev, irq[0]->start, em_gio_irq_handler, 0, name, p)) { dev_err(&pdev->dev, "failed to request low IRQ\n"); ret = -ENOENT; goto err1; } if (devm_request_irq(&pdev->dev, irq[1]->start, em_gio_irq_handler, 0, name, p)) { dev_err(&pdev->dev, "failed to request high IRQ\n"); ret = -ENOENT; goto err1; } ret = gpiochip_add(gpio_chip); if (ret) { dev_err(&pdev->dev, "failed to add GPIO controller\n"); goto err1; } if (pdata->pctl_name) { ret = gpiochip_add_pin_range(gpio_chip, pdata->pctl_name, 0, gpio_chip->base, gpio_chip->ngpio); if (ret < 0) dev_warn(&pdev->dev, "failed to add pin range\n"); } return 0; err1: irq_domain_remove(p->irq_domain); err0: return ret; }
static int wl1251_spi_probe(struct spi_device *spi) { struct wl1251_platform_data *pdata = dev_get_platdata(&spi->dev); struct device_node *np = spi->dev.of_node; struct ieee80211_hw *hw; struct wl1251 *wl; int ret; if (!np && !pdata) { wl1251_error("no platform data"); return -ENODEV; } hw = wl1251_alloc_hw(); if (IS_ERR(hw)) return PTR_ERR(hw); wl = hw->priv; SET_IEEE80211_DEV(hw, &spi->dev); spi_set_drvdata(spi, wl); wl->if_priv = spi; wl->if_ops = &wl1251_spi_ops; /* This is the only SPI value that we need to set here, the rest * comes from the board-peripherals file */ spi->bits_per_word = 32; ret = spi_setup(spi); if (ret < 0) { wl1251_error("spi_setup failed"); goto out_free; } if (np) { wl->use_eeprom = of_property_read_bool(np, "ti,wl1251-has-eeprom"); wl->power_gpio = of_get_named_gpio(np, "ti,power-gpio", 0); } else if (pdata) { wl->power_gpio = pdata->power_gpio; wl->use_eeprom = pdata->use_eeprom; } if (wl->power_gpio == -EPROBE_DEFER) { ret = -EPROBE_DEFER; goto out_free; } if (gpio_is_valid(wl->power_gpio)) { ret = devm_gpio_request_one(&spi->dev, wl->power_gpio, GPIOF_OUT_INIT_LOW, "wl1251 power"); if (ret) { wl1251_error("Failed to request gpio: %d\n", ret); goto out_free; } } else { wl1251_error("set power gpio missing in platform data"); ret = -ENODEV; goto out_free; } wl->irq = spi->irq; if (wl->irq < 0) { wl1251_error("irq missing in platform data"); ret = -ENODEV; goto out_free; } irq_set_status_flags(wl->irq, IRQ_NOAUTOEN); ret = devm_request_irq(&spi->dev, wl->irq, wl1251_irq, 0, DRIVER_NAME, wl); if (ret < 0) { wl1251_error("request_irq() failed: %d", ret); goto out_free; } irq_set_irq_type(wl->irq, IRQ_TYPE_EDGE_RISING); wl->vio = devm_regulator_get(&spi->dev, "vio"); if (IS_ERR(wl->vio)) { ret = PTR_ERR(wl->vio); wl1251_error("vio regulator missing: %d", ret); goto out_free; } ret = regulator_enable(wl->vio); if (ret) goto out_free; ret = wl1251_init_ieee80211(wl); if (ret) goto disable_regulator; return 0; disable_regulator: regulator_disable(wl->vio); out_free: ieee80211_free_hw(hw); return ret; }
static int spear_adc_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; struct device *dev = &pdev->dev; struct spear_adc_info *info; struct iio_dev *iodev = NULL; int ret = -ENODEV; int irq; iodev = devm_iio_device_alloc(dev, sizeof(struct spear_adc_info)); if (!iodev) { dev_err(dev, "failed allocating iio device\n"); return -ENOMEM; } info = iio_priv(iodev); info->np = np; /* * SPEAr600 has a different register layout than other SPEAr SoC's * (e.g. SPEAr3xx). Let's provide two register base addresses * to support multi-arch kernels. */ info->adc_base_spear6xx = of_iomap(np, 0); if (!info->adc_base_spear6xx) { dev_err(dev, "failed mapping memory\n"); return -ENOMEM; } info->adc_base_spear3xx = (struct adc_regs_spear3xx __iomem *)info->adc_base_spear6xx; info->clk = clk_get(dev, NULL); if (IS_ERR(info->clk)) { dev_err(dev, "failed getting clock\n"); goto errout1; } ret = clk_prepare_enable(info->clk); if (ret) { dev_err(dev, "failed enabling clock\n"); goto errout2; } irq = platform_get_irq(pdev, 0); if (irq <= 0) { dev_err(dev, "failed getting interrupt resource\n"); ret = -EINVAL; goto errout3; } ret = devm_request_irq(dev, irq, spear_adc_isr, 0, MOD_NAME, info); if (ret < 0) { dev_err(dev, "failed requesting interrupt\n"); goto errout3; } if (of_property_read_u32(np, "sampling-frequency", &info->sampling_freq)) { dev_err(dev, "sampling-frequency missing in DT\n"); ret = -EINVAL; goto errout3; } /* * Optional avg_samples defaults to 0, resulting in single data * conversion */ of_property_read_u32(np, "average-samples", &info->avg_samples); /* * Optional vref_external defaults to 0, resulting in internal vref * selection */ of_property_read_u32(np, "vref-external", &info->vref_external); spear_adc_configure(info); platform_set_drvdata(pdev, iodev); init_completion(&info->completion); iodev->name = MOD_NAME; iodev->dev.parent = dev; iodev->info = &spear_adc_iio_info; iodev->modes = INDIO_DIRECT_MODE; iodev->channels = spear_adc_iio_channels; iodev->num_channels = ARRAY_SIZE(spear_adc_iio_channels); ret = iio_device_register(iodev); if (ret) goto errout3; dev_info(dev, "SPEAR ADC driver loaded, IRQ %d\n", irq); return 0; errout3: clk_disable_unprepare(info->clk); errout2: clk_put(info->clk); errout1: iounmap(info->adc_base_spear6xx); return ret; }
static int mv_otg_probe(struct platform_device *pdev) { struct mv_usb_platform_data *pdata = pdev->dev.platform_data; struct mv_otg *mvotg; struct usb_otg *otg; struct resource *r; int retval = 0, i; if (pdata == NULL) { dev_err(&pdev->dev, "failed to get platform data\n"); return -ENODEV; } mvotg = devm_kzalloc(&pdev->dev, sizeof(*mvotg), GFP_KERNEL); if (!mvotg) { dev_err(&pdev->dev, "failed to allocate memory!\n"); return -ENOMEM; } otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL); if (!otg) return -ENOMEM; platform_set_drvdata(pdev, mvotg); mvotg->pdev = pdev; mvotg->pdata = pdata; mvotg->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(mvotg->clk)) return PTR_ERR(mvotg->clk); mvotg->qwork = create_singlethread_workqueue("mv_otg_queue"); if (!mvotg->qwork) { dev_dbg(&pdev->dev, "cannot create workqueue for OTG\n"); return -ENOMEM; } INIT_DELAYED_WORK(&mvotg->work, mv_otg_work); /* OTG common part */ mvotg->pdev = pdev; mvotg->phy.dev = &pdev->dev; mvotg->phy.otg = otg; mvotg->phy.label = driver_name; mvotg->phy.state = OTG_STATE_UNDEFINED; otg->phy = &mvotg->phy; otg->set_host = mv_otg_set_host; otg->set_peripheral = mv_otg_set_peripheral; otg->set_vbus = mv_otg_set_vbus; for (i = 0; i < OTG_TIMER_NUM; i++) init_timer(&mvotg->otg_ctrl.timer[i]); r = platform_get_resource_byname(mvotg->pdev, IORESOURCE_MEM, "phyregs"); if (r == NULL) { dev_err(&pdev->dev, "no phy I/O memory resource defined\n"); retval = -ENODEV; goto err_destroy_workqueue; } mvotg->phy_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r)); if (mvotg->phy_regs == NULL) { dev_err(&pdev->dev, "failed to map phy I/O memory\n"); retval = -EFAULT; goto err_destroy_workqueue; } r = platform_get_resource_byname(mvotg->pdev, IORESOURCE_MEM, "capregs"); if (r == NULL) { dev_err(&pdev->dev, "no I/O memory resource defined\n"); retval = -ENODEV; goto err_destroy_workqueue; } mvotg->cap_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r)); if (mvotg->cap_regs == NULL) { dev_err(&pdev->dev, "failed to map I/O memory\n"); retval = -EFAULT; goto err_destroy_workqueue; } /* we will acces controller register, so enable the udc controller */ retval = mv_otg_enable_internal(mvotg); if (retval) { dev_err(&pdev->dev, "mv otg enable error %d\n", retval); goto err_destroy_workqueue; } mvotg->op_regs = (struct mv_otg_regs __iomem *) ((unsigned long) mvotg->cap_regs + (readl(mvotg->cap_regs) & CAPLENGTH_MASK)); if (pdata->id) { retval = devm_request_threaded_irq(&pdev->dev, pdata->id->irq, NULL, mv_otg_inputs_irq, IRQF_ONESHOT, "id", mvotg); if (retval) { dev_info(&pdev->dev, "Failed to request irq for ID\n"); pdata->id = NULL; } } if (pdata->vbus) { mvotg->clock_gating = 1; retval = devm_request_threaded_irq(&pdev->dev, pdata->vbus->irq, NULL, mv_otg_inputs_irq, IRQF_ONESHOT, "vbus", mvotg); if (retval) { dev_info(&pdev->dev, "Failed to request irq for VBUS, " "disable clock gating\n"); mvotg->clock_gating = 0; pdata->vbus = NULL; } } if (pdata->disable_otg_clock_gating) mvotg->clock_gating = 0; mv_otg_reset(mvotg); mv_otg_init_irq(mvotg); r = platform_get_resource(mvotg->pdev, IORESOURCE_IRQ, 0); if (r == NULL) { dev_err(&pdev->dev, "no IRQ resource defined\n"); retval = -ENODEV; goto err_disable_clk; } mvotg->irq = r->start; if (devm_request_irq(&pdev->dev, mvotg->irq, mv_otg_irq, IRQF_SHARED, driver_name, mvotg)) { dev_err(&pdev->dev, "Request irq %d for OTG failed\n", mvotg->irq); mvotg->irq = 0; retval = -ENODEV; goto err_disable_clk; } retval = usb_add_phy(&mvotg->phy, USB_PHY_TYPE_USB2); if (retval < 0) { dev_err(&pdev->dev, "can't register transceiver, %d\n", retval); goto err_disable_clk; } retval = sysfs_create_group(&pdev->dev.kobj, &inputs_attr_group); if (retval < 0) { dev_dbg(&pdev->dev, "Can't register sysfs attr group: %d\n", retval); goto err_remove_phy; } spin_lock_init(&mvotg->wq_lock); if (spin_trylock(&mvotg->wq_lock)) { mv_otg_run_state_machine(mvotg, 2 * HZ); spin_unlock(&mvotg->wq_lock); } dev_info(&pdev->dev, "successful probe OTG device %s clock gating.\n", mvotg->clock_gating ? "with" : "without"); return 0; err_remove_phy: usb_remove_phy(&mvotg->phy); err_disable_clk: mv_otg_disable_internal(mvotg); err_destroy_workqueue: flush_workqueue(mvotg->qwork); destroy_workqueue(mvotg->qwork); platform_set_drvdata(pdev, NULL); return retval; }
static int spear_kbd_probe(struct platform_device *pdev) { struct kbd_platform_data *pdata = dev_get_platdata(&pdev->dev); const struct matrix_keymap_data *keymap = pdata ? pdata->keymap : NULL; struct spear_kbd *kbd; struct input_dev *input_dev; struct resource *res; int irq; int error; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(&pdev->dev, "no keyboard resource defined\n"); return -EBUSY; } irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(&pdev->dev, "not able to get irq for the device\n"); return irq; } kbd = devm_kzalloc(&pdev->dev, sizeof(*kbd), GFP_KERNEL); if (!kbd) { dev_err(&pdev->dev, "not enough memory for driver data\n"); return -ENOMEM; } input_dev = devm_input_allocate_device(&pdev->dev); if (!input_dev) { dev_err(&pdev->dev, "unable to allocate input device\n"); return -ENOMEM; } kbd->input = input_dev; kbd->irq = irq; if (!pdata) { error = spear_kbd_parse_dt(pdev, kbd); if (error) return error; } else { kbd->mode = pdata->mode; kbd->rep = pdata->rep; kbd->suspended_rate = pdata->suspended_rate; } kbd->io_base = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(kbd->io_base)) return PTR_ERR(kbd->io_base); kbd->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(kbd->clk)) return PTR_ERR(kbd->clk); input_dev->name = "Spear Keyboard"; input_dev->phys = "keyboard/input0"; input_dev->id.bustype = BUS_HOST; input_dev->id.vendor = 0x0001; input_dev->id.product = 0x0001; input_dev->id.version = 0x0100; input_dev->open = spear_kbd_open; input_dev->close = spear_kbd_close; error = matrix_keypad_build_keymap(keymap, NULL, NUM_ROWS, NUM_COLS, kbd->keycodes, input_dev); if (error) { dev_err(&pdev->dev, "Failed to build keymap\n"); return error; } if (kbd->rep) __set_bit(EV_REP, input_dev->evbit); input_set_capability(input_dev, EV_MSC, MSC_SCAN); input_set_drvdata(input_dev, kbd); error = devm_request_irq(&pdev->dev, irq, spear_kbd_interrupt, 0, "keyboard", kbd); if (error) { dev_err(&pdev->dev, "request_irq failed\n"); return error; } error = clk_prepare(kbd->clk); if (error) return error; error = input_register_device(input_dev); if (error) { dev_err(&pdev->dev, "Unable to register keyboard device\n"); clk_unprepare(kbd->clk); return error; } device_init_wakeup(&pdev->dev, 1); platform_set_drvdata(pdev, kbd); return 0; }
static int __devinit pil_dsps_driver_probe(struct platform_device *pdev) { struct dsps_data *drv; struct pil_desc *desc; struct resource *res; int ret; drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL); if (!drv) return -ENOMEM; platform_set_drvdata(pdev, drv); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) return -EINVAL; drv->base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); if (!drv->base) return -ENOMEM; res = platform_get_resource(pdev, IORESOURCE_MEM, 1); if (res) { drv->ppss_base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); if (!drv->ppss_base) return -ENOMEM; } desc = &drv->desc; desc->name = pdev->dev.platform_data; desc->dev = &pdev->dev; desc->owner = THIS_MODULE; desc->flags = PIL_SKIP_ENTRY_CHECK; if (pas_supported(PAS_DSPS) > 0) { desc->ops = &pil_dsps_ops_trusted; dev_info(&pdev->dev, "using secure boot\n"); } else { desc->ops = &pil_dsps_ops; dev_info(&pdev->dev, "using non-secure boot\n"); } ret = pil_desc_init(desc); if (ret) return ret; drv->ramdump_dev = create_ramdump_device("dsps", &pdev->dev); if (!drv->ramdump_dev) { ret = -ENOMEM; goto err_ramdump; } drv->smem_ramdump_segments[0].address = PHYS_OFFSET - SZ_2M; drv->smem_ramdump_segments[0].size = SZ_2M; drv->smem_ramdump_dev = create_ramdump_device("smem-dsps", &pdev->dev); if (!drv->smem_ramdump_dev) { ret = -ENOMEM; goto err_smem_ramdump; } drv->subsys_desc.name = "dsps"; drv->subsys_desc.dev = &pdev->dev; drv->subsys_desc.owner = THIS_MODULE; drv->subsys_desc.start = dsps_start; drv->subsys_desc.stop = dsps_stop; drv->subsys_desc.shutdown = dsps_shutdown; drv->subsys_desc.powerup = dsps_powerup; drv->subsys_desc.ramdump = dsps_ramdump, drv->subsys_desc.crash_shutdown = dsps_crash_shutdown; drv->subsys = subsys_register(&drv->subsys_desc); if (IS_ERR(drv->subsys)) { ret = PTR_ERR(drv->subsys); goto err_subsys; } ret = smsm_state_cb_register(SMSM_DSPS_STATE, SMSM_RESET, dsps_smsm_state_cb, drv); if (ret) goto err_smsm; drv->wdog_irq = platform_get_irq(pdev, 0); if (drv->wdog_irq >= 0) { ret = devm_request_irq(&pdev->dev, drv->wdog_irq, dsps_wdog_bite_irq, IRQF_TRIGGER_RISING, "dsps_wdog", drv); if (ret) { dev_err(&pdev->dev, "request_irq failed\n"); goto err_smsm; } } else { drv->wdog_irq = -1; dev_dbg(&pdev->dev, "ppss_wdog not supported\n"); } return 0; err_smsm: subsys_unregister(drv->subsys); err_subsys: destroy_ramdump_device(drv->smem_ramdump_dev); err_smem_ramdump: destroy_ramdump_device(drv->ramdump_dev); err_ramdump: pil_desc_release(desc); return ret; }
static int __devinit pil_pronto_probe(struct platform_device *pdev) { struct pronto_data *drv; struct resource *res; struct pil_desc *desc; int ret, err_fatal_gpio, irq; uint32_t regval; int clk_ready = of_get_named_gpio(pdev->dev.of_node, "qcom,gpio-proxy-unvote", 0); if (clk_ready < 0) return clk_ready; clk_ready = gpio_to_irq(clk_ready); if (clk_ready < 0) return clk_ready; drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL); if (!drv) return -ENOMEM; platform_set_drvdata(pdev, drv); drv->irq = platform_get_irq(pdev, 0); if (drv->irq < 0) return drv->irq; res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pmu_base"); drv->base = devm_request_and_ioremap(&pdev->dev, res); if (!drv->base) return -ENOMEM; res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "clk_base"); drv->reset_base = devm_request_and_ioremap(&pdev->dev, res); if (!drv->reset_base) return -ENOMEM; res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "halt_base"); drv->axi_halt_base = devm_request_and_ioremap(&pdev->dev, res); if (!drv->axi_halt_base) return -ENOMEM; desc = &drv->desc; ret = of_property_read_string(pdev->dev.of_node, "qcom,firmware-name", &desc->name); if (ret) return ret; err_fatal_gpio = of_get_named_gpio(pdev->dev.of_node, "qcom,gpio-err-fatal", 0); if (err_fatal_gpio < 0) return err_fatal_gpio; irq = gpio_to_irq(err_fatal_gpio); if (irq < 0) return irq; drv->err_fatal_irq = irq; drv->force_stop_gpio = of_get_named_gpio(pdev->dev.of_node, "qcom,gpio-force-stop", 0); if (drv->force_stop_gpio < 0) return drv->force_stop_gpio; desc->dev = &pdev->dev; desc->owner = THIS_MODULE; desc->proxy_timeout = 10000; desc->proxy_unvote_irq = clk_ready; if (pas_supported(PAS_WCNSS) > 0) { desc->ops = &pil_pronto_ops_trusted; dev_info(&pdev->dev, "using secure boot\n"); } else { desc->ops = &pil_pronto_ops; dev_info(&pdev->dev, "using non-secure boot\n"); } drv->vreg = devm_regulator_get(&pdev->dev, "vdd_pronto_pll"); if (IS_ERR(drv->vreg)) { dev_err(&pdev->dev, "failed to get pronto pll supply"); return PTR_ERR(drv->vreg); } ret = regulator_set_voltage(drv->vreg, 1800000, 1800000); if (ret) { dev_err(&pdev->dev, "failed to set pll supply voltage\n"); return ret; } ret = regulator_set_optimum_mode(drv->vreg, 18000); if (ret < 0) { dev_err(&pdev->dev, "failed to set pll supply mode\n"); return ret; } drv->cxo = devm_clk_get(&pdev->dev, "xo"); if (IS_ERR(drv->cxo)) return PTR_ERR(drv->cxo); ret = pil_desc_init(desc); if (ret) return ret; drv->subsys_desc.name = desc->name; drv->subsys_desc.dev = &pdev->dev; drv->subsys_desc.owner = THIS_MODULE; drv->subsys_desc.shutdown = wcnss_shutdown; drv->subsys_desc.powerup = wcnss_powerup; drv->subsys_desc.ramdump = wcnss_ramdump; drv->subsys_desc.crash_shutdown = crash_shutdown; drv->subsys_desc.start = pronto_start; drv->subsys_desc.stop = pronto_stop; ret = of_get_named_gpio(pdev->dev.of_node, "qcom,gpio-err-ready", 0); if (ret < 0) return ret; ret = gpio_to_irq(ret); if (ret < 0) return ret; drv->subsys_desc.err_ready_irq = ret; INIT_DELAYED_WORK(&drv->cancel_vote_work, wcnss_post_bootup); drv->subsys = subsys_register(&drv->subsys_desc); if (IS_ERR(drv->subsys)) { ret = PTR_ERR(drv->subsys); goto err_subsys; } ret = devm_request_irq(&pdev->dev, drv->irq, wcnss_wdog_bite_irq_hdlr, IRQF_TRIGGER_HIGH, "wcnss_wdog", drv); if (ret < 0) goto err_irq; ret = devm_request_irq(&pdev->dev, drv->err_fatal_irq, wcnss_err_fatal_intr_handler, IRQF_TRIGGER_RISING, "pil-pronto", drv); if (ret < 0) { dev_err(&pdev->dev, "Unable to register SMP2P err fatal handler!\n"); goto err_irq; } drv->ramdump_dev = create_ramdump_device("pronto", &pdev->dev); if (!drv->ramdump_dev) { ret = -ENOMEM; goto err_irq; } /* Initialize common_ss GDSCR to wait 4 cycles between states */ regval = readl_relaxed(drv->base + PRONTO_PMU_COMMON_GDSCR) & PRONTO_PMU_COMMON_GDSCR_SW_COLLAPSE; regval |= (2 << EN_REST_WAIT) | (2 << EN_FEW_WAIT) | (2 << CLK_DIS_WAIT); writel_relaxed(regval, drv->base + PRONTO_PMU_COMMON_GDSCR); return 0; err_irq: subsys_unregister(drv->subsys); err_subsys: pil_desc_release(desc); return ret; }
static int __devinit tiny_spi_probe(struct platform_device *pdev) { struct tiny_spi_platform_data *platp = pdev->dev.platform_data; struct tiny_spi *hw; struct spi_master *master; struct resource *res; unsigned int i; int err = -ENODEV; master = spi_alloc_master(&pdev->dev, sizeof(struct tiny_spi)); if (!master) return err; /* setup the master state. */ master->bus_num = pdev->id; master->num_chipselect = 255; master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; master->setup = tiny_spi_setup; hw = spi_master_get_devdata(master); platform_set_drvdata(pdev, hw); /* setup the state for the bitbang driver */ hw->bitbang.master = spi_master_get(master); if (!hw->bitbang.master) return err; hw->bitbang.setup_transfer = tiny_spi_setup_transfer; hw->bitbang.chipselect = tiny_spi_chipselect; hw->bitbang.txrx_bufs = tiny_spi_txrx_bufs; /* find and map our resources */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) goto exit_busy; if (!devm_request_mem_region(&pdev->dev, res->start, resource_size(res), pdev->name)) goto exit_busy; hw->base = devm_ioremap_nocache(&pdev->dev, res->start, resource_size(res)); if (!hw->base) goto exit_busy; /* irq is optional */ hw->irq = platform_get_irq(pdev, 0); if (hw->irq >= 0) { init_completion(&hw->done); err = devm_request_irq(&pdev->dev, hw->irq, tiny_spi_irq, 0, pdev->name, hw); if (err) goto exit; } /* find platform data */ if (platp) { hw->gpio_cs_count = platp->gpio_cs_count; hw->gpio_cs = platp->gpio_cs; if (platp->gpio_cs_count && !platp->gpio_cs) goto exit_busy; hw->freq = platp->freq; hw->baudwidth = platp->baudwidth; } else { err = tiny_spi_of_probe(pdev); if (err) goto exit; } for (i = 0; i < hw->gpio_cs_count; i++) { err = gpio_request(hw->gpio_cs[i], dev_name(&pdev->dev)); if (err) goto exit_gpio; gpio_direction_output(hw->gpio_cs[i], 1); } hw->bitbang.master->num_chipselect = max(1U, hw->gpio_cs_count); /* register our spi controller */ err = spi_bitbang_start(&hw->bitbang); if (err) goto exit; dev_info(&pdev->dev, "base %p, irq %d\n", hw->base, hw->irq); return 0; exit_gpio: while (i-- > 0) gpio_free(hw->gpio_cs[i]); exit_busy: err = -EBUSY; exit: platform_set_drvdata(pdev, NULL); spi_master_put(master); return err; }
static int rk_crypto_probe(struct platform_device *pdev) { struct resource *res; struct device *dev = &pdev->dev; struct rk_crypto_info *crypto_info; int err = 0; crypto_info = devm_kzalloc(&pdev->dev, sizeof(*crypto_info), GFP_KERNEL); if (!crypto_info) { err = -ENOMEM; goto err_crypto; } crypto_info->rst = devm_reset_control_get(dev, "crypto-rst"); if (IS_ERR(crypto_info->rst)) { err = PTR_ERR(crypto_info->rst); goto err_crypto; } reset_control_assert(crypto_info->rst); usleep_range(10, 20); reset_control_deassert(crypto_info->rst); err = devm_add_action_or_reset(dev, rk_crypto_action, crypto_info); if (err) goto err_crypto; spin_lock_init(&crypto_info->lock); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); crypto_info->reg = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(crypto_info->reg)) { err = PTR_ERR(crypto_info->reg); goto err_crypto; } crypto_info->aclk = devm_clk_get(&pdev->dev, "aclk"); if (IS_ERR(crypto_info->aclk)) { err = PTR_ERR(crypto_info->aclk); goto err_crypto; } crypto_info->hclk = devm_clk_get(&pdev->dev, "hclk"); if (IS_ERR(crypto_info->hclk)) { err = PTR_ERR(crypto_info->hclk); goto err_crypto; } crypto_info->sclk = devm_clk_get(&pdev->dev, "sclk"); if (IS_ERR(crypto_info->sclk)) { err = PTR_ERR(crypto_info->sclk); goto err_crypto; } crypto_info->dmaclk = devm_clk_get(&pdev->dev, "apb_pclk"); if (IS_ERR(crypto_info->dmaclk)) { err = PTR_ERR(crypto_info->dmaclk); goto err_crypto; } crypto_info->irq = platform_get_irq(pdev, 0); if (crypto_info->irq < 0) { dev_warn(crypto_info->dev, "control Interrupt is not available.\n"); err = crypto_info->irq; goto err_crypto; } err = devm_request_irq(&pdev->dev, crypto_info->irq, rk_crypto_irq_handle, IRQF_SHARED, "rk-crypto", pdev); if (err) { dev_err(crypto_info->dev, "irq request failed.\n"); goto err_crypto; } crypto_info->dev = &pdev->dev; platform_set_drvdata(pdev, crypto_info); tasklet_init(&crypto_info->queue_task, rk_crypto_queue_task_cb, (unsigned long)crypto_info); tasklet_init(&crypto_info->done_task, rk_crypto_done_task_cb, (unsigned long)crypto_info); crypto_init_queue(&crypto_info->queue, 50); crypto_info->enable_clk = rk_crypto_enable_clk; crypto_info->disable_clk = rk_crypto_disable_clk; crypto_info->load_data = rk_load_data; crypto_info->unload_data = rk_unload_data; crypto_info->enqueue = rk_crypto_enqueue; crypto_info->busy = false; err = rk_crypto_register(crypto_info); if (err) { dev_err(dev, "err in register alg"); goto err_register_alg; } dev_info(dev, "Crypto Accelerator successfully registered\n"); return 0; err_register_alg: tasklet_kill(&crypto_info->queue_task); tasklet_kill(&crypto_info->done_task); err_crypto: return err; }
/** * cdns_wdt_probe - Probe call for the device. * * @pdev: handle to the platform device structure. * Return: 0 on success, negative error otherwise. * * It does all the memory allocation and registration for the device. */ static int cdns_wdt_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; int ret, irq; unsigned long clock_f; struct cdns_wdt *wdt; struct watchdog_device *cdns_wdt_device; wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL); if (!wdt) return -ENOMEM; cdns_wdt_device = &wdt->cdns_wdt_device; cdns_wdt_device->info = &cdns_wdt_info; cdns_wdt_device->ops = &cdns_wdt_ops; cdns_wdt_device->timeout = CDNS_WDT_DEFAULT_TIMEOUT; cdns_wdt_device->min_timeout = CDNS_WDT_MIN_TIMEOUT; cdns_wdt_device->max_timeout = CDNS_WDT_MAX_TIMEOUT; wdt->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(wdt->regs)) return PTR_ERR(wdt->regs); /* Register the interrupt */ wdt->rst = of_property_read_bool(dev->of_node, "reset-on-timeout"); irq = platform_get_irq(pdev, 0); if (!wdt->rst && irq >= 0) { ret = devm_request_irq(dev, irq, cdns_wdt_irq_handler, 0, pdev->name, pdev); if (ret) { dev_err(dev, "cannot register interrupt handler err=%d\n", ret); return ret; } } /* Initialize the members of cdns_wdt structure */ cdns_wdt_device->parent = dev; watchdog_init_timeout(cdns_wdt_device, wdt_timeout, dev); watchdog_set_nowayout(cdns_wdt_device, nowayout); watchdog_stop_on_reboot(cdns_wdt_device); watchdog_set_drvdata(cdns_wdt_device, wdt); wdt->clk = devm_clk_get(dev, NULL); if (IS_ERR(wdt->clk)) { dev_err(dev, "input clock not found\n"); return PTR_ERR(wdt->clk); } ret = clk_prepare_enable(wdt->clk); if (ret) { dev_err(dev, "unable to enable clock\n"); return ret; } ret = devm_add_action_or_reset(dev, cdns_clk_disable_unprepare, wdt->clk); if (ret) return ret; clock_f = clk_get_rate(wdt->clk); if (clock_f <= CDNS_WDT_CLK_75MHZ) { wdt->prescaler = CDNS_WDT_PRESCALE_512; wdt->ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_512; } else { wdt->prescaler = CDNS_WDT_PRESCALE_4096; wdt->ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_4096; } spin_lock_init(&wdt->io_lock); watchdog_stop_on_reboot(cdns_wdt_device); watchdog_stop_on_unregister(cdns_wdt_device); ret = devm_watchdog_register_device(dev, cdns_wdt_device); if (ret) { dev_err(dev, "Failed to register wdt device\n"); return ret; } platform_set_drvdata(pdev, wdt); dev_info(dev, "Xilinx Watchdog Timer at %p with timeout %ds%s\n", wdt->regs, cdns_wdt_device->timeout, nowayout ? ", nowayout" : ""); return 0; }
/* Detect MAC & PHY and perform ethernet interface initialization */ static int __init at91ether_probe(struct platform_device *pdev) { struct macb_platform_data *board_data = pdev->dev.platform_data; struct resource *regs; struct net_device *dev; struct phy_device *phydev; struct pinctrl *pinctrl; struct macb *lp; int res; u32 reg; regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!regs) return -ENOENT; pinctrl = devm_pinctrl_get_select_default(&pdev->dev); if (IS_ERR(pinctrl)) { res = PTR_ERR(pinctrl); if (res == -EPROBE_DEFER) return res; dev_warn(&pdev->dev, "No pinctrl provided\n"); } dev = alloc_etherdev(sizeof(struct macb)); if (!dev) return -ENOMEM; lp = netdev_priv(dev); lp->pdev = pdev; lp->dev = dev; spin_lock_init(&lp->lock); /* physical base address */ dev->base_addr = regs->start; lp->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs)); if (!lp->regs) { res = -ENOMEM; goto err_free_dev; } /* Clock */ lp->pclk = devm_clk_get(&pdev->dev, "ether_clk"); if (IS_ERR(lp->pclk)) { res = PTR_ERR(lp->pclk); goto err_free_dev; } clk_enable(lp->pclk); /* Install the interrupt handler */ dev->irq = platform_get_irq(pdev, 0); res = devm_request_irq(&pdev->dev, dev->irq, at91ether_interrupt, 0, dev->name, dev); if (res) goto err_disable_clock; ether_setup(dev); dev->netdev_ops = &at91ether_netdev_ops; dev->ethtool_ops = &macb_ethtool_ops; platform_set_drvdata(pdev, dev); SET_NETDEV_DEV(dev, &pdev->dev); res = at91ether_get_hwaddr_dt(lp); if (res < 0) macb_get_hwaddr(lp); res = at91ether_get_phy_mode_dt(pdev); if (res < 0) { if (board_data && board_data->is_rmii) lp->phy_interface = PHY_INTERFACE_MODE_RMII; else lp->phy_interface = PHY_INTERFACE_MODE_MII; } else { lp->phy_interface = res; } macb_writel(lp, NCR, 0); reg = MACB_BF(CLK, MACB_CLK_DIV32) | MACB_BIT(BIG); if (lp->phy_interface == PHY_INTERFACE_MODE_RMII) reg |= MACB_BIT(RM9200_RMII); macb_writel(lp, NCFGR, reg); /* Register the network interface */ res = register_netdev(dev); if (res) goto err_disable_clock; if (macb_mii_init(lp) != 0) goto err_out_unregister_netdev; /* will be enabled in open() */ netif_carrier_off(dev); phydev = lp->phy_dev; netdev_info(dev, "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n", phydev->drv->name, dev_name(&phydev->dev), phydev->irq); /* Display ethernet banner */ netdev_info(dev, "AT91 ethernet at 0x%08lx int=%d (%pM)\n", dev->base_addr, dev->irq, dev->dev_addr); return 0; err_out_unregister_netdev: unregister_netdev(dev); err_disable_clock: clk_disable(lp->pclk); err_free_dev: free_netdev(dev); return res; }
static int pps_gpio_probe(struct platform_device *pdev) { struct pps_gpio_device_data *data; const char *gpio_label; int ret; int pps_default_params; const struct pps_gpio_platform_data *pdata = pdev->dev.platform_data; struct device_node *np = pdev->dev.of_node; /* allocate space for device info */ data = devm_kzalloc(&pdev->dev, sizeof(struct pps_gpio_device_data), GFP_KERNEL); if (!data) return -ENOMEM; if (pdata) { data->gpio_pin = pdata->gpio_pin; gpio_label = pdata->gpio_label; data->assert_falling_edge = pdata->assert_falling_edge; data->capture_clear = pdata->capture_clear; } else { ret = of_get_gpio(np, 0); if (ret < 0) { dev_err(&pdev->dev, "failed to get GPIO from device tree\n"); return ret; } data->gpio_pin = ret; gpio_label = PPS_GPIO_NAME; if (of_get_property(np, "assert-falling-edge", NULL)) data->assert_falling_edge = true; } /* GPIO setup */ ret = devm_gpio_request(&pdev->dev, data->gpio_pin, gpio_label); if (ret) { dev_err(&pdev->dev, "failed to request GPIO %u\n", data->gpio_pin); return ret; } ret = gpio_direction_input(data->gpio_pin); if (ret) { dev_err(&pdev->dev, "failed to set pin direction\n"); return -EINVAL; } /* IRQ setup */ ret = gpio_to_irq(data->gpio_pin); if (ret < 0) { dev_err(&pdev->dev, "failed to map GPIO to IRQ: %d\n", ret); return -EINVAL; } data->irq = ret; /* initialize PPS specific parts of the bookkeeping data structure. */ data->info.mode = PPS_CAPTUREASSERT | PPS_OFFSETASSERT | PPS_ECHOASSERT | PPS_CANWAIT | PPS_TSFMT_TSPEC; if (data->capture_clear) data->info.mode |= PPS_CAPTURECLEAR | PPS_OFFSETCLEAR | PPS_ECHOCLEAR; data->info.owner = THIS_MODULE; snprintf(data->info.name, PPS_MAX_NAME_LEN - 1, "%s.%d", pdev->name, pdev->id); /* register PPS source */ pps_default_params = PPS_CAPTUREASSERT | PPS_OFFSETASSERT; if (data->capture_clear) pps_default_params |= PPS_CAPTURECLEAR | PPS_OFFSETCLEAR; data->pps = pps_register_source(&data->info, pps_default_params); if (data->pps == NULL) { dev_err(&pdev->dev, "failed to register IRQ %d as PPS source\n", data->irq); return -EINVAL; } /* register IRQ interrupt handler */ ret = devm_request_irq(&pdev->dev, data->irq, pps_gpio_irq_handler, get_irqf_trigger_flags(data), data->info.name, data); if (ret) { pps_unregister_source(data->pps); dev_err(&pdev->dev, "failed to acquire IRQ %d\n", data->irq); return -EINVAL; } platform_set_drvdata(pdev, data); dev_info(data->pps->dev, "Registered IRQ %d as PPS source\n", data->irq); return 0; }
static int __devinit tegra_cec_probe(struct platform_device *pdev) { struct tegra_cec *cec; struct resource *res; int ret = 0; cec = devm_kzalloc(&pdev->dev, sizeof(struct tegra_cec), GFP_KERNEL); if (!cec) return -ENOMEM; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(&pdev->dev, "Unable to allocate resources for device.\n"); ret = -EBUSY; goto cec_error; } if (!devm_request_mem_region(&pdev->dev, res->start, resource_size(res), pdev->name)) { dev_err(&pdev->dev, "Unable to request mem region for device.\n"); ret = -EBUSY; goto cec_error; } cec->tegra_cec_irq = platform_get_irq(pdev, 0); if (cec->tegra_cec_irq <= 0) { ret = -EBUSY; goto cec_error; } cec->cec_base = devm_ioremap_nocache(&pdev->dev, res->start, resource_size(res)); if (!cec->cec_base) { dev_err(&pdev->dev, "Unable to grab IOs for device.\n"); ret = -EBUSY; goto cec_error; } cec->clk = clk_get(&pdev->dev, "cec"); if (IS_ERR_OR_NULL(cec->clk)) { dev_err(&pdev->dev, "can't get clock for CEC\n"); ret = -ENOENT; goto clk_error; } clk_enable(cec->clk); /* set context info. */ cec->dev = &pdev->dev; cec->rx_wake = 0; cec->tx_wake = 0; init_waitqueue_head(&cec->rx_waitq); init_waitqueue_head(&cec->tx_waitq); init_waitqueue_head(&cec->init_waitq); platform_set_drvdata(pdev, cec); /* clear out the hardware. */ INIT_WORK(&cec->work, tegra_cec_init_worker); schedule_work(&cec->work); device_init_wakeup(&pdev->dev, 1); cec->misc_dev.minor = MISC_DYNAMIC_MINOR; cec->misc_dev.name = TEGRA_CEC_NAME; cec->misc_dev.fops = &tegra_cec_fops; cec->misc_dev.parent = &pdev->dev; if (misc_register(&cec->misc_dev)) { printk(KERN_WARNING "Couldn't register device , %s.\n", TEGRA_CEC_NAME); goto cec_error; } ret = devm_request_irq(&pdev->dev, cec->tegra_cec_irq, tegra_cec_irq_handler, IRQF_DISABLED, "cec_irq", &pdev->dev); if (ret) { dev_err(&pdev->dev, "Unable to request interrupt for device (err=%d).\n", ret); goto cec_error; } dev_notice(&pdev->dev, "probed\n"); return 0; cec_error: clk_disable(cec->clk); clk_put(cec->clk); clk_error: return ret; }