/**
* @brief Allocate memory from the heap.
*
* The current heap implementation is very rudimentary, it is only able to allocate
* memory. But it does not
* - have any means to free memory again
*
* @return [description]
*/
caddr_t _sbrk_r(struct _reent *r, ptrdiff_t incr)
{
unsigned int state = disableIRQ();
caddr_t res = heap_top;
if (((incr > 0) && ((heap_top + incr > &_eheap) || (heap_top + incr < res))) ||
((incr < 0) && ((heap_top + incr < &_sheap) || (heap_top + incr > res)))) {
r->_errno = ENOMEM;
res = (void *) -1;
}
else {
heap_top += incr;
}
restoreIRQ(state);
return res;
}
int _xtimer_set_absolute(xtimer_t *timer, uint32_t target)
{
uint32_t now = xtimer_now();
int res = 0;
DEBUG("timer_set_absolute(): now=%" PRIu32 " target=%" PRIu32 "\n", now, target);
timer->next = NULL;
if ((target >= now) && ((target - XTIMER_BACKOFF) < now)) {
/* backoff */
xtimer_spin_until(target + XTIMER_BACKOFF);
_shoot(timer);
return 0;
}
timer->target = target;
timer->long_target = _long_cnt;
if (target < now) {
timer->long_target++;
}
unsigned state = disableIRQ();
if ( (timer->long_target > _long_cnt) || !_this_high_period(target) ) {
DEBUG("xtimer_set_absolute(): the timer doesn't fit into the low-level timer's mask.\n");
_add_timer_to_long_list(&long_list_head, timer);
}
else {
if (_lltimer_mask(now) >= target) {
DEBUG("xtimer_set_absolute(): the timer will expire in the next timer period\n");
_add_timer_to_list(&overflow_list_head, timer);
}
else {
DEBUG("timer_set_absolute(): timer will expire in this timer period.\n");
_add_timer_to_list(&timer_list_head, timer);
if (timer_list_head == timer) {
DEBUG("timer_set_absolute(): timer is new list head. updating lltimer.\n");
_lltimer_set(target - XTIMER_OVERHEAD);
}
}
}
restoreIRQ(state);
return res;
}
int putchar(int c)
{
unsigned sr = disableIRQ();
/* the LF endline character needs to be "doubled" into CR+LF */
if (c == '\n') {
putchar('\r');
}
/* wait for a previous transmission to end */
while ((IFG2 & UCA0TXIFG) == 0) {
__asm__("nop");
}
/* load TX byte buffer */
UCA0TXBUF = (uint8_t) c;
restoreIRQ(sr);
return c;
}
static void _gpio_configure(gpio_t pin, unsigned rising, unsigned falling)
{
unsigned _pin = pin & 31;
unsigned port = pin >> 5;
/* set irq settings */
volatile unsigned long *en_f;
volatile unsigned long *en_r;
volatile unsigned long *en_clr;
if (!port) {
en_f = &IO0_INT_EN_F;
en_r = &IO0_INT_EN_R;
en_clr = &IO0_INT_CLR;
}
else {
en_f = &IO2_INT_EN_F;
en_r = &IO2_INT_EN_R;
en_clr = &IO2_INT_CLR;
}
/* configure irq */
unsigned int bit = 0x1 << _pin;
unsigned state = disableIRQ();
*en_clr |= bit; /* clear interrupt */
if (falling) {
*en_f |= bit; /* enable falling edge */
}
else {
*en_f &= ~bit; /* disable falling edge */
}
if (rising) {
*en_r |= bit; /* enable rising edge */
}
else {
*en_r &= ~bit; /* disable rising edge */
}
restoreIRQ(state);
}
int vtimer_init() {
DEBUG("vtimer_init().\n");
int state = disableIRQ();
seconds = 0;
longterm_tick_timer.action = vtimer_tick;
longterm_tick_timer.arg = NULL;
longterm_tick_timer.absolute.seconds = 0;
longterm_tick_timer.absolute.microseconds = MICROSECONDS_PER_TICK;
DEBUG("vtimer_init(): Setting longterm tick to %lu\n", longterm_tick_timer.absolute.microseconds);
set_shortterm(&longterm_tick_timer);
update_shortterm();
restoreIRQ(state);
return 0;
}
void kernel_init(void)
{
(void) disableIRQ();
printf("kernel_init(): This is RIOT! (Version: %s)\n", RIOT_VERSION);
hwtimer_init();
if (thread_create(idle_stack, sizeof(idle_stack), PRIORITY_IDLE, CREATE_WOUT_YIELD | CREATE_STACKTEST, idle_thread, NULL, idle_name) < 0) {
printf("kernel_init(): error creating idle task.\n");
}
if (thread_create(main_stack, sizeof(main_stack), PRIORITY_MAIN, CREATE_WOUT_YIELD | CREATE_STACKTEST, main_trampoline, NULL, main_name) < 0) {
printf("kernel_init(): error creating main task.\n");
}
printf("kernel_init(): jumping into first task...\n");
cpu_switch_context_exit();
}
uint8_t cc110x_strobe(cc110x_t *dev, uint8_t c)
{
#ifdef CC110X_DONT_RESET
if (c == CC110X_SRES) {
return 0;
}
#endif
char result;
unsigned int cpsr;
spi_acquire(dev->params.spi);
cpsr = disableIRQ();
cc110x_cs(dev);
spi_transfer_byte(dev->params.spi, c, &result);
gpio_set(dev->params.cs);
restoreIRQ(cpsr);
spi_release(dev->params.spi);
return (uint8_t) result;
}
void thread_yield_higher(void)
{
ucontext_t *ctx = (ucontext_t *)(sched_active_thread->sp);
if (_native_in_isr == 0) {
_native_in_isr = 1;
disableIRQ();
native_isr_context.uc_stack.ss_sp = __isr_stack;
native_isr_context.uc_stack.ss_size = SIGSTKSZ;
native_isr_context.uc_stack.ss_flags = 0;
makecontext(&native_isr_context, isr_thread_yield, 0);
if (swapcontext(ctx, &native_isr_context) == -1) {
err(EXIT_FAILURE, "thread_yield_higher: swapcontext");
}
enableIRQ();
}
else {
isr_thread_yield();
}
}
void receive_nativenet_packet(radio_packet_t *trans_p)
{
unsigned state;
radio_packet_t *p = &_nativenet_rx_buffer[rx_buffer_pos].packet;
/* disable interrupts while copying packet */
state = disableIRQ();
DEBUG("Handling nativenet packet\n");
memcpy(trans_p, p, sizeof(radio_packet_t));
memcpy(&(data_buffer[transceiver_buffer_pos * PAYLOAD_SIZE]), p->data, p->length);
trans_p->data = (uint8_t *) &(data_buffer[transceiver_buffer_pos * PAYLOAD_SIZE]);
DEBUG("Packet %p was from %" PRIu16 " to %" PRIu16 ", size: %" PRIu8 "\n", trans_p, trans_p->src, trans_p->dst, trans_p->length);
/* reset interrupts */
restoreIRQ(state);
}
static int vtimer_set(vtimer_t *timer)
{
DEBUG("vtimer_set(): New timer. Offset: %" PRIu32 " %" PRIu32 "\n", timer->absolute.seconds, timer->absolute.microseconds);
timex_t now;
vtimer_now(&now);
timer->absolute = timex_add(now, timer->absolute);
normalize_to_tick(&(timer->absolute));
DEBUG("vtimer_set(): Absolute: %" PRIu32 " %" PRIu32 "\n", timer->absolute.seconds, timer->absolute.microseconds);
DEBUG("vtimer_set(): NOW: %" PRIu32 " %" PRIu32 "\n", now.seconds, now.microseconds);
int result = 0;
if (timer->absolute.seconds == 0) {
if (timer->absolute.microseconds > 10) {
timer->absolute.microseconds -= 10;
}
}
unsigned state = disableIRQ();
if (timer->absolute.seconds != longterm_tick_timer.absolute.seconds) {
/* we're long-term */
DEBUG("vtimer_set(): setting long_term\n");
result = set_longterm(timer);
}
else {
DEBUG("vtimer_set(): setting short_term\n");
if (set_shortterm(timer)) {
/* delay update of next shortterm timer if we
* are called from within vtimer_callback. */
if (!in_callback) {
result = update_shortterm();
}
}
}
restoreIRQ(state);
return result;
}
uint8_t flashrom_erase(uint8_t *addr)
{
uint8_t sec = iap_get_sector((uint32_t) addr);
unsigned intstate;
if(sec == INVALID_ADDRESS) {
DEBUG("Invalid address\n");
return 0;
}
/* check sector */
if(!blank_check_sector(sec, sec)) {
DEBUG("Sector already blank!\n");
return 1;
}
/* prepare sector */
if(prepare_sectors(sec, sec)) {
DEBUG("-- ERROR: PREPARE_SECTOR_FOR_WRITE_OPERATION --\n");
return 0;
}
intstate = disableIRQ();
/* erase sector */
if(erase_sectors(sec, sec)) {
DEBUG("-- ERROR: ERASE SECTOR --\n");
restoreIRQ(intstate);
return 0;
}
restoreIRQ(intstate);
/* check again */
if(blank_check_sector(sec, sec)) {
DEBUG("-- ERROR: BLANK_CHECK_SECTOR\n");
return 0;
}
DEBUG("Sector successfully erased.\n");
return 1;
}
void vtimer_init(void)
{
DEBUG("vtimer_init().\n");
unsigned state = disableIRQ();
longterm_tick_start = 0;
longterm_tick_timer.action = vtimer_callback_tick;
longterm_tick_timer.arg = NULL;
longterm_tick_timer.absolute.seconds = 0;
longterm_tick_timer.absolute.microseconds = MICROSECONDS_PER_TICK;
DEBUG("vtimer_init(): Setting longterm tick to %" PRIu32 "\n", longterm_tick_timer.absolute.microseconds);
set_shortterm(&longterm_tick_timer);
update_shortterm();
restoreIRQ(state);
}
bool x86_rtc_read(x86_rtc_data_t *dest)
{
if (!valid) {
return false;
}
unsigned old_status = disableIRQ();
while (is_update_in_progress()) {
asm volatile ("pause");
}
uint8_t b = x86_cmos_read(RTC_REG_B);
do {
dest->second = x86_cmos_read(RTC_REG_SECOND);
dest->minute = x86_cmos_read(RTC_REG_MINUTE);
dest->hour = x86_cmos_read(RTC_REG_HOUR);
dest->day = x86_cmos_read(RTC_REG_DAY);
dest->month = x86_cmos_read(RTC_REG_MONTH);
dest->year = x86_cmos_read(RTC_REG_YEAR);
dest->century = bcd2binary(x86_cmos_read(RTC_REG_CENTURY));
} while (dest->second != x86_cmos_read(RTC_REG_SECOND));
if (dest->century == 0) {
dest->century = 20; // safe guess
}
if (!(b & RTC_REG_B_BIN)) {
dest->second = bcd2binary(dest->second);
dest->minute = bcd2binary(dest->minute);
dest->hour = ((dest->hour & 0x0F) + (((dest->hour & 0x70) / 16) * 10)) | (dest->hour & 0x80);
dest->day = bcd2binary(dest->day);
dest->month = bcd2binary(dest->month);
dest->year = bcd2binary(dest->year);
}
if (!(b & RTC_REG_B_24H) && (dest->hour & 0x80)) {
dest->hour = ((dest->hour & 0x7F) + 12) % 24;
}
restoreIRQ(old_status);
return true;
}
void cc2420_init_interrupts(void)
{
unsigned int state = disableIRQ(); /* Disable all interrupts */
/* done in board.c : function z1_ports_init()
P1SEL &= ~CC2420_FIFOP_PIN; // must be <> 1 to use interrupts
P1SEL &= ~CC2420_GIO0_PIN; // must be <> 1 to use interrupts
*/
/* FIFO <-> GIO0 interrupt */
P1IES |= CC2420_GIO0_PIN; /* Enable external interrupt on falling edge for GIO0/FIFO */
P1IE |= CC2420_GIO0_PIN;
P1IFG &= ~CC2420_GIO0_PIN; /* Clear the interrupt flag */
/* FIFOP <-> Packet interrupt */
P1IES &= ~CC2420_FIFOP_PIN; /* Enable external interrupt on rising edge for FIFOP */
P1IE |= CC2420_FIFOP_PIN;
P1IFG &= ~CC2420_FIFOP_PIN; /* Clear IFG for FIFOP */
restoreIRQ(state); /* Enable all interrupts */
}
void mutex_unlock(struct mutex_t *mutex)
{
DEBUG("%s: unlocking mutex. val: %u pid: %" PRIkernel_pid "\n", sched_active_thread->name, ATOMIC_VALUE(mutex->val), sched_active_pid);
unsigned irqstate = disableIRQ();
if (ATOMIC_VALUE(mutex->val) != 0) {
priority_queue_node_t *next = priority_queue_remove_head(&(mutex->queue));
if (next) {
tcb_t *process = (tcb_t *) next->data;
DEBUG("%s: waking up waiter.\n", process->name);
sched_set_status(process, STATUS_PENDING);
sched_switch(process->priority);
}
else {
ATOMIC_VALUE(mutex->val) = 0; /* This is safe, interrupts are disabled */
}
}
restoreIRQ(irqstate);
}
void mutex_unlock(struct mutex_t *mutex)
{
DEBUG("%s: unlocking mutex. val: %u pid: %u\n", active_thread->name, mutex->val, thread_pid);
int irqstate = disableIRQ();
if (mutex->val != 0) {
if (mutex->queue.next) {
queue_node_t *next = queue_remove_head(&(mutex->queue));
tcb_t *process = (tcb_t*) next->data;
DEBUG("%s: waking up waiter.\n", process->name);
sched_set_status(process, STATUS_PENDING);
sched_switch(active_thread->priority, process->priority);
}
else {
mutex->val = 0;
}
}
restoreIRQ(irqstate);
}
void mutex_unlock_and_sleep(struct mutex_t *mutex)
{
DEBUG("%s: unlocking mutex. val: %u pid: %" PRIkernel_pid ", and taking a nap\n", sched_active_thread->name, ATOMIC_VALUE(mutex->val), sched_active_pid);
unsigned irqstate = disableIRQ();
if (ATOMIC_VALUE(mutex->val) != 0) {
priority_queue_node_t *next = priority_queue_remove_head(&(mutex->queue));
if (next) {
thread_t *process = (thread_t *) next->data;
DEBUG("%s: waking up waiter.\n", process->name);
sched_set_status(process, STATUS_PENDING);
}
else {
ATOMIC_VALUE(mutex->val) = 0; /* This is safe, interrupts are disabled */
}
}
DEBUG("%s: going to sleep.\n", sched_active_thread->name);
sched_set_status((thread_t*) sched_active_thread, STATUS_SLEEPING);
restoreIRQ(irqstate);
thread_yield_higher();
}
static int32_t flash_detect(FlashInfo* flash) {
uint32_t command[5], result[3];
IAP iap_entry;
iap_entry = (IAP) IAP_LOCATION;
/* get part ID */
command[0] = IAP_READ_PART_ID;
disableIRQ();
iap_entry(command, result);
enableIRQ();
if (result[0] != 0) return result[0];
switch (result[1]) {
/* LPC2141, 32k Flash, 8k RAM */
case 0x0402FF01:
/* LPC2142, 64k Flash, 16k RAM */
case 0x0402FF11:
/* LPC2144, 128k Flash, 16k RAM */
case 0x0402FF12:
/* LPC2146, 256k Flash, 32k+8k RAM */
case 0x0402FF23:
{
return -1;
break;
}
/* have LPC2148 support only */
/* LPC2148, 512k Flash, 32k+8k RAM */
case 0x0402FF25:
{
flash->page_size = 0x1000;
flash->page_nr = 26;
flash->addr = 0x7C000;
break;
}
default: return -1;
}
return 0;
}
/**
* \brief This function initializes the hardware
*
*
* \details Sensors are set up, polynomials are calculated and other general preparations are made
*/
void setup(void)
{
initBluetoothStorage();//initialize space for variables used for Bluetooth Communication
//-------------------Dave Setup---------------------
DAVE_STATUS_t status;
status = DAVE_Init();//Initialization of DAVE APPs
if (status == DAVE_STATUS_FAILURE)
{
/* Placeholder for error handler code. The while loop below can be replaced with an user error handler. */
XMC_DEBUG("DAVE APPs initialization failed\n");
while (1U);
}
disableIRQ();//disables all Interrupts
delay(2000);//waits 2000ms
enableIRQ();//enables configurated Interrupts
setup_STATE_LEDs();//setup Status-LED's
WatchRC_Init();//initialize RC-Watchdog
setup_UART_Trigger_limits();//setup Trigger-Limits of UART-FIFO
PressureFIR = Initialize_FIR_Filter(PressureFIR, MOVING_AVERAGE);//initialize FIR Filter
setupDPS310I2C();//initialize DPS310
getCoefficients();//get Coefficients of DPS310
setupDPS310();//setup DPS Hardware
MPU9150_Setup();//configures the IMU
delay(3000);//wait 3000ms to wait for ESC's to startup
// initialize controller polynomials
polynoms.b_roll[0]=parameter.P_roll-parameter.I_roll*parameter.T-parameter.P_roll*parameter.N_roll*parameter.T+parameter.N_roll*parameter.I_roll*parameter.T*parameter.T+parameter.D_roll*parameter.N_roll;
polynoms.b_roll[1]=parameter.I_roll*parameter.T-2*parameter.P_roll+parameter.P_roll*parameter.N_roll*parameter.T-2*parameter.D_roll*parameter.N_roll;
polynoms.b_roll[2]=parameter.P_roll+parameter.D_roll*parameter.N_roll;
polynoms.a_roll[0]=1-parameter.N_roll*parameter.T;
polynoms.a_roll[1]=parameter.N_roll*parameter.T-2;
polynoms.b_pitch[0]=parameter.P_pitch-parameter.I_pitch*parameter.T-parameter.P_pitch*parameter.N_pitch*parameter.T+parameter.N_pitch*parameter.I_pitch*parameter.T*parameter.T+parameter.D_pitch*parameter.N_pitch;
polynoms.b_pitch[1]=parameter.I_pitch*parameter.T-2*parameter.P_pitch+parameter.P_pitch*parameter.N_pitch*parameter.T-2*parameter.D_pitch*parameter.N_pitch;
polynoms.b_pitch[2]=parameter.P_pitch+parameter.D_pitch*parameter.N_pitch;
polynoms.a_pitch[0]=1-parameter.N_pitch*parameter.T;
polynoms.a_pitch[1]=parameter.N_pitch*parameter.T-2;
TIMER_Start(&Control_Timer);//start Timer for Controller
}
/*************************************************************************
main
====
**************************************************************************/
int main_mass_storage(void)
{
unsigned cpsr;
// disable global interrupts, do it polling
cpsr = disableIRQ();
// initialise the SD card
BlockDevInit();
// initialise stack
USBInit();
// enable bulk-in interrupts on NAKs
// these are required to get the BOT protocol going again after a STALL
USBHwNakIntEnable(INACK_BI);
// register descriptors
USBRegisterDescriptors(abDescriptors);
// register class request handler
USBRegisterRequestHandler(REQTYPE_TYPE_CLASS, HandleClassRequest, abClassReqData);
// register endpoint handlers
USBHwRegisterEPIntHandler(MSC_BULK_IN_EP, MSCBotBulkIn);
USBHwRegisterEPIntHandler(MSC_BULK_OUT_EP, MSCBotBulkOut);
// connect to bus
USBHwConnect(TRUE);
// call USB interrupt handler continuously
while (1) {
USBHwISR();
}
// possibly restore global interrupts (never happens)
restoreIRQ(cpsr);
return 0;
}
bool x86_rtc_set_alarm(const x86_rtc_data_t *when, uint32_t msg_content, kernel_pid_t target_pid, bool allow_replace)
{
if (!valid) {
return false;
}
unsigned old_status = disableIRQ();
bool result;
if (target_pid == KERNEL_PID_UNDEF) {
result = true;
alarm_pid = KERNEL_PID_UNDEF;
uint8_t b = x86_cmos_read(RTC_REG_B);
x86_cmos_write(RTC_REG_B, b & ~RTC_REG_B_INT_ALARM);
}
else {
result = allow_replace || alarm_pid == KERNEL_PID_UNDEF;
if (result) {
alarm_msg_content = msg_content;
alarm_pid = target_pid;
uint8_t b = x86_cmos_read(RTC_REG_B);
if (b & RTC_REG_B_BIN) {
x86_cmos_write(RTC_REG_ALARM_SECOND, when->second);
x86_cmos_write(RTC_REG_ALARM_MINUTE, when->minute);
x86_cmos_write(RTC_REG_ALARM_HOUR, when->hour);
}
else {
x86_cmos_write(RTC_REG_ALARM_SECOND, binary2bcd(when->second));
x86_cmos_write(RTC_REG_ALARM_MINUTE, binary2bcd(when->minute));
x86_cmos_write(RTC_REG_ALARM_HOUR, binary2bcd(when->hour));
}
x86_cmos_write(RTC_REG_B, b | RTC_REG_B_INT_ALARM);
}
}
rtc_irq_handler(0);
restoreIRQ(old_status);
return result;
}
int msg_reply(msg_t *m, msg_t *reply)
{
int state = disableIRQ();
tcb_t *target = (tcb_t*) sched_threads[m->sender_pid];
if(target->status != STATUS_REPLY_BLOCKED) {
DEBUG("%s: msg_reply(): target \"%s\" not waiting for reply.", active_thread->name, target->name);
restoreIRQ(state);
return -1;
}
DEBUG("%s: msg_reply(): direct msg copy.\n", active_thread->name);
/* copy msg to target */
msg_t *target_message = (msg_t*) target->wait_data;
*target_message = *reply;
sched_set_status(target, STATUS_PENDING);
restoreIRQ(state);
thread_yield();
return 1;
}
void condition_variable::notify_all() noexcept {
unsigned old_state = disableIRQ();
int other_prio = -1;
while (true) {
priority_queue_node_t* head = priority_queue_remove_head(&m_queue);
if (head == NULL) {
break;
}
tcb_t* other_thread = (tcb_t*)sched_threads[head->data];
if (other_thread) {
auto max_prio
= [](int a, int b) { return (a < 0) ? b : ((a < b) ? a : b); };
other_prio = max_prio(other_prio, other_thread->priority);
sched_set_status(other_thread, STATUS_PENDING);
}
head->data = -1u;
}
restoreIRQ(old_state);
if (other_prio >= 0) {
sched_switch(other_prio);
}
}
/*-----------------------------------------------------------------------------------*/
caddr_t _sbrk_r(struct _reent *r, size_t incr)
{
if (incr < 0) {
puts("[syscalls] Negative Values for _sbrk_r are not supported");
r->_errno = ENOMEM;
return NULL;
}
uint32_t cpsr = disableIRQ();
/* check all heaps for a chunk of the requested size */
for (; iUsedHeap < NUM_HEAPS; iUsedHeap++) {
caddr_t new_heap = heap[iUsedHeap] + incr;
#ifdef MODULE_TRACELOG
trace_pointer(TRACELOG_EV_MEMORY, heap[iUsedHeap]);
#endif
if (new_heap <= heap_max[iUsedHeap]) {
caddr_t prev_heap = heap[iUsedHeap];
#ifdef MODULE_TRACELOG
trace_pointer(TRACELOG_EV_MEMORY, new_heap);
#endif
heap[iUsedHeap] = new_heap;
r->_errno = 0;
restoreIRQ(cpsr);
return prev_heap;
}
}
restoreIRQ(cpsr);
#ifdef MODULE_TRACELOG
trace_string(TRACELOG_EV_MEMORY, "heap!"); // heap full
#endif
r->_errno = ENOMEM;
return NULL;
}
/**
* Write the flash memory starting at the desired address for a block of bytes. NOTE: The length
* must be 256, 512, 1024, or 4096 bytes. The data pointer must be on a WORD boundary.
*
* @param destAddress flash memory address
* @param length number of bytes to write
* @param data pointer to data block
*
* @return IAP Status code
*/
IAP::StatusCode IAP::Write (uint32_t destAddress, uint32_t length, void *data)
{
StatusCode statusCode;
uint32_t irqState, command[5], result[2];
if ((statusCode = PrepareSector(Sector(destAddress), Sector(destAddress + length))) != CmdSuccess)
return statusCode;
command[0] = 51;
command[1] = destAddress;
command[2] = reinterpret_cast <uint32_t> (data);
command[3] = length;
command[4] = SystemControl::GetInstance()->GetPClock() / 1000;
// We have to disable interrupts because flash memory will not be available to execute out of.
irqState = disableIRQ();
iap (command, result);
restoreIRQ (irqState);
return static_cast <StatusCode> (result[0]);
}
/**
* Erase the flash memory starting at the desired address for a block of bytes. NOTE: The address range is
* translated to device sector numbers. Therefore the operational range may be larger than specified.
*
* @param destAddress starting address to erase
* @param length number of bytes to erase
*
* @return IAP Status code
*/
IAP::StatusCode IAP::Erase (uint32_t destAddress, uint32_t length)
{
StatusCode statusCode;
uint32_t irqState, command[5], result[2];
//
command[0] = 52;
command[1] = Sector(destAddress);
command[2] = Sector(destAddress + length);
command[3] = SystemControl::GetInstance()->GetPClock() / 1000;
if ((statusCode = PrepareSector(command[1], command[2])) != CmdSuccess)
return statusCode;
// We have to disable interrupts because flash memory will not be available to execute out of.
irqState = disableIRQ();
iap (command, result);
restoreIRQ (irqState);
return static_cast <StatusCode> (result[0]);
}
int pthread_cond_signal(struct pthread_cond_t *cond)
{
unsigned old_state = disableIRQ();
queue_node_t *head = queue_remove_head(&(cond->queue));
int other_prio = -1;
if (head != NULL) {
tcb_t *other_thread = (tcb_t *) sched_threads[head->data];
if (other_thread) {
other_prio = other_thread->priority;
sched_set_status(other_thread, STATUS_PENDING);
}
head->data = -1u;
}
restoreIRQ(old_state);
if (other_prio >= 0) {
sched_switch(sched_active_thread->priority, other_prio);
}
return 0;
}
unsigned int timer_read(tim_t dev)
{
uint16_t value;
/*
* Disabling interrupts globally because read from 16 Bit register can
* otherwise be messed up
*/
unsigned state = disableIRQ();
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
value = TIMER0_COUNTER;
break;
#endif
#if TIMER_1_EN
case TIMER_1:
value = TIMER1_COUNTER;
break;
#endif
#if TIMER_2_EN
case TIMER_2:
value = TIMER2_COUNTER;
break;
#endif
case TIMER_UNDEFINED:
default:
value = 0;
}
restoreIRQ(state);
return value;
}
void _xtimer_set64(xtimer_t *timer, uint32_t offset, uint32_t long_offset)
{
DEBUG(" _xtimer_set64() offset=%" PRIu32 " long_offset=%" PRIu32 "\n", offset, long_offset);
if (!long_offset) {
/* timer fits into the short timer */
xtimer_set(timer, (uint32_t) offset);
}
else {
xtimer_remove(timer);
_xtimer_now64(&timer->target, &timer->long_target);
timer->target += offset;
timer->long_target += long_offset;
if (timer->target < offset) {
timer->long_target++;
}
int state = disableIRQ();
_add_timer_to_long_list(&long_list_head, timer);
restoreIRQ(state);
DEBUG("xtimer_set64(): added longterm timer (long_target=%" PRIu32 " target=%" PRIu32 ")\n",
timer->long_target, timer->target);
}
}
/*---------------------------------------------------------------------------*/
static uint8_t prepare(void)
{
uint8_t istate;
/* Disable all interrupts. */
/* Clear interrupt flag1. */
IFG1 = 0;
/* DCO(SMCLK) is 2,4576MHz, /6 = 409600 Hz
select SMCLK for flash timing, divider 4+1 */
FCTL2 = FWKEY | FSSEL_3 | FN2 | FN0;
/* disable all interrupts to protect CPU
during programming from system crash */
istate = disableIRQ();
/* disable all NMI-Interrupt sources */
ie1 = IE1;
ie2 = IE2;
IE1 = 0x00;
IE2 = 0x00;
return istate;
}
