// check the boot mode : (1) meta mode or (2) recovery mode ... void boot_mode_select(void) { //Ivan ulong begin; if (meta_detection()) { return; } #if defined (HAVE_LK_TEXT_MENU) if(Check_RTC_PDN1_bit13()) { printf("[FASTBOOT] reboot to boot loader\n"); g_boot_mode = FASTBOOT; Set_Clr_RTC_PDN1_bit13(false); return; } //Ivan #ifdef MENU_BOOT_ENABLE boot_mode_dkey_check(); if (g_boot_mode == MENU_BOOT) { /* clean console screen */ video_clean_screen(); // mt65xx_disp_fill_rect(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT, 0x0); video_set_cursor(2,0); video_printf("Recovery Mode: Volume Up\r\n"); video_set_cursor(4,0); video_printf("Factory Mode: Volume Down\r\n"); // mt65xx_disp_update(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT); mt65xx_backlight_on(); video_set_cursor(49,0); while (mt65XX_get_key() != 0xFFFF); printf(" > Key release!!!\n"); mdelay(500); //Ivan added mtk_wdt_restart(); begin = get_timer(0); while (g_boot_mode == MENU_BOOT) { if (factory_detection()) { video_clean_screen(); return; } if(boot_menu_detection())//recovery, fastboot, normal boot. { video_clean_screen(); return; } //Ivan add 20s time limit if (get_timer(begin) < 20000) mtk_wdt_restart(); } // video_clean_screen(); // mt65xx_disp_fill_rect(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT, 0x0); // mt65xx_disp_update(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT); // video_set_cursor(49,0); // mt65xx_disp_wait_idle(); } if(Check_RTC_Recovery_Mode()) { g_boot_mode = RECOVERY_BOOT; } recovery_check_command_trigger(); #else //MENU_BOOT_ENABLE if (factory_detection()) { return; } if(boot_menu_detection())//recovery, fastboot, normal boot. { return; } recovery_detection(); #endif //MENU_BOOT_ENABLE #else //HAVE_LK_TEXT_MENU #ifdef MTK_FASTBOOT_SUPPORT if(fastboot_trigger()) { return; } #endif //MTK_FASTBOOT_SUPPORT if (factory_detection()) { return; } if(recovery_detection()) { //************************************** //* CHECK IMAGE //************************************** if(DRV_Reg32(0x40002300)==0xE92D4800) { printf(" > do recovery_check\n"); //jump(0x40002300); } else { printf(" > bypass recovery_check\n"); } return; } #endif #ifdef MTK_KERNEL_POWER_OFF_CHARGING if(kernel_power_off_charging_detection()) { printf(" < Kernel Power Off Charging Detection Ok> \n"); return; } else { printf("< Kernel Enter Normal Boot > \n"); } #endif }
* resulting in errors in some DHCP servers, reporting missing bytes. * Size must be set in packet header after extension length has been * determined. * C. Hallinan, DS4.COM, Inc. */ /* net_set_udp_header(pkt, 0xFFFFFFFFL, PORT_BOOTPS, PORT_BOOTPC, sizeof (struct Bootp_t)); */ iphdr = pkt; /* We need this later for net_set_udp_header() */ pkt += IP_UDP_HDR_SIZE; bp = (struct Bootp_t *)pkt; bp->bp_op = OP_BOOTREQUEST; bp->bp_htype = HWT_ETHER; bp->bp_hlen = HWL_ETHER; bp->bp_hops = 0; bp->bp_secs = htons(get_timer(0) / 1000); NetWriteIP(&bp->bp_ciaddr, 0); NetWriteIP(&bp->bp_yiaddr, 0); NetWriteIP(&bp->bp_siaddr, 0); NetWriteIP(&bp->bp_giaddr, 0); memcpy(bp->bp_chaddr, NetOurEther, 6); copy_filename(bp->bp_file, BootFile, sizeof(bp->bp_file)); /* Request additional information from the BOOTP/DHCP server */ #if defined(CONFIG_CMD_DHCP) extlen = DhcpExtended((u8 *)bp->bp_vend, DHCP_DISCOVER, 0, 0); #else extlen = BootpExtended((u8 *)bp->bp_vend); #endif /*
int flash_erase(flash_info_t * info, int s_first, int s_last) { vu_char *addr = (vu_char *) (info->start[0]); int flag, prot, sect, l_sect; ulong start, now, last; if ((s_first < 0) || (s_first > s_last)) { if (info->flash_id == FLASH_UNKNOWN) { printf("- missing\n"); } else { printf("- no sectors to erase\n"); } return 1; } if ((info->flash_id == FLASH_UNKNOWN) || (info->flash_id > FLASH_AMD_COMP)) { printf("Can't erase unknown flash type %08lx - aborted\n", info->flash_id); return 1; } prot = 0; for (sect = s_first; sect <= s_last; ++sect) { if (info->protect[sect]) { prot++; } } if (prot) { printf("- Warning: %d protected sectors will not be erased!\n", prot); } else { printf("\n"); } l_sect = -1; /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); addr[0x0555] = 0xAA; addr[0x02AA] = 0x55; addr[0x0555] = 0x80; addr[0x0555] = 0xAA; addr[0x02AA] = 0x55; /* Start erase on unprotected sectors */ for (sect = s_first; sect <= s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ addr = (vu_char *) (info->start[sect]); addr[0] = 0x30; l_sect = sect; } } /* re-enable interrupts if necessary */ if (flag) enable_interrupts(); /* wait at least 80us - let's wait 1 ms */ udelay(1000); /* * We wait for the last triggered sector */ if (l_sect < 0) goto DONE; start = get_timer(0); last = start; addr = (vu_char *) (info->start[l_sect]); while ((addr[0] & 0x80) != 0x80) { if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf("Timeout\n"); return 1; } /* show that we're waiting */ if ((now - last) > 1000) { /* every second */ putc('.'); last = now; } } DONE: /* reset to read mode */ addr = (vu_char *) info->start[0]; addr[0] = 0xF0; /* reset bank */ printf(" done\n"); return 0; }
/* CYCLON2 Passive Serial Generic Implementation */ static int CYC2_ps_load (Altera_desc * desc, void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ Altera_CYC2_Passive_Serial_fns *fn = desc->iface_fns; int ret = 0; PRINTF ("%s: start with interface functions @ 0x%p\n", __FUNCTION__, fn); if (fn) { int cookie = desc->cookie; /* make a local copy */ unsigned long ts; /* timestamp */ PRINTF ("%s: Function Table:\n" "ptr:\t0x%p\n" "struct: 0x%p\n" "config:\t0x%p\n" "status:\t0x%p\n" "write:\t0x%p\n" "done:\t0x%p\n\n", __FUNCTION__, &fn, fn, fn->config, fn->status, fn->write, fn->done); #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK printf ("Loading FPGA Device %d...", cookie); #endif /* * Run the pre configuration function if there is one. */ if (*fn->pre) { (*fn->pre) (cookie); } /* Establish the initial state */ (*fn->config) (TRUE, TRUE, cookie); /* Assert nCONFIG */ udelay(2); /* T_cfg > 2us */ /* Wait for nSTATUS to be asserted */ ts = get_timer (0); /* get current time */ do { CONFIG_FPGA_DELAY (); if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */ puts ("** Timeout waiting for STATUS to go high.\n"); (*fn->abort) (cookie); return FPGA_FAIL; } } while (!(*fn->status) (cookie)); /* Get ready for the burn */ CONFIG_FPGA_DELAY (); ret = (*fn->write) (buf, bsize, TRUE, cookie); if (ret) { puts ("** Write failed.\n"); (*fn->abort) (cookie); return FPGA_FAIL; } #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK puts(" OK? ..."); #endif CONFIG_FPGA_DELAY (); #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK putc (' '); /* terminate the dotted line */ #endif /* * Checking FPGA's CONF_DONE signal - correctly booted ? */ if ( ! (*fn->done) (cookie) ) { puts ("** Booting failed! CONF_DONE is still deasserted.\n"); (*fn->abort) (cookie); return (FPGA_FAIL); } #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK puts(" OK\n"); #endif ret_val = FPGA_SUCCESS; #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK if (ret_val == FPGA_SUCCESS) { puts ("Done.\n"); } else { puts ("Fail.\n"); } #endif (*fn->post) (cookie); } else { printf ("%s: NULL Interface function table!\n", __FUNCTION__); } return ret_val; }
static int _dw_eth_init(struct dw_eth_dev *priv, u8 *enetaddr) { struct eth_mac_regs *mac_p = priv->mac_regs_p; struct eth_dma_regs *dma_p = priv->dma_regs_p; unsigned int start; int ret; writel(readl(&dma_p->busmode) | DMAMAC_SRST, &dma_p->busmode); start = get_timer(0); while (readl(&dma_p->busmode) & DMAMAC_SRST) { if (get_timer(start) >= CONFIG_MACRESET_TIMEOUT) { printf("DMA reset timeout\n"); return -ETIMEDOUT; } mdelay(100); }; /* * Soft reset above clears HW address registers. * So we have to set it here once again. */ _dw_write_hwaddr(priv, enetaddr); rx_descs_init(priv); tx_descs_init(priv); writel(FIXEDBURST | PRIORXTX_41 | DMA_PBL, &dma_p->busmode); #ifndef CONFIG_DW_MAC_FORCE_THRESHOLD_MODE writel(readl(&dma_p->opmode) | FLUSHTXFIFO | STOREFORWARD, &dma_p->opmode); #else writel(readl(&dma_p->opmode) | FLUSHTXFIFO, &dma_p->opmode); #endif writel(readl(&dma_p->opmode) | RXSTART | TXSTART, &dma_p->opmode); #ifdef CONFIG_DW_AXI_BURST_LEN writel((CONFIG_DW_AXI_BURST_LEN & 0x1FF >> 1), &dma_p->axibus); #endif /* Start up the PHY */ ret = phy_startup(priv->phydev); if (ret) { printf("Could not initialize PHY %s\n", priv->phydev->dev->name); return ret; } dw_adjust_link(mac_p, priv->phydev); if (!priv->phydev->link) return -EIO; writel(readl(&mac_p->conf) | RXENABLE | TXENABLE, &mac_p->conf); return 0; }
static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, uchar *buf, uint b_len) { struct i2c_regs *regs = i2c->regs; int err; uchar *pbuf = buf; uint bytes_remain_len = b_len + r_len + 1; uint bytes_xferred = 0; uint words_xferred = 0; ulong start; uint txdata; uint i, j; debug("rk_i2c_write: chip = %d, reg = %d, r_len = %d, b_len = %d\n", chip, reg, r_len, b_len); err = rk_i2c_send_start_bit(i2c); if (err) return err; while (bytes_remain_len) { if (bytes_remain_len > RK_I2C_FIFO_SIZE) bytes_xferred = RK_I2C_FIFO_SIZE; else bytes_xferred = bytes_remain_len; words_xferred = DIV_ROUND_UP(bytes_xferred, 4); for (i = 0; i < words_xferred; i++) { txdata = 0; for (j = 0; j < 4; j++) { if ((i * 4 + j) == bytes_xferred) break; if (i == 0 && j == 0 && pbuf == buf) { txdata |= (chip << 1); } else if (i == 0 && j <= r_len && pbuf == buf) { txdata |= (reg & (0xff << ((j - 1) * 8))) << 8; } else { txdata |= (*pbuf++)<<(j * 8); } } writel(txdata, ®s->txdata[i]); debug("I2c Write TXDATA[%d] = 0x%08x\n", i, txdata); } writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), ®s->con); writel(bytes_xferred, ®s->mtxcnt); writel(I2C_MBTFIEN | I2C_NAKRCVIEN, ®s->ien); start = get_timer(0); while (1) { if (readl(®s->ipd) & I2C_NAKRCVIPD) { writel(I2C_NAKRCVIPD, ®s->ipd); err = -EREMOTEIO; } if (readl(®s->ipd) & I2C_MBTFIPD) { writel(I2C_MBTFIPD, ®s->ipd); break; } if (get_timer(start) > I2C_TIMEOUT_MS) { debug("I2C Write Data Timeout\n"); err = -ETIMEDOUT; rk_i2c_show_regs(regs); goto i2c_exit; } udelay(1); } bytes_remain_len -= bytes_xferred; debug("I2C Write bytes_remain_len %d\n", bytes_remain_len); } i2c_exit: rk_i2c_send_stop_bit(i2c); rk_i2c_disable(i2c); return err; }
static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ xilinx_spartan3_slave_serial_fns *fn = desc->iface_fns; int i; unsigned char val; PRINTF ("%s: start with interface functions @ 0x%p\n", __FUNCTION__, fn); if (fn) { size_t bytecount = 0; unsigned char *data = (unsigned char *) buf; int cookie = desc->cookie; /* make a local copy */ unsigned long ts; /* timestamp */ PRINTF ("%s: Function Table:\n" "ptr:\t0x%p\n" "struct: 0x%p\n" "pgm:\t0x%p\n" "init:\t0x%p\n" "clk:\t0x%p\n" "wr:\t0x%p\n" "done:\t0x%p\n\n", __FUNCTION__, &fn, fn, fn->pgm, fn->init, fn->clk, fn->wr, fn->done); #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK printf ("Loading FPGA Device %d...\n", cookie); #endif /* * Run the pre configuration function if there is one. */ if (*fn->pre) { (*fn->pre) (cookie); } /* Establish the initial state */ (*fn->pgm) (true, true, cookie); /* Assert the program, commit */ /* Wait for INIT state (init low) */ ts = get_timer (0); /* get current time */ do { CONFIG_FPGA_DELAY (); if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */ puts ("** Timeout waiting for INIT to start.\n"); if (*fn->abort) (*fn->abort) (cookie); return FPGA_FAIL; } } while (!(*fn->init) (cookie)); /* Get ready for the burn */ CONFIG_FPGA_DELAY (); (*fn->pgm) (false, true, cookie); /* Deassert the program, commit */ ts = get_timer (0); /* get current time */ /* Now wait for INIT to go high */ do { CONFIG_FPGA_DELAY (); if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */ puts ("** Timeout waiting for INIT to clear.\n"); if (*fn->abort) (*fn->abort) (cookie); return FPGA_FAIL; } } while ((*fn->init) (cookie)); /* Load the data */ if(*fn->bwr) (*fn->bwr) (data, bsize, true, cookie); else { while (bytecount < bsize) { /* Xilinx detects an error if INIT goes low (active) while DONE is low (inactive) */ if ((*fn->done) (cookie) == 0 && (*fn->init) (cookie)) { puts ("** CRC error during FPGA load.\n"); if (*fn->abort) (*fn->abort) (cookie); return (FPGA_FAIL); } val = data [bytecount ++]; i = 8; do { /* Deassert the clock */ (*fn->clk) (false, true, cookie); CONFIG_FPGA_DELAY (); /* Write data */ (*fn->wr) ((val & 0x80), true, cookie); CONFIG_FPGA_DELAY (); /* Assert the clock */ (*fn->clk) (true, true, cookie); CONFIG_FPGA_DELAY (); val <<= 1; i --; } while (i > 0); #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK if (bytecount % (bsize / 40) == 0) putc ('.'); /* let them know we are alive */ #endif } } CONFIG_FPGA_DELAY (); #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK putc ('\n'); /* terminate the dotted line */ #endif /* now check for done signal */ ts = get_timer (0); /* get current time */ ret_val = FPGA_SUCCESS; (*fn->wr) (true, true, cookie); while (! (*fn->done) (cookie)) { /* XXX - we should have a check in here somewhere to * make sure we aren't busy forever... */ CONFIG_FPGA_DELAY (); (*fn->clk) (false, true, cookie); /* Deassert the clock pin */ CONFIG_FPGA_DELAY (); (*fn->clk) (true, true, cookie); /* Assert the clock pin */ putc ('*'); if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */ puts ("** Timeout waiting for DONE to clear.\n"); ret_val = FPGA_FAIL; break; } } putc ('\n'); /* terminate the dotted line */ /* * Run the post configuration function if there is one. */ if (*fn->post) (*fn->post) (cookie); #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK if (ret_val == FPGA_SUCCESS) puts ("Done.\n"); else puts ("Fail.\n"); #endif } else { printf ("%s: NULL Interface function table!\n", __FUNCTION__); } return ret_val; }
void channel_join(struct map_session_data *sd, const char* name, const char* pass, bool invite) { char output[256]; struct channel_data *cd; int i = 0; if( !name || strlen(name) < 2 || strlen(name) >= NAME_LENGTH || name[0] != '#' ) { clif_displaymessage(sd->fd, msg_txt(801)); return; } if( (cd = (struct channel_data *)strdb_get(channel_db, name)) == NULL ) { clif_displaymessage(sd->fd, msg_txt(805)); return; } if( channel_slot_get(sd, cd) != -1 ) { clif_displaymessage(sd->fd, msg_txt(806)); return; } if( (i = channel_slot_free(sd)) < 0 ) { clif_displaymessage(sd->fd, msg_txt(800)); return; } if( !invite ) { if( cd->pass[0] && strcmp(cd->pass, pass) != 0 ) { // Check password only if not invited clif_displaymessage(sd->fd, msg_txt(808)); return; } if( cd->type == CHN_GAMEMASTER && pc_has_permission(sd,PC_PERM_CHANNEL_OPERATOR) ) { clif_displaymessage(sd->fd, msg_txt(703)); return; } } if( battle_config.channel_announce_join ) { sprintf(output, msg_txt(803), cd->name, sd->status.name); clif_channel_message(cd, output, -1); } sprintf(output, msg_txt(710), sd->status.name, cd->name); clif_wis_message(sd->fd, cd->name, output, strlen(output) + 1); // Joining Channel sd->cd[i] = cd; sd->canjoinchn_tick = gettick() + 10000; idb_put(cd->users_db, sd->bl.id, sd); cd->users++; if( sd->channel_invite_timer != INVALID_TIMER ) { const struct TimerData * td = get_timer(sd->channel_invite_timer); char *name = td ? (char *)td->data : NULL; if( strcmp(name, cd->name) == 0 ) channel_invite_clear(sd); // Invitation removed as the user joined the channel } if( cd->type != CHN_USER ) { switch( cd->type ) { case CHN_MAIN: sd->channels |= 1; break; case CHN_VENDING: sd->channels |= 2; break; case CHN_BATTLEGROUND: sd->channels |= 4; break; case CHN_GAMEMASTER: sd->channels |= 8; break; } pc_setaccountreg(sd, "#CHANNEL_CONF", sd->channels); } }
/* * Virtex-II Slave SelectMap configuration loader. Configuration via * SelectMap is as follows: * 1. Set the FPGA's PROG_B line low. * 2. Set the FPGA's PROG_B line high. Wait for INIT_B to go high. * 3. Write data to the SelectMap port. If INIT_B goes low at any time * this process, a configuration error (most likely CRC failure) has * ocurred. At this point a status word may be read from the * SelectMap interface to determine the source of the problem (You * could, for instance, put this in your 'abort' function handler). * 4. After all data has been written, test the state of the FPGA * INIT_B and DONE lines. If both are high, configuration has * succeeded. Congratulations! */ static int Virtex2_ssm_load (Xilinx_desc * desc, void *buf, size_t bsize) { int ret_val = FPGA_FAIL; Xilinx_Virtex2_Slave_SelectMap_fns *fn = desc->iface_fns; PRINTF ("%s:%d: Start with interface functions @ 0x%p\n", __FUNCTION__, __LINE__, fn); if (fn) { size_t bytecount = 0; unsigned char *data = (unsigned char *) buf; int cookie = desc->cookie; unsigned long ts; /* Gotta split this one up (so the stack won't blow??) */ PRINTF ("%s:%d: Function Table:\n" " base 0x%p\n" " struct 0x%p\n" " pre 0x%p\n" " prog 0x%p\n" " init 0x%p\n" " error 0x%p\n", __FUNCTION__, __LINE__, &fn, fn, fn->pre, fn->pgm, fn->init, fn->err); PRINTF (" clock 0x%p\n" " cs 0x%p\n" " write 0x%p\n" " rdata 0x%p\n" " wdata 0x%p\n" " busy 0x%p\n" " abort 0x%p\n" " post 0x%p\n\n", fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata, fn->busy, fn->abort, fn->post); #ifdef CFG_FPGA_PROG_FEEDBACK printf ("Initializing FPGA Device %d...\n", cookie); #endif /* * Run the pre configuration function if there is one. */ if (*fn->pre) { (*fn->pre) (cookie); } /* * Assert the program line. The minimum pulse width for * Virtex II devices is 300 nS (Tprogram parameter in datasheet). * There is no maximum value for the pulse width. Check to make * sure that INIT_B goes low after assertion of PROG_B */ (*fn->pgm) (TRUE, TRUE, cookie); udelay (10); ts = get_timer (0); do { if (get_timer (ts) > CFG_FPGA_WAIT_INIT) { printf ("%s:%d: ** Timeout after %d ticks waiting for INIT" " to assert.\n", __FUNCTION__, __LINE__, CFG_FPGA_WAIT_INIT); (*fn->abort) (cookie); return FPGA_FAIL; } } while (!(*fn->init) (cookie)); (*fn->pgm) (FALSE, TRUE, cookie); CONFIG_FPGA_DELAY (); (*fn->clk) (TRUE, TRUE, cookie); /* * Start a timer and wait for INIT_B to go high */ ts = get_timer (0); do { CONFIG_FPGA_DELAY (); if (get_timer (ts) > CFG_FPGA_WAIT_INIT) { printf ("%s:%d: ** Timeout after %d ticks waiting for INIT" " to deassert.\n", __FUNCTION__, __LINE__, CFG_FPGA_WAIT_INIT); (*fn->abort) (cookie); return FPGA_FAIL; } } while ((*fn->init) (cookie) && (*fn->busy) (cookie)); (*fn->wr) (TRUE, TRUE, cookie); (*fn->cs) (TRUE, TRUE, cookie); udelay (10000); /* * Load the data byte by byte */ while (bytecount < bsize) { #ifdef CFG_FPGA_CHECK_CTRLC if (ctrlc ()) { (*fn->abort) (cookie); return FPGA_FAIL; } #endif if ((*fn->done) (cookie) == FPGA_SUCCESS) { PRINTF ("%s:%d:done went active early, bytecount = %d\n", __FUNCTION__, __LINE__, bytecount); break; } #ifdef CFG_FPGA_CHECK_ERROR if ((*fn->init) (cookie)) { printf ("\n%s:%d: ** Error: INIT asserted during" " configuration\n", __FUNCTION__, __LINE__); printf ("%d = buffer offset, %d = buffer size\n", bytecount, bsize); (*fn->abort) (cookie); return FPGA_FAIL; } #endif (*fn->wdata) (data[bytecount++], TRUE, cookie); CONFIG_FPGA_DELAY (); /* * Cycle the clock pin */ (*fn->clk) (FALSE, TRUE, cookie); CONFIG_FPGA_DELAY (); (*fn->clk) (TRUE, TRUE, cookie); #ifdef CFG_FPGA_CHECK_BUSY ts = get_timer (0); while ((*fn->busy) (cookie)) { if (get_timer (ts) > CFG_FPGA_WAIT_BUSY) { printf ("%s:%d: ** Timeout after %d ticks waiting for" " BUSY to deassert\n", __FUNCTION__, __LINE__, CFG_FPGA_WAIT_BUSY); (*fn->abort) (cookie); return FPGA_FAIL; } } #endif #ifdef CFG_FPGA_PROG_FEEDBACK if (bytecount % (bsize / 40) == 0) putc ('.'); #endif } /* * Finished writing the data; deassert FPGA CS_B and WRITE_B signals. */ CONFIG_FPGA_DELAY (); (*fn->cs) (FALSE, TRUE, cookie); (*fn->wr) (FALSE, TRUE, cookie); #ifdef CFG_FPGA_PROG_FEEDBACK putc ('\n'); #endif /* * Check for successful configuration. FPGA INIT_B and DONE should * both be high upon successful configuration. */ ts = get_timer (0); ret_val = FPGA_SUCCESS; while (((*fn->done) (cookie) == FPGA_FAIL) || (*fn->init) (cookie)) { if (get_timer (ts) > CFG_FPGA_WAIT_CONFIG) { printf ("%s:%d: ** Timeout after %d ticks waiting for DONE to" "assert and INIT to deassert\n", __FUNCTION__, __LINE__, CFG_FPGA_WAIT_CONFIG); (*fn->abort) (cookie); ret_val = FPGA_FAIL; break; } } if (ret_val == FPGA_SUCCESS) { #ifdef CFG_FPGA_PROG_FEEDBACK printf ("Initialization of FPGA device %d complete\n", cookie); #endif /* * Run the post configuration function if there is one. */ if (*fn->post) { (*fn->post) (cookie); } } else { #ifdef CFG_FPGA_PROG_FEEDBACK printf ("** Initialization of FPGA device %d FAILED\n", cookie); #endif } } else { printf ("%s:%d: NULL Interface function table!\n", __FUNCTION__, __LINE__); } return ret_val; }
void sec_boot_check (void) { //if(CFG_STORAGE_DEVICE == NAND) { #if SEC_ENV_ENABLE U32 g_verify_time_begin = get_timer (0);; U32 g_verify_time_end; U32 ret = 0; BOOL sw_secure_boot_support = FALSE; /* --------------------- */ /* init image auth key */ /* --------------------- */ if (SEC_OK != img_auth_init()) { SMSG("[%s] IMAGE Auth Key Init Fail\n",MOD); ret = ERR_IMG_INIT_KEY_FAIL; goto _fail; } if ((secroimg != NULL)&&(SW_SUPPORT_ENABLE == (secroimg->m_andro.sw_sec_boot.flashtool_unlock_support))) { sw_secure_boot_support = TRUE; } else { if(FALSE == seclib_sec_boot_enabled(TRUE)) { SMSG("[%s] Don't check\n",MOD); return ; } } if (SEC_OK != sec_boot_img_check(sw_secure_boot_support, secroimg->m_andro.sw_sec_boot.boot_chk_2nd_loader, SBOOT_PART_UBOOT)) { goto _fail; } if (SEC_OK != sec_boot_img_check(sw_secure_boot_support, secroimg->m_andro.sw_sec_boot.boot_chk_logo, SBOOT_PART_LOGO)) { goto _fail; } /* calculate verification time */ g_verify_time_end = get_timer (g_verify_time_begin); SMSG ("\n[%s] Consume (%d) ms\n", MOD, g_verify_time_end); return ; _fail : SMSG ("[%s] Fail (0x%x)\n",MOD,ret); ASSERT(0); _brom_recovery_check : SMSG ("[%s] Fail (0x%x)\n",MOD,ret); sec_util_brom_download_recovery_check(); #endif // SEC_ENV_ENABLE } // if(CFG_STORAGE_DEVICE == NAND) }
int do_eeprom ( cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { const char *const fmt = "\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... "; #if defined(CFG_I2C_MULTI_EEPROMS) if (argc == 6) { ulong dev_addr = simple_strtoul (argv[2], NULL, 16); ulong addr = simple_strtoul (argv[3], NULL, 16); ulong off = simple_strtoul (argv[4], NULL, 16); ulong cnt = simple_strtoul (argv[5], NULL, 16); #else if (argc == 5) { ulong dev_addr = CFG_DEF_EEPROM_ADDR; ulong addr = simple_strtoul (argv[2], NULL, 16); ulong off = simple_strtoul (argv[3], NULL, 16); ulong cnt = simple_strtoul (argv[4], NULL, 16); #endif /* CFG_I2C_MULTI_EEPROMS */ # ifndef CONFIG_SPI eeprom_init (); # endif /* !CONFIG_SPI */ if (strcmp (argv[1], "read") == 0) { int rcode; #if defined(CONFIG_MEASURE_TIME) ulong duration; /* measured time in ms */ #endif /* CONFIG_MEASURE_TIME */ printf (fmt, dev_addr, argv[1], addr, off, cnt); #if defined(CONFIG_MEASURE_TIME) set_timer(0); /* start measuring */ #endif /* CONFIG_MEASURE_TIME */ rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt); #if defined(CONFIG_MEASURE_TIME) duration = get_timer(0); /* stop measuring */ #endif /* CONFIG_MEASURE_TIME */ puts ("done\n"); #if defined(CONFIG_MEASURE_TIME) PRINT_MEASURED_TRANSFER_RATE(cnt, duration); #endif /* CONFIG_MEASURE_TIME */ return rcode; } else if (strcmp (argv[1], "write") == 0) { int rcode; #if defined(CONFIG_MEASURE_TIME) ulong duration; /* measured time in ms */ #endif /* CONFIG_MEASURE_TIME */ printf (fmt, dev_addr, argv[1], addr, off, cnt); #if defined(CONFIG_MEASURE_TIME) set_timer(0); /* start measuring */ #endif /* CONFIG_MEASURE_TIME */ rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt); #if defined(CONFIG_MEASURE_TIME) duration = get_timer(0); /* stop measuring */ #endif /* CONFIG_MEASURE_TIME */ puts ("done\n"); #if defined(CONFIG_MEASURE_TIME) PRINT_MEASURED_TRANSFER_RATE(cnt, duration); #endif /* CONFIG_MEASURE_TIME */ return rcode; } } //add by yanbin for test else if (argc == 2 && strcmp(argv[1], "ywstatus") == 0) { unsigned int status = YW_read_eeprom_status(); printf("The eeprom current status is 0x%x\n",status); return 1; } printf ("Usage:\n%s\n", cmdtp->usage); return 1; } #endif /*----------------------------------------------------------------------- * * for CFG_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM. * * for CFG_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is * 0x00000nxx for EEPROM address selectors and page number at n. */ #if defined(CFG_ENV_IS_IN_EEPROM) || defined(CONFIG_CMD_EEPROM) #ifndef CONFIG_SPI #if !defined(CFG_I2C_EEPROM_ADDR_LEN) || CFG_I2C_EEPROM_ADDR_LEN < 1 || CFG_I2C_EEPROM_ADDR_LEN > 2 #error CFG_I2C_EEPROM_ADDR_LEN must be 1 or 2 #endif #endif int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt) { unsigned end = offset + cnt; unsigned blk_off; int rcode = 0; /* Read data until done or would cross a page boundary. * We must write the address again when changing pages * because the next page may be in a different device. */ while (offset < end) { unsigned alen, len; #if !defined(CFG_I2C_FRAM) unsigned maxlen; #endif #if CFG_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X) uchar addr[2]; blk_off = offset & 0xFF; /* block offset */ addr[0] = offset >> 8; /* block number */ addr[1] = blk_off; /* block offset */ alen = 2; #else uchar addr[3]; blk_off = offset & 0xFF; /* block offset */ addr[0] = offset >> 16; /* block number */ addr[1] = offset >> 8; /* upper address octet */ addr[2] = blk_off; /* lower address octet */ alen = 3; #endif /* CFG_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */ addr[0] |= dev_addr; /* insert device address */ len = end - offset; /* * For a FRAM device there is no limit on the number of the * bytes that can be ccessed with the single read or write * operation. */ #if !defined(CFG_I2C_FRAM) maxlen = 0x100 - blk_off; if (maxlen > I2C_RXTX_LEN) maxlen = I2C_RXTX_LEN; if (len > maxlen) len = maxlen; #endif #ifdef CONFIG_SPI spi_read (addr, alen, buffer, len); #else if (i2c_read (addr[0], offset, alen-1, buffer, len) != 0) rcode = 1; #endif buffer += len; offset += len; } return rcode; }
static void TftpHandler(uchar *pkt, unsigned dest, IPaddr_t sip, unsigned src, unsigned len) { __be16 proto; __be16 *s; int i; if (dest != TftpOurPort) { #ifdef CONFIG_MCAST_TFTP if (Multicast && (!Mcast_port || (dest != Mcast_port))) #endif return; } if (TftpState != STATE_SEND_RRQ && src != TftpRemotePort && TftpState != STATE_RECV_WRQ && TftpState != STATE_SEND_WRQ) return; if (len < 2) return; len -= 2; /* warning: don't use increment (++) in ntohs() macros!! */ s = (__be16 *)pkt; proto = *s++; pkt = (uchar *)s; switch (ntohs(proto)) { case TFTP_RRQ: break; case TFTP_ACK: #ifdef CONFIG_CMD_TFTPPUT if (TftpWriting) { if (TftpFinalBlock) { tftp_complete(); } else { /* * Move to the next block. We want our block * count to wrap just like the other end! */ int block = ntohs(*s); int ack_ok = (TftpBlock == block); TftpBlock = (unsigned short)(block + 1); update_block_number(); if (ack_ok) TftpSend(); /* Send next data block */ } } #endif break; default: break; #ifdef CONFIG_CMD_TFTPSRV case TFTP_WRQ: debug("Got WRQ\n"); TftpRemoteIP = sip; TftpRemotePort = src; TftpOurPort = 1024 + (get_timer(0) % 3072); new_transfer(); TftpSend(); /* Send ACK(0) */ break; #endif case TFTP_OACK: debug("Got OACK: %s %s\n", pkt, pkt + strlen((char *)pkt) + 1); TftpState = STATE_OACK; TftpRemotePort = src; /* * Check for 'blksize' option. * Careful: "i" is signed, "len" is unsigned, thus * something like "len-8" may give a *huge* number */ for (i = 0; i+8 < len; i++) { if (strcmp((char *)pkt+i, "blksize") == 0) { TftpBlkSize = (unsigned short) simple_strtoul((char *)pkt+i+8, NULL, 10); debug("Blocksize ack: %s, %d\n", (char *)pkt+i+8, TftpBlkSize); } #ifdef CONFIG_TFTP_TSIZE if (strcmp((char *)pkt+i, "tsize") == 0) { TftpTsize = simple_strtoul((char *)pkt+i+6, NULL, 10); debug("size = %s, %d\n", (char *)pkt+i+6, TftpTsize); } #endif } #ifdef CONFIG_MCAST_TFTP parse_multicast_oack((char *)pkt, len-1); if ((Multicast) && (!MasterClient)) TftpState = STATE_DATA; /* passive.. */ else #endif #ifdef CONFIG_CMD_TFTPPUT if (TftpWriting) { /* Get ready to send the first block */ TftpState = STATE_DATA; TftpBlock++; } #endif TftpSend(); /* Send ACK or first data block */ break; case TFTP_DATA: if (len < 2) return; len -= 2; TftpBlock = ntohs(*(__be16 *)pkt); update_block_number(); if (TftpState == STATE_SEND_RRQ) debug("Server did not acknowledge timeout option!\n"); if (TftpState == STATE_SEND_RRQ || TftpState == STATE_OACK || TftpState == STATE_RECV_WRQ) { /* first block received */ TftpState = STATE_DATA; TftpRemotePort = src; new_transfer(); #ifdef CONFIG_MCAST_TFTP if (Multicast) { /* start!=1 common if mcast */ TftpLastBlock = TftpBlock - 1; } else #endif if (TftpBlock != 1) { /* Assertion */ printf("\nTFTP error: " "First block is not block 1 (%ld)\n" "Starting again\n\n", TftpBlock); NetStartAgain(); break; } } if (TftpBlock == TftpLastBlock) { /* * Same block again; ignore it. */ break; } TftpLastBlock = TftpBlock; TftpTimeoutCountMax = TIMEOUT_COUNT; NetSetTimeout(TftpTimeoutMSecs, TftpTimeout); store_block(TftpBlock - 1, pkt + 2, len); /* * Acknowledge the block just received, which will prompt * the remote for the next one. */ #ifdef CONFIG_MCAST_TFTP /* if I am the MasterClient, actively calculate what my next * needed block is; else I'm passive; not ACKING */ if (Multicast) { if (len < TftpBlkSize) { TftpEndingBlock = TftpBlock; } else if (MasterClient) { TftpBlock = PrevBitmapHole = ext2_find_next_zero_bit( Bitmap, (Mapsize*8), PrevBitmapHole); if (TftpBlock > ((Mapsize*8) - 1)) { printf("tftpfile too big\n"); /* try to double it and retry */ Mapsize <<= 1; mcast_cleanup(); NetStartAgain(); return; } TftpLastBlock = TftpBlock; } } #endif TftpSend(); #ifdef CONFIG_MCAST_TFTP if (Multicast) { if (MasterClient && (TftpBlock >= TftpEndingBlock)) { puts("\nMulticast tftp done\n"); mcast_cleanup(); net_set_state(NETLOOP_SUCCESS); } } else #endif if (len < TftpBlkSize) tftp_complete(); break; case TFTP_ERROR: printf("\nTFTP error: '%s' (%d)\n", pkt + 2, ntohs(*(__be16 *)pkt)); switch (ntohs(*(__be16 *)pkt)) { case TFTP_ERR_FILE_NOT_FOUND: case TFTP_ERR_ACCESS_DENIED: puts("Not retrying...\n"); eth_halt(); net_set_state(NETLOOP_FAIL); break; case TFTP_ERR_UNDEFINED: case TFTP_ERR_DISK_FULL: case TFTP_ERR_UNEXPECTED_OPCODE: case TFTP_ERR_UNKNOWN_TRANSFER_ID: case TFTP_ERR_FILE_ALREADY_EXISTS: default: puts("Starting again\n\n"); #ifdef CONFIG_MCAST_TFTP mcast_cleanup(); #endif NetStartAgain(); break; } break; } }
void platform_init(void) { #ifdef LK_PROFILING unsigned int time_nand_emmc; unsigned int time_load_logo; unsigned int time_bat_init; unsigned int time_backlight; unsigned int time_show_logo; unsigned int time_boot_mode; unsigned int time_sw_env; unsigned int time_platform_init; unsigned int time_env; unsigned int time_disp_init; unsigned int time_security_init; unsigned int time_RTC_boot_Check; time_platform_init = get_timer(0); time_nand_emmc = get_timer(0); #endif dprintf(INFO, "platform_init()\n"); #ifdef DUMMY_AP dummy_ap_entry(); #endif #ifdef MTK_EMMC_SUPPORT mmc_legacy_init(1); #else #ifndef MACH_FPGA nand_init(); nand_driver_test(); #endif #endif #ifdef MTK_KERNEL_POWER_OFF_CHARGING if((g_boot_arg->boot_reason == BR_USB) && (upmu_is_chr_det() == KAL_FALSE)) { printf("[%s] Unplugged Charger/Usb between Pre-loader and Uboot in Kernel Charging Mode, Power Off \n", __func__); mt6575_power_off(); } #endif #ifdef LK_PROFILING printf("[PROFILE] ------- NAND/EMMC init takes %d ms -------- \n", get_timer(time_nand_emmc)); time_env = get_timer(0); #endif env_init(); print_env(); #ifdef LK_PROFILING dprintf(INFO,"[PROFILE] ------- ENV init takes %d ms -------- \n", (int)get_timer(time_env)); #endif #ifdef LK_PROFILING time_disp_init = get_timer(0); #endif //FIXME: Disable for MT6582 FPGA Ealry Porting #ifndef DISABLE_DISPLAY_IN_LK_FOR_82_BRINGUP if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode ==CMD_MODE) mt_disp_init((void *)g_fb_base); #endif #ifdef LK_PROFILING dprintf(INFO,"[PROFILE] ------- disp init takes %d ms -------- \n", (int)get_timer(time_disp_init)); #endif #ifdef LK_PROFILING time_load_logo = get_timer(0); #endif #ifdef CONFIG_CFB_CONSOLE //FIXME: Disable for MT6582 FPGA Ealry Porting #ifndef DISABLE_DISPLAY_IN_LK_FOR_82_BRINGUP drv_video_init(); #endif #endif //#endif #ifndef DISABLE_DISPLAY_IN_LK_FOR_82_BRINGUP mboot_common_load_logo((unsigned long)mt_get_logo_db_addr(), "logo"); dprintf(INFO, "Show BLACK_PICTURE\n"); #endif //FIXME: Disable for MT6582 FPGA Ealry Porting #ifndef DISABLE_DISPLAY_IN_LK_FOR_82_BRINGUP #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY if(!is_low_battery(0)) { #endif mt_disp_fill_rect(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT, 0x0); mt_disp_power(TRUE); mt_disp_update(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT); mt_disp_wait_idle(); mt_disp_update(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT); mt_disp_wait_idle(); mt_disp_power(1); //power on display related modules #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY } #endif #endif #ifdef LK_PROFILING printf("[PROFILE] ------- load_logo takes %d ms -------- \n", get_timer(time_load_logo)); time_backlight = get_timer(0); #endif /*for kpd pmic mode setting*/ set_kpd_pmic_mode(); //FIXME: Disable for MT6582 FPGA Ealry Porting //#ifndef DISABLE_DISPLAY_IN_LK_FOR_82_BRINGUP #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY if(!is_low_battery(0)) { #endif /*some lcm panel need more time to start show picture*/ msleep(50); mt65xx_backlight_on(); #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY } #endif //#endif #ifdef LK_PROFILING printf("[PROFILE] ------- backlight takes %d ms -------- \n", get_timer(time_backlight)); time_boot_mode = get_timer(0); #endif boot_mode_select(); #ifdef LK_PROFILING printf("[PROFILE] ------- boot mode select takes %d ms -------- \n", get_timer(time_boot_mode)); #endif #ifdef MTK_SECURITY_SW_SUPPORT #ifdef LK_PROFILING time_security_init = get_timer(0); #endif /* initialize security library */ #ifdef MTK_EMMC_SUPPORT sec_func_init(1); #else sec_func_init(0); #endif #ifdef LK_PROFILING dprintf(INFO,"[PROFILE] ------- Security init takes %d ms -------- \n", (int)get_timer(time_security_init)); #endif #endif /*Show download logo & message on screen */ if (g_boot_arg->boot_mode == DOWNLOAD_BOOT) { printf("[LK] boot mode is DOWNLOAD_BOOT\n"); #ifdef MTK_SECURITY_SW_SUPPORT /* verify da before jumping to da*/ if (sec_usbdl_enabled()) { u8 *da_addr = (u8 *)g_boot_arg->da_info.addr; u32 da_len = g_boot_arg->da_info.len; u32 sig_len = g_boot_arg->da_info.sig_len; u8 *sig_addr = (unsigned char *)da_addr + (da_len - sig_len); if (da_len == 0 || sig_len == 0) { printf("[LK] da argument is invalid\n"); printf("da_addr = 0x%x\n", da_addr); printf("da_len = 0x%x\n", da_len); printf("sig_len = 0x%x\n", sig_len); } if (sec_usbdl_verify_da(da_addr, (da_len - sig_len), sig_addr, sig_len)) { /* da verify fail */ video_printf(" => Not authenticated tool, download stop...\n"); while(1); /* fix me, should not be infinite loop in lk */ } } else #endif { printf(" DA verification disabled...\n"); } mt_disp_show_boot_logo(); video_printf(" => Downloading...\n"); mt65xx_backlight_on(); mtk_wdt_disable();//Disable wdt before jump to DA platform_uninit(); #ifdef HAVE_CACHE_PL310 l2_disable(); #endif #ifdef ENABLE_L2_SHARING config_shared_SRAM_size(); #endif arch_disable_cache(UCACHE); arch_disable_mmu(); jump_da(g_boot_arg->da_info.addr, g_boot_arg->da_info.arg1, g_boot_arg->da_info.arg2); } #ifdef LK_PROFILING time_bat_init = get_timer(0); #endif mt65xx_bat_init(); #ifdef LK_PROFILING printf("[PROFILE] ------- battery init takes %d ms -------- \n", get_timer(time_bat_init)); #endif #ifndef CFG_POWER_CHARGING #ifdef LK_PROFILING time_RTC_boot_Check = get_timer(0); #endif /* NOTE: if define CFG_POWER_CHARGING, will rtc_boot_check() in mt65xx_bat_init() */ rtc_boot_check(false); #ifdef LK_PROFILING dprintf(INFO,"[PROFILE] ------- RTC boot check Init takes %d ms -------- \n", (int)get_timer(time_RTC_boot_Check)); #endif #endif #ifdef LK_PROFILING time_show_logo = get_timer(0); #endif #ifdef MTK_KERNEL_POWER_OFF_CHARGING if(kernel_charging_boot() == 1) { #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY CHARGER_TYPE CHR_Type_num = CHARGER_UNKNOWN; charging_get_charger_type(&CHR_Type_num); if ((g_boot_mode != LOW_POWER_OFF_CHARGING_BOOT) || ((CHR_Type_num != STANDARD_HOST) && (CHR_Type_num != NONSTANDARD_CHARGER))) { dprintf(INFO, "[PROFILE] ------- g_boot_mode = %d -------- \n", g_boot_mode); #endif mt_disp_power(TRUE); mt_disp_show_low_battery(); mt_disp_wait_idle(); mt65xx_leds_brightness_set(6, 110); #ifdef MTK_BATLOWV_NO_PANEL_ON_EARLY } #endif } else if(g_boot_mode != KERNEL_POWER_OFF_CHARGING_BOOT && g_boot_mode != LOW_POWER_OFF_CHARGING_BOOT) { #ifndef DISABLE_DISPLAY_IN_LK_FOR_82_BRINGUP if (g_boot_mode != ALARM_BOOT && (g_boot_mode != FASTBOOT)) { mt_disp_show_boot_logo(); } #endif } #else #ifndef DISABLE_DISPLAY_IN_LK_FOR_82_BRINGUP if (g_boot_mode != ALARM_BOOT && (g_boot_mode != FASTBOOT)) { mt_disp_show_boot_logo(); } #endif #endif #ifdef LK_PROFILING printf("[PROFILE] ------- show logo takes %d ms -------- \n", get_timer(time_show_logo)); time_sw_env= get_timer(0); #endif //sw_env(); #ifdef LK_PROFILING printf("[PROFILE] ------- sw_env takes %d ms -------- \n", get_timer(time_sw_env)); printf("[PROFILE] ------- platform_init takes %d ms -------- \n", get_timer(time_platform_init)); #endif }
//#define PMIC_WRAP_PORTING //only for lk early porting void platform_early_init(void) { #ifdef LK_PROFILING unsigned int time_led_init; unsigned int time_pmic6329_init; unsigned int time_platform_early_init; unsigned int time_repair_sram; unsigned int time_display_early_init; unsigned int time_wdt_early_init; time_platform_early_init = get_timer(0); #endif /* initialize the uart */ uart_init_early(); platform_init_interrupts(); platform_early_init_timer(); mt_gpio_set_default(); #ifdef REPAIR_SRAM_ENABLE_LK_FOR_82_BRINGUP #ifdef LK_PROFILING time_repair_sram = get_timer(0); #endif int repair_ret; repair_ret = repair_sram(); if(repair_ret != 0) { printf("Sram repair failed %d\n", repair_ret); while(1); } #ifdef LK_PROFILING dprintf(INFO,"[PROFILE] ------- Repair SRAM takes %d ms -------- \n",(int) get_timer(time_repair_sram)); #endif #endif //i2c_v1_init(); #ifdef LK_PROFILING time_wdt_early_init = get_timer(0); #endif mtk_wdt_init(); #ifdef LK_PROFILING dprintf(INFO,"[PROFILE] ------- WDT Init takes %d ms -------- \n", (int)get_timer(time_wdt_early_init)); #endif // WDT will be triggered when uncompressing linux image on FPGA #ifdef MACH_FPGA mtk_wdt_disable(); #endif #ifdef MTK_MT8193_SUPPORT mt8193_init(); #endif /* initialize the frame buffet information */ //FIXME: Disable for MT6582 FPGA Ealry Porting #ifndef DISABLE_DISPLAY_IN_LK_FOR_82_BRINGUP #ifdef LK_PROFILING time_display_early_init = get_timer(0); #endif g_fb_size = mt_disp_get_vram_size(); g_fb_base = memory_size() - g_fb_size + DRAM_PHY_ADDR; dprintf(INFO, "FB base = 0x%x, FB size = %d\n", g_fb_base, g_fb_size); #ifdef LK_PROFILING dprintf(INFO,"[PROFILE] ------- Display eraly init takes %d ms -------- \n", (int)get_timer(time_display_early_init)); #endif #endif #ifdef LK_PROFILING time_led_init = get_timer(0); #endif #ifndef MACH_FPGA leds_init(); #endif #ifdef LK_PROFILING printf("[PROFILE] ------- led init takes %d ms -------- \n", get_timer(time_led_init)); #endif isink0_init(); //turn on PMIC6329 isink0 //FIXME: Disable for MT6582 FPGA Ealry Porting #ifndef DISABLE_DISPLAY_IN_LK_FOR_82_BRINGUP if (!(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode ==CMD_MODE)) mt_disp_init((void *)g_fb_base); #endif #ifdef PMIC_WRAP_PORTING pwrap_init_lk(); pwrap_init_for_early_porting(); #endif #ifdef LK_PROFILING time_pmic6329_init = get_timer(0); #endif pmic_init(); #ifdef LK_PROFILING printf("[PROFILE] ------- pmic_init takes %d ms -------- \n", get_timer(time_pmic6329_init)); printf("[PROFILE] ------- platform_early_init takes %d ms -------- \n", get_timer(time_platform_early_init)); #endif }
/* TODO: 2x16 unsupported */ int flash_erase (flash_info_t *info, int s_first, int s_last) { volatile unsigned char *addr = (uchar *)(info->start[0]); int flag, prot, sect, l_sect; ulong start, now, last; /* TODO: 2x16 unsupported */ if(info->portwidth==4) return 1; if((info->flash_id & FLASH_TYPEMASK) == FLASH_ROM) return 1; if((info->flash_id & FLASH_TYPEMASK) == FLASH_RAM) { for (sect = s_first; sect<=s_last; sect++) { int sector_size=info->size/info->sector_count; addr = (uchar *)(info->start[sect]); memset((void *)addr, 0, sector_size); } return 0; } if ((s_first < 0) || (s_first > s_last)) { if (info->flash_id == FLASH_UNKNOWN) { printf ("- missing\n"); } else { printf ("- no sectors to erase\n"); } return 1; } if ((info->flash_id&FLASH_VENDMASK) == FLASH_MAN_INTEL) { return flash_erase_intel(info, (unsigned short)s_first, (unsigned short)s_last); } #if 0 if ((info->flash_id == FLASH_UNKNOWN) || (info->flash_id > FLASH_AMD_COMP)) { printf ("Can't erase unknown flash type %08lx - aborted\n", info->flash_id); return 1; } #endif prot = 0; for (sect=s_first; sect<=s_last; ++sect) { if (info->protect[sect]) { prot++; } } if (prot) { printf ("- Warning: %d protected sectors will not be erased!\n", prot); } else { printf ("\n"); } l_sect = -1; /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); flash_cmd(info->portwidth,addr,0x555,0xAA); flash_cmd(info->portwidth,addr,0x2AA,0x55); flash_cmd(info->portwidth,addr,0x555,0x80); flash_cmd(info->portwidth,addr,0x555,0xAA); flash_cmd(info->portwidth,addr,0x2AA,0x55); /* Start erase on unprotected sectors */ for (sect = s_first; sect<=s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ addr = (uchar *)(info->start[sect]); flash_cmd(info->portwidth,addr,0,0x30); l_sect = sect; } } /* re-enable interrupts if necessary */ if (flag) enable_interrupts(); /* wait at least 80us - let's wait 1 ms */ udelay (1000); /* * We wait for the last triggered sector */ if (l_sect < 0) goto DONE; start = get_timer (0); last = start; addr = (volatile unsigned char *)(info->start[l_sect]); /* broken for 2x16: TODO */ while ((addr[0] & 0x80) != 0x80) { if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { printf ("Timeout\n"); return 1; } /* show that we're waiting */ if ((now - last) > 1000) { /* every second */ putc ('.'); last = now; } } DONE: /* reset to read mode */ addr = (volatile unsigned char *)info->start[0]; flash_cmd(info->portwidth,addr,0,0xf0); flash_cmd(info->portwidth,addr,0,0xf0); printf (" done\n"); return 0; }
static int timer_again(lua_State *L) { ev_timer *w = get_timer(L, 1); loop_t *lo = get_loop(L, 2); ev_timer_again(lo->loop, w); return 0; }
static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, uchar *buf, uint b_len) { struct i2c_regs *regs = i2c->regs; uchar *pbuf = buf; uint bytes_remain_len = b_len; uint bytes_xferred = 0; uint words_xferred = 0; ulong start; uint con = 0; uint rxdata; uint i, j; int err; bool snd_chunk = false; debug("rk_i2c_read: chip = %d, reg = %d, r_len = %d, b_len = %d\n", chip, reg, r_len, b_len); err = rk_i2c_send_start_bit(i2c); if (err) return err; writel(I2C_MRXADDR_SET(1, chip << 1 | 1), ®s->mrxaddr); if (r_len == 0) { writel(0, ®s->mrxraddr); } else if (r_len < 4) { writel(I2C_MRXRADDR_SET(r_len, reg), ®s->mrxraddr); } else { debug("I2C Read: addr len %d not supported\n", r_len); return -EIO; } while (bytes_remain_len) { if (bytes_remain_len > RK_I2C_FIFO_SIZE) { con = I2C_CON_EN; bytes_xferred = 32; } else { /* * The hw can read up to 32 bytes at a time. If we need * more than one chunk, send an ACK after the last byte. */ con = I2C_CON_EN | I2C_CON_LASTACK; bytes_xferred = bytes_remain_len; } words_xferred = DIV_ROUND_UP(bytes_xferred, 4); /* * make sure we are in plain RX mode if we read a second chunk */ if (snd_chunk) con |= I2C_CON_MOD(I2C_MODE_RX); else con |= I2C_CON_MOD(I2C_MODE_TRX); writel(con, ®s->con); writel(bytes_xferred, ®s->mrxcnt); writel(I2C_MBRFIEN | I2C_NAKRCVIEN, ®s->ien); start = get_timer(0); while (1) { if (readl(®s->ipd) & I2C_NAKRCVIPD) { writel(I2C_NAKRCVIPD, ®s->ipd); err = -EREMOTEIO; } if (readl(®s->ipd) & I2C_MBRFIPD) { writel(I2C_MBRFIPD, ®s->ipd); break; } if (get_timer(start) > I2C_TIMEOUT_MS) { debug("I2C Read Data Timeout\n"); err = -ETIMEDOUT; rk_i2c_show_regs(regs); goto i2c_exit; } udelay(1); } for (i = 0; i < words_xferred; i++) { rxdata = readl(®s->rxdata[i]); debug("I2c Read RXDATA[%d] = 0x%x\n", i, rxdata); for (j = 0; j < 4; j++) { if ((i * 4 + j) == bytes_xferred) break; *pbuf++ = (rxdata >> (j * 8)) & 0xff; } } bytes_remain_len -= bytes_xferred; snd_chunk = true; debug("I2C Read bytes_remain_len %d\n", bytes_remain_len); } i2c_exit: rk_i2c_send_stop_bit(i2c); rk_i2c_disable(i2c); return err; }
static int omap_hsmmc_init_setup(struct mmc *mmc) { struct hsmmc *mmc_base; unsigned int reg_val; unsigned int dsor; ulong start; mmc_base = ((struct omap_hsmmc_data *)mmc->priv)->base_addr; mmc_board_init(mmc); writel(readl(&mmc_base->sysconfig) | MMC_SOFTRESET, &mmc_base->sysconfig); start = get_timer(0); while ((readl(&mmc_base->sysstatus) & RESETDONE) == 0) { if (get_timer(0) - start > MAX_RETRY_MS) { printf("%s: timedout waiting for cc2!\n", __func__); return TIMEOUT; } } writel(readl(&mmc_base->sysctl) | SOFTRESETALL, &mmc_base->sysctl); start = get_timer(0); while ((readl(&mmc_base->sysctl) & SOFTRESETALL) != 0x0) { if (get_timer(0) - start > MAX_RETRY_MS) { printf("%s: timedout waiting for softresetall!\n", __func__); return TIMEOUT; } } writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0, &mmc_base->hctl); writel(readl(&mmc_base->capa) | VS30_3V0SUP | VS18_1V8SUP, &mmc_base->capa); reg_val = readl(&mmc_base->con) & RESERVED_MASK; writel(CTPL_MMC_SD | reg_val | WPP_ACTIVEHIGH | CDP_ACTIVEHIGH | MIT_CTO | DW8_1_4BITMODE | MODE_FUNC | STR_BLOCK | HR_NOHOSTRESP | INIT_NOINIT | NOOPENDRAIN, &mmc_base->con); dsor = 240; mmc_reg_out(&mmc_base->sysctl, (ICE_MASK | DTO_MASK | CEN_MASK), (ICE_STOP | DTO_15THDTO | CEN_DISABLE)); mmc_reg_out(&mmc_base->sysctl, ICE_MASK | CLKD_MASK, (dsor << CLKD_OFFSET) | ICE_OSCILLATE); start = get_timer(0); while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY) { if (get_timer(0) - start > MAX_RETRY_MS) { printf("%s: timedout waiting for ics!\n", __func__); return TIMEOUT; } } writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl); writel(readl(&mmc_base->hctl) | SDBP_PWRON, &mmc_base->hctl); writel(IE_BADA | IE_CERR | IE_DEB | IE_DCRC | IE_DTO | IE_CIE | IE_CEB | IE_CCRC | IE_CTO | IE_BRR | IE_BWR | IE_TC | IE_CC, &mmc_base->ie); mmc_init_stream(mmc_base); return 0; }
static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ xilinx_spartan3_slave_parallel_fns *fn = desc->iface_fns; PRINTF ("%s: start with interface functions @ 0x%p\n", __FUNCTION__, fn); if (fn) { size_t bytecount = 0; unsigned char *data = (unsigned char *) buf; int cookie = desc->cookie; /* make a local copy */ unsigned long ts; /* timestamp */ PRINTF ("%s: Function Table:\n" "ptr:\t0x%p\n" "struct: 0x%p\n" "pre: 0x%p\n" "pgm:\t0x%p\n" "init:\t0x%p\n" "err:\t0x%p\n" "clk:\t0x%p\n" "cs:\t0x%p\n" "wr:\t0x%p\n" "read data:\t0x%p\n" "write data:\t0x%p\n" "busy:\t0x%p\n" "abort:\t0x%p\n", "post:\t0x%p\n\n", __FUNCTION__, &fn, fn, fn->pre, fn->pgm, fn->init, fn->err, fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata, fn->busy, fn->abort, fn->post); /* * This code is designed to emulate the "Express Style" * Continuous Data Loading in Slave Parallel Mode for * the Spartan-II Family. */ #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK printf ("Loading FPGA Device %d...\n", cookie); #endif /* * Run the pre configuration function if there is one. */ if (*fn->pre) { (*fn->pre) (cookie); } /* Establish the initial state */ (*fn->pgm) (true, true, cookie); /* Assert the program, commit */ /* Get ready for the burn */ CONFIG_FPGA_DELAY (); (*fn->pgm) (false, true, cookie); /* Deassert the program, commit */ ts = get_timer (0); /* get current time */ /* Now wait for INIT and BUSY to go high */ do { CONFIG_FPGA_DELAY (); if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */ puts ("** Timeout waiting for INIT to clear.\n"); (*fn->abort) (cookie); /* abort the burn */ return FPGA_FAIL; } } while ((*fn->init) (cookie) && (*fn->busy) (cookie)); (*fn->wr) (true, true, cookie); /* Assert write, commit */ (*fn->cs) (true, true, cookie); /* Assert chip select, commit */ (*fn->clk) (true, true, cookie); /* Assert the clock pin */ /* Load the data */ while (bytecount < bsize) { /* XXX - do we check for an Ctrl-C press in here ??? */ /* XXX - Check the error bit? */ (*fn->wdata) (data[bytecount++], true, cookie); /* write the data */ CONFIG_FPGA_DELAY (); (*fn->clk) (false, true, cookie); /* Deassert the clock pin */ CONFIG_FPGA_DELAY (); (*fn->clk) (true, true, cookie); /* Assert the clock pin */ #ifdef CONFIG_SYS_FPGA_CHECK_BUSY ts = get_timer (0); /* get current time */ while ((*fn->busy) (cookie)) { /* XXX - we should have a check in here somewhere to * make sure we aren't busy forever... */ CONFIG_FPGA_DELAY (); (*fn->clk) (false, true, cookie); /* Deassert the clock pin */ CONFIG_FPGA_DELAY (); (*fn->clk) (true, true, cookie); /* Assert the clock pin */ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */ puts ("** Timeout waiting for BUSY to clear.\n"); (*fn->abort) (cookie); /* abort the burn */ return FPGA_FAIL; } } #endif #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK if (bytecount % (bsize / 40) == 0) putc ('.'); /* let them know we are alive */ #endif } CONFIG_FPGA_DELAY (); (*fn->cs) (false, true, cookie); /* Deassert the chip select */ (*fn->wr) (false, true, cookie); /* Deassert the write pin */ #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK putc ('\n'); /* terminate the dotted line */ #endif /* now check for done signal */ ts = get_timer (0); /* get current time */ ret_val = FPGA_SUCCESS; while ((*fn->done) (cookie) == FPGA_FAIL) { /* XXX - we should have a check in here somewhere to * make sure we aren't busy forever... */ CONFIG_FPGA_DELAY (); (*fn->clk) (false, true, cookie); /* Deassert the clock pin */ CONFIG_FPGA_DELAY (); (*fn->clk) (true, true, cookie); /* Assert the clock pin */ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */ puts ("** Timeout waiting for DONE to clear.\n"); (*fn->abort) (cookie); /* abort the burn */ ret_val = FPGA_FAIL; break; } } /* * Run the post configuration function if there is one. */ if (*fn->post) (*fn->post) (cookie); #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK if (ret_val == FPGA_SUCCESS) puts ("Done.\n"); else puts ("Fail.\n"); #endif } else { printf ("%s: NULL Interface function table!\n", __FUNCTION__); } return ret_val; }
static int omap_hsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) { struct hsmmc *mmc_base; unsigned int flags, mmc_stat; ulong start; mmc_base = ((struct omap_hsmmc_data *)mmc->priv)->base_addr; start = get_timer(0); while ((readl(&mmc_base->pstate) & (DATI_MASK | CMDI_MASK)) != 0) { if (get_timer(0) - start > MAX_RETRY_MS) { printf("%s: timedout waiting on cmd inhibit to clear\n", __func__); return TIMEOUT; } } writel(0xFFFFFFFF, &mmc_base->stat); start = get_timer(0); while (readl(&mmc_base->stat)) { if (get_timer(0) - start > MAX_RETRY_MS) { printf("%s: timedout waiting for STAT (%x) to clear\n", __func__, readl(&mmc_base->stat)); return TIMEOUT; } } /* * CMDREG * CMDIDX[13:8] : Command index * DATAPRNT[5] : Data Present Select * ENCMDIDX[4] : Command Index Check Enable * ENCMDCRC[3] : Command CRC Check Enable * RSPTYP[1:0] * 00 = No Response * 01 = Length 136 * 10 = Length 48 * 11 = Length 48 Check busy after response */ /* Delay added before checking the status of frq change * retry not supported by mmc.c(core file) */ if (cmd->cmdidx == SD_CMD_APP_SEND_SCR) udelay(50000); /* wait 50 ms */ if (!(cmd->resp_type & MMC_RSP_PRESENT)) flags = 0; else if (cmd->resp_type & MMC_RSP_136) flags = RSP_TYPE_LGHT136 | CICE_NOCHECK; else if (cmd->resp_type & MMC_RSP_BUSY) flags = RSP_TYPE_LGHT48B; else flags = RSP_TYPE_LGHT48; /* enable default flags */ flags = flags | (CMD_TYPE_NORMAL | CICE_NOCHECK | CCCE_NOCHECK | MSBS_SGLEBLK | ACEN_DISABLE | BCE_DISABLE | DE_DISABLE); if (cmd->resp_type & MMC_RSP_CRC) flags |= CCCE_CHECK; if (cmd->resp_type & MMC_RSP_OPCODE) flags |= CICE_CHECK; if (data) { if ((cmd->cmdidx == MMC_CMD_READ_MULTIPLE_BLOCK) || (cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK)) { flags |= (MSBS_MULTIBLK | BCE_ENABLE); data->blocksize = 512; writel(data->blocksize | (data->blocks << 16), &mmc_base->blk); } else writel(data->blocksize | NBLK_STPCNT, &mmc_base->blk); if (data->flags & MMC_DATA_READ) flags |= (DP_DATA | DDIR_READ); else flags |= (DP_DATA | DDIR_WRITE); } writel(cmd->cmdarg, &mmc_base->arg); udelay(20); /* To fix "No status update" error on eMMC */ writel((cmd->cmdidx << 24) | flags, &mmc_base->cmd); start = get_timer(0); do { mmc_stat = readl(&mmc_base->stat); if (get_timer(0) - start > MAX_RETRY_MS) { printf("%s : timeout: No status update\n", __func__); return TIMEOUT; } } while (!mmc_stat); if ((mmc_stat & IE_CTO) != 0) { mmc_reset_controller_fsm(mmc_base, SYSCTL_SRC); return TIMEOUT; } else if ((mmc_stat & ERRI_MASK) != 0) return -1; if (mmc_stat & CC_MASK) { writel(CC_MASK, &mmc_base->stat); if (cmd->resp_type & MMC_RSP_PRESENT) { if (cmd->resp_type & MMC_RSP_136) { /* response type 2 */ cmd->response[3] = readl(&mmc_base->rsp10); cmd->response[2] = readl(&mmc_base->rsp32); cmd->response[1] = readl(&mmc_base->rsp54); cmd->response[0] = readl(&mmc_base->rsp76); } else /* response types 1, 1b, 3, 4, 5, 6 */ cmd->response[0] = readl(&mmc_base->rsp10); } } if (data && (data->flags & MMC_DATA_READ)) { mmc_read_data(mmc_base, data->dest, data->blocksize * data->blocks); } else if (data && (data->flags & MMC_DATA_WRITE)) { mmc_write_data(mmc_base, data->src, data->blocksize * data->blocks); } return 0; }
static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) { struct mmc_host *host = (struct mmc_host *)mmc->priv; int flags, i; int result; unsigned int mask = 0; unsigned int retry = 0x100000; debug(" mmc_send_cmd called\n"); result = mmc_wait_inhibit(host, cmd, data, 10 /* ms */); if (result < 0) return result; if (data) mmc_prepare_data(host, data); debug("cmd->arg: %08x\n", cmd->cmdarg); writel(cmd->cmdarg, &host->reg->argument); if (data) mmc_set_transfer_mode(host, data); if ((cmd->resp_type & MMC_RSP_136) && (cmd->resp_type & MMC_RSP_BUSY)) return -1; /* * CMDREG * CMDIDX[13:8] : Command index * DATAPRNT[5] : Data Present Select * ENCMDIDX[4] : Command Index Check Enable * ENCMDCRC[3] : Command CRC Check Enable * RSPTYP[1:0] * 00 = No Response * 01 = Length 136 * 10 = Length 48 * 11 = Length 48 Check busy after response */ if (!(cmd->resp_type & MMC_RSP_PRESENT)) flags = TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_NO_RESPONSE; else if (cmd->resp_type & MMC_RSP_136) flags = TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_LENGTH_136; else if (cmd->resp_type & MMC_RSP_BUSY) flags = TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_LENGTH_48_BUSY; else flags = TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_LENGTH_48; if (cmd->resp_type & MMC_RSP_CRC) flags |= TEGRA_MMC_TRNMOD_CMD_CRC_CHECK; if (cmd->resp_type & MMC_RSP_OPCODE) flags |= TEGRA_MMC_TRNMOD_CMD_INDEX_CHECK; if (data) flags |= TEGRA_MMC_TRNMOD_DATA_PRESENT_SELECT_DATA_TRANSFER; debug("cmd: %d\n", cmd->cmdidx); writew((cmd->cmdidx << 8) | flags, &host->reg->cmdreg); for (i = 0; i < retry; i++) { mask = readl(&host->reg->norintsts); /* Command Complete */ if (mask & TEGRA_MMC_NORINTSTS_CMD_COMPLETE) { if (!data) writel(mask, &host->reg->norintsts); break; } } if (i == retry) { printf("%s: waiting for status update\n", __func__); writel(mask, &host->reg->norintsts); return TIMEOUT; } if (mask & TEGRA_MMC_NORINTSTS_CMD_TIMEOUT) { /* Timeout Error */ debug("timeout: %08x cmd %d\n", mask, cmd->cmdidx); writel(mask, &host->reg->norintsts); return TIMEOUT; } else if (mask & TEGRA_MMC_NORINTSTS_ERR_INTERRUPT) { /* Error Interrupt */ debug("error: %08x cmd %d\n", mask, cmd->cmdidx); writel(mask, &host->reg->norintsts); return -1; } if (cmd->resp_type & MMC_RSP_PRESENT) { if (cmd->resp_type & MMC_RSP_136) { /* CRC is stripped so we need to do some shifting. */ for (i = 0; i < 4; i++) { unsigned int offset = (unsigned int)(&host->reg->rspreg3 - i); cmd->response[i] = readl(offset) << 8; if (i != 3) { cmd->response[i] |= readb(offset - 1); } debug("cmd->resp[%d]: %08x\n", i, cmd->response[i]); } } else if (cmd->resp_type & MMC_RSP_BUSY) { for (i = 0; i < retry; i++) { /* PRNTDATA[23:20] : DAT[3:0] Line Signal */ if (readl(&host->reg->prnsts) & (1 << 20)) /* DAT[0] */ break; } if (i == retry) { printf("%s: card is still busy\n", __func__); writel(mask, &host->reg->norintsts); return TIMEOUT; } cmd->response[0] = readl(&host->reg->rspreg0); debug("cmd->resp[0]: %08x\n", cmd->response[0]); } else { cmd->response[0] = readl(&host->reg->rspreg0); debug("cmd->resp[0]: %08x\n", cmd->response[0]); } } if (data) { unsigned long start = get_timer(0); while (1) { mask = readl(&host->reg->norintsts); if (mask & TEGRA_MMC_NORINTSTS_ERR_INTERRUPT) { /* Error Interrupt */ writel(mask, &host->reg->norintsts); printf("%s: error during transfer: 0x%08x\n", __func__, mask); return -1; } else if (mask & TEGRA_MMC_NORINTSTS_DMA_INTERRUPT) { /* * DMA Interrupt, restart the transfer where * it was interrupted. */ unsigned int address = readl(&host->reg->sysad); debug("DMA end\n"); writel(TEGRA_MMC_NORINTSTS_DMA_INTERRUPT, &host->reg->norintsts); writel(address, &host->reg->sysad); } else if (mask & TEGRA_MMC_NORINTSTS_XFER_COMPLETE) { /* Transfer Complete */ debug("r/w is done\n"); break; } else if (get_timer(start) > 2000UL) { writel(mask, &host->reg->norintsts); printf("%s: MMC Timeout\n" " Interrupt status 0x%08x\n" " Interrupt status enable 0x%08x\n" " Interrupt signal enable 0x%08x\n" " Present status 0x%08x\n", __func__, mask, readl(&host->reg->norintstsen), readl(&host->reg->norintsigen), readl(&host->reg->prnsts)); return -1; } } writel(mask, &host->reg->norintsts); if (data->flags & MMC_DATA_READ) { if ((uintptr_t)data->dest & (ARCH_DMA_MINALIGN - 1)) printf("Warning: unaligned read from %p " "may fail\n", data->dest); invalidate_dcache_range((ulong)data->dest, (ulong)data->dest + data->blocks * data->blocksize); } } udelay(1000); return 0; }
/*----------------------------------------------------------------------- * Write a word to Flash for AMD FLASH * A word is 16 or 32 bits, whichever the bus width of the flash bank * (not an individual chip) is. * * returns: * 0 - OK * 1 - write timeout * 2 - Flash not erased */ static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data) { ulong start; int res = 0; /* result, assume success */ FPWV *base; /* first address in flash bank */ start = get_timer(0); while(*dest != 0xFFFF) { #ifndef RT3052_FPGA_BOARD if (get_timer(start) > CFG_FLASH_STATE_DISPLAY_TOUT) { start = get_timer(0); printf("\n dest[0x%08X]=%04X\n",dest,*dest); } #endif #if 1 //defined (RT2880_ASIC_BOARD) || defined (RT3052_ASIC_BOARD) #else printf("Not Erase: address 0x%08x(value=0x%08x)\n", (ulong) dest, *dest); return (2); #endif } base = (FPWV *)(info->start[0]); /* Disable interrupts which might cause a timeout here */ //flag = disable_interrupts(); base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */ base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */ base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */ *dest = data; /* start programming the data */ /* re-enable interrupts if necessary */ /* if (flag) enable_interrupts(); */ start = get_timer(0); #if 0 /* data polling for D7 */ while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) { if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { *dest = (FPW)0x00F000F0; /* reset bank */ res = 1; } } #else { unsigned int oldstatus, status, poll=0; unsigned int dq6, dq5, dq2; udelay(10); oldstatus = *dest; status = *dest; // printf("[%d] Toggle %d, %d\n", poll, (status ^ oldstatus) & dq6, (status ^ oldstatus) & dq2); dq6 = (1<<6) & 0x000000FF; dq5 = (1<<5) & 0x000000FF; dq2 = (1<<2) & 0x000000FF; while( res ==0 && (status & dq6) != (oldstatus & dq6) && (status & dq5) != dq5 ) { if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { *dest = (FPW)0x00F000F0; /* reset bank */ printf("*reset bank\n"); res = 1; } poll++; oldstatus = *dest; // udelay(20); status = *dest; //printf("[%d] Toggle %d\n", poll, (status ^ oldstatus) & dq6); } //if (poll != 0) printf("poll %d\n", poll); } #endif return (res); }
static int usb_hub_configure(struct usb_device *dev) { int i, length; ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buffer, USB_BUFSIZ); unsigned char *bitmap; short hubCharacteristics; struct usb_hub_descriptor *descriptor; struct usb_hub_device *hub; __maybe_unused struct usb_hub_status *hubsts; int ret; /* "allocate" Hub device */ hub = usb_hub_allocate(); if (hub == NULL) return -ENOMEM; hub->pusb_dev = dev; /* Get the the hub descriptor */ ret = usb_get_hub_descriptor(dev, buffer, 4); if (ret < 0) { debug("usb_hub_configure: failed to get hub " \ "descriptor, giving up %lX\n", dev->status); return ret; } descriptor = (struct usb_hub_descriptor *)buffer; length = min_t(int, descriptor->bLength, sizeof(struct usb_hub_descriptor)); ret = usb_get_hub_descriptor(dev, buffer, length); if (ret < 0) { debug("usb_hub_configure: failed to get hub " \ "descriptor 2nd giving up %lX\n", dev->status); return ret; } memcpy((unsigned char *)&hub->desc, buffer, length); /* adjust 16bit values */ put_unaligned(le16_to_cpu(get_unaligned( &descriptor->wHubCharacteristics)), &hub->desc.wHubCharacteristics); /* set the bitmap */ bitmap = (unsigned char *)&hub->desc.DeviceRemovable[0]; /* devices not removable by default */ memset(bitmap, 0xff, (USB_MAXCHILDREN+1+7)/8); bitmap = (unsigned char *)&hub->desc.PortPowerCtrlMask[0]; memset(bitmap, 0xff, (USB_MAXCHILDREN+1+7)/8); /* PowerMask = 1B */ for (i = 0; i < ((hub->desc.bNbrPorts + 1 + 7)/8); i++) hub->desc.DeviceRemovable[i] = descriptor->DeviceRemovable[i]; for (i = 0; i < ((hub->desc.bNbrPorts + 1 + 7)/8); i++) hub->desc.PortPowerCtrlMask[i] = descriptor->PortPowerCtrlMask[i]; dev->maxchild = descriptor->bNbrPorts; debug("%d ports detected\n", dev->maxchild); hubCharacteristics = get_unaligned(&hub->desc.wHubCharacteristics); switch (hubCharacteristics & HUB_CHAR_LPSM) { case 0x00: debug("ganged power switching\n"); break; case 0x01: debug("individual port power switching\n"); break; case 0x02: case 0x03: debug("unknown reserved power switching mode\n"); break; } if (hubCharacteristics & HUB_CHAR_COMPOUND) debug("part of a compound device\n"); else debug("standalone hub\n"); switch (hubCharacteristics & HUB_CHAR_OCPM) { case 0x00: debug("global over-current protection\n"); break; case 0x08: debug("individual port over-current protection\n"); break; case 0x10: case 0x18: debug("no over-current protection\n"); break; } debug("power on to power good time: %dms\n", descriptor->bPwrOn2PwrGood * 2); debug("hub controller current requirement: %dmA\n", descriptor->bHubContrCurrent); for (i = 0; i < dev->maxchild; i++) debug("port %d is%s removable\n", i + 1, hub->desc.DeviceRemovable[(i + 1) / 8] & \ (1 << ((i + 1) % 8)) ? " not" : ""); if (sizeof(struct usb_hub_status) > USB_BUFSIZ) { debug("usb_hub_configure: failed to get Status - " \ "too long: %d\n", descriptor->bLength); return -EFBIG; } ret = usb_get_hub_status(dev, buffer); if (ret < 0) { debug("usb_hub_configure: failed to get Status %lX\n", dev->status); return ret; } #ifdef DEBUG hubsts = (struct usb_hub_status *)buffer; #endif debug("get_hub_status returned status %X, change %X\n", le16_to_cpu(hubsts->wHubStatus), le16_to_cpu(hubsts->wHubChange)); debug("local power source is %s\n", (le16_to_cpu(hubsts->wHubStatus) & HUB_STATUS_LOCAL_POWER) ? \ "lost (inactive)" : "good"); debug("%sover-current condition exists\n", (le16_to_cpu(hubsts->wHubStatus) & HUB_STATUS_OVERCURRENT) ? \ "" : "no "); usb_hub_power_on(hub); /* * Reset any devices that may be in a bad state when applying * the power. This is a __weak function. Resetting of the devices * should occur in the board file of the device. */ for (i = 0; i < dev->maxchild; i++) usb_hub_reset_devices(i + 1); for (i = 0; i < dev->maxchild; i++) { ALLOC_CACHE_ALIGN_BUFFER(struct usb_port_status, portsts, 1); unsigned short portstatus, portchange; int ret; ulong start = get_timer(0); uint delay = CONFIG_SYS_HZ; #ifdef CONFIG_SANDBOX if (state_get_skip_delays()) delay = 0; #endif #ifdef CONFIG_DM_USB debug("\n\nScanning '%s' port %d\n", dev->dev->name, i + 1); #else debug("\n\nScanning port %d\n", i + 1); #endif /* * Wait for (whichever finishes first) * - A maximum of 10 seconds * This is a purely observational value driven by connecting * a few broken pen drives and taking the max * 1.5 approach * - connection_change and connection state to report same * state */ do { ret = usb_get_port_status(dev, i + 1, portsts); if (ret < 0) { debug("get_port_status failed\n"); break; } portstatus = le16_to_cpu(portsts->wPortStatus); portchange = le16_to_cpu(portsts->wPortChange); /* No connection change happened, wait a bit more. */ if (!(portchange & USB_PORT_STAT_C_CONNECTION)) continue; /* Test if the connection came up, and if so, exit. */ if (portstatus & USB_PORT_STAT_CONNECTION) break; } while (get_timer(start) < delay); if (ret < 0) continue; debug("Port %d Status %X Change %X\n", i + 1, portstatus, portchange); if (portchange & USB_PORT_STAT_C_CONNECTION) { debug("port %d connection change\n", i + 1); usb_hub_port_connect_change(dev, i); } if (portchange & USB_PORT_STAT_C_ENABLE) { debug("port %d enable change, status %x\n", i + 1, portstatus); usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_C_ENABLE); /* * The following hack causes a ghost device problem * to Faraday EHCI */ #ifndef CONFIG_USB_EHCI_FARADAY /* EM interference sometimes causes bad shielded USB * devices to be shutdown by the hub, this hack enables * them again. Works at least with mouse driver */ if (!(portstatus & USB_PORT_STAT_ENABLE) && (portstatus & USB_PORT_STAT_CONNECTION) && usb_device_has_child_on_port(dev, i)) { debug("already running port %i " \ "disabled by hub (EMI?), " \ "re-enabling...\n", i + 1); usb_hub_port_connect_change(dev, i); } #endif } if (portstatus & USB_PORT_STAT_SUSPEND) { debug("port %d suspend change\n", i + 1); usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_SUSPEND); } if (portchange & USB_PORT_STAT_C_OVERCURRENT) { debug("port %d over-current change\n", i + 1); usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_C_OVER_CURRENT); usb_hub_power_on(hub); } if (portchange & USB_PORT_STAT_C_RESET) { debug("port %d reset change\n", i + 1); usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_C_RESET); } } /* end for i all ports */ return 0; }
/*----------------------------------------------------------------------- */ int erase_all_chip(flash_info_t *info, int s_first, int s_last) { int rcode = 0; FPWV *addr; int sect = 0; int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL; ulong start, now, last; int poll; if ((s_first < 0) || (s_first > s_last)) { if (info->flash_id == FLASH_UNKNOWN) { printf("- missing\n"); } else { printf("- no sectors to erase\n"); } return 1; } switch (info->flash_id & FLASH_TYPEMASK) { case FLASH_INTEL800B: case FLASH_INTEL160B: case FLASH_INTEL320B: case FLASH_INTEL640B: case FLASH_28F800C3B: case FLASH_28F160C3B: case FLASH_28F320C3B: case FLASH_28F640C3B: case FLASH_AM640U: case FLASH_MXLV320BT: case FLASH_MXLV160B: case FLASH_MXLV160T: case AMD_ID_LV320B: case EN_ID_29LV640H: break; case FLASH_UNKNOWN: default: printf("Can't erase unknown flash type %08lx - aborted\n", info->flash_id); return 1; } last = get_timer(0); /* Start erase on unprotected sectors */ printf("\n Erase All \n"); // for (sect = s_first; sect<=s_last && rcode == 0; sect++) { /* Disable interrupts which might cause a timeout here */ //flag = disable_interrupts(); addr = (FPWV *)(info->start[sect]); { /* must be AMD style if not Intel */ FPWV *base; /* first address in bank */ base = (FPWV *)(info->start[0]); base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */ base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */ base[FLASH_CYCLE1] = (FPW)0x00800080; /* erase mode */ base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */ base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */ base[FLASH_CYCLE1] = (FPW)0x10101010; /* erase all */ } /* re-enable interrupts if necessary */ /* if (flag) enable_interrupts(); */ start = get_timer(0); /* wait at least 50us for AMD, 80us for Intel. * Let's wait 1 ms. */ udelay(1000); poll = 0; while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) { if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { printf("Timeout\n"); if (intel) { /* suspend erase */ *addr = (FPW)0x00B000B0; } flash_reset(info); /* reset to read mode */ rcode = 1; /* failed */ break; } poll++; /* show that we're waiting */ if ((get_timer(last)) > CFG_HZ) {/* every second */ putc('*'); last = get_timer(0); } } printf(" Erase all OK!! \n"); for (sect=s_first; sect<=s_last; ++sect) { if (info->protect[sect]) { //kaiker,debug info->protect[sect]=0; } printf("protect off all !\n"); } flash_reset(info); /* reset to read mode */ } printf(" done\n"); return rcode; }
int flash_erase (flash_info_t *info, int s_first, int s_last) { volatile ulong addr = info->start[0]; int flag, prot, sect, l_sect; ulong start, now, last; flash_to_xd(); if (s_first < 0 || s_first > s_last) { if (info->flash_id == FLASH_UNKNOWN) { printf ("- missing\n"); } else { printf ("- no sectors to erase\n"); } flash_to_mem(); return 1; } if (info->flash_id == FLASH_UNKNOWN) { printf ("Can't erase unknown flash type %08lx - aborted\n", info->flash_id); flash_to_mem(); return 1; } prot = 0; for (sect=s_first; sect<=s_last; ++sect) { if (info->protect[sect]) { prot++; } } if (prot) { printf ("- Warning: %d protected sectors will not be erased!\n", prot); } else { printf (""); } l_sect = -1; /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); out8(addr + 0x555, 0xAA); iobarrier_rw(); out8(addr + 0x2AA, 0x55); iobarrier_rw(); out8(addr + 0x555, 0x80); iobarrier_rw(); out8(addr + 0x555, 0xAA); iobarrier_rw(); out8(addr + 0x2AA, 0x55); iobarrier_rw(); /* Start erase on unprotected sectors */ for (sect = s_first; sect<=s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ addr = info->start[sect]; out8(addr, 0x30); iobarrier_rw(); l_sect = sect; } } /* re-enable interrupts if necessary */ if (flag) enable_interrupts(); /* wait at least 80us - let's wait 1 ms */ udelay (1000); /* * We wait for the last triggered sector */ if (l_sect < 0) goto DONE; start = get_timer (0); last = start; addr = info->start[l_sect]; DEBUGF ("Start erase timeout: %d\n", CFG_FLASH_ERASE_TOUT); while ((in8(addr) & 0x80) != 0x80) { if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { printf ("Timeout\n"); flash_reset (info->start[0]); flash_to_mem(); return 1; } /* show that we're waiting */ if ((now - last) > 1000) { /* every second */ putc ('.'); last = now; } iobarrier_rw(); } DONE: /* reset to read mode */ flash_reset (info->start[0]); flash_to_mem(); printf (" done\n"); return 0; }
int flash_erase(flash_info_t *info, int s_first, int s_last) { FPWV *addr; int prot, sect; int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL; ulong start, now, last; int rcode = 0; int poll,kk,s_kk = 8; u32 s_sector_size = 0x00001000 ; FPWV *base; /* first address in bank */ if ((s_first < 0) || (s_first > s_last)) { if (info->flash_id == FLASH_UNKNOWN) { printf("- missing\n"); } else { printf("- no sectors to erase\n"); } return 1; } switch (info->flash_id & FLASH_TYPEMASK) { case FLASH_INTEL800B: case FLASH_INTEL160B: case FLASH_INTEL320B: case FLASH_INTEL640B: case FLASH_28F800C3B: case FLASH_28F160C3B: case FLASH_28F320C3B: case FLASH_28F640C3B: case FLASH_AM640U: case FLASH_MXLV320BT: case FLASH_MXLV160B: case FLASH_MXLV160T: case AMD_ID_LV320B: case EN_ID_29LV640H: case MX_ID_29LV640DB: case MX_ID_29LV128DB: #if defined (RT3052_MP2) && defined (ON_BOARD_32M_FLASH_COMPONENT) case FLASH_S29GL256N: #endif break; case FLASH_UNKNOWN: default: printf("Can't erase unknown flash type %08lx - aborted\n", info->flash_id); return 1; } prot = 0; for (sect=s_first; sect<=s_last; ++sect) { if (info->protect[sect]) { //kaiker,debug //info->protect[sect]=0; printf("\n protect sect[%d]\n",sect); prot++; } } if (prot) { printf("- Warning: %d protected sectors will not be erased!\n", prot); } else { printf("\n"); } last = get_timer(0); /* Start erase on unprotected sectors */ if(flash_use_SSI_standard) { s_kk = 16; s_sector_size = 0x00000800; printf("\n SSI Manufacture so its small sector \n"); } for (sect = s_first; sect<=s_last && rcode == 0; sect++) { if (info->protect[sect] != 0) /* protected, skip it */ { printf("\n sect[%d] is protected,skip \n",sect); continue; } printf("\n erase sector = %d \n",sect); /* Disable interrupts which might cause a timeout here */ //flag = disable_interrupts(); addr = (FPWV *)(info->start[sect]); //add by kaiker if( sect == 0 || flash_use_SSI_standard == 1) { base = (FPWV *)(info->start[0]); if(flash_use_SSI_standard) { printf("\n Erase to sector address[%08X]\n",addr); } else { printf("\n Erase Sector 0 with 8K SIZE,The sector 0 is Total 64K\n"); } for(kk =0 ; kk < s_kk ;kk++) { /* must be AMD style if not Intel */ base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */ base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */ base[FLASH_CYCLE1] = (FPW)0x00800080; /* erase mode */ base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */ base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */ *addr = (FPW)0x00300030; /* erase sector */ start = get_timer(0); /* wait at least 50us for AMD, 80us for Intel. * Let's wait 1 ms. */ udelay(1000); poll = 0; while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) { if ((now = get_timer(start)) > (ulong)CFG_FLASH_ERASE_TOUT) { printf("Timeout\n"); flash_reset(info); /* reset to read mode */ rcode = 1; /* failed */ break; } poll++; /* show that we're waiting */ if ((get_timer(last)) > CFG_HZ) {/* every second */ putc('*'); last = get_timer(0); } } // printf("sect = %d,s_last = %d,erase poll = %d\n",sect,s_last,poll); /* show that we're waiting */ if ((get_timer(last)) > CFG_HZ) { /* every second */ putc('.'); last = get_timer(0); } flash_reset(info); /* reset to read mode */ // printf("\n Pre addr = %08X \n",addr); addr = addr + s_sector_size; } if(!flash_use_SSI_standard) { printf("\n Exit Sector 0 erase !! \n"); } continue; sect = 7; } if (intel) { *addr = (FPW)0x00500050; /* clear status register */ *addr = (FPW)0x00200020; /* erase setup */ *addr = (FPW)0x00D000D0; /* erase confirm */ } else { /* must be AMD style if not Intel */ // FPWV *base; /* first address in bank */ base = (FPWV *)(info->start[0]); base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */ base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */ base[FLASH_CYCLE1] = (FPW)0x00800080; /* erase mode */ base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */ base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */ *addr = (FPW)0x00300030; /* erase sector */ } /* re-enable interrupts if necessary */ /* if (flag) enable_interrupts(); */ start = get_timer(0); #if 1 /* wait at least 50us for AMD, 80us for Intel. * Let's wait 1 ms. */ udelay(1000); poll = 0; while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) { if ((now = get_timer(start)) > (ulong)CFG_FLASH_ERASE_TOUT) { printf("Timeout\n"); if (intel) { /* suspend erase */ *addr = (FPW)0x00B000B0; } flash_reset(info); /* reset to read mode */ rcode = 1; /* failed */ break; } poll++; /* show that we're waiting */ if ((get_timer(last)) > CFG_HZ) {/* every second */ putc('*'); last = get_timer(0); } } printf("sect = %d,s_last = %d,erase poll = %d\n",sect,s_last,poll); #else #endif /* show that we're waiting */ if ((get_timer(last)) > CFG_HZ) { /* every second */ putc('.'); last = get_timer(0); } flash_reset(info); /* reset to read mode */ } printf(" done\n"); return rcode; }
/* * This function is derived from PowerPC code (read timebase as long long). * On ARM it just returns the timer value. */ unsigned long long get_ticks(void) { return get_timer(0); }
/* * cmd_type is 0 for write, 1 for read. * * addr_len can take any value from 0-255, it is only limited * by the char, we could make it larger if needed. If it is * 0 we skip the address write cycle. */ static int i2c_transfer(struct s3c24x0_i2c *i2c, unsigned char cmd_type, unsigned char chip, unsigned char addr[], unsigned char addr_len, unsigned char data[], unsigned short data_len) { int i = 0, result; ulong start_time = get_timer(0); if (data == 0 || data_len == 0) { /*Don't support data transfer of no length or to address 0 */ debug("i2c_transfer: bad call\n"); return I2C_NOK; } while (readl(&i2c->iicstat) & I2CSTAT_BSY) { if (get_timer(start_time) > I2C_TIMEOUT_MS) return I2C_NOK_TOUT; } writel(readl(&i2c->iiccon) | I2CCON_ACKGEN, &i2c->iiccon); /* Get the slave chip address going */ writel(chip, &i2c->iicds); if ((cmd_type == I2C_WRITE) || (addr && addr_len)) writel(I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP, &i2c->iicstat); else writel(I2C_MODE_MR | I2C_TXRX_ENA | I2C_START_STOP, &i2c->iicstat); /* Wait for chip address to transmit. */ result = WaitForXfer(i2c); if (result != I2C_OK) goto bailout; /* If register address needs to be transmitted - do it now. */ if (addr && addr_len) { while ((i < addr_len) && (result == I2C_OK)) { writel(addr[i++], &i2c->iicds); read_write_byte(i2c); result = WaitForXfer(i2c); } i = 0; if (result != I2C_OK) goto bailout; } switch (cmd_type) { case I2C_WRITE: while ((i < data_len) && (result == I2C_OK)) { writel(data[i++], &i2c->iicds); read_write_byte(i2c); result = WaitForXfer(i2c); } break; case I2C_READ: if (addr && addr_len) { /* * Register address has been sent, now send slave chip * address again to start the actual read transaction. */ writel(chip, &i2c->iicds); /* Generate a re-START. */ writel(I2C_MODE_MR | I2C_TXRX_ENA | I2C_START_STOP, &i2c->iicstat); read_write_byte(i2c); result = WaitForXfer(i2c); if (result != I2C_OK) goto bailout; } while ((i < data_len) && (result == I2C_OK)) { /* disable ACK for final READ */ if (i == data_len - 1) writel(readl(&i2c->iiccon) & ~I2CCON_ACKGEN, &i2c->iiccon); read_write_byte(i2c); result = WaitForXfer(i2c); data[i++] = readl(&i2c->iicds); } if (result == I2C_NACK) result = I2C_OK; /* Normal terminated read. */ break; default: debug("i2c_transfer: bad call\n"); result = I2C_NOK; break; } bailout: /* Send STOP. */ writel(I2C_MODE_MR | I2C_TXRX_ENA, &i2c->iicstat); read_write_byte(i2c); return result; }
static int sl811_send_packet(struct usb_device *dev, unsigned long pipe, __u8 *buffer, int len) { __u8 ctrl = SL811_USB_CTRL_ARM | SL811_USB_CTRL_ENABLE; __u16 status = 0; int err = 0, time_start = get_timer(0); int need_preamble = !(rh_status.wPortStatus & USB_PORT_STAT_LOW_SPEED) && usb_pipeslow(pipe); if (len > 239) return -1; if (usb_pipeout(pipe)) ctrl |= SL811_USB_CTRL_DIR_OUT; if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) ctrl |= SL811_USB_CTRL_TOGGLE_1; if (need_preamble) ctrl |= SL811_USB_CTRL_PREAMBLE; sl811_write(SL811_INTRSTS, 0xff); while (err < 3) { sl811_write(SL811_ADDR_A, 0x10); sl811_write(SL811_LEN_A, len); if (usb_pipeout(pipe) && len) sl811_write_buf(0x10, buffer, len); if (!(rh_status.wPortStatus & USB_PORT_STAT_LOW_SPEED) && sl811_read(SL811_SOFCNTDIV)*64 < calc_needed_buswidth(len, need_preamble)) ctrl |= SL811_USB_CTRL_SOF; else ctrl &= ~SL811_USB_CTRL_SOF; sl811_write(SL811_CTRL_A, ctrl); while (!(sl811_read(SL811_INTRSTS) & SL811_INTR_DONE_A)) { if (5*CFG_HZ < get_timer(time_start)) { printf("USB transmit timed out\n"); return -USB_ST_CRC_ERR; } } sl811_write(SL811_INTRSTS, 0xff); status = sl811_read(SL811_STS_A); if (status & SL811_USB_STS_ACK) { int remainder = sl811_read(SL811_CNT_A); if (remainder) { PDEBUG(0, "usb transfer remainder = %d\n", remainder); len -= remainder; } if (usb_pipein(pipe) && len) sl811_read_buf(0x10, buffer, len); return len; } if ((status & SL811_USB_STS_NAK) == SL811_USB_STS_NAK) continue; PDEBUG(0, "usb transfer error %#x\n", (int)status); err++; } err = 0; if (status & SL811_USB_STS_ERROR) err |= USB_ST_BUF_ERR; if (status & SL811_USB_STS_TIMEOUT) err |= USB_ST_CRC_ERR; if (status & SL811_USB_STS_STALL) err |= USB_ST_STALLED; return -err; }
void platform_init(void) { /* init timer */ //mtk_timer_init(); #ifdef LK_PROFILING unsigned int time_nand_emmc; unsigned int time_load_logo; unsigned int time_bat_init; unsigned int time_backlight; unsigned int time_show_logo; unsigned int time_boot_mode; unsigned int time_sw_env; unsigned int time_platform_init; unsigned int time_env; time_platform_init = get_timer(0); time_nand_emmc = get_timer(0); #endif dprintf(INFO, "platform_init()\n"); #ifdef MTK_MT8193_SUPPORT mt8193_init(); #endif #ifdef MTK_EMMC_SUPPORT mmc_legacy_init(1); #else nand_init(); nand_driver_test(); #endif #ifdef MTK_KERNEL_POWER_OFF_CHARGING if((g_boot_arg->boot_reason == BR_USB) && (upmu_is_chr_det() == KAL_FALSE)) { printf("[%s] Unplugged Charger/Usb between Pre-loader and Uboot in Kernel Charging Mode, Power Off \n", __func__); mt6575_power_off(); } #endif #ifdef LK_PROFILING printf("[PROFILE] ------- NAND/EMMC init takes %d ms -------- \n", get_timer(time_nand_emmc)); time_env = get_timer(0); #endif env_init(); print_env(); #ifdef LK_PROFILING printf("[PROFILE] ------- ENV init takes %d ms -------- \n", get_timer(time_env)); time_load_logo = get_timer(0); #endif mboot_common_load_logo((unsigned long)mt_get_logo_db_addr(), "logo"); #if ((!defined(MTK_NCP1851_SUPPORT)) && (!defined(MTK_BQ24196_SUPPORT))) mt_disp_power(TRUE); //power on display related modules #endif dprintf(INFO, "Show BLACK_PICTURE\n"); mt_disp_fill_rect(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT, 0x0); mt_disp_update(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT); mt_disp_update(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT); #ifdef LK_PROFILING printf("[PROFILE] ------- load_logo takes %d ms -------- \n", get_timer(time_load_logo)); time_backlight = get_timer(0); #endif /*for kpd pmic mode setting*/ set_kpd_pmic_mode(); #if ((!defined(MTK_NCP1851_SUPPORT)) && (!defined(MTK_BQ24196_SUPPORT))) //mt65xx_backlight_on(); #endif #ifdef LK_PROFILING printf("[PROFILE] ------- backlight takes %d ms -------- \n", get_timer(time_backlight)); time_boot_mode = get_timer(0); #endif enable_PMIC_kpd_clock(); boot_mode_select(); #ifdef LK_PROFILING printf("[PROFILE] ------- boot mode select takes %d ms -------- \n", get_timer(time_boot_mode)); #endif /* initialize security library */ #ifdef MTK_EMMC_SUPPORT sec_func_init(1); #else sec_func_init(0); #endif /*Show download logo & message on screen */ if (g_boot_arg->boot_mode == DOWNLOAD_BOOT) { printf("[LK] boot mode is DOWNLOAD_BOOT\n"); /* verify da before jumping to da*/ if (sec_usbdl_enabled()) { u8 *da_addr = g_boot_arg->da_info.addr; u32 da_sig_len = DRV_Reg32(SRAMROM_BASE + 0x54); u32 da_len = da_sig_len >> 10; u32 sig_len = da_sig_len & 0x3ff; u8 *sig_addr = (unsigned char *)da_addr + (da_len - sig_len); if (da_len == 0 || sig_len == 0) { printf("[LK] da argument is invalid\n"); printf("da_addr = 0x%x\n", da_addr); printf("da_len = 0x%x\n", da_len); printf("sig_len = 0x%x\n", sig_len); } if (sec_usbdl_verify_da(da_addr, (da_len - sig_len), sig_addr, sig_len)) { /* da verify fail */ video_printf(" => Not authenticated tool, download stop...\n"); DRV_WriteReg32(SRAMROM_BASE + 0x54, 0x0); while(1); /* fix me, should not be infinite loop in lk */ } } else {