static int conf_probe(struct i2c_adapter *adap) { return i2c_probe(adap, &addr_data, conf_attach); }
void pmicsetup(u32 mpupll) { int mpu_vdd; int usb_cur_lim; if (i2c_probe(TPS65217_CHIP_PM)) { puts("PMIC (0x24) not found! skip further initalization.\n"); return; } /* Get the frequency which is defined by device fuses */ dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev); printf("detected max. frequency: %d - ", dpll_mpu_opp100.m); if (0 != mpupll) { dpll_mpu_opp100.m = MPUPLL_M_1000; printf("retuning MPU-PLL to: %d MHz.\n", dpll_mpu_opp100.m); } else { puts("ok.\n"); } /* * Increase USB current limit to 1300mA or 1800mA and set * the MPU voltage controller as needed. */ if (dpll_mpu_opp100.m == MPUPLL_M_1000) { usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA; mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV; } else { usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA; mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV; } if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_POWER_PATH, usb_cur_lim, TPS65217_USB_INPUT_CUR_LIMIT_MASK)) puts("tps65217_reg_write failure\n"); /* Set DCDC3 (CORE) voltage to 1.125V */ if (tps65217_voltage_update(TPS65217_DEFDCDC3, TPS65217_DCDC_VOLT_SEL_1125MV)) { puts("tps65217_voltage_update failure\n"); return; } /* Set CORE Frequencies to OPP100 */ do_setup_dpll(&dpll_core_regs, &dpll_core_opp100); /* Set DCDC2 (MPU) voltage */ if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) { puts("tps65217_voltage_update failure\n"); return; } /* Set LDO3 to 1.8V */ if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, TPS65217_DEFLS1, TPS65217_LDO_VOLTAGE_OUT_1_8, TPS65217_LDO_MASK)) puts("tps65217_reg_write failure\n"); /* Set LDO4 to 3.3V */ if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, TPS65217_DEFLS2, TPS65217_LDO_VOLTAGE_OUT_3_3, TPS65217_LDO_MASK)) puts("tps65217_reg_write failure\n"); /* Set MPU Frequency to what we detected now that voltages are set */ do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100); /* Set PWR_EN bit in Status Register */ tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_STATUS, TPS65217_PWR_OFF, TPS65217_PWR_OFF); }
static int pcf8583_probe(struct i2c_adapter *adap) { return i2c_probe(adap, &addr_data, pcf8583_attach); }
static int power_init(void) { unsigned int val; int ret; struct pmic *p; if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR)) { ret = pmic_dialog_init(I2C_PMIC); if (ret) return ret; p = pmic_get("DIALOG_PMIC"); if (!p) return -ENODEV; setenv("fdt_file", "imx53-qsb.dtb"); /* Set VDDA to 1.25V */ val = DA9052_BUCKCORE_BCOREEN | DA_BUCKCORE_VBCORE_1_250V; ret = pmic_reg_write(p, DA9053_BUCKCORE_REG, val); if (ret) { printf("Writing to BUCKCORE_REG failed: %d\n", ret); return ret; } pmic_reg_read(p, DA9053_SUPPLY_REG, &val); val |= DA9052_SUPPLY_VBCOREGO; ret = pmic_reg_write(p, DA9053_SUPPLY_REG, val); if (ret) { printf("Writing to SUPPLY_REG failed: %d\n", ret); return ret; } /* Set Vcc peripheral to 1.30V */ ret = pmic_reg_write(p, DA9053_BUCKPRO_REG, 0x62); if (ret) { printf("Writing to BUCKPRO_REG failed: %d\n", ret); return ret; } ret = pmic_reg_write(p, DA9053_SUPPLY_REG, 0x62); if (ret) { printf("Writing to SUPPLY_REG failed: %d\n", ret); return ret; } return ret; } if (!i2c_probe(CONFIG_SYS_FSL_PMIC_I2C_ADDR)) { ret = pmic_init(I2C_0); if (ret) return ret; p = pmic_get("FSL_PMIC"); if (!p) return -ENODEV; setenv("fdt_file", "imx53-qsrb.dtb"); /* Set VDDGP to 1.25V for 1GHz on SW1 */ pmic_reg_read(p, REG_SW_0, &val); val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_250V_MC34708; ret = pmic_reg_write(p, REG_SW_0, val); if (ret) { printf("Writing to REG_SW_0 failed: %d\n", ret); return ret; } /* Set VCC as 1.30V on SW2 */ pmic_reg_read(p, REG_SW_1, &val); val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_300V_MC34708; ret = pmic_reg_write(p, REG_SW_1, val); if (ret) { printf("Writing to REG_SW_1 failed: %d\n", ret); return ret; } /* Set global reset timer to 4s */ pmic_reg_read(p, REG_POWER_CTL2, &val); val = (val & ~TIMER_MASK_MC34708) | TIMER_4S_MC34708; ret = pmic_reg_write(p, REG_POWER_CTL2, val); if (ret) { printf("Writing to REG_POWER_CTL2 failed: %d\n", ret); return ret; } /* Set VUSBSEL and VUSBEN for USB PHY supply*/ pmic_reg_read(p, REG_MODE_0, &val); val |= (VUSBSEL_MC34708 | VUSBEN_MC34708); ret = pmic_reg_write(p, REG_MODE_0, val); if (ret) { printf("Writing to REG_MODE_0 failed: %d\n", ret); return ret; } /* Set SWBST to 5V in auto mode */ val = SWBST_AUTO; ret = pmic_reg_write(p, SWBST_CTRL, val); if (ret) { printf("Writing to SWBST_CTRL failed: %d\n", ret); return ret; } return ret; } return -1; }
void am33xx_spl_board_init(void) { int mpu_vdd; /* Get the frequency */ dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev); /* BeagleBone PMIC Code */ int usb_cur_lim; if (i2c_probe(TPS65217_CHIP_PM)) return; /* * Increase USB current limit to 1300mA or 1800mA and set * the MPU voltage controller as needed. */ if (dpll_mpu_opp100.m == MPUPLL_M_1000) { usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA; mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV; } else { usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA; mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV; } if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_POWER_PATH, usb_cur_lim, TPS65217_USB_INPUT_CUR_LIMIT_MASK)) puts("tps65217_reg_write failure\n"); /* Set DCDC3 (CORE) voltage to 1.125V */ if (tps65217_voltage_update(TPS65217_DEFDCDC3, TPS65217_DCDC_VOLT_SEL_1125MV)) { puts("tps65217_voltage_update failure\n"); return; } /* Set CORE Frequencies to OPP100 */ do_setup_dpll(&dpll_core_regs, &dpll_core_opp100); /* Set DCDC2 (MPU) voltage */ if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) { puts("tps65217_voltage_update failure\n"); return; } /* * Set LDO3 to 1.8V and LDO4 to 3.3V */ if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, TPS65217_DEFLS1, TPS65217_LDO_VOLTAGE_OUT_1_8, TPS65217_LDO_MASK)) puts("tps65217_reg_write failure\n"); if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, TPS65217_DEFLS2, TPS65217_LDO_VOLTAGE_OUT_3_3, TPS65217_LDO_MASK)) puts("tps65217_reg_write failure\n"); /* Set MPU Frequency to what we detected now that voltages are set */ do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100); }
/* Write (fill) memory * * Syntax: * imw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}] */ int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { uchar chip; ulong addr; uint alen; uchar byte; int count; int j; if ((argc < 4) || (argc > 5)) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; } /* * Chip is always specified. */ chip = simple_strtoul(argv[1], NULL, 16); /* * Address is always specified. */ addr = simple_strtoul(argv[2], NULL, 16); alen = 1; for(j = 0; j < 8; j++) { if (argv[2][j] == '.') { alen = argv[2][j+1] - '0'; if(alen > 4) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; } break; } else if (argv[2][j] == '\0') { break; } } /* * Value to write is always specified. */ byte = simple_strtoul(argv[3], NULL, 16); /* * Optional count */ if(argc == 5) { count = simple_strtoul(argv[4], NULL, 16); } else { count = 1; } while (count-- > 0) { if(i2c_write(chip, addr++, alen, &byte, 1) != 0) { puts ("Error writing the chip.\n"); } /* * Wait for the write to complete. The write can take * up to 10mSec (we allow a little more time). * * On some chips, while the write is in progress, the * chip doesn't respond. This apparently isn't a * universal feature so we don't take advantage of it. */ /* * No write delay with FRAM devices. */ #if !defined(CFG_I2C_FRAM) udelay(11000); #endif #if 0 for(timeout = 0; timeout < 10; timeout++) { udelay(2000); if(i2c_probe(chip) == 0) break; } #endif } return (0); }
static int isp1301_probe(struct i2c_adapter *adap) { return i2c_probe(adap, &addr_data, isp1301_attach); }
int last_stage_init(void) { int slaves; unsigned int k; unsigned int mux_ch; unsigned char mclink_controllers_dvi[] = { 0x3c, 0x3d, 0x3e }; #ifdef CONFIG_STRIDER_CPU unsigned char mclink_controllers_dp[] = { 0x24, 0x25, 0x26 }; #endif bool hw_type_cat = pca9698_get_value(0x20, 18); #ifdef CONFIG_STRIDER_CON_DP bool is_dh = pca9698_get_value(0x20, 25); #endif bool ch0_sgmii2_present = false; /* Turn on Analog Devices ADV7611 */ pca9698_direction_output(0x20, 8, 0); /* Turn on Parade DP501 */ pca9698_direction_output(0x20, 10, 1); pca9698_direction_output(0x20, 11, 1); ch0_sgmii2_present = !pca9698_get_value(0x20, 37); /* wait for FPGA done, then reset FPGA */ for (k = 0; k < ARRAY_SIZE(mclink_controllers_dvi); ++k) { unsigned int ctr = 0; unsigned char *mclink_controllers = mclink_controllers_dvi; #ifdef CONFIG_STRIDER_CPU if (i2c_probe(mclink_controllers[k])) { mclink_controllers = mclink_controllers_dp; if (i2c_probe(mclink_controllers[k])) continue; } #else if (i2c_probe(mclink_controllers[k])) continue; #endif while (!(pca953x_get_val(mclink_controllers[k]) & MCFPGA_DONE)) { udelay(100000); if (ctr++ > 5) { printf("no done for mclink_controller %d\n", k); break; } } pca953x_set_dir(mclink_controllers[k], MCFPGA_RESET_N, 0); pca953x_set_val(mclink_controllers[k], MCFPGA_RESET_N, 0); udelay(10); pca953x_set_val(mclink_controllers[k], MCFPGA_RESET_N, MCFPGA_RESET_N); } if (hw_type_cat) { int retval; struct mii_dev *mdiodev = mdio_alloc(); if (!mdiodev) return -ENOMEM; strncpy(mdiodev->name, bb_miiphy_buses[0].name, MDIO_NAME_LEN); mdiodev->read = bb_miiphy_read; mdiodev->write = bb_miiphy_write; retval = mdio_register(mdiodev); if (retval < 0) return retval; for (mux_ch = 0; mux_ch < MAX_MUX_CHANNELS; ++mux_ch) { if ((mux_ch == 1) && !ch0_sgmii2_present) continue; setup_88e1514(bb_miiphy_buses[0].name, mux_ch); } } /* give slave-PLLs and Parade DP501 some time to be up and running */ udelay(500000); mclink_fpgacount = CONFIG_SYS_MCLINK_MAX; slaves = mclink_probe(); mclink_fpgacount = 0; ioep_fpga_print_info(0); if (!adv7611_probe(0)) printf(" Advantiv ADV7611 HDMI Receiver\n"); #ifdef CONFIG_STRIDER_CON if (ioep_fpga_has_osd(0)) osd_probe(0); #endif #ifdef CONFIG_STRIDER_CON_DP if (ioep_fpga_has_osd(0)) { osd_probe(0); if (is_dh) osd_probe(4); } #endif #ifdef CONFIG_STRIDER_CPU ch7301_probe(0, false); dp501_probe(0, false); #endif if (slaves <= 0) return 0; mclink_fpgacount = slaves; #ifdef CONFIG_STRIDER_CPU /* get ADV7611 out of reset, power up DP501, give some time to wakeup */ for (k = 1; k <= slaves; ++k) FPGA_SET_REG(k, extended_control, 0x10); /* enable video */ udelay(500000); #endif for (k = 1; k <= slaves; ++k) { ioep_fpga_print_info(k); #ifdef CONFIG_STRIDER_CON if (ioep_fpga_has_osd(k)) osd_probe(k); #endif #ifdef CONFIG_STRIDER_CON_DP if (ioep_fpga_has_osd(k)) { osd_probe(k); if (is_dh) osd_probe(k + 4); } #endif #ifdef CONFIG_STRIDER_CPU if (!adv7611_probe(k)) printf(" Advantiv ADV7611 HDMI Receiver\n"); ch7301_probe(k, false); dp501_probe(k, false); #endif if (hw_type_cat) { int retval; struct mii_dev *mdiodev = mdio_alloc(); if (!mdiodev) return -ENOMEM; strncpy(mdiodev->name, bb_miiphy_buses[k].name, MDIO_NAME_LEN); mdiodev->read = bb_miiphy_read; mdiodev->write = bb_miiphy_write; retval = mdio_register(mdiodev); if (retval < 0) return retval; setup_88e1514(bb_miiphy_buses[k].name, 0); } } for (k = 0; k < ARRAY_SIZE(strider_fans); ++k) { i2c_set_bus_num(strider_fans[k].bus); init_fan_controller(strider_fans[k].addr); } return 0; }
int board_late_init(void) { #if defined(ENCLUSTRA_EEPROM_ADDR_TAB) && defined(ENCLUSTRA_EEPROM_HWMAC_REG) u8 chip_addr_tab[] = ENCLUSTRA_EEPROM_ADDR_TAB; #if defined(ENCLUSTRA_EEPROM_ADDR_WAKEY_TAB) u8 chip_addr_wakey_tab[] = ENCLUSTRA_EEPROM_ADDR_WAKEY_TAB; u8 wake_cmd = 0x0; int j; #endif int i, ret; u8 hwaddr[6]; u32 hwaddr_h; char hwaddr_str[16]; bool hwaddr_set; hwaddr_set = false; if (getenv("ethaddr") == NULL) { /* Init i2c */ i2c_init(0, 0); i2c_set_bus_num(0); for (i = 0; i < ARRAY_SIZE(chip_addr_tab); i++) { /* Probe the chip */ if (i2c_probe(chip_addr_tab[i]) != 0) continue; #if defined(ENCLUSTRA_EEPROM_ADDR_WAKEY_TAB) for (j = 0; j < ARRAY_SIZE(chip_addr_wakey_tab); j++) { if(chip_addr_tab[i] != chip_addr_wakey_tab[j]) continue; /* Wake the chip by writing 0x0 to 0x0 reg */ i2c_write(chip_addr_tab[i], ENCLUSTRA_EEPROM_HWMAC_REG, 1, &wake_cmd, 1); break; } #endif /* Attempt to read the mac address */ ret = i2c_read(chip_addr_tab[i], ENCLUSTRA_EEPROM_HWMAC_REG, 1, hwaddr, 6); /* Do not continue if read failed */ if (ret) continue; /* Check if the value is a valid mac registered for * Enclustra GmbH */ hwaddr_h = hwaddr[0] | hwaddr[1] << 8 | hwaddr[2] << 16; if ((hwaddr_h & 0xFFFFFF) != ENCLUSTRA_MAC) continue; /* Format the address using a string */ sprintf(hwaddr_str, "%02X:%02X:%02X:%02X:%02X:%02X", hwaddr[0], hwaddr[1], hwaddr[2], hwaddr[3], hwaddr[4], hwaddr[5]); /* Set the actual env variable */ setenv("ethaddr", hwaddr_str); hwaddr_set = true; break; } if (!hwaddr_set) setenv("ethaddr", ENCLUSTRA_ETHADDR_DEFAULT); } #else if (getenv("ethaddr") == NULL) setenv("ethaddr", ENCLUSTRA_ETHADDR_DEFAULT); #endif return 0; }
unsigned pmic_init(void) { unsigned programmed = 0; uchar bus = 1; uchar devid, revid, val; puts("PMIC: "); if (!((0 == i2c_set_bus_num(bus)) && (0 == i2c_probe(PFUZE100_I2C_ADDR)))) { puts("i2c bus failed\n"); return 0; } /* get device ident */ if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_DEVICEID, 1, &devid, 1) < 0) { puts("i2c pmic devid read failed\n"); return 0; } if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_REVID, 1, &revid, 1) < 0) { puts("i2c pmic revid read failed\n"); return 0; } printf("device id: 0x%.2x, revision id: 0x%.2x\n", devid, revid); #ifdef DEBUG { unsigned i, j; for (i = 0; i < 16; i++) printf("\t%x", i); for (j = 0; j < 0x80; ) { printf("\n%2x", j); for (i = 0; i < 16; i++) { i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1); printf("\t%2x", val); } j += 0x10; } printf("\nEXT Page 1"); val = PFUZE100_PAGE_REGISTER_PAGE1; if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1, &val, 1)) { puts("i2c write failed\n"); return 0; } for (j = 0x80; j < 0x100; ) { printf("\n%2x", j); for (i = 0; i < 16; i++) { i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1); printf("\t%2x", val); } j += 0x10; } printf("\nEXT Page 2"); val = PFUZE100_PAGE_REGISTER_PAGE2; if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1, &val, 1)) { puts("i2c write failed\n"); return 0; } for (j = 0x80; j < 0x100; ) { printf("\n%2x", j); for (i = 0; i < 16; i++) { i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1); printf("\t%2x", val); } j += 0x10; } printf("\n"); } #endif /* get device programmed state */ val = PFUZE100_PAGE_REGISTER_PAGE1; if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1, &val, 1)) { puts("i2c write failed\n"); return 0; } if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR1, 1, &val, 1) < 0) { puts("i2c fuse_por read failed\n"); return 0; } if (val & PFUZE100_FUSE_POR_M) programmed++; if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR2, 1, &val, 1) < 0) { puts("i2c fuse_por read failed\n"); return programmed; } if (val & PFUZE100_FUSE_POR_M) programmed++; if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR3, 1, &val, 1) < 0) { puts("i2c fuse_por read failed\n"); return programmed; } if (val & PFUZE100_FUSE_POR_M) programmed++; switch (programmed) { case 0: printf("PMIC: not programmed\n"); break; case 3: printf("PMIC: programmed\n"); break; default: printf("PMIC: undefined programming state\n"); break; } return programmed; }
static int bd60910_attach_adapter(struct i2c_adapter *adap) { TRACE_CALL() ; return i2c_probe(adap, &bl_addr_data, bd60910_attach); }
static int ak4183_i2c_attach_adapter(struct i2c_adapter *adap) { D("enter!\n"); return i2c_probe(adap, &ak4183_i2c_addr_data, ak4183_i2c_probe); }
static int setup_pmic_voltages(void) { unsigned char value, rev_id = 0 ; i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); if (!i2c_probe(0x8)) { if (i2c_read(0x8, 0, 1, &value, 1)) { printf("Read device ID error!\n"); return -1; } if (i2c_read(0x8, 3, 1, &rev_id, 1)) { printf("Read Rev ID error!\n"); return -1; } printf("Found PFUZE100! deviceid=%x,revid=%x\n", value, rev_id); /*For camera streaks issue,swap VGEN5 and VGEN3 to power camera. *sperate VDDHIGH_IN and camera 2.8V power supply, after switch: *VGEN5 for VDDHIGH_IN and increase to 3V to align with datasheet *VGEN3 for camera 2.8V power supply */ /*increase VGEN3 from 2.5 to 2.8V*/ if (i2c_read(0x8, 0x6e, 1, &value, 1)) { printf("Read VGEN3 error!\n"); return -1; } value &= ~0xf; value |= 0xa; if (i2c_write(0x8, 0x6e, 1, &value, 1)) { printf("Set VGEN3 error!\n"); return -1; } /*increase VGEN5 from 2.8 to 3V*/ if (i2c_read(0x8, 0x70, 1, &value, 1)) { printf("Read VGEN5 error!\n"); return -1; } value &= ~0xf; value |= 0xc; if (i2c_write(0x8, 0x70, 1, &value, 1)) { printf("Set VGEN5 error!\n"); return -1; } /* set SW1AB staby volatage 0.975V*/ if (i2c_read(0x8, 0x21, 1, &value, 1)) { printf("Read SW1ABSTBY error!\n"); return -1; } value &= ~0x3f; value |= 0x1b; if (i2c_write(0x8, 0x21, 1, &value, 1)) { printf("Set SW1ABSTBY error!\n"); return -1; } /* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */ if (i2c_read(0x8, 0x24, 1, &value, 1)) { printf("Read SW1ABSTBY error!\n"); return -1; } value &= ~0xc0; value |= 0x40; if (i2c_write(0x8, 0x24, 1, &value, 1)) { printf("Set SW1ABSTBY error!\n"); return -1; } /* set SW1C staby volatage 0.975V*/ if (i2c_read(0x8, 0x2f, 1, &value, 1)) { printf("Read SW1CSTBY error!\n"); return -1; } value &= ~0x3f; value |= 0x1b; if (i2c_write(0x8, 0x2f, 1, &value, 1)) { printf("Set SW1CSTBY error!\n"); return -1; } /* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */ if (i2c_read(0x8, 0x32, 1, &value, 1)) { printf("Read SW1ABSTBY error!\n"); return -1; } value &= ~0xc0; value |= 0x40; if (i2c_write(0x8, 0x32, 1, &value, 1)) { printf("Set SW1ABSTBY error!\n"); return -1; } } return 0; }
int last_stage_init(void) { int slaves; unsigned int k; unsigned int mux_ch; unsigned char mclink_controllers[] = { 0x3c, 0x3d, 0x3e }; u16 fpga_features; bool hw_type_cat = pca9698_get_value(0x20, 20); bool ch0_rgmii2_present = false; FPGA_GET_REG(0, fpga_features, &fpga_features); /* Turn on Parade DP501 */ pca9698_direction_output(0x20, 10, 1); pca9698_direction_output(0x20, 11, 1); ch0_rgmii2_present = !pca9698_get_value(0x20, 30); /* wait for FPGA done, then reset FPGA */ for (k = 0; k < ARRAY_SIZE(mclink_controllers); ++k) { unsigned int ctr = 0; if (i2c_probe(mclink_controllers[k])) continue; while (!(pca953x_get_val(mclink_controllers[k]) & MCFPGA_DONE)) { udelay(100000); if (ctr++ > 5) { printf("no done for mclink_controller %d\n", k); break; } } pca953x_set_dir(mclink_controllers[k], MCFPGA_RESET_N, 0); pca953x_set_val(mclink_controllers[k], MCFPGA_RESET_N, 0); udelay(10); pca953x_set_val(mclink_controllers[k], MCFPGA_RESET_N, MCFPGA_RESET_N); } if (hw_type_cat) { int retval; struct mii_dev *mdiodev = mdio_alloc(); if (!mdiodev) return -ENOMEM; strncpy(mdiodev->name, bb_miiphy_buses[0].name, MDIO_NAME_LEN); mdiodev->read = bb_miiphy_read; mdiodev->write = bb_miiphy_write; retval = mdio_register(mdiodev); if (retval < 0) return retval; for (mux_ch = 0; mux_ch < MAX_MUX_CHANNELS; ++mux_ch) { if ((mux_ch == 1) && !ch0_rgmii2_present) continue; setup_88e1514(bb_miiphy_buses[0].name, mux_ch); } } /* give slave-PLLs and Parade DP501 some time to be up and running */ udelay(500000); mclink_fpgacount = CONFIG_SYS_MCLINK_MAX; slaves = mclink_probe(); mclink_fpgacount = 0; ioep_fpga_print_info(0); osd_probe(0); #ifdef CONFIG_SYS_OSD_DH osd_probe(4); #endif if (slaves <= 0) return 0; mclink_fpgacount = slaves; for (k = 1; k <= slaves; ++k) { FPGA_GET_REG(k, fpga_features, &fpga_features); ioep_fpga_print_info(k); osd_probe(k); #ifdef CONFIG_SYS_OSD_DH osd_probe(k + 4); #endif if (hw_type_cat) { int retval; struct mii_dev *mdiodev = mdio_alloc(); if (!mdiodev) return -ENOMEM; strncpy(mdiodev->name, bb_miiphy_buses[k].name, MDIO_NAME_LEN); mdiodev->read = bb_miiphy_read; mdiodev->write = bb_miiphy_write; retval = mdio_register(mdiodev); if (retval < 0) return retval; setup_88e1514(bb_miiphy_buses[k].name, 0); } } for (k = 0; k < ARRAY_SIZE(hrcon_fans); ++k) { i2c_set_bus_num(hrcon_fans[k].bus); init_fan_controller(hrcon_fans[k].addr); } return 0; }
static int at24cxx_attach(struct i2c_adapter *adapter) { return i2c_probe(adapter, &addr_data, at24cxx_detect); }
static int tlv320_i2c_attach(struct i2c_adapter *adap) { return i2c_probe(adap, &addr_data, tlv320_codec_probe); }
static int setup_pmic_voltages(void) { unsigned char value, rev_id = 0; i2c_set_bus_num(0); if (!i2c_probe(0x8)) { if (i2c_read(0x8, 0, 1, &value, 1)) { printf("Read device ID error!\n"); return -1; } if (i2c_read(0x8, 3, 1, &rev_id, 1)) { printf("Read Rev ID error!\n"); return -1; } printf("Found PFUZE%s deviceid=%x,revid=%x\n", ((value & 0xf) == 0) ? "100" : "200", value, rev_id); if (setup_pmic_mode(value & 0xf)) { printf("setup pmic mode error!\n"); return -1; } /* set SW1AB staby volatage 0.975V */ if (i2c_read(0x8, 0x21, 1, &value, 1)) { printf("Read SW1ABSTBY error!\n"); return -1; } value &= ~0x3f; value |= 0x1b; if (i2c_write(0x8, 0x21, 1, &value, 1)) { printf("Set SW1ABSTBY error!\n"); return -1; } /* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */ if (i2c_read(0x8, 0x24, 1, &value, 1)) { printf("Read SW1ABCONFIG error!\n"); return -1; } value &= ~0xc0; value |= 0x40; if (i2c_write(0x8, 0x24, 1, &value, 1)) { printf("Set SW1ABCONFIG error!\n"); return -1; } /* set SW1C staby volatage 0.975V */ if (i2c_read(0x8, 0x2f, 1, &value, 1)) { printf("Read SW1CSTBY error!\n"); return -1; } value &= ~0x3f; value |= 0x1b; if (i2c_write(0x8, 0x2f, 1, &value, 1)) { printf("Set SW1CSTBY error!\n"); return -1; } /* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */ if (i2c_read(0x8, 0x32, 1, &value, 1)) { printf("Read SW1CCONFIG error!\n"); return -1; } value &= ~0xc0; value |= 0x40; if (i2c_write(0x8, 0x32, 1, &value, 1)) { printf("Set SW1CCONFIG error!\n"); return -1; } } return 0; }
static int ds1374_attach(struct i2c_adapter *adap) { return i2c_probe(adap, &addr_data, ds1374_probe); }
static int setup_pmic_voltages(void) { unsigned char value, rev_id = 0; i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); if (!i2c_probe(0x8)) { if (i2c_read(0x8, 0, 1, &value, 1)) { printf("Read device ID error!\n"); return -1; } if (i2c_read(0x8, 3, 1, &rev_id, 1)) { printf("Read Rev ID error!\n"); return -1; } printf("Found PFUZE100! deviceid=%x,revid=%x\n", value, rev_id); /* set SW1AB staby volatage 0.975V */ if (i2c_read(0x8, 0x21, 1, &value, 1)) { printf("Read SW1ABSTBY error!\n"); return -1; } value &= ~0x3f; value |= 0x1b; if (i2c_write(0x8, 0x21, 1, &value, 1)) { printf("Set SW1ABSTBY error!\n"); return -1; } /* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */ if (i2c_read(0x8, 0x24, 1, &value, 1)) { printf("Read SW1ABCONFIG error!\n"); return -1; } value &= ~0xc0; value |= 0x40; if (i2c_write(0x8, 0x24, 1, &value, 1)) { printf("Set SW1ABCONFIG error!\n"); return -1; } /* set SW1C staby volatage 0.975V */ if (i2c_read(0x8, 0x2f, 1, &value, 1)) { printf("Read SW1CSTBY error!\n"); return -1; } value &= ~0x3f; value |= 0x1b; if (i2c_write(0x8, 0x2f, 1, &value, 1)) { printf("Set SW1CSTBY error!\n"); return -1; } /* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */ if (i2c_read(0x8, 0x32, 1, &value, 1)) { printf("Read SW1CCONFIG error!\n"); return -1; } value &= ~0xc0; value |= 0x40; if (i2c_write(0x8, 0x32, 1, &value, 1)) { printf("Set SW1CCONFIG error!\n"); return -1; } } return 0; }
void am33xx_spl_board_init(void) { struct am335x_baseboard_id header; int mpu_vdd; if (read_eeprom(&header) < 0) { puts("Wrong data in EEPROM.\n"); hang(); } if (!board_is_kalitap(&header) && !board_is_luna(&header) && !board_is_catchwire(&header)) { puts("Could not get board ID (CatchWire/KaliTAP).\n"); hang(); } /* Get the frequency */ dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev); /* BeagleBone and NEWT PMIC Code */ int usb_cur_lim; if (i2c_probe(TPS65217_CHIP_PM)) return; /* * Override what we have detected since we know we have * a CatchWire/KaliTAP that supports 1GHz. */ dpll_mpu_opp100.m = MPUPLL_M_1000; /* * Increase USB current limit to 1300mA or 1800mA and set * the MPU voltage controller as needed. */ if (dpll_mpu_opp100.m == MPUPLL_M_1000) { usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA; mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV; puts("tps65217_reg_write USB_INPUT_CUR_LIMIT_1800MA\n"); } else { usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA; mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV; puts("tps65217_reg_write USB_INPUT_CUR_LIMIT_1300MA\n"); } if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_POWER_PATH, usb_cur_lim, TPS65217_USB_INPUT_CUR_LIMIT_MASK)) { puts("tps65217_reg_write POWER_PATH failure\n"); } else { uchar pmic_power_path_reg = 0; puts("tps65217_reg_write POWER_PATH success\n"); tps65217_reg_read(TPS65217_POWER_PATH, &pmic_power_path_reg); printf("POWER_PATH : 0%02X\n", pmic_power_path_reg); } /* Set DCDC3 (CORE) voltage to 1.125V */ if (tps65217_voltage_update(TPS65217_DEFDCDC3, TPS65217_DCDC_VOLT_SEL_1125MV)) { puts("tps65217_voltage_update failure\n"); return; } /* Set CORE Frequencies to OPP100 */ do_setup_dpll(&dpll_core_regs, &dpll_core_opp100); /* Set DCDC2 (MPU) voltage */ if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) { puts("tps65217_voltage_update failure\n"); return; } else { puts("tps65217_voltage_update success\n"); } /* * Set LDO3 to 1.8V and LDO4 to 3.3V for CatchWire/KaliTAP. */ if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, TPS65217_DEFLS1, TPS65217_LDO_VOLTAGE_OUT_1_8, TPS65217_LDO_MASK)) puts("tps65217_reg_write failure\n"); if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, TPS65217_DEFLS2, TPS65217_LDO_VOLTAGE_OUT_3_3, TPS65217_LDO_MASK)) puts("tps65217_reg_write failure\n"); /* Set MPU Frequency to what we detected now that voltages are set */ do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100); }
/* * Notify the driver that a new I2C bus has been found. * * This function is called for each I2C bus in the system. The function * then asks the I2C subsystem to probe that bus at the addresses on which * our device (the CS4270) could exist. If a device is found at one of * those addresses, then our probe function (cs4270_i2c_probe) is called. */ static int cs4270_i2c_attach(struct i2c_adapter *adapter) { return i2c_probe(adapter, &addr_data, cs4270_i2c_probe); }
static int Si4709_i2c_attach(struct i2c_adapter *adap) { return i2c_probe(adap, &Si4709_addr_data, si4709_i2c_probe); }
static void board_init_ddr(void) { struct emif_regs pxm2_ddr3_emif_reg_data = { .sdram_config = 0x41805332, .sdram_tim1 = 0x666b3c9, .sdram_tim2 = 0x243631ca, .sdram_tim3 = 0x33f, .emif_ddr_phy_ctlr_1 = 0x100005, .zq_config = 0, .ref_ctrl = 0x81a, }; struct ddr_data pxm2_ddr3_data = { .datardsratio0 = 0x81204812, .datawdsratio0 = 0, .datafwsratio0 = 0x8020080, .datawrsratio0 = 0x4010040, }; struct cmd_control pxm2_ddr3_cmd_ctrl_data = { .cmd0csratio = 0x80, .cmd0iclkout = 0, .cmd1csratio = 0x80, .cmd1iclkout = 0, .cmd2csratio = 0x80, .cmd2iclkout = 0, }; const struct ctrl_ioregs ioregs = { .cm0ioctl = DDR_IOCTRL_VAL, .cm1ioctl = DDR_IOCTRL_VAL, .cm2ioctl = DDR_IOCTRL_VAL, .dt0ioctl = DDR_IOCTRL_VAL, .dt1ioctl = DDR_IOCTRL_VAL, }; config_ddr(DDR_PLL_FREQ, &ioregs, &pxm2_ddr3_data, &pxm2_ddr3_cmd_ctrl_data, &pxm2_ddr3_emif_reg_data, 0); } /* * voltage switching for MPU frequency switching. * @module = mpu - 0, core - 1 * @vddx_op_vol_sel = vdd voltage to set */ #define MPU 0 #define CORE 1 int voltage_update(unsigned int module, unsigned char vddx_op_vol_sel) { uchar buf[4]; unsigned int reg_offset; if (module == MPU) reg_offset = PMIC_VDD1_OP_REG; else reg_offset = PMIC_VDD2_OP_REG; /* Select VDDx OP */ if (i2c_read(PMIC_CTRL_I2C_ADDR, reg_offset, 1, buf, 1)) return 1; buf[0] &= ~PMIC_OP_REG_CMD_MASK; if (i2c_write(PMIC_CTRL_I2C_ADDR, reg_offset, 1, buf, 1)) return 1; /* Configure VDDx OP Voltage */ if (i2c_read(PMIC_CTRL_I2C_ADDR, reg_offset, 1, buf, 1)) return 1; buf[0] &= ~PMIC_OP_REG_SEL_MASK; buf[0] |= vddx_op_vol_sel; if (i2c_write(PMIC_CTRL_I2C_ADDR, reg_offset, 1, buf, 1)) return 1; if (i2c_read(PMIC_CTRL_I2C_ADDR, reg_offset, 1, buf, 1)) return 1; if ((buf[0] & PMIC_OP_REG_SEL_MASK) != vddx_op_vol_sel) return 1; return 0; } #define OSC (V_OSCK/1000000) const struct dpll_params dpll_mpu_pxm2 = { 720, OSC-1, 1, -1, -1, -1, -1}; void spl_siemens_board_init(void) { uchar buf[4]; /* * pxm2 PMIC code. All boards currently want an MPU voltage * of 1.2625V and CORE voltage of 1.1375V to operate at * 720MHz. */ if (i2c_probe(PMIC_CTRL_I2C_ADDR)) return; /* VDD1/2 voltage selection register access by control i/f */ if (i2c_read(PMIC_CTRL_I2C_ADDR, PMIC_DEVCTRL_REG, 1, buf, 1)) return; buf[0] |= PMIC_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C; if (i2c_write(PMIC_CTRL_I2C_ADDR, PMIC_DEVCTRL_REG, 1, buf, 1)) return; /* Frequency switching for OPP 120 */ if (voltage_update(MPU, PMIC_OP_REG_SEL_1_2_6) || voltage_update(CORE, PMIC_OP_REG_SEL_1_1_3)) { printf("voltage update failed\n"); } } #endif /* if def CONFIG_SPL_BUILD */ int read_eeprom(void) { /* nothing ToDo here for this board */ return 0; } #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \ (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)) static void cpsw_control(int enabled) { /* VTP can be added here */ return; } static struct cpsw_slave_data cpsw_slaves[] = { { .slave_reg_ofs = 0x208, .sliver_reg_ofs = 0xd80, .phy_addr = 0, .phy_if = PHY_INTERFACE_MODE_RMII, }, { .slave_reg_ofs = 0x308,
static int tdamc_probe(struct i2c_adapter *adap) { return i2c_probe(adap, &addr_data, tdamc_attach); }
static int bcm3450_attach_adapter(struct i2c_adapter *adapter) { BCM_LOG_DEBUG(BCM_LOG_ID_I2C, "Entering the function %s \n", __FUNCTION__); return i2c_probe(adapter, &addr_data, bcm3450_detect); }
static int detect_i2c(struct display_info_t const *dev) { return ((0 == i2c_set_bus_num(dev->bus)) && (0 == i2c_probe(dev->addr))); }
static int tda7432_probe(struct i2c_adapter *adap) { if (adap->id == (I2C_ALGO_BIT | I2C_HW_B_BT848)) return i2c_probe(adap, &addr_data, tda7432_attach); return 0; }