void routing_stats (boolean full_stats, enum e_route_type route_type,
int num_switch, t_segment_inf *segment_inf, int num_segment,
float R_minW_nmos, float R_minW_pmos, boolean timing_analysis_enabled,
float **net_slack, float **net_delay) {
/* Prints out various statistics about the current routing. Both a routing *
* and an rr_graph must exist when you call this routine. */
float T_crit;
get_length_and_bends_stats ();
get_channel_occupancy_stats ();
if (route_type == DETAILED) {
count_routing_transistors (num_switch, R_minW_nmos, R_minW_pmos);
get_segment_usage_stats (num_segment, segment_inf);
if(!is_folding) {
if (timing_analysis_enabled) {
load_net_delay_from_routing (net_delay);
load_timing_graph_net_delays (net_delay);
T_crit = load_net_slack (net_slack, 0, FALSE);
#ifdef PRINT_NET_DELAYS
print_net_delay (net_delay, "net_delay.echo");
#endif
#ifdef PRINT_TIMING_GRAPH
print_timing_graph ("timing_graph.echo");
#endif
#ifdef PRINT_NET_SLACKS
print_net_slack ("net_slack.echo", net_slack);
#endif
printf ("\n");
print_critical_path ("critical_path.echo");
printf ("Critical Path: %g (s)\n", T_crit);
}
}
}
//printf("come here\n");
if (full_stats == TRUE)
print_wirelen_prob_dist ();
}
void
routing_stats(boolean full_stats,
enum e_route_type route_type,
int num_switch,
t_segment_inf * segment_inf,
int num_segment,
float R_minW_nmos,
float R_minW_pmos,
enum e_directionality directionality,
boolean timing_analysis_enabled,
float **net_slack,
float **net_delay)
{
/* Prints out various statistics about the current routing. Both a routing *
* and an rr_graph must exist when you call this routine. */
float T_crit;
float area, used_area;
int i, j;
get_length_and_bends_stats();
get_channel_occupancy_stats();
printf("Logic Area (in minimum width transistor areas, excludes I/Os and empty grid tiles):\n");
area = 0;
for(i = 1; i <= nx; i++) {
for(j = 1; j <= ny; j++) {
if(grid[i][j].offset == 0) {
if(grid[i][j].type->area == UNDEFINED) {
area += grid_logic_tile_area * grid[i][j].type->height;
} else {
area += grid[i][j].type->area;
}
}
}
}
/* Todo: need to add pitch of routing to blocks with height > 3 */
printf("Total Logic Block Area (Warning, need to add pitch of routing to blocks with height > 3): %g \n", area);
used_area = 0;
for(i = 0; i < num_blocks; i++) {
if(block[i].type != IO_TYPE) {
if(block[i].type->area == UNDEFINED) {
used_area += grid_logic_tile_area * block[i].type->height;
} else {
used_area += block[i].type->area;
}
}
}
printf("Total Used Logic Block Area: %g \n", used_area);
if(route_type == DETAILED)
{
count_routing_transistors(directionality, num_switch, segment_inf,
R_minW_nmos, R_minW_pmos);
get_segment_usage_stats(num_segment, segment_inf);
if(timing_analysis_enabled)
{
load_net_delay_from_routing(net_delay, clb_net, num_nets);
#ifdef CREATE_ECHO_FILES
print_net_delay(net_delay, "net_delay.echo", clb_net, num_nets);
#endif /* CREATE_ECHO_FILES */
load_timing_graph_net_delays(net_delay);
T_crit = load_net_slack(net_slack, 0);
#ifdef CREATE_ECHO_FILES
print_timing_graph("timing_graph.echo");
print_net_slack("net_slack.echo", net_slack);
print_critical_path("critical_path.echo");
#endif /* CREATE_ECHO_FILES */
printf("\n");
if(pb_max_internal_delay == UNDEFINED || pb_max_internal_delay < T_crit) {
printf("Critical Path: %g (s)\n", T_crit);
} else {
printf("Critical Path: %g (s) - capped by fmax of block type %s\n", pb_max_internal_delay, pbtype_max_internal_delay->name);
}
}
}
if(full_stats == TRUE)
print_wirelen_prob_dist();
}
