static int tve_probe(struct platform_device *pdev) { int ret, i; struct resource *res; struct tve_platform_data *plat_data = pdev->dev.platform_data; u32 conf_reg; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (res == NULL) return -ENOMEM; tve.pdev = pdev; tve.base = ioremap(res->start, res->end - res->start); tve.irq = platform_get_irq(pdev, 0); if (tve.irq < 0) { ret = tve.irq; goto err0; } INIT_DELAYED_WORK(&tve.cd_work, cd_work_func); ret = request_irq(tve.irq, tve_detect_handler, 0, pdev->name, pdev); if (ret < 0) goto err0; ret = device_create_file(&pdev->dev, &dev_attr_headphone); if (ret < 0) goto err1; for (i = 0; i < num_registered_fb; i++) { if (strcmp(registered_fb[i]->fix.id, "DISP3 BG - DI1") == 0) { tve_fbi = registered_fb[i]; break; } } /* adjust video mode for mx37 */ if (cpu_is_mx37()) { video_modes[0].left_margin = 121; video_modes[0].right_margin = 16; video_modes[0].upper_margin = 17; video_modes[0].lower_margin = 5; video_modes[1].left_margin = 131; video_modes[1].right_margin = 12; video_modes[1].upper_margin = 21; video_modes[1].lower_margin = 3; } if (tve_fbi != NULL) { fb_add_videomode(&video_modes[0], &tve_fbi->modelist); fb_add_videomode(&video_modes[1], &tve_fbi->modelist); } tve.dac_reg = regulator_get(&pdev->dev, plat_data->dac_reg); if (!IS_ERR(tve.dac_reg)) { regulator_set_voltage(tve.dac_reg, 2500000); regulator_enable(tve.dac_reg); } tve.dig_reg = regulator_get(&pdev->dev, plat_data->dig_reg); if (!IS_ERR(tve.dig_reg)) { regulator_set_voltage(tve.dig_reg, 1250000); regulator_enable(tve.dig_reg); } tve.clk = clk_get(&pdev->dev, "tve_clk"); clk_set_rate(tve.clk, 216000000); clk_enable(tve.clk); if (_tve_get_revision() == 1) { tve_regs = &tve_regs_v1; tve_reg_fields = &tve_reg_fields_v1; } else { tve_regs = &tve_regs_v2; tve_reg_fields = &tve_reg_fields_v2; } /* Setup cable detect, for YPrPb mode, default use channel#0 for Y */ __raw_writel(0x01067701, tve.base + tve_regs->tve_cd_cont_reg); /* tve_man_detect(); not working */ conf_reg = 0; __raw_writel(conf_reg, tve.base + tve_regs->tve_com_conf_reg); __raw_writel(0x00000000, tve.base + tve_regs->tve_mv_cont_reg - 4 * 5); __raw_writel(0x00000000, tve.base + tve_regs->tve_mv_cont_reg - 4 * 4); __raw_writel(0x00000000, tve.base + tve_regs->tve_mv_cont_reg - 4 * 3); __raw_writel(0x00000000, tve.base + tve_regs->tve_mv_cont_reg - 4 * 2); __raw_writel(0x00000000, tve.base + tve_regs->tve_mv_cont_reg - 4); __raw_writel(0x00000000, tve.base + tve_regs->tve_mv_cont_reg); clk_disable(tve.clk); ret = fb_register_client(&nb); if (ret < 0) goto err2; return 0; err2: device_remove_file(&pdev->dev, &dev_attr_headphone); err1: free_irq(tve.irq, pdev); err0: iounmap(tve.base); return ret; }
/*! ****************************************************************************** @Function SysInitialise @Description Initialises kernel services at 'driver load' time @Return PVRSRV_ERROR : ******************************************************************************/ PVRSRV_ERROR SysInitialise(IMG_VOID) { IMG_UINT32 i; PVRSRV_ERROR eError; PVRSRV_DEVICE_NODE *psDeviceNode; SGX_TIMING_INFORMATION* psTimingInfo; gpsSysData = &gsSysData; OSMemSet(gpsSysData, 0, sizeof(SYS_DATA)); #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) { extern struct platform_device *gpsPVRLDMDev; g3d_pd_regulator = regulator_get(&gpsPVRLDMDev->dev, "pd"); if (IS_ERR(g3d_pd_regulator)) { PVR_DPF((PVR_DBG_ERROR, "G3D failed to find g3d power domain")); return PVRSRV_ERROR_INIT_FAILURE; } g3d_clock = clk_get(&gpsPVRLDMDev->dev, "sclk"); if (IS_ERR(g3d_clock)) { PVR_DPF((PVR_DBG_ERROR, "G3D failed to find g3d clock source-enable")); return PVRSRV_ERROR_INIT_FAILURE; } EnableSGXClocks(); } #endif eError = OSInitEnvData(&gpsSysData->pvEnvSpecificData); if (eError != PVRSRV_OK) { PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to setup env structure")); SysDeinitialise(gpsSysData); gpsSysData = IMG_NULL; return eError; } gpsSysData->pvSysSpecificData = (IMG_PVOID)&gsSysSpecificData; OSMemSet(&gsSGXDeviceMap, 0, sizeof(SGX_DEVICE_MAP)); /* Set up timing information*/ psTimingInfo = &gsSGXDeviceMap.sTimingInfo; psTimingInfo->ui32CoreClockSpeed = SYS_SGX_CLOCK_SPEED; psTimingInfo->ui32HWRecoveryFreq = SYS_SGX_HWRECOVERY_TIMEOUT_FREQ; psTimingInfo->ui32ActivePowManLatencyms = SYS_SGX_ACTIVE_POWER_LATENCY_MS; psTimingInfo->ui32uKernelFreq = SYS_SGX_PDS_TIMER_FREQ; #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) psTimingInfo->bEnableActivePM = IMG_TRUE; #else psTimingInfo->bEnableActivePM = IMG_FALSE; #endif gpsSysData->ui32NumDevices = SYS_DEVICE_COUNT; /* init device ID's */ for(i=0; i<SYS_DEVICE_COUNT; i++) { gpsSysData->sDeviceID[i].uiID = i; gpsSysData->sDeviceID[i].bInUse = IMG_FALSE; } gpsSysData->psDeviceNodeList = IMG_NULL; gpsSysData->psQueueList = IMG_NULL; eError = SysInitialiseCommon(gpsSysData); if (eError != PVRSRV_OK) { PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed in SysInitialiseCommon")); SysDeinitialise(gpsSysData); gpsSysData = IMG_NULL; return eError; } /* Locate the devices within the system, specifying the physical addresses of each devices components (regs, mem, ports etc.) */ eError = SysLocateDevices(gpsSysData); if (eError != PVRSRV_OK) { PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to locate devices")); SysDeinitialise(gpsSysData); gpsSysData = IMG_NULL; return eError; } /* Register devices with the system This also sets up their memory maps/heaps */ eError = PVRSRVRegisterDevice(gpsSysData, SGXRegisterDevice, 1, &gui32SGXDeviceID); if (eError != PVRSRV_OK) { PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to register device!")); SysDeinitialise(gpsSysData); gpsSysData = IMG_NULL; return eError; } /* Once all devices are registered, specify the backing store and, if required, customise the memory heap config */ psDeviceNode = gpsSysData->psDeviceNodeList; while(psDeviceNode) { /* perform any OEM SOC address space customisations here */ switch(psDeviceNode->sDevId.eDeviceType) { case PVRSRV_DEVICE_TYPE_SGX: { DEVICE_MEMORY_INFO *psDevMemoryInfo; DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap; IMG_UINT32 ui32MemConfig; if(gpsSysData->apsLocalDevMemArena[0] != IMG_NULL) { /* specify the backing store to use for the device's MMU PT/PDs */ psDeviceNode->psLocalDevMemArena = gpsSysData->apsLocalDevMemArena[0]; ui32MemConfig = PVRSRV_BACKINGSTORE_LOCALMEM_CONTIG; } else { /* specify the backing store to use for the devices MMU PT/PDs - the PT/PDs are always UMA in this system */ psDeviceNode->psLocalDevMemArena = IMG_NULL; ui32MemConfig = PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG; } /* useful pointers */ psDevMemoryInfo = &psDeviceNode->sDevMemoryInfo; psDeviceMemoryHeap = psDevMemoryInfo->psDeviceMemoryHeap; /* specify the backing store for all SGX heaps */ for(i=0; i<psDevMemoryInfo->ui32HeapCount; i++) { #if defined(SGX_FEATURE_VARIABLE_MMU_PAGE_SIZE) IMG_CHAR *pStr; switch(psDeviceMemoryHeap[i].ui32HeapID) { case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_GENERAL_HEAP_ID): { pStr = "GeneralHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_GENERAL_MAPPING_HEAP_ID): { pStr = "GeneralMappingHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_TADATA_HEAP_ID): { pStr = "TADataHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_KERNEL_CODE_HEAP_ID): { pStr = "KernelCodeHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_KERNEL_DATA_HEAP_ID): { pStr = "KernelDataHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_PIXELSHADER_HEAP_ID): { pStr = "PixelShaderHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_VERTEXSHADER_HEAP_ID): { pStr = "VertexShaderHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_PDSPIXEL_CODEDATA_HEAP_ID): { pStr = "PDSPixelHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_PDSVERTEX_CODEDATA_HEAP_ID): { pStr = "PDSVertexHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_SYNCINFO_HEAP_ID): { pStr = "SyncInfoHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_3DPARAMETERS_HEAP_ID): { pStr = "3DParametersHeapPageSize"; break; } default: { /* not interested in other heaps */ pStr = IMG_NULL; break; } } if (pStr && OSReadRegistryDWORDFromString(0, PVRSRV_REGISTRY_ROOT, pStr, &psDeviceMemoryHeap[i].ui32DataPageSize) == IMG_TRUE) { PVR_DPF((PVR_DBG_VERBOSE,"SysInitialise: set Heap %s page size to %d", pStr, psDeviceMemoryHeap[i].ui32DataPageSize)); } #endif /* map the device memory allocator(s) onto the device memory heaps as required */ psDeviceMemoryHeap[i].psLocalDevMemArena = gpsSysData->apsLocalDevMemArena[0]; /* set the memory config (uma | non-uma) */ psDeviceMemoryHeap[i].ui32Attribs |= ui32MemConfig; } break; } default: PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to find SGX device node!")); return PVRSRV_ERROR_INIT_FAILURE; } /* advance to next device */ psDeviceNode = psDeviceNode->psNext; } /* Initialise all devices 'managed' by services: */ eError = PVRSRVInitialiseDevice (gui32SGXDeviceID); if (eError != PVRSRV_OK) { PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to initialise device!")); SysDeinitialise(gpsSysData); gpsSysData = IMG_NULL; return eError; } #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) DisableSGXClocks(); #endif return PVRSRV_OK; }
static void lg4591_panel_power(struct mmp_panel *panel, int skip_on, int on) { static struct regulator *lcd_iovdd, *lcd_avdd; int lcd_rst_n, ret = 0; lcd_rst_n = of_get_named_gpio(panel->dev->of_node, "rst_gpio", 0); if (lcd_rst_n < 0) { pr_err("%s: of_get_named_gpio failed\n", __func__); return; } if (gpio_request(lcd_rst_n, "lcd reset gpio")) { pr_err("gpio %d request failed\n", lcd_rst_n); return; } /* FIXME: LCD_IOVDD, 1.8V from buck2 */ if (panel->is_iovdd && (!lcd_iovdd)) { lcd_iovdd = regulator_get(panel->dev, "iovdd"); if (IS_ERR(lcd_iovdd)) { pr_err("%s regulator get error!\n", __func__); ret = -EIO; goto regu_lcd_iovdd; } } if (panel->is_avdd && (!lcd_avdd)) { lcd_avdd = regulator_get(panel->dev, "avdd"); if (IS_ERR(lcd_avdd)) { pr_err("%s regulator get error!\n", __func__); ret = -EIO; goto regu_lcd_iovdd; } } if (on) { if (panel->is_avdd && lcd_avdd) { regulator_set_voltage(lcd_avdd, 2800000, 2800000); ret = regulator_enable(lcd_avdd); if (ret < 0) goto regu_lcd_iovdd; } if (panel->is_iovdd && lcd_iovdd) { regulator_set_voltage(lcd_iovdd, 1800000, 1800000); ret = regulator_enable(lcd_iovdd); if (ret < 0) goto regu_lcd_iovdd; } usleep_range(10000, 12000); if (!skip_on) { gpio_direction_output(lcd_rst_n, 0); usleep_range(10000, 12000); gpio_direction_output(lcd_rst_n, 1); usleep_range(10000, 12000); } } else { /* set panel reset */ gpio_direction_output(lcd_rst_n, 0); /* disable LCD_IOVDD 1.8v */ if (panel->is_iovdd && lcd_iovdd) regulator_disable(lcd_iovdd); if (panel->is_avdd && lcd_avdd) regulator_disable(lcd_avdd); } regu_lcd_iovdd: gpio_free(lcd_rst_n); if (ret < 0) { lcd_iovdd = NULL; lcd_avdd = NULL; } }
static int yuv_front_sensor_power_on(void) { int ret; printk("yuv_front_sensor_power_on+\n"); if(camera_busy){ printk("yuv_sensor busy\n"); return -EBUSY; } camera_busy = true; /* 1.8V VDDIO_CAM controlled by "EN_1V8_CAM(GPIO_PBB4)" */ if (!reg_cardhu_1v8_cam) { reg_cardhu_1v8_cam = regulator_get(NULL, "vdd_1v8_cam1"); /*cam2/3?*/ if (IS_ERR_OR_NULL(reg_cardhu_1v8_cam)) { reg_cardhu_1v8_cam = NULL; pr_err("Can't get reg_cardhu_1v8_cam.\n"); goto fail_to_get_reg; } regulator_set_voltage(reg_cardhu_1v8_cam, 1800000, 1800000); regulator_enable(reg_cardhu_1v8_cam); } if (IsTF200XorTF200XG()) { //VDD_CAM1_ldo pr_info("gpio %d read as %d\n",CAM1_LDO_EN_GPIO, gpio_get_value(CAM1_LDO_EN_GPIO)); tegra_gpio_enable(CAM1_LDO_EN_GPIO); ret = gpio_request(CAM1_LDO_EN_GPIO, "cam1_ldo_en"); if (ret < 0) pr_err("%s: gpio_request failed for gpio %s\n", __func__, "CAM1_LDO_EN_GPIO"); gpio_direction_output(CAM1_LDO_EN_GPIO, 1); pr_info("gpio %d set to %d\n",CAM1_LDO_EN_GPIO, gpio_get_value(CAM1_LDO_EN_GPIO)); } else { /* 2.85V VDD_CAM2 controlled by CAM2/3_LDO_EN(GPIO_PS0)*/ if (!reg_cardhu_2v85_cam) { reg_cardhu_2v85_cam = regulator_get(NULL, "vdd_cam3"); if (IS_ERR_OR_NULL(reg_cardhu_2v85_cam)) { reg_cardhu_2v85_cam = NULL; pr_err("Can't get reg_cardhu_2v85_cam.\n"); goto fail_to_get_reg; } regulator_set_voltage(reg_cardhu_2v85_cam, 2850000, 2850000); regulator_enable(reg_cardhu_2v85_cam); } } /* cam_power_en, powdn*/ tegra_gpio_enable(CAM3_POWER_DWN_GPIO); ret = gpio_request(CAM3_POWER_DWN_GPIO, "cam3_power_dwn"); if(ret == -EBUSY) printk("%s: gpio %s has been requested?\n", __func__, "CAM3_POWER_DWN_GPIO"); else if (ret < 0) { pr_err("%s: gpio_request failed for gpio %s, ret= %d\n", __func__, "CAM3_POWER_DWN_GPIO", ret); goto fail_to_request_gpio; } pr_info("gpio %d: %d",CAM3_POWER_DWN_GPIO, gpio_get_value(CAM3_POWER_DWN_GPIO)); gpio_set_value(CAM3_POWER_DWN_GPIO, 0); gpio_direction_output(CAM3_POWER_DWN_GPIO, 0); pr_info("--> %d\n", gpio_get_value(CAM3_POWER_DWN_GPIO)); /* yuv_sensor_rst_lo*/ tegra_gpio_enable(FRONT_YUV_SENSOR_RST_GPIO); ret = gpio_request(FRONT_YUV_SENSOR_RST_GPIO, "yuv_sensor_rst_lo"); if(ret == -EBUSY) printk("%s: gpio %s has been requested?\n", __func__, "FRONT_YUV_SENSOR_RST_GPIO"); else if (ret < 0) { pr_err("%s: gpio_request failed for gpio %s, ret= %d\n", __func__, "FRONT_YUV_SENSOR_RST_GPIO", ret); goto fail_to_request_gpio; } pr_info("gpio %d: %d", FRONT_YUV_SENSOR_RST_GPIO, gpio_get_value(FRONT_YUV_SENSOR_RST_GPIO)); gpio_set_value(FRONT_YUV_SENSOR_RST_GPIO, 1); gpio_direction_output(FRONT_YUV_SENSOR_RST_GPIO, 1); pr_info("--> %d\n", gpio_get_value(FRONT_YUV_SENSOR_RST_GPIO)); printk("yuv_front_sensor_power_on-\n"); return 0; fail_to_request_gpio: gpio_free(FRONT_YUV_SENSOR_RST_GPIO); gpio_free(CAM3_POWER_DWN_GPIO); fail_to_get_reg: if (reg_cardhu_2v85_cam) { regulator_put(reg_cardhu_2v85_cam); reg_cardhu_2v85_cam = NULL; } if (reg_cardhu_1v8_cam) { regulator_put(reg_cardhu_1v8_cam); reg_cardhu_1v8_cam = NULL; } camera_busy = false; printk("yuv_front_sensor_power_on- : -ENODEV\n"); return -ENODEV; }
static int cardhu_left_ov5650_power_on(void) { /* Boards E1198 and E1291 are of Cardhu personality * and donot have TCA6416 exp for camera */ if ((board_info.board_id == BOARD_E1198) || (board_info.board_id == BOARD_E1291)) { if (cardhu_vdd_2v8_cam1 == NULL) { cardhu_vdd_2v8_cam1 = regulator_get(NULL, "vdd_2v8_cam1"); if (WARN_ON(IS_ERR(cardhu_vdd_2v8_cam1))) { pr_err("%s: couldn't get regulator vdd_2v8_cam1: %ld\n", __func__, PTR_ERR(cardhu_vdd_2v8_cam1)); goto reg_alloc_fail; } } regulator_enable(cardhu_vdd_2v8_cam1); mdelay(5); } /* Enable VDD_1V8_Cam1 */ if (cardhu_1v8_cam1 == NULL) { cardhu_1v8_cam1 = regulator_get(NULL, "vdd_1v8_cam1"); if (WARN_ON(IS_ERR(cardhu_1v8_cam1))) { pr_err("%s: couldn't get regulator vdd_1v8_cam1: %ld\n", __func__, PTR_ERR(cardhu_1v8_cam1)); goto reg_alloc_fail; } } regulator_enable(cardhu_1v8_cam1); mdelay(5); if ((board_info.board_id == BOARD_E1198) || (board_info.board_id == BOARD_E1291)) { gpio_direction_output(CAM1_POWER_DWN_GPIO, 0); mdelay(20); gpio_direction_output(OV5650_RESETN_GPIO, 0); mdelay(100); gpio_direction_output(OV5650_RESETN_GPIO, 1); } if (board_info.board_id == BOARD_PM269) { gpio_direction_output(CAM1_RST_L_GPIO, 0); mdelay(100); gpio_direction_output(CAM1_RST_L_GPIO, 1); } return 0; reg_alloc_fail: if (cardhu_1v8_cam1) { regulator_put(cardhu_1v8_cam1); cardhu_1v8_cam1 = NULL; } if (cardhu_vdd_2v8_cam1) { regulator_put(cardhu_vdd_2v8_cam1); cardhu_vdd_2v8_cam1 = NULL; } return -ENODEV; }
static int hdmi_core_power(int on, int show) { static struct regulator *reg_8921_l23, *reg_8921_s4; static int prev_on; int rc; if (on == prev_on) return 0; /* TBD: PM8921 regulator instead of 8901 */ if (!reg_8921_l23) { reg_8921_l23 = regulator_get(&hdmi_msm_device.dev, "hdmi_avdd"); if (IS_ERR(reg_8921_l23)) { pr_err("could not get reg_8921_l23, rc = %ld\n", PTR_ERR(reg_8921_l23)); return -ENODEV; } rc = regulator_set_voltage(reg_8921_l23, 1800000, 1800000); if (rc) { pr_err("set_voltage failed for 8921_l23, rc=%d\n", rc); return -EINVAL; } } if (!reg_8921_s4) { reg_8921_s4 = regulator_get(&hdmi_msm_device.dev, "hdmi_vcc"); if (IS_ERR(reg_8921_s4)) { pr_err("could not get reg_8921_s4, rc = %ld\n", PTR_ERR(reg_8921_s4)); return -ENODEV; } rc = regulator_set_voltage(reg_8921_s4, 1800000, 1800000); if (rc) { pr_err("set_voltage failed for 8921_s4, rc=%d\n", rc); return -EINVAL; } } if (on) { rc = regulator_set_optimum_mode(reg_8921_l23, 100000); if (rc < 0) { pr_err("set_optimum_mode l23 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_enable(reg_8921_l23); if (rc) { pr_err("'%s' regulator enable failed, rc=%d\n", "hdmi_avdd", rc); return rc; } rc = regulator_enable(reg_8921_s4); if (rc) { pr_err("'%s' regulator enable failed, rc=%d\n", "hdmi_vcc", rc); return rc; } pr_debug("%s(on): success\n", __func__); } else { rc = regulator_disable(reg_8921_l23); if (rc) { pr_err("disable reg_8921_l23 failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_disable(reg_8921_s4); if (rc) { pr_err("disable reg_8921_s4 failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_set_optimum_mode(reg_8921_l23, 100); if (rc < 0) { pr_err("set_optimum_mode l23 failed, rc=%d\n", rc); return -EINVAL; } pr_debug("%s(off): success\n", __func__); } prev_on = on; return 0; }
// ------------------------------------------------------------------------- // // Driver interface // // ------------------------------------------------------------------------- // static int __devinit battery_probe( struct platform_device *pdev ) { int ret = 0; int i = 0; struct battery_device_info *di; printk( "[BM] Battery Probe... bootmode = %d\n\n"); this_dev = &pdev->dev; di = kzalloc( sizeof(*di), GFP_KERNEL ); if(!di) return -ENOMEM; platform_set_drvdata( pdev, di ); di->dev = &pdev->dev; device_config = pdev->dev.platform_data; INIT_DELAYED_WORK( &di->battery_monitor_work, battery_monitor_work_handler ); /*Create power supplies*/ di->sec_battery.name = "battery"; di->sec_battery.type = POWER_SUPPLY_TYPE_BATTERY; di->sec_battery.properties = samsung_battery_props; di->sec_battery.num_properties = ARRAY_SIZE( samsung_battery_props ); di->sec_battery.get_property = samsung_battery_get_property; di->sec_battery.external_power_changed = samsung_pwr_external_power_changed; di->sec_ac.name = "ac"; di->sec_ac.type = POWER_SUPPLY_TYPE_MAINS; di->sec_ac.supplied_to = samsung_bci_supplied_to; di->sec_ac.num_supplicants = ARRAY_SIZE( samsung_bci_supplied_to ); di->sec_ac.properties = samsung_ac_props; di->sec_ac.num_properties = ARRAY_SIZE( samsung_ac_props ); di->sec_ac.get_property = samsung_ac_get_property; di->sec_ac.external_power_changed = samsung_pwr_external_power_changed; di->sec_usb.name = "usb"; di->sec_usb.type = POWER_SUPPLY_TYPE_USB; di->sec_usb.supplied_to = samsung_bci_supplied_to; di->sec_usb.num_supplicants = ARRAY_SIZE( samsung_bci_supplied_to ); di->sec_usb.properties = samsung_usb_props; di->sec_usb.num_properties = ARRAY_SIZE( samsung_usb_props ); di->sec_usb.get_property = samsung_usb_get_property; di->sec_usb.external_power_changed = samsung_pwr_external_power_changed; // USE_REGULATOR [+] di->usb3v1 = regulator_get( &pdev->dev, "usb3v1" ); if( IS_ERR( di->usb3v1 ) ) goto fail_regulator1; di->usb1v8 = regulator_get( &pdev->dev, "usb1v8" ); if( IS_ERR( di->usb1v8 ) ) goto fail_regulator2; di->usb1v5 = regulator_get( &pdev->dev, "usb1v5" ); if( IS_ERR( di->usb1v5 ) ) goto fail_regulator3; // USE_REGULATOR [-] ret = power_supply_register( &pdev->dev, &di->sec_battery ); if( ret ) { printk( "[BM] Failed to register main battery, charger\n" ); goto batt_regi_fail1; } ret = power_supply_register( &pdev->dev, &di->sec_ac ); if( ret ) { printk( "[BM] Failed to register ac\n" ); goto batt_regi_fail2; } ret = power_supply_register( &pdev->dev, &di->sec_usb ); if( ret ) { printk( "[BM] Failed to register usb\n" ); goto batt_regi_fail3; } #ifdef _OMS_FEATURES_ // Create battery sysfs files for sharing battery information with platform. ret = sysfs_create_file( &di->sec_battery.dev->kobj, &batt_vol_toolow.attr ); if ( ret ) { printk( "[BM] sysfs create fail - %s\n", batt_vol_toolow.attr.name ); } #endif for( i = 0; i < ARRAY_SIZE( batt_sysfs_testmode ); i++ ) { ret = sysfs_create_file( &di->sec_battery.dev->kobj, &batt_sysfs_testmode[i].attr ); if ( ret ) { printk( "[BM] sysfs create fail - %s\n", batt_sysfs_testmode[i].attr.name ); } } // Set GPIO to control thermal sensor power if (gpio_is_valid(OMAP_GPIO_EN_TEMP_VDD)) { printk(KERN_ERR "[BM] OMAP_GPIO_EN_TEMP_VDD is valid\n"); ret = gpio_request(OMAP_GPIO_EN_TEMP_VDD, NULL); if (ret < 0) printk(KERN_ERR "[BM] Failed to request OMAP_GPIO_EN_TEMP_VDD\n"); gpio_direction_output(OMAP_GPIO_EN_TEMP_VDD, 0); } // Init. ADC turn_resources_on_for_adc(); twl_i2c_write_u8( TWL4030_MODULE_USB, SEL_MADC_MCPC, CARKIT_ANA_CTRL ); turn_resources_off_for_adc(); // Set gptimer12 for checking battery status in sleep mode. batt_gptimer_12.name = "samsung_battery_timer"; batt_gptimer_12.expire_time =(unsigned int) MONITOR_DURATION_DUR_SLEEP; batt_gptimer_12.expire_callback = &battery_monitor_fleeting_wakeup_handler; batt_gptimer_12.data = (unsigned long) di; #ifdef CONFIG_SEC_BATTERY_USE_RECOVERY_MODE if (likely(recovery_mode == 0)) queue_delayed_work( sec_bci.sec_battery_workq, &di->battery_monitor_work, HZ/2 ); else queue_delayed_work( sec_bci.sec_battery_workq, &di->battery_monitor_work, 0 ); #else queue_delayed_work( sec_bci.sec_battery_workq, &di->battery_monitor_work, HZ/2 ); #endif sec_bci.ready = true; return 0; batt_regi_fail3: power_supply_unregister( &di->sec_ac ); batt_regi_fail2: power_supply_unregister( &di->sec_battery ); batt_regi_fail1: // USE_REGULATOR [+] regulator_put( di->usb1v5 ); di->usb1v5 = NULL; fail_regulator3: regulator_put( di->usb1v8 ); di->usb1v8 = NULL; fail_regulator2: regulator_put( di->usb3v1 ); di->usb3v1 = NULL; fail_regulator1: // USE_REGULATOR [-] kfree(di); return ret; }
static int sr030pc30_power(struct device *dev, int flag) { #ifdef CONFIG_LEDS_RT8547 static struct regulator *vcamera_vbuck5; // 5M CORE : 1.2V if (!vcamera_vbuck5) { vcamera_vbuck5 = regulator_get(dev, "v_cam_c"); if (IS_ERR(vcamera_vbuck5)) { vcamera_vbuck5 = NULL; pr_err(KERN_ERR "Enable vcamera_vbuck5 failed!\n"); return -EIO; } } #endif if (flag) { switch_i2c_gpio_mfp(I2C_PIN); Cam_Printk("---sr030pc30_power power ON ----------\n"); /* Sensor AVDD : 2.8V ON */ gpio_direction_output(CAM_AVDD, 1); udelay(50); /* Sensor IO : 1.8V ON */ gpio_direction_output(CAM_IO, 1); /* 5M Core : 1.2V ON */ #ifdef CONFIG_LEDS_RT8547 regulator_set_voltage(vcamera_vbuck5, 1200000, 1200000); regulator_enable(vcamera_vbuck5); #elif CONFIG_FLED_RT5033 gpio_direction_output(CAM_CORE, 1); #endif /* 5M Core : 1.2V OFF */ msleep(5); #ifdef CONFIG_LEDS_RT8547 regulator_disable(vcamera_vbuck5); #elif CONFIG_FLED_RT5033 gpio_direction_output(CAM_CORE, 0); #endif msleep(1); /* VT STBY Enable */ gpio_direction_output(Sub_EN, 1); /* Ccic Mclk enbale, enable/disable clk api is in mmp_camera.c */ pxa_ccic_enable_mclk(samsung_camera.pcdev, V4L2_MBUS_PARALLEL); msleep(1); /* VT Rest Enable */ gpio_direction_output(Sub_RST, 0); msleep(5); gpio_direction_output(Sub_RST, 1); msleep(40); /*for s5k power off maybe pull down the i2c data pin, so we have to reset i2c controller */ samsung_camera.i2c_pxa_reset(samsung_camera.i2c); }else { Cam_Printk("---sr030pc30_power power OFF ----------\n"); /* VT Rest Disable */ gpio_direction_output(Sub_RST, 0); /* Ccic Mclk enbale, enable/disable clk api is in mmp_camera.c */ msleep(5); pxa_ccic_disable_mclk(samsung_camera.pcdev, V4L2_MBUS_PARALLEL); msleep(5); /* VT STBY Disable */ gpio_direction_output(Sub_EN, 0); /* Sensor IO : 1.8V OFF */ gpio_direction_output(CAM_IO, 0); /* Sensor AVDD : 2.8V OFF */ gpio_direction_output(CAM_AVDD, 0); switch_i2c_gpio_mfp(GPIO_PIN); } return 0; }
static int s5k43_power(struct device *dev, int flag) { static int initialized = FALSE; // for checking is probe state #ifdef CONFIG_LEDS_RT8547 static struct regulator *vcamera_vbuck5; // 5M CORE : 1.2V if (!vcamera_vbuck5) { vcamera_vbuck5 = regulator_get(dev, "v_cam_c"); if (IS_ERR(vcamera_vbuck5)) { vcamera_vbuck5 = NULL; pr_err(KERN_ERR "Enable vcamera_vbuck5 failed!\n"); return -EIO; } } #endif if (flag) { switch_i2c_gpio_mfp(I2C_PIN); Cam_Printk("---camera power ON ----------\n"); /* Sensor AVDD : 2.8V ON */ gpio_direction_output(CAM_AVDD, 1); msleep(1); /* Sensor IO : 1.8V ON */ gpio_direction_output(CAM_IO, 1); /* AF : 2.8V ON */ gpio_direction_output(CAM_AF, 1); msleep(1); /* VT STBY Enable */ gpio_direction_output(Sub_EN, 1); /* Ccic Mclk enbale, enable/disable clk api is in mmp_camera.c */ pxa_ccic_enable_mclk(samsung_camera.pcdev, V4L2_MBUS_CSI2); /* VT Rest Enable */ gpio_direction_output(Sub_RST, 0); msleep(5); gpio_direction_output(Sub_RST, 1); msleep(2); /* VT STBY Disable */ gpio_direction_output(Sub_EN, 0); /* 5M Core : 1.2V ON */ #ifdef CONFIG_LEDS_RT8547 regulator_set_voltage(vcamera_vbuck5, 1200000, 1200000); regulator_enable(vcamera_vbuck5); #else gpio_direction_output(CAM_CORE, 1); #endif msleep(1); /* 5M STBY Enable */ gpio_direction_output(Main_STBY, 1); /* 5M Reset Enable*/ gpio_direction_output(Main_RST, 0); msleep(2); gpio_direction_output(Main_RST, 1); msleep(5); /*for s5k power off maybe pull down the i2c data pin, so we have to reset i2c controller */ samsung_camera.i2c_pxa_reset(samsung_camera.i2c); }else { Cam_Printk("---camera power OFF ----------\n"); if((initialized==TRUE)&&(rear_camera==FALSE)) camera_flash_on_off(POWER_OFF); // Flash Off /* 5M Reset Disable*/ gpio_direction_output(Main_RST, 0); msleep(1); /* Ccic Mclk enbale, enable/disable clk api is in mmp_camera.c */ msleep(5); pxa_ccic_disable_mclk(samsung_camera.pcdev, V4L2_MBUS_CSI2); /* 5M STBY Disable */ gpio_direction_output(Main_STBY, 0); /* VT Rest Disable */ gpio_direction_output(Sub_RST, 0); /* 5M Core : 1.2V OFF */ #ifdef CONFIG_LEDS_RT8547 regulator_disable(vcamera_vbuck5); #else gpio_direction_output(CAM_CORE, 0); #endif /* Sensor IO : 1.8V OFF */ gpio_direction_output(CAM_IO, 0); /* Sensor AVDD : 2.8V OFF */ gpio_direction_output(CAM_AVDD, 0); /* AF : 2.8V OFF */ gpio_direction_output(CAM_AF, 0); switch_i2c_gpio_mfp(GPIO_PIN); if(initialized==FALSE) initialized = TRUE; } return 0; }
static int cardhu_dsi_panel_enable(void) { int ret; if (cardhu_dsi_reg == NULL) { cardhu_dsi_reg = regulator_get(NULL, "avdd_dsi_csi"); if (IS_ERR_OR_NULL(cardhu_dsi_reg)) { pr_err("dsi: Could not get regulator avdd_dsi_csi\n"); cardhu_dsi_reg = NULL; return PTR_ERR(cardhu_dsi_reg); } } regulator_enable(cardhu_dsi_reg); if (!is_panel_1506) { ret = gpio_request(AVDD_LCD, "avdd_lcd"); if (ret < 0) gpio_free(AVDD_LCD); ret = gpio_direction_output(AVDD_LCD, 1); if (ret < 0) gpio_free(AVDD_LCD); } if (is_panel_219) { ret = gpio_request(cardhu_bl_pwm, "bl_pwm"); if (ret < 0) return ret; ret = gpio_direction_output(cardhu_bl_pwm, 0); if (ret < 0) { gpio_free(cardhu_bl_pwm); return ret; } ret = gpio_request(cardhu_bl_enb, "bl_enb"); if (ret < 0) return ret; ret = gpio_direction_output(cardhu_bl_enb, 0); if (ret < 0) { gpio_free(cardhu_bl_enb); return ret; } gpio_set_value(cardhu_lvds_shutdown, 1); mdelay(20); gpio_set_value(cardhu_bl_pwm, 1); mdelay(10); gpio_set_value(cardhu_bl_enb, 1); mdelay(15); } else if (is_panel_1506) { ret = gpio_request(e1506_dsi_vddio, "e1506_dsi_vddio"); if (ret < 0) return ret; ret = gpio_direction_output(e1506_dsi_vddio, 0); if (ret < 0) { gpio_free(e1506_dsi_vddio); return ret; } ret = gpio_request(e1506_panel_enb, "e1506_panel_enb"); if (ret < 0) return ret; ret = gpio_direction_output(e1506_panel_enb, 0); if (ret < 0) { gpio_free(e1506_panel_enb); return ret; } ret = gpio_request(e1506_bl_enb, "e1506_bl_enb"); if (ret < 0) return ret; ret = gpio_direction_output(e1506_bl_enb, 0); if (ret < 0) { gpio_free(e1506_bl_enb); return ret; } gpio_set_value(e1506_dsi_vddio, 1); mdelay(1); gpio_set_value(e1506_panel_enb, 1); mdelay(10); gpio_set_value(e1506_bl_enb, 1); mdelay(15); } #if DSI_PANEL_RESET if (is_panel_218) { ret = gpio_request(cardhu_dsi_pnl_reset, "dsi_panel_reset"); if (ret < 0) return ret; ret = gpio_direction_output(cardhu_dsi_pnl_reset, 0); if (ret < 0) { gpio_free(cardhu_dsi_pnl_reset); return ret; } gpio_set_value(cardhu_dsi_pnl_reset, 1); gpio_set_value(cardhu_dsi_pnl_reset, 0); mdelay(2); gpio_set_value(cardhu_dsi_pnl_reset, 1); mdelay(2); } else if (is_panel_219) { ret = gpio_request(cardhu_dsi_219_pnl_reset, "dsi_panel_reset"); if (ret < 0) return ret; ret = gpio_direction_output(cardhu_dsi_219_pnl_reset, 0); if (ret < 0) { gpio_free(cardhu_dsi_219_pnl_reset); return ret; } gpio_set_value(cardhu_dsi_219_pnl_reset, 0); gpio_set_value(cardhu_dsi_219_pnl_reset, 1); mdelay(10); gpio_set_value(cardhu_dsi_219_pnl_reset, 0); mdelay(10); gpio_set_value(cardhu_dsi_219_pnl_reset, 1); mdelay(15); } else if (is_panel_1506) { ret = gpio_request(cardhu_dsi_pnl_reset, "dsi_panel_reset"); if (ret < 0) return ret; ret = gpio_direction_output(cardhu_dsi_pnl_reset, 0); if (ret < 0) { gpio_free(cardhu_dsi_pnl_reset); return ret; } gpio_set_value(cardhu_dsi_pnl_reset, 1); mdelay(1); gpio_set_value(cardhu_dsi_pnl_reset, 0); mdelay(1); gpio_set_value(cardhu_dsi_pnl_reset, 1); mdelay(20); } #endif return 0; }
PVRSRV_ERROR SysInitialise() { IMG_UINT32 i; PVRSRV_ERROR eError; PVRSRV_DEVICE_NODE *psDeviceNode; SGX_TIMING_INFORMATION* psTimingInfo; struct platform_device *pdev; gpsSysData = &gsSysData; OSMemSet(gpsSysData, 0, sizeof(SYS_DATA)); pdev = gpsPVRLDMDev; g3d_pd_regulator = regulator_get(&pdev->dev, "pd"); if (IS_ERR(g3d_pd_regulator)) { printk("\nG3D failed to find g3d power domain\n"); return PVRSRV_ERROR_INIT_FAILURE; } g3d_clock = clk_get(&pdev->dev, "sclk"); if (IS_ERR(g3d_clock)) { printk("\n3D failed to find g3d clock source-enable\n"); return PVRSRV_ERROR_INIT_FAILURE; } EnableSGXClocks(); eError = OSInitEnvData(&gpsSysData->pvEnvSpecificData); if (eError != PVRSRV_OK) { PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to setup env structure")); SysDeinitialise(gpsSysData); gpsSysData = IMG_NULL; return eError; } #if defined(SGX540) //printk("SGX540 defined\n"); #endif //printk("SGX_CORE_REV=%d\n",SGX_CORE_REV); #if defined(SGX_FEATURE_SYSTEM_CACHE) //printk("SGX_FEATURE_SYSTEM_CACHE defined!!!!!!!!!!!!!!\n"); #if defined(FIX_HW_BRN_25659) //printk("FIX_HW_BRN_25659 defined!!!!!!!!!!!!!!\n"); #endif #endif #if defined(SGX_BYPASS_SYSTEM_CACHE) // printk("SGX_BYPASS_SYSTEM_CACHE defined!!!!!!!!!!!!!!!\n"); #endif gpsSysData->pvSysSpecificData = (IMG_PVOID)&gsSysSpecificData; OSMemSet(&gsSGXDeviceMap, 0, sizeof(SGX_DEVICE_MAP)); psTimingInfo = &gsSGXDeviceMap.sTimingInfo; psTimingInfo->ui32CoreClockSpeed = SYS_SGX_CLOCK_SPEED; psTimingInfo->ui32HWRecoveryFreq = SYS_SGX_HWRECOVERY_TIMEOUT_FREQ; psTimingInfo->ui32ActivePowManLatencyms = SYS_SGX_ACTIVE_POWER_LATENCY_MS; psTimingInfo->ui32uKernelFreq = SYS_SGX_PDS_TIMER_FREQ; #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) psTimingInfo->bEnableActivePM = IMG_TRUE; #else psTimingInfo->bEnableActivePM = IMG_FALSE; #endif gpsSysData->ui32NumDevices = SYS_DEVICE_COUNT; for(i=0; i<SYS_DEVICE_COUNT; i++) { gpsSysData->sDeviceID[i].uiID = i; gpsSysData->sDeviceID[i].bInUse = IMG_FALSE; } gpsSysData->psDeviceNodeList = IMG_NULL; gpsSysData->psQueueList = IMG_NULL; eError = SysInitialiseCommon(gpsSysData); if (eError != PVRSRV_OK) { PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed in SysInitialiseCommon")); SysDeinitialise(gpsSysData); gpsSysData = IMG_NULL; return eError; } eError = SysLocateDevices(gpsSysData); if (eError != PVRSRV_OK) { PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to locate devices")); SysDeinitialise(gpsSysData); gpsSysData = IMG_NULL; return eError; } eError = PVRSRVRegisterDevice(gpsSysData, SGXRegisterDevice, 1, &gui32SGXDeviceID); if (eError != PVRSRV_OK) { PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to register device!")); SysDeinitialise(gpsSysData); gpsSysData = IMG_NULL; return eError; } psDeviceNode = gpsSysData->psDeviceNodeList; while(psDeviceNode) { switch(psDeviceNode->sDevId.eDeviceType) { case PVRSRV_DEVICE_TYPE_SGX: { DEVICE_MEMORY_INFO *psDevMemoryInfo; DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap; IMG_UINT32 ui32MemConfig; if(gpsSysData->apsLocalDevMemArena[0] != IMG_NULL) { psDeviceNode->psLocalDevMemArena = gpsSysData->apsLocalDevMemArena[0]; ui32MemConfig = PVRSRV_BACKINGSTORE_LOCALMEM_CONTIG; } else { psDeviceNode->psLocalDevMemArena = IMG_NULL; ui32MemConfig = PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG; } psDevMemoryInfo = &psDeviceNode->sDevMemoryInfo; psDeviceMemoryHeap = psDevMemoryInfo->psDeviceMemoryHeap; for(i=0; i<psDevMemoryInfo->ui32HeapCount; i++) { #if defined(SGX_FEATURE_VARIABLE_MMU_PAGE_SIZE) IMG_CHAR *pStr; switch(psDeviceMemoryHeap[i].ui32HeapID) { case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_GENERAL_HEAP_ID): { pStr = "GeneralHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_GENERAL_MAPPING_HEAP_ID): { pStr = "GeneralMappingHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_TADATA_HEAP_ID): { pStr = "TADataHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_KERNEL_CODE_HEAP_ID): { pStr = "KernelCodeHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_KERNEL_DATA_HEAP_ID): { pStr = "KernelDataHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_PIXELSHADER_HEAP_ID): { pStr = "PixelShaderHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_VERTEXSHADER_HEAP_ID): { pStr = "VertexShaderHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_PDSPIXEL_CODEDATA_HEAP_ID): { pStr = "PDSPixelHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_PDSVERTEX_CODEDATA_HEAP_ID): { pStr = "PDSVertexHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_SYNCINFO_HEAP_ID): { pStr = "SyncInfoHeapPageSize"; break; } case HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_3DPARAMETERS_HEAP_ID): { pStr = "3DParametersHeapPageSize"; break; } default: { pStr = IMG_NULL; break; } } if (pStr && OSReadRegistryDWORDFromString(0, PVRSRV_REGISTRY_ROOT, pStr, &psDeviceMemoryHeap[i].ui32DataPageSize) == IMG_TRUE) { PVR_DPF((PVR_DBG_VERBOSE,"SysInitialise: set Heap %s page size to %d", pStr, psDeviceMemoryHeap[i].ui32DataPageSize)); } #endif psDeviceMemoryHeap[i].psLocalDevMemArena = gpsSysData->apsLocalDevMemArena[0]; psDeviceMemoryHeap[i].ui32Attribs |= ui32MemConfig; } break; } default: PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to find SGX device node!")); return PVRSRV_ERROR_INIT_FAILURE; } psDeviceNode = psDeviceNode->psNext; } PDUMPINIT(); eError = PVRSRVInitialiseDevice (gui32SGXDeviceID); if (eError != PVRSRV_OK) { PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to initialise device!")); SysDeinitialise(gpsSysData); gpsSysData = IMG_NULL; return eError; } #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) DisableSGXClocks(); #endif return PVRSRV_OK; }
static int cardhu_panel_enable_tf700t(void) { int ret; //printk("Check cardhu_panel_enable_tf700t \n"); if (gpio_get_value(TEGRA_GPIO_PI6)==0){ //Panel is Panasonic //printk("Check panel is panasonic \n"); if (cardhu_lvds_vdd_bl == NULL) { cardhu_lvds_vdd_bl = regulator_get(NULL, "vdd_backlight"); if (WARN_ON(IS_ERR(cardhu_lvds_vdd_bl))) pr_err("%s: couldn't get regulator vdd_backlight: %ld\n", __func__, PTR_ERR(cardhu_lvds_vdd_bl)); else regulator_enable(cardhu_lvds_vdd_bl); } ret = gpio_direction_output(TEGRA_GPIO_PU5, 1); if (ret < 0) { printk("Check can not pull high TEGRA_GPIO_PU5 \n"); gpio_free(TEGRA_GPIO_PU5); return ret; } } else{ //Panel is hydis //printk("Check panel is hydis \n"); gpio_set_value(TEGRA_GPIO_PH3, 0); ret = gpio_direction_output(TEGRA_GPIO_PU5, 0); if (ret < 0) { printk("Check can not pull low TEGRA_GPIO_PU5 \n"); gpio_free(TEGRA_GPIO_PU5); return ret; } } mdelay(5); if (cardhu_lvds_reg == NULL) { cardhu_lvds_reg = regulator_get(NULL, "vdd_lvds"); if (WARN_ON(IS_ERR(cardhu_lvds_reg))) pr_err("%s: couldn't get regulator vdd_lvds: %ld\n", __func__, PTR_ERR(cardhu_lvds_reg)); else regulator_enable(cardhu_lvds_reg); } if (cardhu_lvds_vdd_panel == NULL) { cardhu_lvds_vdd_panel = regulator_get(NULL, "vdd_lcd_panel"); if (WARN_ON(IS_ERR(cardhu_lvds_vdd_panel))) pr_err("%s: couldn't get regulator vdd_lcd_panel: %ld\n", __func__, PTR_ERR(cardhu_lvds_vdd_panel)); else regulator_enable(cardhu_lvds_vdd_panel); } msleep(20); //printk("Check power on/off for bridge IC \n"); ret = gpio_direction_output(TEGRA_GPIO_PBB3, 1); if (ret < 0) { printk("Check can not pull high TEGRA_GPIO_PBB3 \n"); gpio_free(TEGRA_GPIO_PBB3); return ret; } ret = gpio_direction_output(TEGRA_GPIO_PC6, 1); if (ret < 0) { printk("Check can not pull high TF700T_1.8V(TEGRA_GPIO_PC6) \n"); gpio_free(TEGRA_GPIO_PC6); return ret; } mdelay(10); ret = gpio_direction_output(TEGRA_GPIO_PX0, 1); if (ret < 0) { printk("Check can not pull high TF700T_I2C_Switch(TEGRA_GPIO_PX0) \n"); gpio_free(TEGRA_GPIO_PX0); return ret; } mdelay(10); if (display_board_info.board_id == BOARD_DISPLAY_PM313) { /* lvds configuration */ gpio_set_value(pm313_R_FDE, 1); gpio_set_value(pm313_R_FB, 1); gpio_set_value(pm313_MODE0, 1); gpio_set_value(pm313_MODE1, 0); gpio_set_value(pm313_BPP, PM313_LVDS_PANEL_BPP); /* FIXME : it may require more or less delay for latching values correctly before enabling RGB2LVDS */ mdelay(100); gpio_set_value(pm313_lvds_shutdown, 1); } else { gpio_set_value(e1247_pm269_lvds_shutdown, 1); } ret = gpio_direction_output(TEGRA_GPIO_PD2, 1); if (ret < 0) { printk("Check can not pull high TF700T_OSC(TEGRA_GPIO_PD2) \n"); gpio_free(TEGRA_GPIO_PD2); return ret; } msleep(10); return 0; }
static void mipi_dsi_panel_pwm_cfg(void) { int rc; static int mipi_dsi_panel_gpio_configured; static struct pm_gpio pwm_enable = { .direction = PM_GPIO_DIR_OUT, .output_buffer = PM_GPIO_OUT_BUF_CMOS, .output_value = 1, .pull = PM_GPIO_PULL_NO, .vin_sel = PM_GPIO_VIN_VPH, .out_strength = PM_GPIO_STRENGTH_HIGH, .function = PM_GPIO_FUNC_NORMAL, .inv_int_pol = 0, .disable_pin = 0, }; static struct pm_gpio pwm_mode = { .direction = PM_GPIO_DIR_OUT, .output_buffer = PM_GPIO_OUT_BUF_CMOS, .output_value = 0, .pull = PM_GPIO_PULL_NO, .vin_sel = PM_GPIO_VIN_S4, .out_strength = PM_GPIO_STRENGTH_HIGH, .function = PM_GPIO_FUNC_2, .inv_int_pol = 0, .disable_pin = 0, }; if (mipi_dsi_panel_gpio_configured == 0) { /* pm8xxx: gpio-21, Backlight Enable */ rc = pm8xxx_gpio_config(PM8921_GPIO_PM_TO_SYS(21), &pwm_enable); if (rc != 0) pr_err("%s: pwm_enabled failed\n", __func__); /* pm8xxx: gpio-24, Bl: Off, PWM mode */ rc = pm8xxx_gpio_config(PM8921_GPIO_PM_TO_SYS(24), &pwm_mode); if (rc != 0) pr_err("%s: pwm_mode failed\n", __func__); mipi_dsi_panel_gpio_configured++; } } #endif static bool dsi_power_on; #if (defined(CONFIG_FB_MSM_MIPI_HITACHI_DX11D_VIDEO_HD_PT_PANEL) \ || defined(CONFIG_FB_MSM_MIPI_HITACHI_DX12D_VIDEO_HD_PT_PANEL)) static int mipi_dsi_panel_power(int on) { static struct regulator *reg_l8, *reg_l2, *reg_lvs6; static int gpio43; int rc; struct pm_gpio gpio43_param = { .direction = PM_GPIO_DIR_OUT, .output_buffer = PM_GPIO_OUT_BUF_CMOS, .output_value = 0, .pull = PM_GPIO_PULL_NO, .vin_sel = 2, .out_strength = PM_GPIO_STRENGTH_HIGH, .function = PM_GPIO_FUNC_PAIRED, .inv_int_pol = 0, .disable_pin = 0, }; pr_debug("%s: state : %d\n", __func__, on); if (!dsi_power_on) { reg_l8 = regulator_get(&msm_mipi_dsi1_device.dev, "dsi_vdc"); if (IS_ERR(reg_l8)) { pr_err("could not get 8921_l8, rc = %ld\n", PTR_ERR(reg_l8)); return -ENODEV; } reg_lvs6 = regulator_get(&msm_mipi_dsi1_device.dev, "8921_lvs6"); if (IS_ERR(reg_lvs6)) { pr_err("could not get 8921_lvs6, rc = %ld\n", PTR_ERR(reg_lvs6)); return -ENODEV; } reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev, "dsi_vdda"); if (IS_ERR(reg_l2)) { pr_err("could not get 8921_l2, rc = %ld\n", PTR_ERR(reg_l2)); return -ENODEV; } rc = regulator_set_voltage(reg_l8, 3000000, 3000000); if (rc) { pr_err("set_voltage l8 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_set_voltage(reg_l2, 1200000, 1200000); if (rc) { pr_err("set_voltage l2 failed, rc=%d\n", rc); return -EINVAL; } gpio43 = PM8921_GPIO_PM_TO_SYS(43); rc = gpio_request(gpio43, "disp_rst_n"); if (rc) { pr_err("request gpio 43 failed, rc=%d\n", rc); return -ENODEV; } gpio43_param.pull = PM_GPIO_PULL_NO; rc = pm8xxx_gpio_config(gpio43, &gpio43_param); if (rc) { pr_err("gpio_config 43 failed (1), rc=%d\n", rc); return -EINVAL; } gpio43_param.pull = PM_GPIO_PULL_UP_30; rc = pm8xxx_gpio_config(gpio43, &gpio43_param); if (rc) { pr_err("gpio_config 43 failed (2), rc=%d\n", rc); return -EINVAL; } gpio43_param.pull = PM_GPIO_PULL_NO; rc = pm8xxx_gpio_config(gpio43, &gpio43_param); if (rc) { pr_err("gpio_config 43 failed (3), rc=%d\n", rc); return -EINVAL; } gpio43_param.pull = PM_GPIO_PULL_UP_30; rc = pm8xxx_gpio_config(gpio43, &gpio43_param); if (rc) { pr_err("gpio_config 43 failed (4), rc=%d\n", rc); return -EINVAL; } dsi_power_on = true; } if (on) { rc = regulator_set_optimum_mode(reg_l8, 100000); if (rc < 0) { pr_err("set_optimum_mode l8 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_set_optimum_mode(reg_l2, 100000); if (rc < 0) { pr_err("set_optimum_mode l2 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_enable(reg_lvs6); if (rc) { pr_err("enable lvs6 failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_enable(reg_l8); if (rc) { pr_err("enable l8 failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_enable(reg_l2); if (rc) { pr_err("enable l2 failed, rc=%d\n", rc); return -ENODEV; } mdelay(1); gpio_set_value_cansleep(gpio43, 1); mdelay(5); } else { gpio_set_value_cansleep(gpio43, 0); rc = regulator_disable(reg_l8); if (rc) { pr_err("disable reg_l8 failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_disable(reg_lvs6); if (rc) { pr_err("disable reg_lvs6 failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_disable(reg_l2); if (rc) { pr_err("enable l2 failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_set_optimum_mode(reg_l8, 100); if (rc < 0) { pr_err("set_optimum_mode l8 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_set_optimum_mode(reg_l2, 100); if (rc < 0) { pr_err("set_optimum_mode l2 failed, rc=%d\n", rc); return -EINVAL; } } return 0; } #elif defined(CONFIG_FB_MSM_MIPI_HITACHI_VIDEO_WVGA_PT) static int mipi_dsi_panel_power(int on) { static struct regulator *reg_l8, *reg_l29, *reg_l2; static int gpio43; int rc; struct pm_gpio gpio43_param = { .direction = PM_GPIO_DIR_OUT, .output_buffer = PM_GPIO_OUT_BUF_CMOS, .output_value = 0, .pull = PM_GPIO_PULL_NO, .vin_sel = 2, .out_strength = PM_GPIO_STRENGTH_HIGH, .function = PM_GPIO_FUNC_PAIRED, .inv_int_pol = 0, .disable_pin = 0, }; pr_debug("%s: state : %d\n", __func__, on); if (!dsi_power_on) { reg_l8 = regulator_get(&msm_mipi_dsi1_device.dev, "dsi_vdc"); if (IS_ERR(reg_l8)) { pr_err("could not get 8921_l8, rc = %ld\n", PTR_ERR(reg_l8)); return -ENODEV; } reg_l29 = regulator_get(&msm_mipi_dsi1_device.dev, "8921_l29"); if (IS_ERR(reg_l29)) { pr_err("could not get 8921_l29, rc = %ld\n", PTR_ERR(reg_l29)); return -ENODEV; } reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev, "dsi_vdda"); if (IS_ERR(reg_l2)) { pr_err("could not get 8921_l2, rc = %ld\n", PTR_ERR(reg_l2)); return -ENODEV; } rc = regulator_set_voltage(reg_l8, 2800000, 2800000); if (rc) { pr_err("set_voltage l8 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_set_voltage(reg_l29, 1800000, 1800000); if (rc) { pr_err("set_voltage l29 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_set_voltage(reg_l2, 1200000, 1200000); if (rc) { pr_err("set_voltage l2 failed, rc=%d\n", rc); return -EINVAL; } gpio43 = PM8921_GPIO_PM_TO_SYS(43); rc = gpio_request(gpio43, "disp_rst_n"); if (rc) { pr_err("request gpio 43 failed, rc=%d\n", rc); return -ENODEV; } dsi_power_on = true; } if (on) { rc = regulator_set_optimum_mode(reg_l8, 100000); if (rc < 0) { pr_err("set_optimum_mode l8 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_set_optimum_mode(reg_l29, 100000); if (rc < 0) { pr_err("set_optimum_mode l29 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_set_optimum_mode(reg_l2, 100000); if (rc < 0) { pr_err("set_optimum_mode l2 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_enable(reg_l8); if (rc) { pr_err("enable l8 failed, rc=%d\n", rc); return -ENODEV; } mdelay(5); rc = regulator_enable(reg_l29); if (rc) { pr_err("enable l29 failed, rc=%d\n", rc); return -ENODEV; } mdelay(5); rc = gpio_request(LCD_VCI_EN_GPIO, "LCD_VCI_EN_GPIO"); if (rc) { pr_err("'%s'(%d) gpio_request failed, rc=%d\n", "LCD_VCI_EN_GPIO", LCD_VCI_EN_GPIO, rc); gpio_free(LCD_VCI_EN_GPIO); } rc = gpio_direction_output(LCD_VCI_EN_GPIO, 1); mdelay(5); rc = regulator_enable(reg_l2); if (rc) { pr_err("enable l2 failed, rc=%d\n", rc); return -ENODEV; } gpio43_param.pull = PM_GPIO_PULL_NO; rc = pm8xxx_gpio_config(gpio43, &gpio43_param); if (rc) { pr_err("gpio_config 43 failed (1), rc=%d\n", rc); return -EINVAL; } gpio43_param.pull = PM_GPIO_PULL_UP_30; rc = pm8xxx_gpio_config(gpio43, &gpio43_param); if (rc) { pr_err("gpio_config 43 failed (2), rc=%d\n", rc); return -EINVAL; } gpio43_param.pull = PM_GPIO_PULL_NO; rc = pm8xxx_gpio_config(gpio43, &gpio43_param); if (rc) { pr_err("gpio_config 43 failed (3), rc=%d\n", rc); return -EINVAL; } gpio43_param.pull = PM_GPIO_PULL_UP_30; rc = pm8xxx_gpio_config(gpio43, &gpio43_param); if (rc) { pr_err("gpio_config 43 failed (4), rc=%d\n", rc); return -EINVAL; } gpio_set_value_cansleep(gpio43, 1); mdelay(50); gpio_set_value_cansleep(gpio43, 0); mdelay(20); gpio_set_value_cansleep(gpio43, 1); mdelay(50); } else { rc = regulator_set_optimum_mode(reg_l8, 100); if (rc < 0) { pr_err("set_optimum_mode l8 failed, rc=%d\n", rc); return -EINVAL; } rc = gpio_direction_output(LCD_VCI_EN_GPIO, 0); gpio_free(LCD_VCI_EN_GPIO); rc = regulator_set_optimum_mode(reg_l29, 100); if (rc < 0) { pr_err("set_optimum_mode l29 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_set_optimum_mode(reg_l2, 100); if (rc < 0) { pr_err("set_optimum_mode l2 failed, rc=%d\n", rc); return -EINVAL; } gpio_set_value_cansleep(gpio43, 0); } return 0; } #endif static struct mipi_dsi_platform_data mipi_dsi_pdata = { .vsync_gpio = MDP_VSYNC_GPIO, .dsi_power_save = mipi_dsi_panel_power, }; #ifdef CONFIG_MSM_BUS_SCALING static struct msm_bus_vectors rotator_init_vectors[] = { { .src = MSM_BUS_MASTER_ROTATOR, .dst = MSM_BUS_SLAVE_EBI_CH0, .ab = 0, .ib = 0, }, }; static struct msm_bus_vectors rotator_ui_vectors[] = { { .src = MSM_BUS_MASTER_ROTATOR, .dst = MSM_BUS_SLAVE_EBI_CH0, .ab = (1024 * 600 * 4 * 2 * 60), .ib = (1024 * 600 * 4 * 2 * 60 * 1.5), }, }; static struct msm_bus_vectors rotator_vga_vectors[] = { { .src = MSM_BUS_MASTER_ROTATOR, .dst = MSM_BUS_SLAVE_EBI_CH0, .ab = (640 * 480 * 2 * 2 * 30), .ib = (640 * 480 * 2 * 2 * 30 * 1.5), }, }; static struct msm_bus_vectors rotator_720p_vectors[] = { { .src = MSM_BUS_MASTER_ROTATOR, .dst = MSM_BUS_SLAVE_EBI_CH0, .ab = (1280 * 736 * 2 * 2 * 30), .ib = (1280 * 736 * 2 * 2 * 30 * 1.5), }, };
static mali_bool init_mali_clock(void) { mali_bool ret = MALI_TRUE; gpu_power_state = 0; if (mali_clock != 0) return ret; // already initialized mali_dvfs_lock = _mali_osk_lock_init(_MALI_OSK_LOCKFLAG_NONINTERRUPTABLE | _MALI_OSK_LOCKFLAG_ONELOCK, 0, 0); if (mali_dvfs_lock == NULL) return _MALI_OSK_ERR_FAULT; if (mali_clk_set_rate(mali_gpu_clk, GPU_MHZ) == MALI_FALSE) { ret = MALI_FALSE; goto err_clock_get; } MALI_PRINT(("init_mali_clock mali_clock %p \n", mali_clock)); #ifdef CONFIG_REGULATOR #if USING_MALI_PMM g3d_regulator = regulator_get(&mali_gpu_device.dev, "vdd_g3d"); #else g3d_regulator = regulator_get(NULL, "vdd_g3d"); #endif if (IS_ERR(g3d_regulator)) { MALI_PRINT( ("MALI Error : failed to get vdd_g3d\n")); ret = MALI_FALSE; goto err_regulator; } regulator_enable(g3d_regulator); MALI_DEBUG_PRINT(1, ("= regulator_enable -> use cnt: %d \n",mali_regulator_get_usecount())); mali_regulator_set_voltage(mali_gpu_vol, mali_gpu_vol); #endif MALI_DEBUG_PRINT(2, ("MALI Clock is set at mali driver\n")); MALI_DEBUG_PRINT(3,("::clk_put:: %s mali_parent_clock - normal\n", __FUNCTION__)); MALI_DEBUG_PRINT(3,("::clk_put:: %s mpll_clock - normal\n", __FUNCTION__)); mali_clk_put(MALI_FALSE); return MALI_TRUE; #ifdef CONFIG_REGULATOR err_regulator: regulator_put(g3d_regulator); #endif err_clock_get: mali_clk_put(MALI_TRUE); return ret; }
static int tegra_camera_probe(struct platform_device *pdev) { int err; struct tegra_camera_dev *dev; dev_info(&pdev->dev, "%s\n", __func__); dev = devm_kzalloc(&pdev->dev, sizeof(struct tegra_camera_dev), GFP_KERNEL); if (!dev) { err = -ENOMEM; dev_err(&pdev->dev, "%s: unable to allocate memory\n", __func__); goto alloc_err; } #if defined(CONFIG_ARCH_ACER_T20) t20_dev = dev; #elif defined(CONFIG_ARCH_ACER_T30) t30_dev = dev; #endif mutex_init(&dev->tegra_camera_lock); /* Powergate VE when boot */ mutex_lock(&dev->tegra_camera_lock); dev->power_refcnt = 0; #ifndef CONFIG_ARCH_TEGRA_2x_SOC err = tegra_powergate_partition(TEGRA_POWERGATE_VENC); if (err) dev_err(&pdev->dev, "%s: powergate failed.\n", __func__); #endif mutex_unlock(&dev->tegra_camera_lock); dev->dev = &pdev->dev; /* Get regulator pointer */ #ifdef CONFIG_ARCH_TEGRA_2x_SOC dev->reg = regulator_get(&pdev->dev, "vcsi"); #else dev->reg = regulator_get(&pdev->dev, "avdd_dsi_csi"); #endif if (IS_ERR_OR_NULL(dev->reg)) { dev_err(&pdev->dev, "%s: couldn't get regulator\n", __func__); return PTR_ERR(dev->reg); } dev->misc_dev.minor = MISC_DYNAMIC_MINOR; dev->misc_dev.name = TEGRA_CAMERA_NAME; dev->misc_dev.fops = &tegra_camera_fops; dev->misc_dev.parent = &pdev->dev; err = misc_register(&dev->misc_dev); if (err) { dev_err(&pdev->dev, "%s: Unable to register misc device!\n", TEGRA_CAMERA_NAME); goto misc_register_err; } err = tegra_camera_clk_get(pdev, "isp", &dev->isp_clk); if (err) goto misc_register_err; err = tegra_camera_clk_get(pdev, "vi", &dev->vi_clk); if (err) goto vi_clk_get_err; err = tegra_camera_clk_get(pdev, "vi_sensor", &dev->vi_sensor_clk); if (err) goto vi_sensor_clk_get_err; err = tegra_camera_clk_get(pdev, "csus", &dev->csus_clk); if (err) goto csus_clk_get_err; err = tegra_camera_clk_get(pdev, "csi", &dev->csi_clk); if (err) goto csi_clk_get_err; /* dev is set in order to restore in _remove */ platform_set_drvdata(pdev, dev); return 0; csi_clk_get_err: clk_put(dev->csus_clk); csus_clk_get_err: clk_put(dev->vi_sensor_clk); vi_sensor_clk_get_err: clk_put(dev->vi_clk); vi_clk_get_err: clk_put(dev->isp_clk); misc_register_err: regulator_put(dev->reg); alloc_err: return err; }
static int qpnp_flash_led_parse_each_led_dt(struct qpnp_flash_led *led, struct flash_node_data *flash_node) { const char *temp_string; struct device_node *node = flash_node->cdev.dev->of_node; int rc = 0; u32 val; rc = of_property_read_string(node, "label", &temp_string); if (!rc) { if (strcmp(temp_string, "flash") == 0) flash_node->type = FLASH; else if (strcmp(temp_string, "torch") == 0) flash_node->type = TORCH; else { dev_err(&led->spmi_dev->dev, "Wrong flash LED type\n"); return -EINVAL; } } else if (rc < 0) { dev_err(&led->spmi_dev->dev, "Unable to read flash type\n"); return rc; } rc = of_property_read_u32(node, "qcom,current", &val); if (!rc) { if (val < FLASH_LED_MIN_CURRENT_MA) val = FLASH_LED_MIN_CURRENT_MA; flash_node->prgm_current = (u16)val; } else if (rc != -EINVAL) { dev_err(&led->spmi_dev->dev, "Unable to read current settings\n"); return rc; } rc = of_property_read_u32(node, "qcom,duration", &val); if (!rc) flash_node->duration = (u16)val; else if (rc != -EINVAL) { dev_err(&led->spmi_dev->dev, "Unable to read clamp current\n"); return rc; } rc = of_property_read_u32(node, "qcom,id", &val); if (!rc) flash_node->id = (u8)val; else if (rc != -EINVAL) { dev_err(&led->spmi_dev->dev, "Unable to read led ID\n"); return rc; } switch (led->peripheral_type) { case FLASH_SUBTYPE_SINGLE: flash_node->current_addr = FLASH_LED0_CURRENT(led->base); flash_node->enable = FLASH_LED0_ENABLEMENT; flash_node->trigger = FLASH_LED0_TRIGGER; break; case FLASH_SUBTYPE_DUAL: if (flash_node->id == FLASH_LED_0) { flash_node->enable = FLASH_LED0_ENABLEMENT; if (flash_node->type == TORCH) flash_node->enable = FLASH_MODULE_ENABLE; flash_node->current_addr = FLASH_LED0_CURRENT(led->base); flash_node->trigger = FLASH_LED0_TRIGGER; } else if (flash_node->id == FLASH_LED_1) { flash_node->enable = FLASH_LED1_ENABLEMENT; if (flash_node->type == TORCH) flash_node->enable = FLASH_MODULE_ENABLE; flash_node->current_addr = FLASH_LED1_CURRENT(led->base); flash_node->trigger = FLASH_LED1_TRIGGER; } break; default: dev_err(&led->spmi_dev->dev, "Invalid peripheral type\n"); } if (of_find_property(node, "boost-supply", NULL)) { INIT_DELAYED_WORK(&flash_node->dwork, qpnp_flash_led_delayed_reg_work); flash_node->boost_regulator = regulator_get(flash_node->cdev.dev, "boost"); if (!flash_node->boost_regulator || IS_ERR(flash_node->boost_regulator)) schedule_delayed_work(&flash_node->dwork, FLASH_BOOST_REGULATOR_PROBE_DELAY_MS); rc = of_property_read_u32(node, "boost-voltage-max", &val); if (!rc) flash_node->boost_voltage_max = val; else { dev_err(&led->spmi_dev->dev, "Unable to read maximum boost regulator voltage\n"); goto error_regulator_config; } } return rc; error_regulator_config: regulator_put(flash_node->boost_regulator); return rc; }
static void mipi_dsi_panel_pwm_cfg(void) { int rc; static int mipi_dsi_panel_gpio_configured; static struct pm_gpio pwm_enable = { .direction = PM_GPIO_DIR_OUT, .output_buffer = PM_GPIO_OUT_BUF_CMOS, .output_value = 1, .pull = PM_GPIO_PULL_NO, .vin_sel = PM_GPIO_VIN_VPH, .out_strength = PM_GPIO_STRENGTH_HIGH, .function = PM_GPIO_FUNC_NORMAL, .inv_int_pol = 0, .disable_pin = 0, }; static struct pm_gpio pwm_mode = { .direction = PM_GPIO_DIR_OUT, .output_buffer = PM_GPIO_OUT_BUF_CMOS, .output_value = 0, .pull = PM_GPIO_PULL_NO, .vin_sel = PM_GPIO_VIN_S4, .out_strength = PM_GPIO_STRENGTH_HIGH, .function = PM_GPIO_FUNC_2, .inv_int_pol = 0, .disable_pin = 0, }; if (mipi_dsi_panel_gpio_configured == 0) { /* pm8xxx: gpio-21, Backlight Enable */ rc = pm8xxx_gpio_config(PM8921_GPIO_PM_TO_SYS(21), &pwm_enable); if (rc != 0) pr_err("%s: pwm_enabled failed\n", __func__); /* pm8xxx: gpio-24, Bl: Off, PWM mode */ rc = pm8xxx_gpio_config(PM8921_GPIO_PM_TO_SYS(24), &pwm_mode); if (rc != 0) pr_err("%s: pwm_mode failed\n", __func__); mipi_dsi_panel_gpio_configured++; } } static bool dsi_power_on; /** * LiQUID panel on/off * * @param on * * @return int */ static int mipi_dsi_liquid_panel_power(int on) { static struct regulator *reg_l2, *reg_ext_3p3v; static int gpio21, gpio24, gpio43; int rc; mipi_dsi_panel_pwm_cfg(); pr_debug("%s: on=%d\n", __func__, on); gpio21 = PM8921_GPIO_PM_TO_SYS(21); /* disp power enable_n */ gpio43 = PM8921_GPIO_PM_TO_SYS(43); /* Displays Enable (rst_n)*/ gpio24 = PM8921_GPIO_PM_TO_SYS(24); /* Backlight PWM */ if (!dsi_power_on) { reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev, "dsi_vdda"); if (IS_ERR(reg_l2)) { pr_err("could not get 8921_l2, rc = %ld\n", PTR_ERR(reg_l2)); return -ENODEV; } rc = regulator_set_voltage(reg_l2, 1200000, 1200000); if (rc) { pr_err("set_voltage l2 failed, rc=%d\n", rc); return -EINVAL; } reg_ext_3p3v = regulator_get(&msm_mipi_dsi1_device.dev, "vdd_lvds_3p3v"); if (IS_ERR(reg_ext_3p3v)) { pr_err("could not get reg_ext_3p3v, rc = %ld\n", PTR_ERR(reg_ext_3p3v)); return -ENODEV; } rc = gpio_request(gpio21, "disp_pwr_en_n"); if (rc) { pr_err("request gpio 21 failed, rc=%d\n", rc); return -ENODEV; } rc = gpio_request(gpio43, "disp_rst_n"); if (rc) { pr_err("request gpio 43 failed, rc=%d\n", rc); return -ENODEV; } rc = gpio_request(gpio24, "disp_backlight_pwm"); if (rc) { pr_err("request gpio 24 failed, rc=%d\n", rc); return -ENODEV; } dsi_power_on = true; } if (on) { rc = regulator_set_optimum_mode(reg_l2, 100000); if (rc < 0) { pr_err("set_optimum_mode l2 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_enable(reg_l2); if (rc) { pr_err("enable l2 failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_enable(reg_ext_3p3v); if (rc) { pr_err("enable reg_ext_3p3v failed, rc=%d\n", rc); return -ENODEV; } /* set reset pin before power enable */ gpio_set_value_cansleep(gpio43, 0); /* disp disable (resx=0) */ gpio_set_value_cansleep(gpio21, 0); /* disp power enable_n */ msleep(20); gpio_set_value_cansleep(gpio43, 1); /* disp enable */ msleep(20); gpio_set_value_cansleep(gpio43, 0); /* disp enable */ msleep(20); gpio_set_value_cansleep(gpio43, 1); /* disp enable */ msleep(20); } else { gpio_set_value_cansleep(gpio43, 0); gpio_set_value_cansleep(gpio21, 1); rc = regulator_disable(reg_l2); if (rc) { pr_err("disable reg_l2 failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_disable(reg_ext_3p3v); if (rc) { pr_err("disable reg_ext_3p3v failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_set_optimum_mode(reg_l2, 100); if (rc < 0) { pr_err("set_optimum_mode l2 failed, rc=%d\n", rc); return -EINVAL; } } return 0; } static int mipi_dsi_cdp_panel_power(int on) { static struct regulator *reg_l8, *reg_l23, *reg_l2; static int gpio43; int rc; pr_debug("%s: state : %d\n", __func__, on); if (!dsi_power_on) { reg_l8 = regulator_get(&msm_mipi_dsi1_device.dev, "dsi_vdc"); if (IS_ERR(reg_l8)) { pr_err("could not get 8921_l8, rc = %ld\n", PTR_ERR(reg_l8)); return -ENODEV; } reg_l23 = regulator_get(&msm_mipi_dsi1_device.dev, "dsi_vddio"); if (IS_ERR(reg_l23)) { pr_err("could not get 8921_l23, rc = %ld\n", PTR_ERR(reg_l23)); return -ENODEV; } reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev, "dsi_vdda"); if (IS_ERR(reg_l2)) { pr_err("could not get 8921_l2, rc = %ld\n", PTR_ERR(reg_l2)); return -ENODEV; } rc = regulator_set_voltage(reg_l8, 2800000, 3000000); if (rc) { pr_err("set_voltage l8 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_set_voltage(reg_l23, 1800000, 1800000); if (rc) { pr_err("set_voltage l23 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_set_voltage(reg_l2, 1200000, 1200000); if (rc) { pr_err("set_voltage l2 failed, rc=%d\n", rc); return -EINVAL; } gpio43 = PM8921_GPIO_PM_TO_SYS(43); rc = gpio_request(gpio43, "disp_rst_n"); if (rc) { pr_err("request gpio 43 failed, rc=%d\n", rc); return -ENODEV; } dsi_power_on = true; } if (on) { rc = regulator_set_optimum_mode(reg_l8, 100000); if (rc < 0) { pr_err("set_optimum_mode l8 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_set_optimum_mode(reg_l23, 100000); if (rc < 0) { pr_err("set_optimum_mode l23 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_set_optimum_mode(reg_l2, 100000); if (rc < 0) { pr_err("set_optimum_mode l2 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_enable(reg_l8); if (rc) { pr_err("enable l8 failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_enable(reg_l23); if (rc) { pr_err("enable l8 failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_enable(reg_l2); if (rc) { pr_err("enable l2 failed, rc=%d\n", rc); return -ENODEV; } gpio_set_value_cansleep(gpio43, 1); } else { rc = regulator_disable(reg_l2); if (rc) { pr_err("disable reg_l2 failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_disable(reg_l8); if (rc) { pr_err("disable reg_l8 failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_disable(reg_l23); if (rc) { pr_err("disable reg_l23 failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_set_optimum_mode(reg_l8, 100); if (rc < 0) { pr_err("set_optimum_mode l8 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_set_optimum_mode(reg_l23, 100); if (rc < 0) { pr_err("set_optimum_mode l23 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_set_optimum_mode(reg_l2, 100); if (rc < 0) { pr_err("set_optimum_mode l2 failed, rc=%d\n", rc); return -EINVAL; } gpio_set_value_cansleep(gpio43, 0); } return 0; } static char mipi_dsi_splash_is_enabled(void); static int mipi_dsi_panel_power(int on) { int ret; pr_debug("%s: on=%d\n", __func__, on); if (machine_is_msm8960_liquid()) ret = mipi_dsi_liquid_panel_power(on); else ret = mipi_dsi_cdp_panel_power(on); return ret; } static struct mipi_dsi_platform_data mipi_dsi_pdata = { .vsync_gpio = MDP_VSYNC_GPIO, .dsi_power_save = mipi_dsi_panel_power, .splash_is_enabled = mipi_dsi_splash_is_enabled, }; #ifdef CONFIG_MSM_BUS_SCALING static struct msm_bus_vectors mdp_init_vectors[] = { { .src = MSM_BUS_MASTER_MDP_PORT0, .dst = MSM_BUS_SLAVE_EBI_CH0, .ab = 0, .ib = 0, }, };
struct tegra_usb_phy *tegra_usb_phy_open(struct platform_device *pdev) { struct tegra_usb_phy *phy; struct tegra_usb_platform_data *pdata; struct resource *res; int err; int plat_data_size = sizeof(struct tegra_usb_platform_data); DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, pdev->id); pdata = dev_get_platdata(&pdev->dev); if (!pdata) { dev_err(&pdev->dev, "inst:[%d] Platform data missing\n", pdev->id); err = -EINVAL; goto fail_inval; } phy = devm_kzalloc(&pdev->dev, sizeof(struct tegra_usb_phy), GFP_KERNEL); if (!phy) { ERR("inst:[%d] malloc usb phy failed\n", pdev->id); err = -ENOMEM; goto fail_nomem; } phy->pdata = devm_kzalloc(&pdev->dev, plat_data_size, GFP_KERNEL); if (!phy->pdata) { ERR("inst:[%d] malloc usb phy pdata failed\n", pdev->id); devm_kfree(&pdev->dev, phy); err = -ENOMEM; goto fail_nomem; } memcpy(phy->pdata, pdata, plat_data_size); phy->pdev = pdev; phy->inst = pdev->id; print_usb_plat_data_info(phy); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { ERR("inst:[%d] failed to get I/O memory\n", phy->inst); err = -ENXIO; goto fail_io; } phy->regs = ioremap(res->start, resource_size(res)); if (!phy->regs) { ERR("inst:[%d] Failed to remap I/O memory\n", phy->inst); err = -ENOMEM; goto fail_io; } phy->vdd_reg = regulator_get(&pdev->dev, "avdd_usb"); if (IS_ERR_OR_NULL(phy->vdd_reg)) { ERR("inst:[%d] couldn't get regulator avdd_usb: %ld\n", phy->inst, PTR_ERR(phy->vdd_reg)); phy->vdd_reg = NULL; err = PTR_ERR(phy->vdd_reg); goto fail_io; } err = tegra_usb_phy_get_clocks(phy); if (err) { ERR("inst:[%d] Failed to init clocks\n", phy->inst); goto fail_clk; } if (phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) { if (phy->pdata->u_data.dev.vbus_pmu_irq) { err = request_threaded_irq( phy->pdata->u_data.dev.vbus_pmu_irq, NULL, usb_phy_dev_vbus_pmu_irq_thr, IRQF_SHARED, "usb_pmu_vbus_irq", phy); if (err) { ERR("inst:[%d] Failed to register IRQ\n", phy->inst); goto fail_init; } } else { clk_enable(phy->ctrlr_clk); } } else { if (phy->pdata->u_data.host.vbus_reg) { phy->vbus_reg = regulator_get(NULL, phy->pdata->u_data.host.vbus_reg); if (WARN_ON(IS_ERR_OR_NULL(phy->vbus_reg))) { ERR("failed to get regulator vdd_vbus_usb: %ld,\ instance : %d\n", PTR_ERR(phy->vbus_reg), phy->inst); err = PTR_ERR(phy->vbus_reg); goto fail_init; } } else {
static int __devinit msm_vpe_probe(struct platform_device *pdev) { int rc = 0; struct msm_cam_subdev_info sd_info; D("%s: device id = %d\n", __func__, pdev->id); vpe_ctrl = kzalloc(sizeof(struct vpe_ctrl_type), GFP_KERNEL); if (!vpe_ctrl) { pr_err("%s: not enough memory\n", __func__); return -ENOMEM; } v4l2_subdev_init(&vpe_ctrl->subdev, &msm_vpe_subdev_ops); v4l2_set_subdevdata(&vpe_ctrl->subdev, vpe_ctrl); vpe_ctrl->subdev.internal_ops = &msm_vpe_internal_ops; vpe_ctrl->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; snprintf(vpe_ctrl->subdev.name, sizeof(vpe_ctrl->subdev.name), "vpe"); platform_set_drvdata(pdev, &vpe_ctrl->subdev); media_entity_init(&vpe_ctrl->subdev.entity, 0, NULL, 0); vpe_ctrl->subdev.entity.type = MEDIA_ENT_T_V4L2_SUBDEV; vpe_ctrl->subdev.entity.group_id = VPE_DEV; vpe_ctrl->subdev.entity.name = vpe_ctrl->subdev.name; vpe_ctrl->subdev.flags |= V4L2_SUBDEV_FL_HAS_EVENTS; vpe_ctrl->vpemem = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpe"); if (!vpe_ctrl->vpemem) { pr_err("%s: no mem resource?\n", __func__); rc = -ENODEV; goto vpe_no_resource; } vpe_ctrl->vpeirq = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "vpe"); if (!vpe_ctrl->vpeirq) { pr_err("%s: no irq resource?\n", __func__); rc = -ENODEV; goto vpe_no_resource; } vpe_ctrl->vpeio = request_mem_region(vpe_ctrl->vpemem->start, resource_size(vpe_ctrl->vpemem), pdev->name); if (!vpe_ctrl->vpeio) { pr_err("%s: no valid mem region\n", __func__); rc = -EBUSY; goto vpe_no_resource; } rc = request_irq(vpe_ctrl->vpeirq->start, vpe_parse_irq, IRQF_TRIGGER_RISING, "vpe", 0); if (rc < 0) { release_mem_region(vpe_ctrl->vpemem->start, resource_size(vpe_ctrl->vpemem)); pr_err("%s: irq request fail\n", __func__); rc = -EBUSY; goto vpe_no_resource; } vpe_ctrl->fs_vpe = regulator_get(&pdev->dev, "vdd"); if (IS_ERR(vpe_ctrl->fs_vpe)) { pr_err("%s: Regulator FS_VPE get failed %ld\n", __func__, PTR_ERR(vpe_ctrl->fs_vpe)); vpe_ctrl->fs_vpe = NULL; } disable_irq(vpe_ctrl->vpeirq->start); #ifdef CONFIG_MSM_IOMMU /*get device context for IOMMU*/ vpe_ctrl->iommu_ctx_src = msm_iommu_get_ctx("vpe_src"); /*re-confirm*/ vpe_ctrl->iommu_ctx_dst = msm_iommu_get_ctx("vpe_dst"); /*re-confirm*/ if (!vpe_ctrl->iommu_ctx_src || !vpe_ctrl->iommu_ctx_dst) { release_mem_region(vpe_ctrl->vpemem->start, resource_size(vpe_ctrl->vpemem)); pr_err("%s: No iommu fw context found\n", __func__); rc = -ENODEV; goto vpe_no_resource; } #endif atomic_set(&vpe_ctrl->active, 0); vpe_ctrl->pdev = pdev; sd_info.sdev_type = VPE_DEV; sd_info.sd_index = pdev->id; sd_info.irq_num = vpe_ctrl->vpeirq->start; msm_cam_register_subdev_node(&vpe_ctrl->subdev, &sd_info); vpe_ctrl->subdev.entity.revision = vpe_ctrl->subdev.devnode->num; msm_queue_init(&vpe_ctrl->eventData_q, "ackevents"); return 0; vpe_no_resource: pr_err("%s: VPE Probe failed.\n", __func__); kfree(vpe_ctrl); return rc; }
static int cardhu_dsi_panel_enable(void) { int ret; if (cardhu_dsi_reg == NULL) { cardhu_dsi_reg = regulator_get(NULL, "avdd_dsi_csi"); if (IS_ERR_OR_NULL(cardhu_dsi_reg)) { pr_err("dsi: Could not get regulator avdd_dsi_csi\n"); cardhu_dsi_reg = NULL; return PTR_ERR(cardhu_dsi_reg); } } regulator_enable(cardhu_dsi_reg); ret = gpio_request(TEGRA_GPIO_PJ1, "DSI TE"); if (ret < 0) return ret; ret = gpio_direction_input(TEGRA_GPIO_PJ1); if (ret < 0) { gpio_free(TEGRA_GPIO_PJ1); return ret; } tegra_gpio_enable(TEGRA_GPIO_PJ1); #if DSI_PANEL_219 ret = gpio_request(TEGRA_GPIO_PH0, "ph0"); if (ret < 0) return ret; ret = gpio_direction_output(TEGRA_GPIO_PH0, 0); if (ret < 0) { gpio_free(TEGRA_GPIO_PH0); return ret; } else tegra_gpio_enable(TEGRA_GPIO_PH0); ret = gpio_request(TEGRA_GPIO_PH2, "ph2"); if (ret < 0) return ret; ret = gpio_direction_output(TEGRA_GPIO_PH2, 0); if (ret < 0) { gpio_free(TEGRA_GPIO_PH2); return ret; } else tegra_gpio_enable(TEGRA_GPIO_PH2); ret = gpio_request(TEGRA_GPIO_PU2, "pu2"); if (ret < 0) return ret; ret = gpio_direction_output(TEGRA_GPIO_PU2, 0); if (ret < 0) { gpio_free(TEGRA_GPIO_PU2); return ret; } else tegra_gpio_enable(TEGRA_GPIO_PU2); gpio_set_value(cardhu_lvds_shutdown, 1); mdelay(20); gpio_set_value(TEGRA_GPIO_PH0, 1); mdelay(10); gpio_set_value(TEGRA_GPIO_PH2, 1); mdelay(15); gpio_set_value(TEGRA_GPIO_PU2, 0); gpio_set_value(TEGRA_GPIO_PU2, 1); mdelay(10); gpio_set_value(TEGRA_GPIO_PU2, 0); mdelay(10); gpio_set_value(TEGRA_GPIO_PU2, 1); mdelay(15); #endif #if DSI_PANEL_218 printk("DSI_PANEL_218 is enabled\n"); ret = gpio_request(AVDD_LCD, "avdd_lcd"); if(ret < 0) gpio_free(AVDD_LCD); ret = gpio_direction_output(AVDD_LCD, 1); if(ret < 0) gpio_free(AVDD_LCD); else tegra_gpio_enable(AVDD_LCD); #if DSI_PANEL_RESET ret = gpio_request(TEGRA_GPIO_PD2, "pd2"); if (ret < 0){ return ret; } ret = gpio_direction_output(TEGRA_GPIO_PD2, 0); if (ret < 0) { gpio_free(TEGRA_GPIO_PD2); return ret; } else tegra_gpio_enable(TEGRA_GPIO_PD2); gpio_set_value(TEGRA_GPIO_PD2, 1); gpio_set_value(TEGRA_GPIO_PD2, 0); mdelay(2); gpio_set_value(TEGRA_GPIO_PD2, 1); mdelay(2); #endif #endif return 0; }
static int anx7808_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id) { struct anx7808_data *anx7808; struct regulator *anx7808_v10; int ret = 0; int irq=0; printk("##########anx7808_i2c_probe###################\n"); if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { DEV_ERR("%s: i2c bus does not support the anx7808\n", __func__); ret = -ENODEV; goto exit; } anx7808 = kzalloc(sizeof(struct anx7808_data), GFP_KERNEL); if (!anx7808) { DEV_ERR("%s: failed to allocate driver data\n", __func__); ret = -ENOMEM; goto exit; } anx7808->pdata = client->dev.platform_data; memcpy(&anx7808_client, &client, sizeof(client)); mutex_init(&anx7808->lock); if (!anx7808->pdata) { ret = -EINVAL; goto err0; } myDPClass = class_create(THIS_MODULE, "myDP"); if (IS_ERR(myDPClass)) { pr_info("myDP class_create failed %d\n", ret); ret = PTR_ERR(myDPClass); goto err0; } myDPClass->dev_attrs = mydp_driver_attribs; g_myDP_pDevice = device_create(myDPClass, NULL, MKDEV(g_myDP_devMajor, 0), NULL, "%s", MYDP_DEVICE_NAME); if (IS_ERR(g_myDP_pDevice)) { pr_info("myDP class_device_create failed %s %d\n", MYDP_DEVICE_NAME, ret); ret = PTR_ERR(g_myDP_pDevice); goto free_class; } ret = anx7808_init_gpio(anx7808); if (ret) { DEV_ERR("%s: failed to initialize gpio\n", __func__); goto err1; } anx7808_v10=regulator_get(NULL,"8921_l12"); if (IS_ERR(anx7808_v10)) { printk("unable to get anx7808_v10\n"); return PTR_ERR(anx7808_v10); } ret = regulator_set_voltage(anx7808_v10, 1000000, 1000000); if (ret) { printk("%s: unable to set the voltage for regulator " "anx7808_v10\n", __func__); return ret; } regulator_enable(anx7808_v10); //ASUS BSP wei lai +++ #if 1 irq = MSM_GPIO_TO_INT(anx7808->pdata->gpio_usb_id); if (irq < 0) { printk( "%s: could not get USB_ID_DETECT IRQ resource, error=%d ", __func__, irq); } ret = request_irq(irq, dp_usb_id_detect_handler, IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING , "dp usb id mode", anx7808); if (ret < 0) { printk( "%s: FACTORY USB IRQ#%d request failed with error=%d ", __func__, irq, ret); } disable_irq(irq); #endif //ASUS BSP wei lai --- INIT_DELAYED_WORK(&anx7808->work, anx7808_work_func); //ASUS BSP wei lai +++ INIT_DELAYED_WORK(&anx7808->carKitwork, anx7808_carKitwork_func); //ASUS BSP wei lai --- anx7808->workqueue = create_singlethread_workqueue("anx7808_work"); if (anx7808->workqueue == NULL) { DEV_ERR("%s: failed to create work queue\n", __func__); ret = -ENOMEM; goto err2; } //ASUS BSP wei lai +++ #ifdef CONFIG_HAS_EARLYSUSPEND register_early_suspend( &dp7808_early_suspend_desc ); #endif //ASUS BSP wei lai --- ret = anx7808_system_init(); if (ret) { DEV_ERR("%s: failed to initialize anx7808\n", __func__); goto err2; } //ASUS_BSP larry lai :for ATD test +++ g_myDP_init_status = 1; //ASUS_BSP larry lai :for ATD test --- client->irq = gpio_to_irq(anx7808->pdata->gpio_cbl_det); if (client->irq < 0) { DEV_ERR("%s : failed to get gpio irq\n", __func__); goto err3; } ret = request_threaded_irq(client->irq, NULL, anx7808_cbl_det_isr, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "anx7808_cabel_det", anx7808); if (ret < 0) { DEV_ERR("%s : failed to request irq\n", __func__); goto err3; } //wei debug irq #if 1 // ret = set_irq_wake(client->irq, 1); //ASUS Wei_Lai +++ ret = irq_set_irq_wake(client->irq, 1); //ASUS Wei_Lai --- if (ret < 0) { pr_err("%s : Request irq for cable detect" "interrupt wake set fail\n", __func__); goto err3; } #endif //wei debug irq #if 1 ret = enable_irq_wake(client->irq); if (ret < 0) { DEV_ERR("%s : Enable irq for cable detect", __func__); DEV_ERR("interrupt wake enable fail\n"); goto err3; } #endif //enable_irq(client->irq); //ASUS BSP wei lai +++ enable_irq(irq); i2c_set_clientdata(anx7808_client,anx7808); printk("########## #####anx7808_i2c_probe END###################\n"); wake_lock_init(&anx7808->slimport_lock, WAKE_LOCK_SUSPEND, "slimport_wake_lock"); if (gpio_get_value(anx7808->pdata->gpio_cbl_det) && (g_i2c_error_count==0)) { msleep(10); if(gpio_get_value(anx7808->pdata->gpio_cbl_det)==1){ wake_lock(&anx7808->slimport_lock); DEV_DBG("%s : detect cable insertion\n", __func__); queue_delayed_work(anx7808->workqueue, &anx7808->work, 1000); } } if (gpio_get_value_cansleep(anx7808 ->pdata->gpio_usb_id) ==0 ){ if(gpio_get_value_cansleep(anx7808->pdata->gpio_cbl_det) ==0){ g_otg_state=true; } } //ASUS BSP wei lai --- goto exit; err3: free_irq(client->irq, anx7808); err2: destroy_workqueue(anx7808->workqueue); err1: anx7808_free_gpio(anx7808); free_class: class_destroy(myDPClass); err0: kfree(anx7808); exit: return ret; }
void mx6_cpu_regulator_init(void) { int cpu; u32 curr_cpu = 0; unsigned int reg; #ifndef CONFIG_SMP unsigned long old_loops_per_jiffy; #endif void __iomem *gpc_base = IO_ADDRESS(GPC_BASE_ADDR); if (initialized) return; initialized = true; external_pureg = 0; /*If internal ldo actived, use internal cpu_* regulator to replace the *regulator ids from board file. If internal ldo bypassed, use the *regulator ids which defined in board file and source from extern pmic *power rails. *If you want to use ldo bypass,you should do: *1.set enable_ldo_mode=LDO_MODE_BYPASSED in your board file by default * or set in commandline from u-boot *2.set your extern pmic regulator name in your board file. */ if (enable_ldo_mode != LDO_MODE_BYPASSED) { gp_reg_id = "cpu_vddgp"; soc_reg_id = "cpu_vddsoc"; pu_reg_id = "cpu_vddgpu"; } printk(KERN_INFO "cpu regulator mode:%s\n", (enable_ldo_mode == LDO_MODE_BYPASSED) ? "ldo_bypass" : "ldo_enable"); cpu_regulator = regulator_get(NULL, gp_reg_id); if (IS_ERR(cpu_regulator)) printk(KERN_ERR "%s: failed to get cpu regulator\n", __func__); else { cpu_clk = clk_get(NULL, "cpu_clk"); if (IS_ERR(cpu_clk)) { printk(KERN_ERR "%s: failed to get cpu clock\n", __func__); } else { curr_cpu = clk_get_rate(cpu_clk); cpu_op_tbl = get_cpu_op(&cpu_op_nr); soc_regulator = regulator_get(NULL, soc_reg_id); if (IS_ERR(soc_regulator)) printk(KERN_ERR "%s: failed to get soc regulator\n", __func__); else /* set soc to highest setpoint voltage. */ regulator_set_voltage(soc_regulator, cpu_op_tbl[0].soc_voltage, cpu_op_tbl[0].soc_voltage); pu_regulator = regulator_get(NULL, pu_reg_id); if (IS_ERR(pu_regulator)) printk(KERN_ERR "%s: failed to get pu regulator\n", __func__); else /* set pu to higheset setpoint voltage. */ regulator_set_voltage(pu_regulator, cpu_op_tbl[0].pu_voltage, cpu_op_tbl[0].pu_voltage); /* set the core to higheset setpoint voltage. */ regulator_set_voltage(cpu_regulator, cpu_op_tbl[0].cpu_voltage, cpu_op_tbl[0].cpu_voltage); if (enable_ldo_mode == LDO_MODE_BYPASSED) { /* digital bypass VDDPU/VDDSOC/VDDARM */ reg = __raw_readl(ANADIG_REG_CORE); reg &= ~BM_ANADIG_REG_CORE_REG0_TRG; reg |= BF_ANADIG_REG_CORE_REG0_TRG(0x1f); reg &= ~BM_ANADIG_REG_CORE_REG1_TRG; reg |= BF_ANADIG_REG_CORE_REG1_TRG(0x1f); reg &= ~BM_ANADIG_REG_CORE_REG2_TRG; reg |= BF_ANADIG_REG_CORE_REG2_TRG(0x1f); __raw_writel(reg, ANADIG_REG_CORE); /* mask the ANATOP brown out irq in the GPC. */ reg = __raw_readl(gpc_base + 0x14); reg |= 0x80000000; __raw_writel(reg, gpc_base + 0x14); } clk_set_rate(cpu_clk, cpu_op_tbl[0].cpu_rate); /* fix loops-per-jiffy */ #ifdef CONFIG_SMP for_each_online_cpu(cpu) per_cpu(cpu_data, cpu).loops_per_jiffy = mx6_cpu_jiffies( per_cpu(cpu_data, cpu).loops_per_jiffy, curr_cpu / 1000, clk_get_rate(cpu_clk) / 1000); #else old_loops_per_jiffy = loops_per_jiffy; loops_per_jiffy = mx6_cpu_jiffies(old_loops_per_jiffy, curr_cpu/1000, clk_get_rate(cpu_clk) / 1000); #endif #if defined(CONFIG_CPU_FREQ) /* Fix CPU frequency for CPUFREQ. */ for (cpu = 0; cpu < num_online_cpus(); cpu++) cpufreq_get(cpu); #endif } } /* * if use ldo bypass and VDDPU_IN is single supplied * by external pmic, it means VDDPU_IN can be turned off * if GPU/VPU driver not running.In this case we should set * external_pureg which can be used in pu_enable/pu_disable of * arch/arm/mach-mx6/mx6_anatop_regulator.c to * enable or disable external VDDPU regulator from pmic. But for FSL * reference boards, VDDSOC_IN connect with VDDPU_IN, so we didn't set * pu_reg_id to the external pmic regulator supply name in the board * file. In this case external_pureg should be 0 and can't turn off * extern pmic regulator, but can turn off VDDPU by internal anatop * power gate. * * if enable internal ldo , external_pureg will be 0, and * VDDPU can be turned off by internal anatop anatop power gate. * */ if (!IS_ERR(pu_regulator) && strcmp(pu_reg_id, "cpu_vddgpu")) external_pureg = 1; }
static int ov5640_power_on(void) { int ret; printk("ov5640_power_on+\n"); if (!reg_cardhu_1v8_cam) { reg_cardhu_1v8_cam = regulator_get(NULL, "vdd_1v8_cam1"); if (IS_ERR_OR_NULL(reg_cardhu_1v8_cam)) { pr_err("TF201_m6mo_power_on PBB4: vdd_1v8_cam1 failed\n"); reg_cardhu_1v8_cam = NULL; return PTR_ERR(reg_cardhu_1v8_cam); } regulator_set_voltage(reg_cardhu_1v8_cam, 1800000, 1800000); regulator_enable(reg_cardhu_1v8_cam); } //VDD_CAM1_ldo pr_info("gpio %d read as %d\n",CAM1_LDO_EN_GPIO, gpio_get_value(CAM1_LDO_EN_GPIO)); tegra_gpio_enable(CAM1_LDO_EN_GPIO); ret = gpio_request(CAM1_LDO_EN_GPIO, "cam1_ldo_en"); if (ret < 0) pr_err("%s: gpio_request failed for gpio %s\n", __func__, "CAM1_LDO_EN_GPIO"); gpio_direction_output(CAM1_LDO_EN_GPIO, 1); pr_info("gpio %d set to %d\n",CAM1_LDO_EN_GPIO, gpio_get_value(CAM1_LDO_EN_GPIO)); /* CAM VCM controlled by CAM2/3_LDO_EN(GPIO_PS0)*/ if (!reg_cardhu_2v85_cam) { reg_cardhu_2v85_cam = regulator_get(NULL, "vdd_cam3"); if (IS_ERR_OR_NULL(reg_cardhu_2v85_cam)) { reg_cardhu_2v85_cam = NULL; pr_err("Can't get reg_cardhu_2v85_cam.\n"); // goto fail_to_get_reg; } regulator_set_voltage(reg_cardhu_2v85_cam, 2850000, 2850000); regulator_enable(reg_cardhu_2v85_cam); } if (!reg_cardhu_cam) { reg_cardhu_cam = regulator_get(NULL, "avdd_dsi_csi"); if (IS_ERR_OR_NULL(reg_cardhu_cam)) { pr_err("TF201_m6mo_power_on LDO6: p_tegra_cam failed\n"); reg_cardhu_cam = NULL; return PTR_ERR(reg_cardhu_cam); } regulator_set_voltage(reg_cardhu_cam, 1200000, 1200000); regulator_enable(reg_cardhu_cam); } /* cam_power_en, powdn*/ tegra_gpio_enable(OV5640_PWR_DN_GPIO); ret = gpio_request(OV5640_PWR_DN_GPIO, "cam1_power_dwn"); if(ret == -EBUSY) printk("%s: gpio %s has been requested?\n", __func__, "OV5640_PWR_DN_GPIO"); else if (ret < 0) { pr_err("%s: gpio_request failed for gpio %s, ret= %d\n", __func__, "OV5640_PWR_DN_GPIO", ret); // goto fail_to_request_gpio; } pr_info("gpio %d: %d",OV5640_PWR_DN_GPIO, gpio_get_value(OV5640_PWR_DN_GPIO)); gpio_set_value(OV5640_PWR_DN_GPIO, 0); gpio_direction_output(OV5640_PWR_DN_GPIO, 0); pr_info("--> %d\n", gpio_get_value(OV5640_PWR_DN_GPIO)); /* cam_af_powdn*/ tegra_gpio_enable(OV5640_AF_PWR_DN_GPIO); ret = gpio_request(OV5640_AF_PWR_DN_GPIO, "cam1_af_power_dwn"); if(ret == -EBUSY) printk("%s: gpio %s has been requested?\n", __func__, "OV5640_AF_PWR_DN_GPIO"); else if (ret < 0) { pr_err("%s: gpio_request failed for gpio %s, ret= %d\n", __func__, "OV5640_AF_PWR_DN_GPIO", ret); // goto fail_to_request_gpio; } pr_info("gpio %d: %d",OV5640_AF_PWR_DN_GPIO, gpio_get_value(OV5640_AF_PWR_DN_GPIO)); gpio_set_value(OV5640_AF_PWR_DN_GPIO, 0); gpio_direction_output(OV5640_AF_PWR_DN_GPIO, 0); pr_info("--> %d\n", gpio_get_value(OV5640_AF_PWR_DN_GPIO)); /* yuv_sensor_rst_lo*/ tegra_gpio_enable(OV5640_RST_GPIO); ret = gpio_request(OV5640_RST_GPIO, "cam_sensor_rst_lo"); if(ret == -EBUSY) printk("%s: gpio %s has been requested?\n", __func__, "OV5640_RST_GPIO"); else if (ret < 0) { pr_err("%s: gpio_request failed for gpio %s, ret= %d\n", __func__, "OV5640_RST_GPIO", ret); // goto fail_to_request_gpio; } pr_info("gpio %d: %d", OV5640_RST_GPIO, gpio_get_value(OV5640_RST_GPIO)); gpio_set_value(OV5640_RST_GPIO, 1); gpio_direction_output(OV5640_RST_GPIO, 1); pr_info("--> %d\n", gpio_get_value(OV5640_RST_GPIO)); return 0; fail_to_get_reg: if (reg_cardhu_2v85_cam) { regulator_put(reg_cardhu_2v85_cam); reg_cardhu_2v85_cam = NULL; } if (reg_cardhu_1v8_cam) { regulator_put(reg_cardhu_1v8_cam); reg_cardhu_1v8_cam = NULL; } printk("yuv_front_sensor_power_on- : -ENODEV\n"); return -ENODEV; }
/** * vos_chip_power_qrf8615() - WLAN Power Up Seq for WCN1314 rev 2.0 on QRF 8615 * @on - Turn WLAN ON/OFF (1 or 0) * * Power up/down WLAN by turning on/off various regs and asserting/deasserting * Power-on-reset pin. Also, put XO A0 buffer as slave to wlan_clk_pwr_req while * turning ON WLAN and vice-versa. * * This function returns 0 on success or a non-zero value on failure. */ int vos_chip_power_qrf8615(int on) { static char wlan_on; static const char *vregs_qwlan_name[] = { "8058_l20", "8058_l8", "8901_s4", "8901_lvs1", "8901_l0", "8058_s2", "8058_s1", }; static const char *vregs_qwlan_pc_name[] = { "8058_l20_pc", "8058_l8_pc", NULL, NULL, "8901_l0_pc", "8058_s2_pc", NULL, }; static const int vregs_qwlan_val_min[] = { 1800000, 3050000, 1225000, 0, 1200000, 1300000, 500000, }; static const int vregs_qwlan_val_max[] = { 1800000, 3050000, 1225000, 0, 1200000, 1300000, 1250000, }; static const int vregs_qwlan_peek_current[] = { 4000, 150000, 60000, 0, 32000, 130000, 0, }; static const bool vregs_is_pin_controlled_default[] = { 1, 1, 0, 0, 1, 1, 0, }; static const bool vregs_is_pin_controlled_dragon[] = { 0, 0, 0, 0, 0, 1, 0, }; bool const *vregs_is_pin_controlled; static struct regulator *vregs_qwlan[ARRAY_SIZE(vregs_qwlan_name)]; static struct regulator *vregs_pc_qwlan[ARRAY_SIZE(vregs_qwlan_name)]; static struct msm_xo_voter *wlan_clock; int ret, i, rc = 0; unsigned wlan_gpio_deep_sleep = GPIO_WLAN_DEEP_SLEEP_N; vregs_is_pin_controlled = vregs_is_pin_controlled_default; if (machine_is_msm8x60_dragon()) { wlan_gpio_deep_sleep = GPIO_WLAN_DEEP_SLEEP_N_DRAGON; vregs_is_pin_controlled = vregs_is_pin_controlled_dragon; } /* WLAN RESET and CLK settings */ if (on && !wlan_on) { /* * Program U12 GPIO expander pin IO1 to de-assert (drive 0) * WLAN_EXT_POR_N to put WLAN in reset */ rc = gpio_request(wlan_gpio_deep_sleep, "WLAN_DEEP_SLEEP_N"); if (rc) { pr_err("WLAN reset GPIO %d request failed\n", wlan_gpio_deep_sleep); goto fail; } rc = gpio_direction_output(wlan_gpio_deep_sleep, WLAN_RESET); if (rc < 0) { pr_err("WLAN reset GPIO %d set output direction failed", wlan_gpio_deep_sleep); goto fail_gpio_dir_out; } /* Configure TCXO to be slave to WLAN_CLK_PWR_REQ */ if (wlan_clock == NULL) { wlan_clock = msm_xo_get(MSM_XO_TCXO_A0, id); if (IS_ERR(wlan_clock)) { pr_err("Failed to get TCXO_A0 voter (%ld)\n", PTR_ERR(wlan_clock)); goto fail_gpio_dir_out; } } rc = msm_xo_mode_vote(wlan_clock, MSM_XO_MODE_PIN_CTRL); if (rc < 0) { pr_err("Configuring TCXO to Pin controllable failed" "(%d)\n", rc); goto fail_xo_mode_vote; } } else if (!on && wlan_on) { if (wlan_clock != NULL) msm_xo_mode_vote(wlan_clock, MSM_XO_MODE_OFF); gpio_set_value_cansleep(wlan_gpio_deep_sleep, WLAN_RESET); gpio_free(wlan_gpio_deep_sleep); } /* WLAN VREG settings */ for (i = 0; i < ARRAY_SIZE(vregs_qwlan_name); i++) { if (vregs_qwlan[i] == NULL) { vregs_qwlan[i] = regulator_get(NULL, vregs_qwlan_name[i]); if (IS_ERR(vregs_qwlan[i])) { pr_err("regulator get of %s failed (%ld)\n", vregs_qwlan_name[i], PTR_ERR(vregs_qwlan[i])); rc = PTR_ERR(vregs_qwlan[i]); goto vreg_get_fail; } if (vregs_qwlan_val_min[i] || vregs_qwlan_val_max[i]) { rc = regulator_set_voltage(vregs_qwlan[i], vregs_qwlan_val_min[i], vregs_qwlan_val_max[i]); if (rc) { pr_err("regulator_set_voltage(%s) failed\n", vregs_qwlan_name[i]); goto vreg_fail; } } /* vote for pin control (if needed) */ if (vregs_is_pin_controlled[i]) { vregs_pc_qwlan[i] = regulator_get(NULL, vregs_qwlan_pc_name[i]); if (IS_ERR(vregs_pc_qwlan[i])) { pr_err("regulator get of %s failed " "(%ld)\n", vregs_qwlan_pc_name[i], PTR_ERR(vregs_pc_qwlan[i])); rc = PTR_ERR(vregs_pc_qwlan[i]); goto vreg_fail; } } } if (on && !wlan_on) { if (vregs_qwlan_peek_current[i]) { rc = regulator_set_optimum_mode(vregs_qwlan[i], vregs_qwlan_peek_current[i]); if (rc < 0) pr_err("vreg %s set optimum mode" " failed to %d (%d)\n", vregs_qwlan_name[i], rc, vregs_qwlan_peek_current[i]); } rc = regulator_enable(vregs_qwlan[i]); if (rc < 0) { pr_err("vreg %s enable failed (%d)\n", vregs_qwlan_name[i], rc); goto vreg_fail; } if (vregs_is_pin_controlled[i]) { rc = regulator_enable(vregs_pc_qwlan[i]); if (rc < 0) { pr_err("vreg %s enable failed (%d)\n", vregs_qwlan_pc_name[i], rc); goto vreg_fail; } } } else if (!on && wlan_on) { if (vregs_qwlan_peek_current[i]) { /* For legacy reasons we pass 1mA current to * put regulator in LPM mode. */ rc = regulator_set_optimum_mode(vregs_qwlan[i], 1000); if (rc < 0) pr_info("vreg %s set optimum mode" "failed (%d)\n", vregs_qwlan_name[i], rc); rc = regulator_set_voltage(vregs_qwlan[i], 0 , vregs_qwlan_val_max[i]); if (rc) pr_err("regulator_set_voltage(%s)" "failed (%d)\n", vregs_qwlan_name[i], rc); } if (vregs_is_pin_controlled[i]) { rc = regulator_disable(vregs_pc_qwlan[i]); if (rc < 0) { pr_err("vreg %s disable failed (%d)\n", vregs_qwlan_pc_name[i], rc); goto vreg_fail; } regulator_put(vregs_pc_qwlan[i]); } rc = regulator_disable(vregs_qwlan[i]); if (rc < 0) { pr_err("vreg %s disable failed (%d)\n", vregs_qwlan_name[i], rc); goto vreg_fail; } regulator_put(vregs_qwlan[i]); } } if (on) { gpio_set_value_cansleep(wlan_gpio_deep_sleep, WLAN_RESET_OUT); wlan_on = true; } else wlan_on = false; return 0; vreg_fail: regulator_put(vregs_qwlan[i]); if (vregs_is_pin_controlled[i]) regulator_put(vregs_pc_qwlan[i]); vreg_get_fail: i--; while (i >= 0) { ret = !on ? regulator_enable(vregs_qwlan[i]) : regulator_disable(vregs_qwlan[i]); if (ret < 0) { pr_err("vreg %s %s failed (%d) in err path\n", vregs_qwlan_name[i], !on ? "enable" : "disable", ret); } if (vregs_is_pin_controlled[i]) { ret = !on ? regulator_enable(vregs_pc_qwlan[i]) : regulator_disable(vregs_pc_qwlan[i]); if (ret < 0) { pr_err("vreg %s %s failed (%d) in err path\n", vregs_qwlan_pc_name[i], !on ? "enable" : "disable", ret); } } regulator_put(vregs_qwlan[i]); if (vregs_is_pin_controlled[i]) regulator_put(vregs_pc_qwlan[i]); i--; } if (!on) goto fail; fail_xo_mode_vote: msm_xo_put(wlan_clock); fail_gpio_dir_out: gpio_free(wlan_gpio_deep_sleep); fail: return rc; }
static void ir_remocon_send(struct ir_remocon_data *data) { unsigned int period, off_period = 0; unsigned int duty; unsigned int on, off = 0; unsigned int i, j; int ret; static int cpu_lv = -1; if (data->pwr_en == -1) { regulator = regulator_get(NULL, "vled_3.3v"); if (IS_ERR(regulator)) goto out; regulator_enable(regulator); regulator_status = 1; } if (data->pwr_en != -1) gpio_direction_output(data->pwr_en, 1); __udelay(1000); if (cpu_lv == -1) { if (data->pwr_en == -1) exynos_cpufreq_get_level(800000, &cpu_lv); else exynos_cpufreq_get_level(800000, &cpu_lv); } ret = exynos_cpufreq_lock(DVFS_LOCK_ID_IR_LED, cpu_lv); if (ret < 0) pr_err("%s: fail to lock cpufreq\n", __func__); ret = exynos_cpufreq_upper_limit(DVFS_LOCK_ID_IR_LED, cpu_lv); if (ret < 0) pr_err("%s: fail to lock cpufreq(limit)\n", __func__); if (data->pwr_en == -1) period = (MICRO_SEC/data->signal[0])-3; else period = (MICRO_SEC/data->signal[0])-1; duty = period/4; on = duty; off = period - duty; local_irq_disable(); for (i = 1; i < MAX_SIZE; i += 2) { if (data->signal[i] == 0) break; for (j = 0; j < data->signal[i]; j++) { gpio_direction_output(data->gpio, 1); __udelay(on); gpio_direction_output(data->gpio, 0); __udelay(off); } if (data->pwr_en == -1) period = (MICRO_SEC/data->signal[0]); else period = (MICRO_SEC/data->signal[0])+1; off_period = data->signal[i+1]*period; if (off_period <= 9999) { if (off_period > 1000) { __udelay(off_period % 1000); mdelay(off_period/1000); } else __udelay(off_period); } else { local_irq_enable(); __udelay(off_period % 1000); mdelay(off_period/1000); local_irq_disable(); } } gpio_direction_output(data->gpio, 1); __udelay(on); gpio_direction_output(data->gpio, 0); __udelay(off); local_irq_enable(); pr_info("%s end!\n", __func__); exynos_cpufreq_lock_free(DVFS_LOCK_ID_IR_LED); exynos_cpufreq_upper_limit_free(DVFS_LOCK_ID_IR_LED); if (data->pwr_en != -1) gpio_direction_output(data->pwr_en, 0); if ((data->pwr_en == -1) && (regulator_status == 1)) { regulator_force_disable(regulator); regulator_put(regulator); regulator_status = -1; } out: ; }
static int __init shuttle_gsm_probe(struct platform_device *pdev) { /* default-on */ const int default_blocked_state = 0; struct rfkill *rfkill; struct regulator *regulator[2]; struct shuttle_pm_gsm_data *gsm_data; int ret; gsm_data = kzalloc(sizeof(*gsm_data), GFP_KERNEL); if (!gsm_data) { dev_err(&pdev->dev, "no memory for context\n"); return -ENOMEM; } dev_set_drvdata(&pdev->dev, gsm_data); regulator[0] = regulator_get(&pdev->dev, "avdd_usb_pll"); if (IS_ERR(regulator[0])) { dev_err(&pdev->dev, "unable to get regulator for usb pll\n"); kfree(gsm_data); dev_set_drvdata(&pdev->dev, NULL); return -ENODEV; } gsm_data->regulator[0] = regulator[0]; regulator[1] = regulator_get(&pdev->dev, "avdd_usb"); if (IS_ERR(regulator[1])) { dev_err(&pdev->dev, "unable to get regulator for usb\n"); regulator_put(regulator[0]); kfree(gsm_data); dev_set_drvdata(&pdev->dev, NULL); return -ENODEV; } gsm_data->regulator[1] = regulator[1]; /* Init control pins */ shuttle_3g_gps_init(); /* register rfkill interface */ rfkill = rfkill_alloc(pdev->name, &pdev->dev, RFKILL_TYPE_WWAN, &shuttle_gsm_rfkill_ops, &pdev->dev); if (!rfkill) { dev_err(&pdev->dev, "Failed to allocate rfkill\n"); regulator_put(regulator[1]); regulator_put(regulator[0]); kfree(gsm_data); dev_set_drvdata(&pdev->dev, NULL); return -ENOMEM; } gsm_data->rfkill = rfkill; /* Set the default state */ rfkill_init_sw_state(rfkill, default_blocked_state); __shuttle_pm_gsm_toggle_radio(&pdev->dev, !default_blocked_state); ret = rfkill_register(rfkill); if (ret) { dev_err(&pdev->dev, "Failed to register rfkill\n"); rfkill_destroy(rfkill); regulator_put(regulator[1]); regulator_put(regulator[0]); kfree(gsm_data); dev_set_drvdata(&pdev->dev, NULL); return ret; } dev_info(&pdev->dev, "GSM/UMTS RFKill driver loaded\n"); return sysfs_create_group(&pdev->dev.kobj, &shuttle_gsm_attr_group); }
static int mipi_dsi_panel_power(int on) { static struct regulator *reg_l2; static struct regulator *reg_l10; int rc; PR_DISP_INFO("%s: power %s.\n", __func__, on ? "on" : "off"); if (!dsi_power_on) { reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev, "dsi_vdda"); if (IS_ERR(reg_l2)) { pr_err("could not get 8038_l2, rc = %ld\n", PTR_ERR(reg_l2)); return -ENODEV; } rc = regulator_set_voltage(reg_l2, 1200000, 1200000); if (rc) { pr_err("set_voltage l2 failed, rc=%d\n", rc); return -EINVAL; } reg_l10 = regulator_get(&msm_mipi_dsi1_device.dev, "8038_l10"); if (IS_ERR(reg_l10)) { pr_err("could not get 8038_l10, rc = %ld\n", PTR_ERR(reg_l10)); return -ENODEV; } rc = regulator_set_voltage(reg_l10, 3000000, 3000000); if (rc) { pr_err("set_voltage l10 failed, rc=%d\n", rc); return -EINVAL; } gpio_tlmm_config(GPIO_CFG(MSM_LCD_ID0, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, 0), GPIO_CFG_ENABLE); dsi_power_on = true; } if (on) { rc = regulator_set_optimum_mode(reg_l2, 100000); if (rc < 0) { pr_err("set_optimum_mode l2 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_set_optimum_mode(reg_l10, 100000); if (rc < 0) { pr_err("set_optimum_mode l10 failed, rc=%d\n", rc); return -EINVAL; } if (panel_type == PANEL_ID_CANIS_LG_NOVATEK) { rc = ncp6924_enable_ldo(NCP6924_ID_LDO4, true); if (rc < 0) { pr_err("Enable LCM 1.8V via NCP6924 failed!\n"); return -EINVAL; } gpio_set_value(MSM_V_LCMIO_1V8_EN, 1); hr_msleep(1); rc = regulator_enable(reg_l10); if (rc) { pr_err("enable l10 failed, rc=%d\n", rc); return -ENODEV; } hr_msleep(30); rc = regulator_enable(reg_l2); if (rc) { pr_err("enable l2 failed, rc=%d\n", rc); return -ENODEV; } } else if (panel_type == PANEL_ID_CANIS_JDI_NOVATEK) { rc = ncp6924_enable_ldo(NCP6924_ID_LDO4, true); if (rc < 0) { pr_err("Enable LCM 1.8V via NCP6924 failed!\n"); return -EINVAL; } gpio_set_value(MSM_V_LCMIO_1V8_EN, 1); hr_msleep(2); rc = regulator_enable(reg_l10); if (rc) { pr_err("enable l10 failed, rc=%d\n", rc); return -ENODEV; } hr_msleep(2); gpio_set_value(MSM_LCD_RSTz, 1); hr_msleep(1); gpio_set_value(MSM_LCD_RSTz, 0); hr_msleep(1); gpio_set_value(MSM_LCD_RSTz, 1); hr_msleep(20); rc = regulator_enable(reg_l2); if (rc) { pr_err("enable l2 failed, rc=%d\n", rc); return -ENODEV; } } } else { if (panel_type == PANEL_ID_CANIS_LG_NOVATEK) { gpio_set_value(MSM_LCD_RSTz, 0); hr_msleep(130); gpio_set_value(MSM_V_LCMIO_1V8_EN, 0); rc = ncp6924_enable_ldo(NCP6924_ID_LDO4, false); if (rc < 0) { pr_err("Disable LCM 1.8V via NCP6924 failed!\n"); return -EINVAL; } usleep(100); rc = regulator_disable(reg_l10); if (rc) { pr_err("disable reg_l10 failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_set_optimum_mode(reg_l10, 100); if (rc < 0) { pr_err("set_optimum_mode l10 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_disable(reg_l2); if (rc) { pr_err("disable reg_l2 failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_set_optimum_mode(reg_l2, 100); if (rc < 0) { pr_err("set_optimum_mode l2 failed, rc=%d\n", rc); return -EINVAL; } } else if (panel_type == PANEL_ID_CANIS_JDI_NOVATEK) { gpio_set_value(MSM_LCD_RSTz, 0); hr_msleep(5); gpio_set_value(MSM_V_LCMIO_1V8_EN, 0); rc = ncp6924_enable_ldo(NCP6924_ID_LDO4, false); if (rc < 0) { pr_err("Disable LCM 1.8V via NCP6924 failed!\n"); return -EINVAL; } usleep(2); rc = regulator_disable(reg_l10); if (rc) { pr_err("disable reg_l10 failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_set_optimum_mode(reg_l10, 100); if (rc < 0) { pr_err("set_optimum_mode l10 failed, rc=%d\n", rc); return -EINVAL; } rc = regulator_disable(reg_l2); if (rc) { pr_err("disable reg_l2 failed, rc=%d\n", rc); return -ENODEV; } rc = regulator_set_optimum_mode(reg_l2, 100); if (rc < 0) { pr_err("set_optimum_mode l2 failed, rc=%d\n", rc); return -EINVAL; } } } return 0; }
static int __init adam_bt_probe(struct platform_device *pdev) { struct rfkill *rfkill; struct regulator *regulator; struct clk *clk; struct adam_pm_bt_data *bt_data; int ret; dev_dbg(&pdev->dev, "starting\n"); bt_data = kzalloc(sizeof(*bt_data), GFP_KERNEL); if (!bt_data) { dev_err(&pdev->dev, "no memory for context\n"); return -ENOMEM; } dev_set_drvdata(&pdev->dev, bt_data); regulator = regulator_get(&pdev->dev, "vddhostif_bt"); if (IS_ERR(regulator)) { dev_err(&pdev->dev, "Failed to get regulator\n"); ret = -ENODEV; goto err4; } bt_data->regulator = regulator; clk = clk_get(&pdev->dev, "blink"); if (IS_ERR(clk)) { dev_err(&pdev->dev, "Failed to get clock\n"); ret = -ENODEV; goto err3; } bt_data->clk = clk; /* Init io pins */ gpio_request(ADAM_BT_RESET, "bluetooth_reset"); gpio_direction_output(ADAM_BT_RESET, 0); rfkill = rfkill_alloc(pdev->name, &pdev->dev, RFKILL_TYPE_BLUETOOTH, &adam_bt_rfkill_ops, &pdev->dev); if (!rfkill) { dev_err(&pdev->dev, "Failed to allocate rfkill\n"); ret = -ENOMEM; goto err2; } bt_data->rfkill = rfkill; /* Disable bluetooth */ rfkill_init_sw_state(rfkill, 0); ret = rfkill_register(rfkill); if (ret) { dev_err(&pdev->dev, "Failed to register rfkill\n"); goto err1; } dev_info(&pdev->dev, "Bluetooth RFKill driver registered\n"); return sysfs_create_group(&pdev->dev.kobj, &adam_bt_attr_group); err1: rfkill_destroy(rfkill); bt_data->rfkill = NULL; err2: clk_put(clk); bt_data->clk = NULL; err3: regulator_put(regulator); bt_data->regulator = NULL; err4: kfree(bt_data); dev_set_drvdata(&pdev->dev, NULL); return ret; }
static int __devinit lm3530_probe(struct i2c_client *client, const struct i2c_device_id *id) { struct lm3530_platform_data *pdata = client->dev.platform_data; struct lm3530_data *drvdata; int err = 0; if (pdata == NULL) { dev_err(&client->dev, "platform data required\n"); err = -ENODEV; goto err_out; } /* BL mode */ if (pdata->mode > LM3530_BL_MODE_PWM_MAN) { dev_err(&client->dev, "Illegal Mode request\n"); err = -EINVAL; goto err_out; } if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { dev_err(&client->dev, "I2C_FUNC_I2C not supported\n"); err = -EIO; goto err_out; } drvdata = kzalloc(sizeof(struct lm3530_data), GFP_KERNEL); if (drvdata == NULL) { err = -ENOMEM; goto err_out; } drvdata->mode = pdata->mode; drvdata->client = client; drvdata->pdata = pdata; drvdata->brightness = LED_OFF; drvdata->enable = false; drvdata->led_dev.name = LM3530_LED_DEV; drvdata->led_dev.brightness_set = lm3530_brightness_set; mutex_init(&drvdata->mutex_lock); i2c_set_clientdata(client, drvdata); drvdata->regulator = regulator_get(NULL, "lm3630-vol"); if (IS_ERR(drvdata->regulator)) { dev_err(&client->dev, "regulator get failed\n"); err = PTR_ERR(drvdata->regulator); drvdata->regulator = NULL; goto err_regulator_get; } if (drvdata->pdata->brt_val) { err = lm3530_init_registers(drvdata); if (err < 0) { dev_err(&client->dev, "Register Init failed: %d\n", err); err = -ENODEV; goto err_reg_init; } } err = led_classdev_register(&client->dev, &drvdata->led_dev); if (err < 0) { dev_err(&client->dev, "Register led class failed: %d\n", err); err = -ENODEV; goto err_class_register; } err = device_create_file(drvdata->led_dev.dev, &dev_attr_mode); if (err < 0) { dev_err(&client->dev, "File device creation failed: %d\n", err); err = -ENODEV; goto err_create_file; } #ifdef CONFIG_HAS_EARLYSUSPEND atomic_set(&drvdata->suspended, 0); drvdata->early_suspend.suspend = lm3530_early_suspend; drvdata->early_suspend.resume = lm3530_late_resume; drvdata->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN-5; register_early_suspend(&drvdata->early_suspend); drvdata->initialised = true; #endif return 0; err_create_file: led_classdev_unregister(&drvdata->led_dev); err_class_register: err_reg_init: regulator_put(drvdata->regulator); err_regulator_get: i2c_set_clientdata(client, NULL); kfree(drvdata); err_out: return err; }
int k3v2_dcdc_gpu_probe(struct platform_device *pdev) { int err = 0; struct plat_data *ipps_init_data = NULL; struct resource *pmctrl_res = NULL; struct device *dev = NULL; struct ipps_gpu *ipps_gpu = NULL; #ifdef CONFIG_EXTRAL_DYNAMIC_DCDC if(!get_product_feature(PROD_FEATURE_GPU_DCDC_SUPPLY)) { dev_err(&pdev->dev, "hardware version is invalid.\n"); return -EINVAL; } #endif dev = &pdev->dev; ipps_init_data = pdev->dev.platform_data; if (!ipps_init_data) { dev_err(&pdev->dev, "failed to get driver data.\n"); return -EINVAL; } pmctrl_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!pmctrl_res) { dev_err(&pdev->dev, "failed to get pm I/O memory.\n"); return -ENXIO; } ipps_gpu = kzalloc(sizeof(struct ipps_gpu), GFP_KERNEL); if (!ipps_gpu) { dev_err(&pdev->dev, "failed to kzalloc memory for dcdc gpu.\n"); return -ENOMEM; } ipps_gpu->pmctrl_base = ioremap(pmctrl_res->start, resource_size(pmctrl_res)); if (!ipps_gpu->pmctrl_base) { dev_err(&pdev->dev, "failed to remap pm_base I/O memory.\n"); err = -ENXIO; goto err_free_mem; } ipps_gpu->regulator_dcdc = regulator_get(NULL, "gpu-vcc"); if (IS_ERR(ipps_gpu->regulator_dcdc)) { dev_err(&pdev->dev, "regulator_get gpu dcdc failed.\n"); err = PTR_ERR(ipps_gpu->regulator_dcdc); goto err_iounmap_pmsctrl_base; } /*get gpu dcdc*/ ipps_gpu->clk_hdmipll = clk_get(NULL, "clk_pll4"); if (IS_ERR(ipps_gpu->clk_hdmipll)) { dev_err(&pdev->dev, "hdmipll clock get failed.\n"); err = PTR_ERR(ipps_gpu->clk_hdmipll); goto err_regulator_put; } ipps_gpu->curr_profile = ipps_init_data->cur_profile; ipps_gpu->curr_mode = ipps_init_data->mode; ipps_gpu->curr_policy = ipps_init_data->policy; ipps_gpu->gpu.freq.max = ipps_init_data->max; ipps_gpu->gpu.freq.min = ipps_init_data->min; ipps_gpu->gpu.freq.safe = ipps_init_data->safe; ipps_gpu->temp_enable = TEMP_MON_DISABLE; ipps_gpu->uptimes = 0; ipps_gpu->downtimes = 0; ipps_gpu->idev = ipps_alloc_device(sizeof(struct ipps_device)); if (NULL == ipps_gpu->idev) { dev_err(&pdev->dev, "failed to alloc idev mem!\n"); err = PTR_ERR(ipps_gpu->idev); goto err_regulator_put; } ipps_gpu->idev->command = k3v2_dcdc_gpu_cmd; ipps_gpu->idev->object = ipps_init_data->obj; ipps_gpu->idev->dev = dev; g_ipps_gpu = ipps_gpu; if (((POWERSAVE_POLICY <= ipps_gpu->curr_policy) && (ipps_gpu->curr_policy <=SPEC0B_POLICY)) || (ipps_gpu->curr_policy == NORMAL_POLICY) || (ipps_gpu->curr_policy == PERF_POLICY)) { g_ipps_policy = policy_table[ipps_gpu->curr_policy]; } else { err = -EINVAL; WARN(1, "K3V2 DCDC GPU:policy is invalid.\n"); goto err_free_idev; } /* *ipps_register_device() uses g_ipps_gpu pointer *to excute client->add() */ err = ipps_register_device(ipps_gpu->idev); if (err) { dev_err(&pdev->dev, "ipps device register failed!\n"); goto err_free_idev; } err = sysfs_create_group(&dev->kobj, &k3_dcdc_gpu_attr_group); if (err) { dev_err(dev, "failed to creat sysfs file\n"); goto err_idev_unregister; } #if 1 ipps_gpu->gpu_dvfs_wq = create_singlethread_workqueue("gpudvfs"); if (ipps_gpu->gpu_dvfs_wq == NULL) { dev_err(&pdev->dev, "create_workqueue failed for gpu dcdc\n"); err = PTR_ERR(ipps_gpu->gpu_dvfs_wq); goto err_remove_sysfs_group; } #endif mutex_init(®_lock_mutex); gpu_dvfs_init(); return 0; err_remove_sysfs_group: sysfs_remove_group(&pdev->dev.kobj, &k3_dcdc_gpu_attr_group); err_idev_unregister: ipps_unregister_device(ipps_gpu->idev); err_free_idev: ipps_dealloc_device(ipps_gpu->idev); err_regulator_put: regulator_put(ipps_gpu->regulator_dcdc); err_iounmap_pmsctrl_base: iounmap(ipps_gpu->pmctrl_base); err_free_mem: kfree(ipps_gpu); return err; }