/** * \brief main function */ int main(void) { pmic_init(); board_init(); sysclk_init(); sleepmgr_init(); rtc_init(); rtc_set_callback(alarm); cpu_irq_enable(); /* The lowest value which is safe to use is 3. This the use of 2 could * happen in a second change, and we would not get an interrupt. A * value of 3 causes the alarm to be set of in 3-4 seconds. */ rtc_set_alarm_relative(3); while (true) { /* Alarm action is handled in alarm callback so we just go to * sleep here. */ sleepmgr_enter_sleep(); } }
/*! \brief Main function. Execution starts here. */ int main(void) { #if SAMD21 || SAML21 system_init(); #else sysclk_init(); board_init(); #endif irq_initialize_vectors(); cpu_irq_enable(); // Initialize the sleep manager sleepmgr_init(); ui_init(); // Start USB dual mode which will start the correct mode (device or host) // corresponding at USB ID signal. uhc_start(); // The main loop manages only the power mode // because the USB stack is full interrupt driven. while (true) { sleepmgr_enter_sleep(); } }
int main (void) { irq_initialize_vectors(); cpu_irq_enable(); system_init(); sleepmgr_init(); HAL_usb_init(); module_in = xQueueCreate(MODULE_QUEUE_LENGTH , MODULE_QUEUE_ITEM_SIZE); module_out = xQueueCreate(MODULE_QUEUE_LENGTH , MODULE_QUEUE_ITEM_SIZE); if( module_in == NULL || module_out == NULL){ /* The queue could not be created. */ while(1); } // Create tasks xTaskCreate(&receiver_stream, (const char *)"receiver_stream", RECEIVER_STREAM_STACK_SIZE, NULL , RECEIVER_STREAM_PRIORITY , NULL); xTaskCreate(&sender_stream, (const char *)"sender_stream", SENDER_STREAM_STACK_SIZE, NULL , SENDER_STREAM_PRIORITY , NULL); xTaskCreate(&modules, (const char *)"modules", MODULES_STACK_SIZE, NULL , MODULES_PRIORITY , NULL); //Start FreeRTOS scheduler vTaskStartScheduler(); /* Code should never get here */ while (1) { } }
/* This function is meant to contain board-specific initialization code * for, e.g., the I/O pins. The initialization can rely on application- * specific board configuration, found in conf_board.h. */ void v2x_board_init(void) { irq_initialize_vectors(); pmic_init(); sysclk_init(); //configure clock sources for core and USB sleepmgr_init(); // Initialize the sleep manager ioport_init(); //Initializes the IOPORT service pin_init(); //whole chip pin init, modes and initial conditions spi_start(); //start SPI driver PWR_init(); //sets SR to default states - holds power up cpu_irq_enable(); eeprom_init(); //verifies eeprom safe for use menu_init(); //loads menu settings time_init(); //starts the RTC button_init(); //init button stuffs ACL_init(); //configures, but does not start sampling GSM_usart_init(); //starts direct serial channel to the SIM module CAN_uart_start(); //starts direct serial channel to the ELM module canbus_serial_routing(AVR_ROUTING); //cause the serial 3-state buffer to route the serial path from the ELM to the FTDI udc_start(); //start stack and vbus monitoring PWR_hub_start(); //connect the hub to the computer //autostart all systems delay_ms(500); GSM_modem_init(); CAN_elm_init(); ACL_set_sample_on(); PWR_host_start(); }
/*! \brief Main function. Execution starts here. */ int main(void) { /* Initialize the synchronous clock system to the default configuration set in conf_clock.h. \note All non-essential peripheral clocks are initially disabled. */ sysclk_init(); /* Initialize interrupts */ irq_initialize_vectors(); cpu_irq_enable(); /* Initialize the sleep manager, lock initial mode. */ sleepmgr_init(); /* Initialize the resources used by this example to the default configuration set in conf_board.h */ board_init(); /* Initialize the user interface */ ui_init(); /* Start USB host stack */ uhc_start(); /* The main loop manages only the power mode because the USB management is done by interrupt */ while (true) { sleepmgr_enter_sleep(); } }
/*! \brief Main function. Execution starts here. */ int main(void) { irq_initialize_vectors(); cpu_irq_enable(); // Initialize the sleep manager sleepmgr_init(); #if !SAM0 sysclk_init(); board_init(); #else system_init(); #endif ui_init(); ui_powerdown(); // Start USB stack to authorize VBus monitoring udc_start(); // The main loop manages only the power mode // because the USB management is done by interrupt while (true) { sleepmgr_enter_sleep(); } }
/*! \brief Main function. Execution starts here. */ int main(void) { irq_initialize_vectors(); cpu_irq_enable(); // Initialize the sleep manager sleepmgr_init(); sysclk_init(); board_init(); ui_init(); ui_powerdown(); memories_initialization(); // Start USB stack to authorize VBus monitoring udc_start(); // The main loop manages only the power mode // because the USB management is done by interrupt while (true) { if (main_b_msc_enable) { if (!udi_msc_process_trans()) { sleepmgr_enter_sleep(); } }else{ sleepmgr_enter_sleep(); } } }
static void prvSetupHardware( void ) { extern void SystemCoreClockUpdate( void ); struct eic_line_config xEICLineConfiguration; /* Configure the external interrupt controller so button pushes can generate interrupts. */ xEICLineConfiguration.eic_mode = EIC_MODE_EDGE_TRIGGERED; xEICLineConfiguration.eic_edge = EIC_EDGE_FALLING_EDGE; xEICLineConfiguration.eic_level = EIC_LEVEL_LOW_LEVEL; xEICLineConfiguration.eic_filter = EIC_FILTER_DISABLED; xEICLineConfiguration.eic_async = EIC_ASYNCH_MODE; eic_enable( EIC ); eic_line_set_config( EIC, GPIO_PUSH_BUTTON_EIC_LINE, &xEICLineConfiguration ); eic_line_set_callback( EIC, GPIO_PUSH_BUTTON_EIC_LINE, prvButtonISR, EIC_5_IRQn, 0 ); eic_line_enable( EIC, GPIO_PUSH_BUTTON_EIC_LINE ); /* ASF function to setup clocking. */ sysclk_init(); /* Ensure all priority bits are assigned as preemption priority bits. */ NVIC_SetPriorityGrouping( 0 ); /* Atmel library function to setup for the evaluation kit being used. */ board_init(); /* Initialise the sleep manager in case the low power demo is being used. */ sleepmgr_init(); }
/*! \brief Main function. Execution starts here. */ int main(void) { irq_initialize_vectors(); cpu_irq_enable(); // Initialize the sleep manager sleepmgr_init(); sysclk_init(); board_init(); ui_init(); ui_powerdown(); // Start USB stack to authorize VBus monitoring udc_start(); if (!udc_include_vbus_monitoring()) { // VBUS monitoring is not available on this product // thereby VBUS has to be considered as present main_vbus_action(true); } // The main loop manages only the power mode // because the USB management is done by interrupt while (true) { sleepmgr_enter_sleep(); } }
/*! \brief Main function. Execution starts here. */ int main(void) { irq_initialize_vectors(); cpu_irq_enable(); /* Initialize the sleep manager */ sleepmgr_init(); #if !SAMD21 && !SAMR21 sysclk_init(); board_init(); #else system_init(); #endif ui_init(); ui_powerdown(); /* Start USB stack to authorize VBus monitoring */ udc_start(); /* The main loop manages only the power mode * because the USB management is done by interrupt */ while (true) { sleepmgr_enter_sleep(); if (main_b_phdc_enable) { if (ieee11073_skeleton_process()) { ui_association(true); /* Association Ok */ } else { ui_association(false); /* No association */ } } } }
/** * \brief Run low power demo * * This function initializes the XMEGA to the least power consuming state, * before initializing the sleep manager interrupts on switchports. * The device is then put to sleep, and the sleep mode is configured by the * interrupt routines. */ int main(void) { board_init(); sysclk_init(); lowpower_init(); /* Initialize the sleep manager. */ sleepmgr_init(); /* Enable interrupts from switchports on * low level to sense all interrupts */ pmic_init(); SWITCHPORT0.INTCTRL = SWITCHPORT_INT_LEVEL; SWITCHPORT1.INTCTRL = SWITCHPORT_INT_LEVEL; SWITCHPORT0.INT0MASK = SWITCHMASK0; SWITCHPORT1.INT0MASK = SWITCHMASK1; ioport_configure_port_pin(&SWITCHPORT0, SWITCHMASK0, IOPORT_LEVEL | IOPORT_PULL_UP); ioport_configure_port_pin(&SWITCHPORT1, SWITCHMASK1, IOPORT_LEVEL | IOPORT_PULL_UP); cpu_irq_enable(); /* Start in active mode */ sleepmgr_lock_mode(SLEEPMGR_ACTIVE); /* Go to sleep, sleep modes are configured by interrupt routines. */ while (1) { sleepmgr_enter_sleep(); } }
/*! \brief Main function. Execution starts here. */ int main(void) { #if SAMD21 || SAML21 || SAMDA1 system_init(); #else sysclk_init(); board_init(); #endif irq_initialize_vectors(); cpu_irq_enable(); // Initialize the sleep manager sleepmgr_init(); ui_init(); // Start USB host stack uhc_start(); // The USB management is entirely managed by interrupts. // As a consequence, the user application does only have to play with the power modes. while (true) { sleepmgr_enter_sleep(); } }
/** * \brief Run LCDCA unit tests * * Initializes board, serial output, then sets up the * LCDCA unit test suite and runs it. */ int main(void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; sysclk_init(); board_init(); sleepmgr_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); /* Define all the test cases. */ DEFINE_TEST_CASE(lcdca_init_test, NULL, run_lcdca_init_test, NULL, "LCDCA initialization test"); DEFINE_TEST_CASE(lcdca_blink_test, NULL, run_lcdca_blink_test, NULL, "LCDCA blink test"); DEFINE_TEST_CASE(lcdca_automated_sequential_test, NULL, run_lcdca_automated_sequential_test, NULL, "LCDCA automated sequential test"); DEFINE_TEST_CASE(lcdca_automated_scrolling_test, NULL, run_lcdca_automated_scrolling_test, NULL, "LCDCA automated scrolling test"); DEFINE_TEST_CASE(lcdca_autonomous_test, NULL, run_lcdca_autonomous_test, NULL, "LCDCA autonomous segment test"); DEFINE_TEST_CASE(lcdca_contrast_change_test, NULL, run_lcdca_contrast_change_test, run_lcdca_end_test, "LCDCA contrast change test"); /* Put test case addresses in an array. */ DEFINE_TEST_ARRAY(lcdca_tests) = { &lcdca_init_test, &lcdca_blink_test, &lcdca_automated_sequential_test, &lcdca_automated_scrolling_test, &lcdca_autonomous_test, &lcdca_contrast_change_test, }; /* Define the test suite. */ DEFINE_TEST_SUITE(lcdca_suite, lcdca_tests, "LCDCA driver unit test suite"); /* Run all tests in the test suite. */ test_suite_run(&lcdca_suite); while (true) { __asm__("nop"); } }
int main(void) { pmic_init(); board_init(); sysclk_init(); sleepmgr_init(); cpu_irq_enable(); #if (BOARD == XMEGA_A3BU_XPLAINED) /* The status LED must be used as LED2, so we turn off * the green led which is in the same packaging. */ ioport_set_pin_high(LED3_GPIO); #endif /* * Unmask clock for TIMER_EXAMPLE */ tc_enable(&TIMER_EXAMPLE); /* * Configure interrupts callback functions for TIMER_EXAMPLE * overflow interrupt, CCA interrupt and CCB interrupt */ tc_set_overflow_interrupt_callback(&TIMER_EXAMPLE, example_ovf_interrupt_callback); tc_set_cca_interrupt_callback(&TIMER_EXAMPLE, example_cca_interrupt_callback); tc_set_ccb_interrupt_callback(&TIMER_EXAMPLE, example_ccb_interrupt_callback); /* * Configure TC in normal mode, configure period, CCA and CCB * Enable both CCA and CCB channels */ tc_set_wgm(&TIMER_EXAMPLE, TC_WG_NORMAL); tc_write_period(&TIMER_EXAMPLE, TIMER_EXAMPLE_PERIOD); tc_write_cc(&TIMER_EXAMPLE, TC_CCA, TIMER_EXAMPLE_PERIOD / 2); tc_write_cc(&TIMER_EXAMPLE, TC_CCB, TIMER_EXAMPLE_PERIOD / 4); tc_enable_cc_channels(&TIMER_EXAMPLE,(enum tc_cc_channel_mask_enable_t)(TC_CCAEN | TC_CCBEN)); /* * Enable TC interrupts (overflow, CCA and CCB) */ tc_set_overflow_interrupt_level(&TIMER_EXAMPLE, TC_INT_LVL_LO); tc_set_cca_interrupt_level(&TIMER_EXAMPLE, TC_INT_LVL_LO); tc_set_ccb_interrupt_level(&TIMER_EXAMPLE, TC_INT_LVL_LO); /* * Run TIMER_EXAMPLE at TIMER_EXAMPLE_PERIOD(31250Hz) resolution */ tc_set_resolution(&TIMER_EXAMPLE, TIMER_EXAMPLE_PERIOD); do { /* Go to sleep, everything is handled by interrupts. */ sleepmgr_enter_sleep(); } while (1); }
/*! \brief Main File Section: * - Initialization (CPU, Controller Task,... ) * - Main loop with task management (ADC, DAC, CAN and GUI) */ int main(void) { irq_initialize_vectors(); /* Initialize the board. * The board-specific conf_board.h file contains the configuration of * the board initialization. */ board_init(); /* Initialize the clocks. * The clock-specific conf_clocks.h file contains the configuration of * the clocks initialization. */ sysclk_init(); // Initialize the sleep manager sleepmgr_init(); sleepmgr_lock_mode(SLEEPMGR_IDLE); /* Initialize the required Task. * - Initialize the DAC task to start the signal generator, * - Initialize the ADC task to start the scope acquisition, * - Initialize the Noise Task to add digital noise to the signal, * - Initialize the Filter Task to remove the digital noise of the signal, * - Initialize the GUI Task to display signals as a scope on the LCD, * - Initialize the Remote Task to display signals as a scope on the LCD, */ dac_task_init(); adc_task_init(); noise_task_init(); filter_task_init(); gui_task_init(); controller_task_init(); remote_task_init(); cpu_irq_enable(); // Free running scheduler loop while (true) { // Enter Sleep Mode sleepmgr_enter_sleep(); // Call ADC task adc_task(); // Call DAC task dac_task(); // Call Noise task noise_task(); // Filter Task filter_task(); // Call Gui task for update gui_task(); // Call Controller Task for control Update controller_task(); // Send data to the PC Application remote_task(); } }
int main(void) { struct adc_config adc_conf; struct adc_channel_config adcch_conf; board_init(); sysclk_init(); sleepmgr_init(); irq_initialize_vectors(); cpu_irq_enable(); gfx_mono_init(); // Enable back light of display ioport_set_pin_high(LCD_BACKLIGHT_ENABLE_PIN); // Initialize configuration structures. adc_read_configuration(&ADCA, &adc_conf); adcch_read_configuration(&ADCA, ADC_CH0, &adcch_conf); /* Configure the ADC module: * - unsigned, 12-bit results * - VCC voltage reference * - 200 kHz maximum clock rate * - manual conversion triggering * - temperature sensor enabled * - callback function */ adc_set_conversion_parameters(&adc_conf, ADC_SIGN_ON, ADC_RES_12, ADC_REF_VCC); adc_set_clock_rate(&adc_conf, 200000UL); adc_set_conversion_trigger(&adc_conf, ADC_TRIG_MANUAL, 1, 0); adc_enable_internal_input(&adc_conf, ADC_INT_TEMPSENSE); adc_write_configuration(&ADCA, &adc_conf); adc_set_callback(&ADCA, &adc_handler); /* Configure ADC channel 0: * - single-ended measurement from temperature sensor * - interrupt flag set on completed conversion * - interrupts disabled */ adcch_set_input(&adcch_conf, ADCCH_POS_PIN1, ADCCH_NEG_NONE, 1); adcch_set_interrupt_mode(&adcch_conf, ADCCH_MODE_COMPLETE); adcch_enable_interrupt(&adcch_conf); adcch_write_configuration(&ADCA, ADC_CH0, &adcch_conf); // Enable the ADC and start the first conversion. adc_enable(&ADCA); adc_start_conversion(&ADCA, ADC_CH0); do { // Sleep until ADC interrupt triggers. sleepmgr_enter_sleep(); } while (1); }
//! \brief Set up and run test suite int main(void) { /* USART init values */ const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; /* Start services */ pmic_init(); sysclk_init(); board_init(); sleepmgr_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); /* Enable the clock for the AES module */ sysclk_enable_module(SYSCLK_PORT_GEN, SYSCLK_AES); /* Enable global interrupts */ cpu_irq_enable(); // Set callback for AES module aes_set_callback(&int_callback_aes); /* Define test cases */ DEFINE_TEST_CASE(aes_get_set_test, NULL, run_aes_set_and_get_key_test, NULL, "Get and set functions"); DEFINE_TEST_CASE(aes_state_interface_test, NULL, run_aes_state_interface_test, NULL, "Test of AES state functions"); DEFINE_TEST_CASE(aes_encryption_test, NULL, run_aes_encryption_test, NULL, "Encryption with known result"); DEFINE_TEST_CASE(aes_decryption_test, NULL, run_aes_decryption_test, NULL, "Decryption function known result"); DEFINE_TEST_CASE(aes_enc_dec_test, NULL, run_aes_encrypt_and_decrypt_test, NULL, "Encryption and decryption with interrupt and auto mode"); DEFINE_TEST_ARRAY(aes_tests) = { &aes_get_set_test, &aes_state_interface_test, &aes_encryption_test, &aes_decryption_test, &aes_enc_dec_test }; DEFINE_TEST_SUITE(aes_suite, aes_tests, "XMEGA AES driver test suite"); /* Run all test in the suite */ test_suite_run(&aes_suite); while (1) { /* Intentionally left blank */ } }
/*! \brief Main function. Execution starts here. */ int main(void) { //Initialize interrupt controller irq_initialize_vectors(); cpu_irq_enable(); // Initialize sleep manager sleepmgr_init(); // Initialize clock tree sysclk_init(); // Initialize hardware board resources board_init(); // Initialize user interface ui_init(); ui_powerdown(); // Sanity check about Silicon revision Vs Firmware build // for Silicon revision A, firmware should be specific if ((!firmware_rev_a) && (nvm_read_device_rev()==0)) { ui_si_revision_error(); while(ui_button()!=1); while(ui_button()!=2); while(ui_button()!=4); while(ui_button()!=8); } // Initialize DATA Flash at45dbx_init(); // Initialize ADC for on-board sensors adc_sensors_init(); // Initialize USB HID report protocol usb_hid_com_init(); // Start USB stack main_build_usb_serial_number(); udc_start(); // The main loop manages only the power mode // because everything else is managed by interrupt. // The USB Start of Frame event manages internal tick events for // on-board sensor updates as well as LCD display update. while (true) { if (main_b_msc_enable) { if (!udi_msc_process_trans()) { sleepmgr_enter_sleep(); } } else { sleepmgr_enter_sleep(); } if (usb_hid_com_is_start_dfu()) { main_start_dfu_session(); } } }
int main(void) { /* Usual initializations */ board_init(); sysclk_init(); sleepmgr_init(); irq_initialize_vectors(); cpu_irq_enable(); /* Unmask clock for TCC4 */ tc45_enable(&TCC4); /* Configure TC in normal mode */ tc45_set_wgm(&TCC4, TC45_WG_NORMAL); /* Configure period equal to resolution to obtain 1Hz */ tc45_write_period(&TCC4, TIMER_EXAMPLE_RESOLUTION); /* Configure CCA to occur at the middle of TC period */ tc45_write_cc(&TCC4, TC45_CCA, TIMER_EXAMPLE_RESOLUTION / 2); /* Configure CCB to occur at the quarter of TC period */ tc45_write_cc(&TCC4, TC45_CCB, TIMER_EXAMPLE_RESOLUTION / 4); /* Enable both CCA and CCB channels */ tc45_enable_cc_channels(&TCC4, TC45_CCACOMP); tc45_enable_cc_channels(&TCC4, TC45_CCBCOMP); /* * Configure interrupts callback functions for TCC4 * overflow interrupt, CCA interrupt and CCB interrupt */ tc45_set_overflow_interrupt_callback(&TCC4, example_ovf_interrupt_callback); tc45_set_cca_interrupt_callback(&TCC4, example_cca_interrupt_callback); tc45_set_ccb_interrupt_callback(&TCC4, example_ccb_interrupt_callback); /* * Enable TC interrupts (overflow, CCA and CCB) */ tc45_set_overflow_interrupt_level(&TCC4, TC45_INT_LVL_LO); tc45_set_cca_interrupt_level(&TCC4, TC45_INT_LVL_LO); tc45_set_ccb_interrupt_level(&TCC4, TC45_INT_LVL_LO); /* * Run TCC4 */ tc45_set_resolution(&TCC4, TIMER_EXAMPLE_RESOLUTION); do { /* Go to sleep, everything is handled by interrupts. */ sleepmgr_enter_sleep(); } while (1); }
int main(void) { struct adc_config adc_conf; struct adc_channel_config adcch_conf; board_init(); sysclk_init(); sleepmgr_init(); irq_initialize_vectors(); cpu_irq_enable(); // Initialize configuration structures. adc_read_configuration(&ADCA, &adc_conf); adcch_read_configuration(&ADCA, ADC_CH0, &adcch_conf); /* Configure the ADC module: * - unsigned, 12-bit results * - bandgap (1 V) voltage reference * - 200 kHz maximum clock rate * - manual conversion triggering * - temperature sensor enabled * - callback function */ adc_set_conversion_parameters(&adc_conf, ADC_SIGN_OFF, ADC_RES_12, ADC_REF_BANDGAP); adc_set_clock_rate(&adc_conf, 200000UL); adc_set_conversion_trigger(&adc_conf, ADC_TRIG_MANUAL, 1, 0); adc_enable_internal_input(&adc_conf, ADC_INT_TEMPSENSE); adc_write_configuration(&ADCA, &adc_conf); adc_set_callback(&ADCA, &adc_handler); /* Configure ADC channel 0: * - single-ended measurement from temperature sensor * - interrupt flag set on completed conversion * - interrupts disabled */ adcch_set_input(&adcch_conf, ADCCH_POS_TEMPSENSE, ADCCH_NEG_NONE, 1); adcch_set_interrupt_mode(&adcch_conf, ADCCH_MODE_COMPLETE); adcch_enable_interrupt(&adcch_conf); adcch_write_configuration(&ADCA, ADC_CH0, &adcch_conf); // Get measurement for 85 degrees C (358 kelvin) from calibration data. tempsense = adc_get_calibration_data(ADC_CAL_TEMPSENSE); // Enable the ADC and start the first conversion. adc_enable(&ADCA); adc_start_conversion(&ADCA, ADC_CH0); do { // Sleep until ADC interrupt triggers. sleepmgr_enter_sleep(); } while (1); }
/** * \brief Main application routine * - Initializes the board and LCD display * - Initialize ADC ,to read ADC offset and configure for oversampling * - If number of sample Reached to total number of oversample required, * call function to start process on oversampled ADC readings */ int main( void ) { /* * Initialize basic features for the AVR XMEGA family. * - PMIC is needed to enable all interrupt levels. * - Board init for setting up GPIO and board specific features. * - Sysclk init for configuring clock speed and turning off unused * peripherals. * - Sleepmgr init for setting up the basics for the sleep manager, */ board_init(); sysclk_init(); pmic_init(); sleepmgr_init(); /* Initialize ST7565R controller and LCD display */ gfx_mono_init(); /* Display headings on LCD for oversampled result */ gfx_mono_draw_string("Oversampled", 0, 0, &sysfont); /* Display headings on LCD for normal result */ gfx_mono_draw_string("Normal", 80, 0, &sysfont); /* Initialize ADC ,to read ADC offset and configure ADC for oversampling **/ init_adc(); /* Enable global interrupt */ cpu_irq_enable(); /* Switch ON LCD back light */ ioport_set_pin_high(NHD_C12832A1Z_BACKLIGHT); /* Set LCD contrast */ st7565r_set_contrast(ST7565R_DISPLAY_CONTRAST_MIN); /* Continuous Execution Loop */ while (1) { /* * Check if number of sample reached to total Number of * oversample required by checking status of * adc_oversampled_flag */ if (adc_oversampled_flag == true) { /* Reset the adc_oversampled_flag */ adc_oversampled_flag = false; /* Process all received ADC samples and calculate analog * input */ adc_oversampled(); } } }
int main(void) { pmic_init(); board_init(); sysclk_init(); sleepmgr_init(); cpu_irq_enable(); /* Enables the Timer defined in conf_example.h : TCE0 in this example */ tc_enable(&TIMER_EXAMPLE); /* Configures the interrupt level of CCA and CCB modules : low */ tc_set_cca_interrupt_level(&TIMER_EXAMPLE, TC_INT_LVL_LO); tc_set_ccb_interrupt_level(&TIMER_EXAMPLE, TC_INT_LVL_LO); /* Configures the waveform generator of this Timer mode in NORMAL mode */ tc_set_wgm(&TIMER_EXAMPLE, TC_WG_NORMAL); /* Declares the interrupt functions which will be called when CCA and CCB interrupts will occur */ tc_set_cca_interrupt_callback(&TIMER_EXAMPLE, example_cca_interrupt_callback); tc_set_ccb_interrupt_callback(&TIMER_EXAMPLE, example_ccb_interrupt_callback); /* Configures the Timer period*/ tc_write_period(&TIMER_EXAMPLE, TIMER_EXAMPLE_PERIOD); /* Configures the CCA and CCB levels*/ tc_write_cc(&TIMER_EXAMPLE, TC_CCA, TIMER_EXAMPLE_PERIOD/2); tc_write_cc(&TIMER_EXAMPLE, TC_CCB, TIMER_EXAMPLE_PERIOD/2); /* Enables the CCA and CCB channels*/ tc_enable_cc_channels(&TIMER_EXAMPLE,TC_CCAEN); tc_enable_cc_channels(&TIMER_EXAMPLE,TC_CCAEN); /* Configures the waveform genertaor in Dual Slope mode and Top*/ tc_set_wgm(&TIMER_EXAMPLE,TC_WG_DS_T); /* Enables and configures the deadtime of CCA and CCB outputs*/ tc_awex_enable_cca_deadtime(&AWEXE); tc_awex_enable_ccb_deadtime(&AWEXE); tc_awex_set_dti_high(&AWEXE, TIMER_EXAMPLE_PERIOD/6); tc_awex_set_dti_low(&AWEXE, TIMER_EXAMPLE_PERIOD/6); /* Outputs CCA and CCB on Port E0 and E1*/ tc_awex_set_output_override(&AWEXE, 0x03); tc_set_resolution(&TIMER_EXAMPLE, 10000); do { /* Go to sleep, everything is handled by interrupts. */ sleepmgr_enter_sleep(); } while (1); }
int main(void) { uint8_t lcd_text[] = "XmegaB1"; uint16_t i; sysclk_init(); pmic_init(); sleepmgr_init(); board_init(); c42048a_init(); c42048a_set_contrast(60); c42048a_blinkrate_init(LCD_BLINKRATE_1Hz_gc); // Alphanumeric c42048a_set_text(lcd_text); // Numeric c42048a_set_numeric_dec(1245); // All pixels "on" blinking c42048a_set_blink_screen(); c42048a_wait_int_period(16); c42048a_clear_blink_screen(); // AVR icon blinking alone c42048a_blink_pixel(ICON_AVR); c42048a_wait_int_period(16); // AVR icon on c42048a_set_pixel(ICON_AVR); // USB icon blinking c42048a_blink_pixel(ICON_USB); // AM is not part of blinking icons // AM will be ON only c42048a_blink_pixel(ICON_AM); // Display a progress bar graph value for(i=1; i<256; i+=16) { c42048a_bar_graph((uint8_t)i); c42048a_wait_int_period(1); } c42048a_wait_int_period(4); // Blink entire screen 8 times c42048a_set_blink_screen(); c42048a_wait_int_period(16); // Unblink all the screen c42048a_clear_blink_screen(); while(true) { sleepmgr_enter_sleep(); } }
int main(void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; uint16_t volts_values[3][NB_VALUE]; int16_t volt_output; uint8_t i; /* Usual initializations */ board_init(); sysclk_init(); sleepmgr_init(); irq_initialize_vectors(); cpu_irq_enable(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); printf("\x0C\n\r-- ADC Calibration and averaging example"); printf(" (Compiled: %s %s)\n\r", __DATE__, __TIME__); /* ADC and DAC initializations */ main_dac_init(); main_adc_init(); /* Conversions without averaging and without corrections */ main_conversions(volts_values[0]); /* Enable averaging */ main_adc_averaging(); /* Conversions with averaging and without corrections */ main_conversions(volts_values[1]); /* Measure and enable corrections */ main_adc_correction(); /* Conversions with averaging and with corrections */ main_conversions(volts_values[2]); /* Display values */ printf("| ADC input | ADC res. | Delta | Averaging | Delta | Aver.+Corr. | Delta |\n\r"); volt_output = -CONV_MAX_VOLTAGE; for (i = 0; i < NB_VALUE; i++) { printf("| %5d mV | %5d mV | %4d mV | %5d mV | %4d mV | %5d mV | %4d mV |\n\r", volt_output, volts_values[0][i], volts_values[0][i] - volt_output, volts_values[1][i], volts_values[1][i] - volt_output, volts_values[2][i], volts_values[2][i] - volt_output); volt_output += CONV_VOLTAGE_STEP; } while (1) { } }
/*! \brief Main function. Execution starts here. */ int main(void) { irq_initialize_vectors(); cpu_irq_enable(); // Initialize the sleep manager sleepmgr_init(); #if !SAMD21 && !SAMR21 sysclk_init(); board_init(); #else system_init(); #endif ui_init(); ui_powerdown(); // Start USB stack to authorize VBus monitoring udc_start(); // The main loop manages only the power mode // because the USB management is done by interrupt PORTC_DIR=0b00000011; // USTAWIENIE NA PORCIE C DWÓCH PINÓW WYJŒCIOWYCH while (true) { char ch; if (udi_cdc_is_rx_ready()) { ch = udi_cdc_getc(); switch(ch) { case '0' : PORTC.OUT=PIN1_bm; _delay_ms(1000); udi_cdc_write_buf("START \n\r", 14); PORTC.OUTTGL=PIN1_bm; break;// USTAWIENIE 0 I 1 case '1' : PORTC.OUT=PIN0_bm; _delay_ms(1000); udi_cdc_write_buf("ZAWORY \n\r", 14); PORTC.OUTTGL=PIN0_bm; break; // NEGACJA PORTÓW default : udi_cdc_write_buf("'S' TO START A 'Z' TO ZMIANA", 26); break; }; } } }
int main() { /* USART init values */ const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; // Initialize the board and all the peripheral required sysclk_init(); board_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); #if XMEGA pmic_init(); sleepmgr_init(); #endif DEFINE_TEST_CASE(membag_init_test, NULL, run_membag_init_test, NULL, "Test membag initialization"); DEFINE_TEST_CASE(membag_alloc_test, NULL, run_membag_alloc_test, NULL, "Test membag memory allocation"); DEFINE_TEST_CASE(membag_free_test, NULL, run_membag_free_test, NULL, "Test membag memory freeing"); DEFINE_TEST_CASE(membag_get_test, NULL, run_membag_get_test, NULL, "Test membag get functions"); DEFINE_TEST_CASE(membag_alloc_when_full_test, NULL, run_membag_alloc_when_full_test, NULL, "Test membag allocation when all membags are full"); DEFINE_TEST_CASE(membag_realloc_test, NULL, run_membag_realloc_test, NULL, "Test membag allocation and reallocation"); DEFINE_TEST_ARRAY(membag_tests) = { &membag_init_test, &membag_alloc_test, &membag_free_test, &membag_get_test, &membag_alloc_when_full_test, &membag_realloc_test }; DEFINE_TEST_SUITE(membag_suite, membag_tests, "Common util membag test suite"); test_suite_run(&membag_suite); while (1) { /* Intentionally left blank */ } }
/** * \brief Run CRC driver unit tests */ int main (void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; sysclk_init(); board_init(); sleepmgr_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); DEFINE_TEST_CASE(crc_32bit_io_test, NULL, run_32bit_io_test, NULL, "32bit CRC on simulated IO data test"); DEFINE_TEST_CASE(crc_16bit_io_test, NULL, run_16bit_io_test, NULL, "16bit CRC on simulated IO data test"); DEFINE_TEST_CASE(crc_32bit_dma_test, NULL, run_32bit_dma_test, NULL, "32bit CRC DMA data test"); DEFINE_TEST_CASE(crc_16bit_dma_test, NULL, run_16bit_dma_test, NULL, "16bit CRC DMA data test"); DEFINE_TEST_CASE(crc_32bit_flash_range_test, NULL, run_flash_test, NULL, "32bit CRC flash range test"); // Put test case addresses in an array DEFINE_TEST_ARRAY(crc_tests) = { &crc_32bit_io_test, &crc_16bit_io_test, &crc_32bit_dma_test, &crc_16bit_dma_test, &crc_32bit_flash_range_test, }; // Define the test suite DEFINE_TEST_SUITE(crc_suite, crc_tests, "XMEGA CRC driver test suite"); test_suite_run(&crc_suite); while (1) { // Intentionally left blank } }
/** * \brief Run ADC unit tests * * Initializes the clock system, board and serial output, then sets up the * ADC unit test suite and runs it. */ int main(void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS, }; board_init(); sysclk_init(); sleepmgr_init(); stdio_serial_init(CONF_TEST_USART, &usart_serial_options); // Define single ended conversion test cases DEFINE_TEST_CASE(single_ended_12bit_conversion_test, NULL, run_single_ended_12bit_conversion_test, NULL, "Single ended conversion with 12-bit result"); DEFINE_TEST_CASE(single_ended_8bit_conversion_test, NULL, run_single_ended_8bit_conversion_test, NULL, "Single ended conversion with 8-bit result"); // Define differential conversion test cases DEFINE_TEST_CASE(differential_conversion_test, NULL, run_differential_12bit_conversion_test, NULL, "Differential conversion with 12-bit result"); DEFINE_TEST_CASE(differential_conversion_with_gain_test, NULL, run_differential_12bit_with_gain_conversion_test, NULL, "Differential conversion with 12-bit result and gain"); // Put test case addresses in an array DEFINE_TEST_ARRAY(adc_tests) = { &single_ended_12bit_conversion_test, &single_ended_8bit_conversion_test, &differential_conversion_test, &differential_conversion_with_gain_test, }; // Define the test suite DEFINE_TEST_SUITE(adc_suite, adc_tests, "XMEGA ADC driver test suite"); // Run all tests in the suite test_suite_run(&adc_suite); while (1) { // Intentionally left empty. } }
void init_vrtc(){ //real time clock inits pmic_init(); sysclk_init(); sleepmgr_init(); rtc_init(); cpu_irq_enable(); //v2x init soft_counter = 0x00; rtc_set_callback(alarm); rtc_set_alarm_relative(32768); }
/** * \brief Initialize the TWIM module * * \param twim Base address of the TWIM * \param config Options for initializing the TWIM module * * \retval STATUS_OK Transaction is successful * \retval ERR_INVALID_ARG Invalid arg resulting in wrong CWGR Exponential */ status_code_t twim_set_config(Twim *twim, struct twim_config *config) { sysclk_enable_peripheral_clock(twim); /* Enable master transfer */ twim->TWIM_CR = TWIM_CR_MEN; /* Reset TWI */ twim->TWIM_CR = TWIM_CR_SWRST; /* Clear SR */ twim->TWIM_SCR = ~0UL; if (config->smbus) { /* Enable SMBUS Transfer */ twim->TWIM_CR = TWIM_CR_SMEN; twim->TWIM_SMBTR = (uint32_t) -1; } /* Select the speed */ if (config->speed) { if (twim_set_speed(twim, config->speed, config->twim_clk, config->data_setup_cycles) != STATUS_OK) { return ERR_INVALID_ARG; } } if (config->hsmode_speed) { if (twim_set_hsmode_speed(twim, config->hsmode_speed, config->twim_clk, config->hsmode_data_setup_cycles) != STATUS_OK) { return ERR_INVALID_ARG; } } /* Set clock and data slew rate */ twim->TWIM_SRR = ((config->speed < TWI_FAST_MODE_PLUS_SPEED) ? TWIM_SRR_FILTER(2) : TWIM_SRR_FILTER(3)) | TWIM_SRR_CLSLEW(config->clock_slew_limit) | TWIM_SRR_CLDRIVEL(config->clock_drive_strength_low) | TWIM_SRR_DASLEW(config->data_slew_limit) | TWIM_SRR_DADRIVEL(config->data_drive_strength_low); twim->TWIM_HSSRR = TWIM_HSSRR_FILTER(1) | TWIM_HSSRR_CLSLEW(config->hs_clock_slew_limit) | TWIM_HSSRR_CLDRIVEL(config->hs_clock_drive_strength_low) | TWIM_HSSRR_CLDRIVEH(config->hs_clock_drive_strength_high) | TWIM_HSSRR_DASLEW(config->hs_data_slew_limit) | TWIM_HSSRR_DADRIVEL(config->hs_data_drive_strength_low); #if TWIM_LOW_POWER_ENABLE sleepmgr_init(); #endif return STATUS_OK; }