/* * IRQ handler for the timer */ static irqreturn_t integrator_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) { write_seqlock(&xtime_lock); /* * clear the interrupt */ writel(1, TIMER1_VA_BASE + TIMER_INTCLR); /* * the clock tick routines are only processed on the * primary CPU */ if (hard_smp_processor_id() == 0) { timer_tick(regs); #ifdef CONFIG_SMP smp_send_timer(); #endif } #ifdef CONFIG_SMP /* * this is the ARM equivalent of the APIC timer interrupt */ update_process_times(user_mode(regs)); #endif /* CONFIG_SMP */ write_sequnlock(&xtime_lock); return IRQ_HANDLED; }
/* * IRQ handler for the timer */ static irqreturn_t ne1_timer_interrupt(int irq, void *dev_id) { write_seqlock(&xtime_lock); // ...clear the interrupt writel(GTINT_TCI, IO_ADDRESS(NE1_BASE_TIMER_0 + TMR_GTINT)); timer_tick(); #if defined(CONFIG_SMP) && !defined(CONFIG_LOCAL_TIMERS) smp_send_timer(); update_process_times(user_mode(get_irq_regs())); #endif write_sequnlock(&xtime_lock); return IRQ_HANDLED; }
/* * timer_interrupt() needs to keep up the real-time clock, * as well as call the "do_timer()" routine every clocktick */ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) { #ifndef CONFIG_SMP profile_tick(CPU_PROFILING, regs); #endif do_timer(regs); #ifndef CONFIG_SMP update_process_times(user_mode(regs)); #endif /* * If we have an externally synchronized Linux clock, then update * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be * called as close as possible to 500 ms before the new second starts. */ write_seqlock(&xtime_lock); if (ntp_synced() && xtime.tv_sec > last_rtc_update + 660 && (xtime.tv_nsec / 1000) >= 500000 - ((unsigned)TICK_SIZE) / 2 && (xtime.tv_nsec / 1000) <= 500000 + ((unsigned)TICK_SIZE) / 2) { if (set_rtc_mmss(xtime.tv_sec) == 0) last_rtc_update = xtime.tv_sec; else /* do it again in 60 s */ last_rtc_update = xtime.tv_sec - 600; } write_sequnlock(&xtime_lock); /* As we return to user mode fire off the other CPU schedulers.. this is basically because we don't yet share IRQ's around. This message is rigged to be safe on the 386 - basically it's a hack, so don't look closely for now.. */ #ifdef CONFIG_SMP smp_local_timer_interrupt(regs); smp_send_timer(); #endif return IRQ_HANDLED; }
/* * timer_interrupt() needs to keep up the real-time clock, * as well as call the "xtime_update()" routine every clocktick */ static irqreturn_t timer_interrupt(int irq, void *dev_id) { #ifndef CONFIG_SMP profile_tick(CPU_PROFILING); #endif xtime_update(1); #ifndef CONFIG_SMP update_process_times(user_mode(get_irq_regs())); #endif /* As we return to user mode fire off the other CPU schedulers.. this is basically because we don't yet share IRQ's around. This message is rigged to be safe on the 386 - basically it's a hack, so don't look closely for now.. */ #ifdef CONFIG_SMP smp_local_timer_interrupt(); smp_send_timer(); #endif return IRQ_HANDLED; }