void ad9510_write_reg(int regno, uint8_t value) { uint32_t inst = WR | (regno & 0xff); uint32_t v = (inst << 8) | (value & 0xff); spi_transact(SPI_TXONLY, SPI_SS_AD9510, v, 24, SPI_PUSH_FALL); }
int ad9510_read_reg(int regno) { uint32_t inst = RD | (regno & 0xff); uint32_t v = (inst << 8) | 0; uint32_t r = spi_transact(SPI_TXRX, SPI_SS_AD9510, v, 24, SPI_PUSH_FALL | SPI_LATCH_FALL); return r & 0xff; }
static void handle_udp_ctrl_packet( struct socket_address src, struct socket_address dst, unsigned char *payload, int payload_len ){ //printf("Got ctrl packet #words: %d\n", (int)payload_len); const usrp2_ctrl_data_t *ctrl_data_in = (usrp2_ctrl_data_t *)payload; uint32_t ctrl_data_in_id = ctrl_data_in->id; //ensure that the protocol versions match if (payload_len >= sizeof(uint32_t) && ctrl_data_in->proto_ver != USRP2_FW_COMPAT_NUM){ printf("!Error in control packet handler: Expected compatibility number %d, but got %d\n", USRP2_FW_COMPAT_NUM, ctrl_data_in->proto_ver ); ctrl_data_in_id = USRP2_CTRL_ID_WAZZUP_BRO; } //ensure that this is not a short packet if (payload_len < sizeof(usrp2_ctrl_data_t)){ printf("!Error in control packet handler: Expected payload length %d, but got %d\n", (int)sizeof(usrp2_ctrl_data_t), payload_len ); ctrl_data_in_id = USRP2_CTRL_ID_HUH_WHAT; } //setup the output data usrp2_ctrl_data_t ctrl_data_out; ctrl_data_out.proto_ver = USRP2_FW_COMPAT_NUM; ctrl_data_out.id=USRP2_CTRL_ID_HUH_WHAT; ctrl_data_out.seq=ctrl_data_in->seq; //handle the data based on the id switch(ctrl_data_in_id){ /******************************************************************* * Addressing ******************************************************************/ case USRP2_CTRL_ID_WAZZUP_BRO: ctrl_data_out.id = USRP2_CTRL_ID_WAZZUP_DUDE; memcpy(&ctrl_data_out.data.ip_addr, get_ip_addr(), sizeof(struct ip_addr)); break; /******************************************************************* * SPI ******************************************************************/ case USRP2_CTRL_ID_TRANSACT_ME_SOME_SPI_BRO:{ //transact uint32_t result = spi_transact( (ctrl_data_in->data.spi_args.readback == 0)? SPI_TXONLY : SPI_TXRX, ctrl_data_in->data.spi_args.dev, //which device ctrl_data_in->data.spi_args.data, //32 bit data ctrl_data_in->data.spi_args.num_bits, //length in bits (ctrl_data_in->data.spi_args.mosi_edge == USRP2_CLK_EDGE_RISE)? SPIF_PUSH_FALL : SPIF_PUSH_RISE | (ctrl_data_in->data.spi_args.miso_edge == USRP2_CLK_EDGE_RISE)? SPIF_LATCH_RISE : SPIF_LATCH_FALL ); //load output ctrl_data_out.data.spi_args.data = result; ctrl_data_out.id = USRP2_CTRL_ID_OMG_TRANSACTED_SPI_DUDE; } break; /******************************************************************* * I2C ******************************************************************/ case USRP2_CTRL_ID_DO_AN_I2C_READ_FOR_ME_BRO:{ uint8_t num_bytes = ctrl_data_in->data.i2c_args.bytes; i2c_read( ctrl_data_in->data.i2c_args.addr, ctrl_data_out.data.i2c_args.data, num_bytes ); ctrl_data_out.id = USRP2_CTRL_ID_HERES_THE_I2C_DATA_DUDE; ctrl_data_out.data.i2c_args.bytes = num_bytes; } break; case USRP2_CTRL_ID_WRITE_THESE_I2C_VALUES_BRO:{ uint8_t num_bytes = ctrl_data_in->data.i2c_args.bytes; i2c_write( ctrl_data_in->data.i2c_args.addr, ctrl_data_in->data.i2c_args.data, num_bytes ); ctrl_data_out.id = USRP2_CTRL_ID_COOL_IM_DONE_I2C_WRITE_DUDE; ctrl_data_out.data.i2c_args.bytes = num_bytes; } break; /******************************************************************* * Peek and Poke Register ******************************************************************/ case USRP2_CTRL_ID_GET_THIS_REGISTER_FOR_ME_BRO: switch(ctrl_data_in->data.reg_args.action){ case USRP2_REG_ACTION_FPGA_PEEK32: ctrl_data_out.data.reg_args.data = *((uint32_t *) ctrl_data_in->data.reg_args.addr); break; case USRP2_REG_ACTION_FPGA_PEEK16: ctrl_data_out.data.reg_args.data = *((uint16_t *) ctrl_data_in->data.reg_args.addr); break; case USRP2_REG_ACTION_FPGA_POKE32: *((uint32_t *) ctrl_data_in->data.reg_args.addr) = (uint32_t)ctrl_data_in->data.reg_args.data; break; case USRP2_REG_ACTION_FPGA_POKE16: *((uint16_t *) ctrl_data_in->data.reg_args.addr) = (uint16_t)ctrl_data_in->data.reg_args.data; break; case USRP2_REG_ACTION_FW_PEEK32: ctrl_data_out.data.reg_args.data = fw_regs[(ctrl_data_in->data.reg_args.addr)]; break; case USRP2_REG_ACTION_FW_POKE32: fw_regs[(ctrl_data_in->data.reg_args.addr)] = ctrl_data_in->data.reg_args.data; break; } ctrl_data_out.id = USRP2_CTRL_ID_OMG_GOT_REGISTER_SO_BAD_DUDE; break; /******************************************************************* * UART Control ******************************************************************/ case USRP2_CTRL_ID_SO_LIKE_CAN_YOU_READ_THIS_UART_BRO:{ //executes a readline()-style read, up to num_bytes long, up to and including newline int num_bytes = ctrl_data_in->data.uart_args.bytes; if(num_bytes > 20) num_bytes = 20; num_bytes = fngets_noblock(ctrl_data_in->data.uart_args.dev, (char *) ctrl_data_out.data.uart_args.data, num_bytes); ctrl_data_out.id = USRP2_CTRL_ID_I_HELLA_READ_THAT_UART_DUDE; ctrl_data_out.data.uart_args.bytes = num_bytes; break; } case USRP2_CTRL_ID_HEY_WRITE_THIS_UART_FOR_ME_BRO:{ int num_bytes = ctrl_data_in->data.uart_args.bytes; if(num_bytes > 20) num_bytes = 20; //before we write to the UART, we flush the receive buffer //this assumes that we're interested in the reply hal_uart_rx_flush(ctrl_data_in->data.uart_args.dev); fnputstr(ctrl_data_in->data.uart_args.dev, (char *) ctrl_data_in->data.uart_args.data, num_bytes); ctrl_data_out.id = USRP2_CTRL_ID_MAN_I_TOTALLY_WROTE_THAT_UART_DUDE; ctrl_data_out.data.uart_args.bytes = num_bytes; break; } /******************************************************************* * Echo test ******************************************************************/ case USRP2_CTRL_ID_HOLLER_AT_ME_BRO: ctrl_data_out.data.echo_args.len = payload_len; ctrl_data_out.id = USRP2_CTRL_ID_HOLLER_BACK_DUDE; send_udp_pkt(USRP2_UDP_CTRL_PORT, src, &ctrl_data_out, ctrl_data_in->data.echo_args.len); return; default: ctrl_data_out.id = USRP2_CTRL_ID_HUH_WHAT; } send_udp_pkt(USRP2_UDP_CTRL_PORT, src, &ctrl_data_out, sizeof(ctrl_data_out)); }