static int sk_isa_open(struct net_device *dev) { struct net_local *tp = netdev_priv(dev); unsigned short val = 0; unsigned short oldval; int i; val = 0; for(i = 0; irqlist[i] != 0; i++) { if(irqlist[i] == dev->irq) break; } val |= CYCLE_TIME << 2; val |= i << 4; i = dev->dma - 5; val |= i; if(tp->DataRate == SPEED_4) val |= LINE_SPEED_BIT; else val &= ~LINE_SPEED_BIT; oldval = sk_isa_sifreadb(dev, POSREG); /* Leave cycle bits alone */ oldval |= 0xf3; val &= oldval; sk_isa_sifwriteb(dev, val, POSREG); return tms380tr_open(dev); }
static int proteon_open(struct net_device *dev) { struct net_local *tp = (struct net_local *)dev->priv; unsigned short val = 0; int i; /* Proteon reset sequence */ outb(0, dev->base_addr + 0x11); mdelay(20); outb(0x04, dev->base_addr + 0x11); mdelay(20); outb(0, dev->base_addr + 0x11); mdelay(100); /* set control/status reg */ val = inb(dev->base_addr + 0x11); val |= 0x78; val &= 0xf9; if(tp->DataRate == SPEED_4) val |= 0x20; else val &= ~0x20; outb(val, dev->base_addr + 0x11); outb(0xff, dev->base_addr + 0x12); for(i = 0; irqlist[i] != 0; i++) { if(irqlist[i] == dev->irq) break; } val = i; i = (7 - dev->dma) << 4; val |= i; outb(val, dev->base_addr + 0x13); tms380tr_open(dev); return 0; }
static int proteon_open(struct net_device *dev) { struct net_local *tp = netdev_priv(dev); unsigned short val = 0; int i; outb(0, dev->base_addr + 0x11); mdelay(20); outb(0x04, dev->base_addr + 0x11); mdelay(20); outb(0, dev->base_addr + 0x11); mdelay(100); val = inb(dev->base_addr + 0x11); val |= 0x78; val &= 0xf9; if(tp->DataRate == SPEED_4) val |= 0x20; else val &= ~0x20; outb(val, dev->base_addr + 0x11); outb(0xff, dev->base_addr + 0x12); for(i = 0; irqlist[i] != 0; i++) { if(irqlist[i] == dev->irq) break; } val = i; i = (7 - dev->dma) << 4; val |= i; outb(val, dev->base_addr + 0x13); return tms380tr_open(dev); }
static int abyss_open(struct net_device *dev) { abyss_chipset_init(dev); tms380tr_open(dev); return 0; }