void setup_timer1(void)
{
// Timer1 clock prescaler set to 1 => fTOV1 = 3686.4kHz / 65536 = 56.25Hz (DS p.134)
TCCR1B |= (1<<CS10);
// Increase sampling frequency to 2kHz (= 667Hz per channel) with an error of 0.01% (DS p.122)
OCR1A = 0x0732;
// Timer1 set to CTC mode (DS p.133)
TCCR1B |= 1<<WGM12;
// Enable output compare match interrupt for timer1 (DS p.136)
TIMSK1 |= (1<<OCIE1A);
// Activate the input capture noise canceler and trigger the IC on a positive edge (DS p.133)
TCCR1B |= (1<<ICNC1) | (1<<ICES1);
// Enable input capture interrupt (DS p.136)
TIMSK1 |= (1<<ICIE1);
DBG_OC1A_TOGGLE();
}
static inline void setup_timer1(void)
{
// Timer1 prescaler set to 64 giving us a base freq of 125kHz (DS p.134)
TCCR1B |= (1<<CS11) | (1<<CS10);
// Decrease timer freq to 2kHz (DS p.122)
OCR1A = 0x7c;
// Timer1 set to CTC mode (DS p.133)
TCCR1B |= 1<<WGM12;
// Enable output compare match interrupt for timer1 (DS p.136)
TIMSK1 |= (1<<OCIE1A);
// Activate the input capture noise canceler and trigger the IC on a positive edge (DS p.133)
TCCR1B |= (1<<ICNC1) | (1<<ICES1);
// Enable input capture interrupt (DS p.136)
TIMSK1 |= (1<<ICIE1);
DBG_OC1A_TOGGLE();
}