if (IS_ERR(pclk)) { pr_err("%s:couldn't get %s as parent for gpt\n", __func__, pclk_name); BUG(); } clk_set_parent(gpt_clk, pclk); clk_put(gpt_clk); clk_put(pclk); spear_setup_of_timer(); } /* Add auxdata to pass platform data */ struct of_dev_auxdata spear6xx_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("arm,pl080", SPEAR6XX_ICM3_DMA_BASE, NULL, &pl080_plat_data), {} }; static void __init spear600_dt_init(void) { of_platform_populate(NULL, of_default_bus_match_table, spear6xx_auxdata_lookup, NULL); } static const char *spear600_dt_board_compat[] = { "st,spear600", NULL }; DT_MACHINE_START(SPEAR600_DT, "ST SPEAr600 (Flattened Device Tree)")
*/ static struct pdata_init auxdata_quirks[] __initdata = { #ifdef CONFIG_SOC_OMAP2420 { "nokia,n800", omap2420_n8x0_legacy_init, }, { "nokia,n810", omap2420_n8x0_legacy_init, }, { "nokia,n810-wimax", omap2420_n8x0_legacy_init, }, #endif #ifdef CONFIG_ARCH_OMAP3 { "compulab,omap3-sbc-t3730", omap3_sbc_t3730_twl_init, }, #endif { /* sentinel */ }, }; struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { #ifdef CONFIG_MACH_NOKIA_N8X0 OF_DEV_AUXDATA("ti,omap2420-mmc", 0x4809c000, "mmci-omap.0", NULL), OF_DEV_AUXDATA("menelaus", 0x72, "1-0072", &n8x0_menelaus_platform_data), OF_DEV_AUXDATA("tlv320aic3x", 0x18, "2-0018", &n810_aic33_data), #endif #ifdef CONFIG_ARCH_OMAP3 OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002030, "48002030.pinmux", &pcs_pdata), OF_DEV_AUXDATA("ti,omap3-padconf", 0x480025a0, "480025a0.pinmux", &pcs_pdata), OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002a00, "48002a00.pinmux", &pcs_pdata), OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu", &omap3_iommu_pdata), /* Only on am3517 */ OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL), OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0", &am35xx_emac_pdata), #endif #ifdef CONFIG_ARCH_OMAP4
msm_pm_sleep_status_init(); krait_power_init(); msm_clock_init(&msm8974_clock_init_data); tsens_tm_init_driver(); msm_thermal_device_init(); lge_add_persistent_device(); #if defined (CONFIG_BCMDHD) || defined (CONFIG_BCMDHD_MODULE) init_bcm_wifi(); #endif #if defined(CONFIG_LCD_KCAL) lge_add_lcd_kcal_devices(); #endif } static struct of_dev_auxdata msm8974_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("qcom,hsusb-otg", 0xF9A55000, \ "msm_otg", NULL), OF_DEV_AUXDATA("qcom,ehci-host", 0xF9A55000, \ "msm_ehci_host", NULL), OF_DEV_AUXDATA("qcom,dwc-usb3-msm", 0xF9200000, \ "msm_dwc3", NULL), OF_DEV_AUXDATA("qcom,usb-bam-msm", 0xF9304000, \ "usb_bam", NULL), OF_DEV_AUXDATA("qcom,spi-qup-v2", 0xF9924000, \ "spi_qsd.1", NULL), OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF9824000, \ "msm_sdcc.1", NULL), OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF98A4000, \ "msm_sdcc.2", NULL), OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF9864000, \ "msm_sdcc.3", NULL), OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF98E4000, \
#include <linux/of.h> #include <linux/of_platform.h> #include <linux/kexec.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <mach/bridge-regs.h> #include <plat/irq.h> #include "common.h" static struct of_device_id kirkwood_dt_match_table[] __initdata = { { .compatible = "simple-bus", }, { } }; struct of_dev_auxdata kirkwood_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("marvell,orion-spi", 0xf1010600, "orion_spi.0", NULL), OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011000, "mv64xxx_i2c.0", NULL), OF_DEV_AUXDATA("marvell,orion-wdt", 0xf1020300, "orion_wdt", NULL), OF_DEV_AUXDATA("marvell,orion-sata", 0xf1080000, "sata_mv.0", NULL), OF_DEV_AUXDATA("marvell,orion-nand", 0xf4000000, "orion_nand", NULL), OF_DEV_AUXDATA("marvell,orion-crypto", 0xf1030000, "mv_crypto", NULL), {}, }; static void __init kirkwood_dt_init(void) { pr_info("Kirkwood: %s, TCLK=%d.\n", kirkwood_id(), kirkwood_tclk); /* * Disable propagation of mbus errors to the CPU local bus,
return; node = of_find_node_by_path(path); v2m_sp804_init(of_iomap(node, 0), irq_of_parse_and_map(node, 0)); if (arch_timer_of_register() != 0) twd_local_timer_of_register(); if (arch_timer_sched_clock_init() != 0) versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000); } static struct sys_timer v2m_dt_timer = { .init = v2m_dt_timer_init, }; static struct of_dev_auxdata v2m_dt_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("arm,vexpress-flash", V2M_NOR0, "physmap-flash", &v2m_flash_data), OF_DEV_AUXDATA("arm,primecell", V2M_MMCI, "mb:mmci", &v2m_mmci_data), /* RS1 memory map */ OF_DEV_AUXDATA("arm,vexpress-flash", 0x08000000, "physmap-flash", &v2m_flash_data), OF_DEV_AUXDATA("arm,primecell", 0x1c050000, "mb:mmci", &v2m_mmci_data), {} }; static void __init v2m_dt_init(void) { l2x0_of_init(0x00400000, 0xfe0fffff); of_platform_populate(NULL, of_default_bus_match_table, v2m_dt_auxdata_lookup, NULL); pm_power_off = v2m_power_off; }
#ifdef CONFIG_SOC_OMAP2420 { "nokia,n800", omap2420_n8x0_legacy_init, }, { "nokia,n810", omap2420_n8x0_legacy_init, }, { "nokia,n810-wimax", omap2420_n8x0_legacy_init, }, #endif #ifdef CONFIG_ARCH_OMAP3 { "compulab,omap3-sbc-t3730", omap3_sbc_t3730_twl_init, }, #endif { /* sentinel */ }, }; struct omap_sr_data __maybe_unused omap_sr_pdata[OMAP_SR_NR]; static struct of_dev_auxdata omap_auxdata_lookup[] = { #ifdef CONFIG_MACH_NOKIA_N8X0 OF_DEV_AUXDATA("ti,omap2420-mmc", 0x4809c000, "mmci-omap.0", NULL), OF_DEV_AUXDATA("menelaus", 0x72, "1-0072", &n8x0_menelaus_platform_data), OF_DEV_AUXDATA("tlv320aic3x", 0x18, "2-0018", &n810_aic33_data), #endif #ifdef CONFIG_ARCH_OMAP3 OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu", &omap3_iommu_pdata), OF_DEV_AUXDATA("ti,omap3-smartreflex-core", 0x480cb000, "480cb000.smartreflex", &omap_sr_pdata[OMAP_SR_CORE]), OF_DEV_AUXDATA("ti,omap3-smartreflex-mpu-iva", 0x480c9000, "480c9000.smartreflex", &omap_sr_pdata[OMAP_SR_MPU]), OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x4809c000, "4809c000.mmc", &mmc_pdata[0]), OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x480b4000, "480b4000.mmc", &mmc_pdata[1]), /* Only on am3517 */ OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL), OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0",
rm31080ts_macallan_data.platform_id = RM_PLATFORM_P005; else rm31080ts_macallan_data.platform_id = RM_PLATFORM_D010; mdelay(20); rm31080a_macallan_spi_board[0].irq = gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI); touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI, TOUCH_GPIO_RST_RAYDIUM_SPI, &rm31080ts_macallan_data, &rm31080a_macallan_spi_board[0], ARRAY_SIZE(rm31080a_macallan_spi_board)); return 0; } #ifdef CONFIG_USE_OF struct of_dev_auxdata macallan_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000600, "sdhci-tegra.3", NULL), OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000400, "sdhci-tegra.2", NULL), OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000000, "sdhci-tegra.0", &macallan_tegra_sdhci_platform_data0), OF_DEV_AUXDATA("nvidia,tegra114-camera", 0x0, "tegra_camera", NULL), OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x", NULL), OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d", NULL), OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d", NULL), OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc", NULL), OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi",
case TEGRA_BB_HSIC_HUB: /* HSIC hub */ if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB)) { tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_smsc_hub_pdata; platform_device_register(&tegra_ehci2_device); } break; default: return; } } #ifdef CONFIG_USE_OF struct of_dev_auxdata loki_auxdata_lookup[] __initdata = { T124_SPI_OF_DEV_AUXDATA, OF_DEV_AUXDATA("nvidia,tegra124-apbdma", 0x60020000, "tegra-apbdma", NULL), OF_DEV_AUXDATA("nvidia,tegra124-se", 0x70012000, "tegra12-se", NULL), OF_DEV_AUXDATA("nvidia,tegra124-host1x", TEGRA_HOST1X_BASE, "host1x", NULL), OF_DEV_AUXDATA("nvidia,tegra124-gk20a", TEGRA_GK20A_BAR0_BASE, "gk20a.0", NULL), #ifdef CONFIG_ARCH_TEGRA_VIC OF_DEV_AUXDATA("nvidia,tegra124-vic", TEGRA_VIC_BASE, "vic03.0", NULL), #endif OF_DEV_AUXDATA("nvidia,tegra124-msenc", TEGRA_MSENC_BASE, "msenc", NULL), OF_DEV_AUXDATA("nvidia,tegra124-vi", TEGRA_VI_BASE, "vi.0", NULL), OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISP_BASE, "isp.0", NULL), OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISPB_BASE, "isp.1", NULL), OF_DEV_AUXDATA("nvidia,tegra124-tsec", TEGRA_TSEC_BASE, "tsec", NULL), OF_DEV_AUXDATA("nvidia,tegra114-hsuart", 0x70006000, "serial-tegra.0",
readl((u32 *)uid+0), readl((u32 *)uid+1), readl((u32 *)uid+2), readl((u32 *)uid+3), readl((u32 *)uid+4)); iounmap(uid); } static struct device * __init db8500_soc_device_init(void) { const char *soc_id = db8500_read_soc_id(); return ux500_soc_device_init(soc_id); } static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { /* Requires call-back bindings. */ OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata), /* Requires DMA bindings. */ OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000, "ux500-msp-i2s.0", &msp0_platform_data), OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000, "ux500-msp-i2s.1", &msp1_platform_data), OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000, "ux500-msp-i2s.2", &msp2_platform_data), OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000, "ux500-msp-i2s.3", &msp3_platform_data), /* Requires non-DT:able platform data. */ OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", &db8500_prcmu_pdata), OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL), OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL), OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0",
#include <mach/gpiomux.h> #include <mach/msm_iomap.h> #include <mach/msm_memtypes.h> #include <soc/qcom/restart.h> #include <soc/qcom/socinfo.h> #include <soc/qcom/rpm-smd.h> #include <soc/qcom/smd.h> #include <soc/qcom/smem.h> #include <soc/qcom/spm.h> #include <soc/qcom/pm.h> #include "board-dt.h" #include "clock.h" #include "platsmp.h" static struct of_dev_auxdata apq8084_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("qca,qca1530", 0x00000000, "qca1530.1", NULL), OF_DEV_AUXDATA("qcom,xhci-msm-hsic", 0xf9c00000, "msm_hsic_host", NULL), OF_DEV_AUXDATA("qcom,msm_pcie", 0xFC520000, "msm_pcie.1", NULL), OF_DEV_AUXDATA("qcom,msm_pcie", 0xFC528000, "msm_pcie.2", NULL), {} }; void __init apq8084_reserve(void) { of_scan_flat_dt(dt_scan_for_memory_reserve, NULL); } /* * Used to satisfy dependencies for devices that need to be * run early or in a particular order. Most likely your device doesn't fall * into this category, and thus the driver should not be added here. The
#include <linux/irq.h> #include <linux/irqdomain.h> #include <linux/of_irq.h> #include <linux/of_platform.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> #include <mach/irqs.h> #include <mach/regs-apbc.h> #include "common.h" extern void __init mmp_dt_irq_init(void); extern void __init mmp_dt_init_timer(void); static const struct of_dev_auxdata mmp2_auxdata_lookup[] __initconst = { OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4030000, "pxa2xx-uart.0", NULL), OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.1", NULL), OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4018000, "pxa2xx-uart.2", NULL), OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4016000, "pxa2xx-uart.3", NULL), OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4011000, "pxa2xx-i2c.0", NULL), OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4025000, "pxa2xx-i2c.1", NULL), OF_DEV_AUXDATA("marvell,mmp-gpio", 0xd4019000, "mmp2-gpio", NULL), OF_DEV_AUXDATA("mrvl,mmp-rtc", 0xd4010000, "sa1100-rtc", NULL), {} }; static void __init mmp2_dt_init(void) { of_platform_populate(NULL, of_default_bus_match_table, mmp2_auxdata_lookup, NULL); }
.init_machine = hrefv60_init_machine, MACHINE_END MACHINE_START(SNOWBALL, "Calao Systems Snowball platform") .atag_offset = 0x100, .map_io = u8500_map_io, .init_irq = ux500_init_irq, /* we re-use nomadik timer here */ .timer = &ux500_timer, .init_machine = snowball_init_machine, MACHINE_END #ifdef CONFIG_MACH_UX500_DT struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat), OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat), OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat), OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat), {}, }; static const struct of_device_id u8500_soc_node[] = { /* only create devices below soc node */ { .compatible = "stericsson,db8500", }, { }, }; static void __init u8500_init_machine(void) { struct device *parent = NULL;
static struct amba_pl011_data spear320_uart_data[] = { { .dma_filter = pl08x_filter_id, .dma_tx_param = "uart1_tx", .dma_rx_param = "uart1_rx", }, { .dma_filter = pl08x_filter_id, .dma_tx_param = "uart2_tx", .dma_rx_param = "uart2_rx", }, }; /* Add SPEAr310 auxdata to pass platform data */ static struct of_dev_auxdata spear320_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, &pl022_plat_data), OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL, &pl080_plat_data), OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP0_BASE, NULL, &spear320_ssp_data[0]), OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP1_BASE, NULL, &spear320_ssp_data[1]), OF_DEV_AUXDATA("arm,pl011", SPEAR320_UART1_BASE, NULL, &spear320_uart_data[0]), OF_DEV_AUXDATA("arm,pl011", SPEAR320_UART2_BASE, NULL, &spear320_uart_data[1]), {} }; static void __init spear320_dt_init(void) {
#include <linux/irq.h> #include <linux/of_irq.h> #include <linux/of_platform.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> #include <mach/common.h> #include <mach/mx51.h> /* * Lookup table for attaching a specific name and platform_data pointer to * devices as they get created by of_platform_populate(). Ideally this table * would not exist, but the current clock implementation depends on some devices * having a specific name. */ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = { OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART1_BASE_ADDR, "imx21-uart.0", NULL), OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART2_BASE_ADDR, "imx21-uart.1", NULL), OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART3_BASE_ADDR, "imx21-uart.2", NULL), OF_DEV_AUXDATA("fsl,imx51-fec", MX51_FEC_BASE_ADDR, "imx27-fec.0", NULL), OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx51.0", NULL), OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx51.1", NULL), OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx51.2", NULL), OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx51.3", NULL), OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL), OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL), OF_DEV_AUXDATA("fsl,imx51-cspi", MX51_CSPI_BASE_ADDR, "imx35-cspi.0", NULL), OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx-i2c.0", NULL), OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx-i2c.1", NULL), OF_DEV_AUXDATA("fsl,imx51-sdma", MX51_SDMA_BASE_ADDR, "imx35-sdma", NULL), OF_DEV_AUXDATA("fsl,imx51-wdt", MX51_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL), { /* sentinel */ }
#include <mach/da8xx.h> #define DA8XX_NUM_UARTS 3 static struct of_device_id da8xx_irq_match[] __initdata = { { .compatible = "ti,cp-intc", .data = cp_intc_of_init, }, { } }; static void __init da8xx_init_irq(void) { of_irq_init(da8xx_irq_match); } static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("ti,davinci-i2c", 0x01c22000, "i2c_davinci.1", NULL), OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "davinci-wdt", NULL), OF_DEV_AUXDATA("ti,da830-mmc", 0x01c40000, "da830-mmc.0", NULL), OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f00000, "ehrpwm", NULL), OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f02000, "ehrpwm", NULL), OF_DEV_AUXDATA("ti,da850-ecap", 0x01f06000, "ecap", NULL), OF_DEV_AUXDATA("ti,da850-ecap", 0x01f07000, "ecap", NULL), OF_DEV_AUXDATA("ti,da850-ecap", 0x01f08000, "ecap", NULL), OF_DEV_AUXDATA("ti,da830-spi", 0x01f0e000, "spi_davinci.1", NULL), OF_DEV_AUXDATA("ns16550a", 0x01c42000, "serial8250.0", NULL), OF_DEV_AUXDATA("ns16550a", 0x01d0c000, "serial8250.1", NULL), OF_DEV_AUXDATA("ns16550a", 0x01d0d000, "serial8250.2", NULL), OF_DEV_AUXDATA("ti,davinci_mdio", 0x01e24000, "davinci_mdio.0", NULL), OF_DEV_AUXDATA("ti,davinci-dm6467-emac", 0x01e20000, "davinci_emac.1", NULL), {}
} void __init device_tree_init(void) { if (!initial_boot_params) return; unflatten_and_copy_device_tree(); } static struct pic32_sdhci_platform_data sdhci_data = { .setup_dma = pic32_set_sdhci_adma_fifo_threshold, }; static struct of_dev_auxdata pic32_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("microchip,pic32mzda-sdhci", 0, "sdhci", &sdhci_data), { /* sentinel */} }; static int __init pic32_of_prepare_platform_data(struct of_dev_auxdata *lookup) { struct device_node *root, *np; struct resource res; root = of_find_node_by_path("/"); for (; lookup->compatible; lookup++) { np = of_find_compatible_node(NULL, NULL, lookup->compatible); if (np) { lookup->name = (char *)np->name; if (lookup->phys_addr)
pr_err("failed to find fsl,imx6q-iomux-gpr regmap\n"); } static inline void imx6q_enet_init(void) { imx6_enet_mac_init("fsl,imx6q-fec"); imx6q_enet_phy_init(); imx6q_1588_init(); if (cpu_is_imx6q() && imx_get_soc_revision() == IMX_CHIP_REVISION_2_0) imx6q_enet_clk_sel(); imx6q_enet_plt_init(); } /* Add auxdata to pass platform data */ static const struct of_dev_auxdata imx6q_auxdata_lookup[] __initconst = { OF_DEV_AUXDATA("fsl,imx6q-flexcan", 0x02090000, NULL, &flexcan_pdata[0]), OF_DEV_AUXDATA("fsl,imx6q-flexcan", 0x02094000, NULL, &flexcan_pdata[1]), OF_DEV_AUXDATA("fsl,imx6q-fec", 0x02188000, NULL, &fec_pdata), { /* sentinel */ } }; static void __init imx6q_init_machine(void) { struct device *parent; if (cpu_is_imx6q() && imx_get_soc_revision() == IMX_CHIP_REVISION_2_0) imx_print_silicon_rev("i.MX6QP", IMX_CHIP_REVISION_1_0); else imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q", imx_get_soc_revision());
return 0; } static void __init tegra_tegranote7c_early_init(void) { tegra_clk_init_from_table(tegranote7c_clk_init_table); tegra_clk_verify_parents(); tegra_soc_device_init("tegranote7c"); #if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU) platform_device_register(&tegra_smmu_device); #endif } #ifdef CONFIG_USE_OF struct of_dev_auxdata tegranote7c_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x", NULL), OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d", NULL), OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d", NULL), OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc", NULL), OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi", NULL), OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp", NULL), OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec", NULL), OF_DEV_AUXDATA("nvidia,tegra114-pwfm", TEGRA_PWFM0_BASE, "tegra_pwm.0", NULL), OF_DEV_AUXDATA("nvidia,tegra114-pwfm", TEGRA_PWFM1_BASE, "tegra_pwm.1",
*/ static struct pdata_init auxdata_quirks[] __initdata = { #ifdef CONFIG_SOC_OMAP2420 { "nokia,n800", omap2420_n8x0_legacy_init, }, { "nokia,n810", omap2420_n8x0_legacy_init, }, { "nokia,n810-wimax", omap2420_n8x0_legacy_init, }, #endif #ifdef CONFIG_ARCH_OMAP3 { "compulab,omap3-sbc-t3730", omap3_sbc_t3730_twl_init, }, #endif { /* sentinel */ }, }; static struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { #ifdef CONFIG_MACH_NOKIA_N8X0 OF_DEV_AUXDATA("ti,omap2420-mmc", 0x4809c000, "mmci-omap.0", NULL), OF_DEV_AUXDATA("menelaus", 0x72, "1-0072", &n8x0_menelaus_platform_data), OF_DEV_AUXDATA("tlv320aic3x", 0x18, "2-0018", &n810_aic33_data), #endif #ifdef CONFIG_ARCH_OMAP3 OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu", &omap3_iommu_pdata), OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x4809c000, "4809c000.mmc", &mmc_pdata[0]), OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x480b4000, "480b4000.mmc", &mmc_pdata[1]), OF_DEV_AUXDATA("nokia,n900-ir", 0, "n900-ir", &rx51_ir_data), /* Only on am3517 */ OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL), OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0", &am35xx_emac_pdata), /* McBSP modules with sidetone core */ #if IS_ENABLED(CONFIG_SND_OMAP_SOC_MCBSP)
#include <asm/mach/arch.h> #include <asm/hardware/gic.h> #include "board.h" #include "clock.h" #include "common.h" #ifdef CONFIG_USE_OF static struct of_device_id tegra_dt_match_table[] __initdata = { { .compatible = "simple-bus", }, {} }; struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000000, "sdhci-tegra.0", NULL), OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000200, "sdhci-tegra.1", NULL), OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000400, "sdhci-tegra.2", NULL), OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000600, "sdhci-tegra.3", NULL), OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C000, "tegra-i2c.0", NULL), OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C400, "tegra-i2c.1", NULL), OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C500, "tegra-i2c.2", NULL), OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C700, "tegra-i2c.3", NULL), OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000D000, "tegra-i2c.4", NULL), {} }; static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = { /* name parent rate enabled */ { "uarta", "pll_p", 408000000, true }, { NULL, NULL, 0, 0},
#include <asm/hardware/gic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> #include <asm/setup.h> #include <mach/iomap.h> #include <mach/irqs.h> #include "board.h" #include "board-harmony.h" #include "clock.h" #include "devices.h" struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL), OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL), OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL), OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL), OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL), OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL), OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL), OF_DEV_AUXDATA("nvidia,tegra20-i2c-dvc", TEGRA_DVC_BASE, "tegra-i2c.3", NULL), OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL), OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra-i2s.1", NULL), OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL), OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0", &tegra_ehci1_pdata), OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1", &tegra_ehci2_pdata), OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2",
&ssp0_device, &aaci_device, &mmc0_device, &kmi0_device, &kmi1_device, }; #ifdef CONFIG_OF /* * Lookup table for attaching a specific name and platform_data pointer to * devices as they get created by of_platform_populate(). Ideally this table * would not exist, but the current clock implementation depends on some devices * having a specific name. */ struct of_dev_auxdata versatile_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI0_BASE, "fpga:05", &mmc0_plat_data), OF_DEV_AUXDATA("arm,primecell", VERSATILE_KMI0_BASE, "fpga:06", NULL), OF_DEV_AUXDATA("arm,primecell", VERSATILE_KMI1_BASE, "fpga:07", NULL), OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART3_BASE, "fpga:09", NULL), /* FIXME: this is buggy, the platform data is needed for this MMC instance too */ OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI1_BASE, "fpga:0b", NULL), OF_DEV_AUXDATA("arm,primecell", VERSATILE_CLCD_BASE, "dev:20", &clcd_plat_data), OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART0_BASE, "dev:f1", NULL), OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART1_BASE, "dev:f2", NULL), OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART2_BASE, "dev:f3", NULL), OF_DEV_AUXDATA("arm,primecell", VERSATILE_SSP_BASE, "dev:f4", &ssp0_plat_data), #if 0 /* * These entries are unnecessary because no clocks referencing
}, [MEMTYPE_EBI0] = { .flags = MEMTYPE_FLAGS_1M_ALIGN, }, [MEMTYPE_EBI1] = { .flags = MEMTYPE_FLAGS_1M_ALIGN, }, }; static int msm8610_paddr_to_memtype(unsigned int paddr) { return MEMTYPE_EBI1; } static struct of_dev_auxdata msm8610_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF9824000, \ "msm_sdcc.1", NULL), OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF98A4000, \ "msm_sdcc.2", NULL), OF_DEV_AUXDATA("qcom,sdhci-msm", 0xF9824900, \ "msm_sdcc.1", NULL), OF_DEV_AUXDATA("qcom,sdhci-msm", 0xF98A4900, \ "msm_sdcc.2", NULL), {} }; static struct reserve_info msm8610_reserve_info __initdata = { .memtype_reserve_table = msm8610_reserve_table, .paddr_to_memtype = msm8610_paddr_to_memtype, }; static void __init msm8610_early_memory(void)
msm_rpm_driver_init(); msm_lpmrs_module_init(); rpm_regulator_smd_driver_init(); msm_spm_device_init(); krait_power_init(); if (machine_is_msm8974_rumi()) msm_clock_init(&msm8974_rumi_clock_init_data); else msm_clock_init(&msm8974_clock_init_data); msm8974_init_buses(); msm_thermal_device_init(); mxt_init_vkeys_8974(); } static struct of_dev_auxdata msm8974_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("qcom,hsusb-otg", 0xF9A55000, \ "msm_otg", NULL), OF_DEV_AUXDATA("qcom,dwc-usb3-msm", 0xF9200000, \ "msm_dwc3", NULL), OF_DEV_AUXDATA("qcom,usb-bam-msm", 0xF9304000, \ "usb_bam", NULL), OF_DEV_AUXDATA("qcom,spi-qup-v2", 0xF9924000, \ "spi_qsd.1", NULL), OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF9824000, \ "msm_sdcc.1", NULL), OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF98A4000, \ "msm_sdcc.2", NULL), OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF9864000, \ "msm_sdcc.3", NULL), OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF98E4000, \ "msm_sdcc.4", NULL), OF_DEV_AUXDATA("arm,coresight-tmc", 0xFC322000, \
roth_setup_bluedroid_pm(); #endif #ifdef CONFIG_TEGRA_WDT_RECOVERY tegra_wdt_recovery_init(); #endif tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1); roth_sensors_init(); roth_soctherm_init(); roth_fan_init(); tegra_register_fuse(); roth_issp_init(); } #ifdef CONFIG_USE_OF struct of_dev_auxdata roth_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x", NULL), OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d", NULL), OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d", NULL), OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc", NULL), OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi", NULL), OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp", NULL), OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec", NULL), T114_SPI_OF_DEV_AUXDATA, T114_I2C_OF_DEV_AUXDATA, {} }; #endif static void __init tegra_roth_dt_init(void)
.dma_tx_param = "uart3_tx", .dma_rx_param = "uart3_rx", }, { .dma_filter = pl08x_filter_id, .dma_tx_param = "uart4_tx", .dma_rx_param = "uart4_rx", }, { .dma_filter = pl08x_filter_id, .dma_tx_param = "uart5_tx", .dma_rx_param = "uart5_rx", }, }; /* Add SPEAr310 auxdata to pass platform data */ static struct of_dev_auxdata spear310_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, &pl022_plat_data), OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL, &pl080_plat_data), OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART1_BASE, NULL, &spear310_uart_data[0]), OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART2_BASE, NULL, &spear310_uart_data[1]), OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART3_BASE, NULL, &spear310_uart_data[2]), OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART4_BASE, NULL, &spear310_uart_data[3]), OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART5_BASE, NULL, &spear310_uart_data[4]), {} };
static struct sdio_platform_cfg hawaii_sdio_param = { #ifdef CONFIG_BRCM_UNIFIED_DHD_SUPPORT .register_status_notify = hawaii_wifi_status_register, #endif }; static struct sdio_platform_cfg hawaii_sdio0_param = { .configure_sdio_pullup = configure_sdio_pullup, }; static const struct of_dev_auxdata hawaii_auxdata_lookup[] __initconst = { OF_DEV_AUXDATA("bcm,pwm-backlight", 0x0, "pwm-backlight.0", NULL), OF_DEV_AUXDATA("bcm,sdhci", 0x3F190000, "sdhci.1", NULL), OF_DEV_AUXDATA("bcm,sdhci", 0x3F1A0000, "sdhci.2", &hawaii_sdio_param), OF_DEV_AUXDATA("bcm,sdhci", 0x3F180000, "sdhci.0", &hawaii_sdio0_param), #ifdef CONFIG_SOC_CAMERA_OV5640 OF_DEV_AUXDATA("bcm,soc-camera", 0x3c, "soc-back-camera", &iclink_main), #endif #ifdef CONFIG_SOC_CAMERA_OV5648
}; static struct persistent_ram per_ram __initdata = { .descs = per_ram_descs, .num_descs = ARRAY_SIZE(per_ram_descs), .start = RAMCONSOLE_PHYS_ADDR, .size = SZ_1M }; #endif static int msm8226_paddr_to_memtype(unsigned int paddr) { return MEMTYPE_EBI1; } static struct of_dev_auxdata msm_hsic_host_adata[] = { OF_DEV_AUXDATA("qcom,hsic-host", 0xF9A00000, "msm_hsic_host", NULL), {} }; static struct of_dev_auxdata msm8226_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF9824000, \ "msm_sdcc.1", NULL), OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF98A4000, \ "msm_sdcc.2", NULL), OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF9864000, \ "msm_sdcc.3", NULL), OF_DEV_AUXDATA("qcom,sdhci-msm", 0xF9824900, \ "msm_sdcc.1", NULL), OF_DEV_AUXDATA("qcom,sdhci-msm", 0xF98A4900, \ "msm_sdcc.2", NULL), OF_DEV_AUXDATA("qcom,sdhci-msm", 0xF9864900, \
.size = ARRAY_SIZE(msm_clocks_dummy), }; static struct of_device_id irq_match[] __initdata = { { .compatible = "qcom,msm-qgic2", .data = gic_of_init, }, { .compatible = "qcom,msm-gpio", .data = msm_gpio_of_init, }, {} }; static const char *msm9625_dt_match[] __initconst = { "qcom,msm9625", NULL }; static struct of_dev_auxdata msm9625_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("qcom,msm-lsuart-v14", 0xF991F000, \ "msm_serial_hsl.0", NULL), OF_DEV_AUXDATA("qcom,spi-qup-v2", 0xF9928000, \ "spi_qsd.1", NULL), {} }; void __init msm9625_init_irq(void) { l2x0_of_init(L2CC_AUX_CTRL, L2X0_AUX_CTRL_MASK); of_irq_init(irq_match); } static void __init msm_dt_timer_init(void) { arch_timer_of_register(); }
static struct platform_device isi_ov5640 = { .name = "soc-camera-pdrv", .id = 1, .dev = { .platform_data = &iclink_ov5640, }, }; static struct platform_device *devices[] __initdata = { &isi_ov2640, &isi_ov5640, }; #endif struct of_dev_auxdata at91_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("atmel,at91sam9x5-lcd", 0xf8038000, "atmel_hlcdfb_base", &ek_lcdc_data), OF_DEV_AUXDATA("atmel,at91sam9x5-lcd", 0xf8038100, "atmel_hlcdfb_ovl1", &ek_lcdc_data), OF_DEV_AUXDATA("atmel,at91sam9x5-lcd", 0xf0030000, "atmel_hlcdfb_base", &ek_lcdc_data), OF_DEV_AUXDATA("atmel,at91sam9x5-lcd", 0xf0030140, "atmel_hlcdfb_ovl1", &ek_lcdc_data), OF_DEV_AUXDATA("atmel,at91sam9x5-lcd", 0xf0030240, "atmel_hlcdfb_ovl2", &ek_lcdc_data), OF_DEV_AUXDATA("atmel,at91sam9g45-isi", 0xf0034000, "atmel_isi", &isi_data), OF_DEV_AUXDATA("atmel,at91sam9g45-isi", 0xf8048000, "atmel_isi", &isi_data), { /* sentinel */ } }; /************************************/ /* END */ /************************************/ static const struct of_device_id irq_of_match[] __initconst = {