} filp->private_data = &xordev_data[MINOR(inode->i_rdev) / 3]; return 0; } /* ------ PART 2 - PCI DEVICE ------ */ /* PCI device structures */ static int xordev_probe(struct pci_dev *dev, const struct pci_device_id *id); void xordev_remove(struct pci_dev *dev); static DEFINE_PCI_DEVICE_TABLE(pci_devices) = { { PCI_DEVICE(0x1af4, 0x10fd) }, { 0, }, /* list termination */ }; static struct pci_driver xordev_pci_driver = { .name = "xordev", .id_table = pci_devices, .probe = xordev_probe, .remove = xordev_remove, .shutdown = xordev_remove }; /* PCI device handlers */ static irqreturn_t
#include <linux/completion.h> #include <net/mac80211.h> #include "p54.h" #include "lmac.h" #include "p54pci.h" MODULE_AUTHOR("Michael Wu <*****@*****.**>"); MODULE_DESCRIPTION("Prism54 PCI wireless driver"); MODULE_LICENSE("GPL"); MODULE_ALIAS("prism54pci"); MODULE_FIRMWARE("isl3886pci"); static struct pci_device_id p54p_table[] __devinitdata = { /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */ { PCI_DEVICE(0x1260, 0x3890) }, /* 3COM 3CRWE154G72 Wireless LAN adapter */ { PCI_DEVICE(0x10b7, 0x6001) }, /* Intersil PRISM Indigo Wireless LAN adapter */ { PCI_DEVICE(0x1260, 0x3877) }, /* Intersil PRISM Javelin/Xbow Wireless LAN adapter */ { PCI_DEVICE(0x1260, 0x3886) }, /* Intersil PRISM Xbow Wireless LAN adapter (Symbol AP-300) */ { PCI_DEVICE(0x1260, 0xffff) }, { }, }; MODULE_DEVICE_TABLE(pci, p54p_table); static int p54p_upload_firmware(struct ieee80211_hw *dev) {
} static void __devexit dwc3_pci_remove(struct pci_dev *pci) { struct dwc3_pci *glue = pci_get_drvdata(pci); dwc3_put_device_id(glue->dwc3->id); platform_device_unregister(glue->dwc3); pci_set_drvdata(pci, NULL); pci_disable_device(pci); kfree(glue); } static DEFINE_PCI_DEVICE_TABLE(dwc3_pci_id_table) = { { PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3), }, { } /* Terminating Entry */ }; MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table); static struct pci_driver dwc3_pci_driver = { .name = "dwc3-pci", .id_table = dwc3_pci_id_table, .probe = dwc3_pci_probe, .remove = __devexit_p(dwc3_pci_remove), }; MODULE_AUTHOR("Felipe Balbi <*****@*****.**>"); MODULE_LICENSE("Dual BSD/GPL"); MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
/* * Shared support code for AMD K8 northbridges and derivates. * Copyright 2006 Andi Kleen, SUSE Labs. Subject to GPLv2. */ #include <linux/types.h> #include <linux/slab.h> #include <linux/init.h> #include <linux/errno.h> #include <linux/module.h> #include <linux/spinlock.h> #include <asm/amd_nb.h> static u32 *flush_words; const struct pci_device_id amd_nb_misc_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F3) }, {} }; EXPORT_SYMBOL(amd_nb_misc_ids); static struct pci_device_id amd_nb_link_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) }, {} }; /* bus, base, limit */ const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[] __initconst = { { 0x00, 0x18, 0x20 }, { 0xff, 0x00, 0x20 }, { 0xfe, 0x00, 0x20 },
if (!mci) return; priv = mci->pvt_info; pci_disable_device(pdev); pci_disable_device(priv->ch0mm); pci_disable_device(priv->ch1mm); pci_dev_put(priv->ch0mm); pci_dev_put(priv->ch1mm); edac_mc_free(mci); } static const struct pci_device_id i5100_pci_tbl[] __devinitdata = { /* Device 16, Function 0, Channel 0 Memory Map, Error Flag/Mask, ... */ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5100_16) }, { 0, } }; MODULE_DEVICE_TABLE(pci, i5100_pci_tbl); static struct pci_driver i5100_driver = { .name = KBUILD_BASENAME, .probe = i5100_init_one, .remove = __devexit_p(i5100_remove_one), .id_table = i5100_pci_tbl, }; static int __init i5100_init(void) { int pci_rc;
} simple_map_init(&p->map); /* Enable writes to flash bank */ exp_timing_cs0 |= TIMING_BOOT_ACCEL_DIS | TIMING_WR_EN; writel(exp_timing_cs0, p->csr_base + EXP_TIMING_CS0); return 0; release: iounmap(p->csr_base); return err; } static struct pci_device_id vr_nor_pci_ids[] = { {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x500D)}, {0,} }; static void __devexit vr_nor_pci_remove(struct pci_dev *dev) { struct vr_nor_mtd *p = pci_get_drvdata(dev); pci_set_drvdata(dev, NULL); vr_nor_destroy_partitions(p); vr_nor_destroy_mtd_setup(p); vr_nor_destroy_maps(p); kfree(p); pci_release_regions(dev); pci_disable_device(dev); }
} icmsghdrp->icflags = ICMSGHDRFLAG_TRANSACTION | ICMSGHDRFLAG_RESPONSE; vmbus_sendpacket(channel, buf, recvlen, requestid, VmbusPacketTypeDataInBand, 0); } kfree(buf); } static const struct pci_device_id __initconst hv_utils_pci_table[] __maybe_unused = { { PCI_DEVICE(0x1414, 0x5353) }, /* Hyper-V emulated VGA controller */ { 0 } }; MODULE_DEVICE_TABLE(pci, hv_utils_pci_table); static const struct dmi_system_id __initconst hv_utils_dmi_table[] __maybe_unused = { { .ident = "Hyper-V", .matches = { DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), DMI_MATCH(DMI_PRODUCT_NAME, "Virtual Machine"), DMI_MATCH(DMI_BOARD_NAME, "Virtual Machine"), }, },
return PCI_DEVICE_ID_INTEL_5000_FBD0 + channel; case PCI_DEVICE_ID_INTEL_5400_ERR: return PCI_DEVICE_ID_INTEL_5400_FBD0 + channel; default: BUG(); } } static unsigned long chipset_ids[] = { PCI_DEVICE_ID_INTEL_5000_ERR, PCI_DEVICE_ID_INTEL_5400_ERR, 0 }; static struct pci_device_id i5k_amb_ids[] __devinitdata = { { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5000_ERR) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5400_ERR) }, { 0, } }; MODULE_DEVICE_TABLE(pci, i5k_amb_ids); static int __devinit i5k_amb_probe(struct platform_device *pdev) { struct i5k_amb_data *data; struct resource *reso; int i; int res = -ENODEV; data = kzalloc(sizeof(*data), GFP_KERNEL); if (!data) return -ENOMEM;
* because of its small size we include it in the SSB core * instead of creating a standalone module. * * Copyright 2007 Michael Buesch <*****@*****.**> * * Licensed under the GNU/GPL. See COPYING for details. */ #include <linux/pci.h> #include <linux/ssb/ssb.h> #include "ssb_private.h" static const struct pci_device_id b43_pci_bridge_tbl[] = { { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4301) }, { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4306) }, { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4307) }, { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4311) }, { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4312) }, { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4315) }, { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4318) }, { PCI_DEVICE(PCI_VENDOR_ID_BCM_GVC, 0x4318) }, { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4319) }, { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4320) }, { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4321) }, { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4324) }, { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4325) }, { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4328) }, { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4329) }, { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x432b) },
.rx = &rt2400pci_queue_rx, .tx = &rt2400pci_queue_tx, .bcn = &rt2400pci_queue_bcn, .atim = &rt2400pci_queue_atim, .lib = &rt2400pci_rt2x00_ops, .hw = &rt2400pci_mac80211_ops, #ifdef CONFIG_RT2X00_LIB_DEBUGFS .debugfs = &rt2400pci_rt2x00debug, #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ }; /* * RT2400pci module information. */ static struct pci_device_id rt2400pci_device_table[] = { { PCI_DEVICE(0x1814, 0x0101), PCI_DEVICE_DATA(&rt2400pci_ops) }, { 0, } }; MODULE_AUTHOR(DRV_PROJECT); MODULE_VERSION(DRV_VERSION); MODULE_DESCRIPTION("Ralink RT2400 PCI & PCMCIA Wireless LAN driver."); MODULE_SUPPORTED_DEVICE("Ralink RT2460 PCI & PCMCIA chipset based cards"); MODULE_DEVICE_TABLE(pci, rt2400pci_device_table); MODULE_LICENSE("GPL"); static struct pci_driver rt2400pci_driver = { .name = KBUILD_MODNAME, .id_table = rt2400pci_device_table, .probe = rt2x00pci_probe, .remove = __devexit_p(rt2x00pci_remove),
#define XCV_INT_W1S 0x48 #define XCV_INT_ENA_W1C 0x50 #define XCV_INT_ENA_W1S 0x58 #define XCV_INBND_STATUS 0x80 #define XCV_BATCH_CRD_RET 0x100 struct xcv { void __iomem *reg_base; struct pci_dev *pdev; }; static struct xcv *xcv; /* Supported devices */ static const struct pci_device_id xcv_id_table[] = { { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, 0xA056) }, { 0, } /* end of table */ }; MODULE_AUTHOR("Cavium Inc"); MODULE_DESCRIPTION("Cavium Thunder RGX/XCV Driver"); MODULE_LICENSE("GPL v2"); MODULE_VERSION(DRV_VERSION); MODULE_DEVICE_TABLE(pci, xcv_id_table); void xcv_init_hw(void) { u64 cfg; /* Take DLL out of reset */ cfg = readq_relaxed(xcv->reg_base + XCV_RESET);
MODULE_PARM_DESC(msi_en, "Enable MSI"); static DEFINE_IDR(rtsx_pci_idr); static DEFINE_SPINLOCK(rtsx_pci_lock); static struct mfd_cell rtsx_pcr_cells[] = { [RTSX_SD_CARD] = { .name = DRV_NAME_RTSX_PCI_SDMMC, }, [RTSX_MS_CARD] = { .name = DRV_NAME_RTSX_PCI_MS, }, }; static const struct pci_device_id rtsx_pci_ids[] = { { PCI_DEVICE(0x10EC, 0x5209), PCI_CLASS_OTHERS << 16, 0xFF0000 }, { PCI_DEVICE(0x10EC, 0x5229), PCI_CLASS_OTHERS << 16, 0xFF0000 }, { PCI_DEVICE(0x10EC, 0x5289), PCI_CLASS_OTHERS << 16, 0xFF0000 }, { PCI_DEVICE(0x10EC, 0x5227), PCI_CLASS_OTHERS << 16, 0xFF0000 }, { PCI_DEVICE(0x10EC, 0x5249), PCI_CLASS_OTHERS << 16, 0xFF0000 }, { PCI_DEVICE(0x10EC, 0x5287), PCI_CLASS_OTHERS << 16, 0xFF0000 }, { PCI_DEVICE(0x10EC, 0x5286), PCI_CLASS_OTHERS << 16, 0xFF0000 }, { 0, } }; MODULE_DEVICE_TABLE(pci, rtsx_pci_ids); void rtsx_pci_start_run(struct rtsx_pcr *pcr) { /* If pci device removed, don't queue idle work any more */ if (pcr->remove_pci)
static struct comedi_driver apci1564_driver = { .driver_name = "addi_apci_1564", .module = THIS_MODULE, .auto_attach = apci1564_auto_attach, .detach = i_ADDI_Detach, }; static int apci1564_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) { return comedi_pci_auto_config(dev, &apci1564_driver, id->driver_data); } static const struct pci_device_id apci1564_pci_table[] = { { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1006) }, { 0 } }; MODULE_DEVICE_TABLE(pci, apci1564_pci_table); static struct pci_driver apci1564_pci_driver = { .name = "addi_apci_1564", .id_table = apci1564_pci_table, .probe = apci1564_pci_probe, .remove = comedi_pci_auto_unconfig, }; module_comedi_pci_driver(apci1564_driver, apci1564_pci_driver); MODULE_AUTHOR("Comedi http://www.comedi.org"); MODULE_DESCRIPTION("Comedi low-level driver"); MODULE_LICENSE("GPL");
struct i2c_adapter adapter; void *smba; /* PCI BAR */ struct pci_dev *pci_dev; struct ismt_desc *hw; /* descriptor virt base addr */ dma_addr_t io_rng_dma; /* descriptor HW base addr */ u8 head; /* ring buffer head pointer */ struct completion cmp; /* interrupt completion */ u8 dma_buffer[I2C_SMBUS_BLOCK_MAX + 1]; /* temp R/W data buffer */ bool using_msi; /* type of interrupt flag */ }; /** * ismt_ids - PCI device IDs supported by this driver */ static const struct pci_device_id ismt_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT0) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT1) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMT) }, { 0, } }; MODULE_DEVICE_TABLE(pci, ismt_ids); /* Bus speed control bits for slow debuggers - refer to the docs for usage */ static unsigned int bus_speed; module_param(bus_speed, uint, S_IRUGO); MODULE_PARM_DESC(bus_speed, "Bus Speed in kHz (0 = BIOS default)"); /** * __ismt_desc_dump() - dump the contents of a specific descriptor */
return 0; err_disable: pci_disable_device(pdev); return err; } static void cs5535_mfd_remove(struct pci_dev *pdev) { mfd_remove_devices(&pdev->dev); pci_disable_device(pdev); } static const struct pci_device_id cs5535_mfd_pci_tbl[] = { { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA) }, { 0, } }; MODULE_DEVICE_TABLE(pci, cs5535_mfd_pci_tbl); static struct pci_driver cs5535_mfd_driver = { .name = DRV_NAME, .id_table = cs5535_mfd_pci_tbl, .probe = cs5535_mfd_probe, .remove = cs5535_mfd_remove, }; module_pci_driver(cs5535_mfd_driver); MODULE_AUTHOR("Andres Salomon <*****@*****.**>");
static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; module_param_array(index, int, NULL, 0444); MODULE_PARM_DESC(index, "Index value for Digigram LX6464ES interface."); module_param_array(id, charp, NULL, 0444); MODULE_PARM_DESC(id, "ID string for Digigram LX6464ES interface."); module_param_array(enable, bool, NULL, 0444); MODULE_PARM_DESC(enable, "Enable/disable specific Digigram LX6464ES soundcards."); static const char card_name[] = "LX6464ES"; #define PCI_DEVICE_ID_PLX_LX6464ES PCI_DEVICE_ID_PLX_9056 static struct pci_device_id snd_lx6464es_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_LX6464ES), .subvendor = PCI_VENDOR_ID_DIGIGRAM, .subdevice = PCI_SUBDEVICE_ID_DIGIGRAM_LX6464ES_SERIAL_SUBSYSTEM }, /* LX6464ES */ { PCI_DEVICE(PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_LX6464ES), .subvendor = PCI_VENDOR_ID_DIGIGRAM, .subdevice = PCI_SUBDEVICE_ID_DIGIGRAM_LX6464ES_CAE_SERIAL_SUBSYSTEM }, /* LX6464ES-CAE */ { 0, }, }; MODULE_DEVICE_TABLE(pci, snd_lx6464es_ids); /* PGO pour USERo dans le registre pci_0x06/loc_0xEC */
.chip_irq_type = INTEL_MID_IRQ_TYPE_EDGE, }; static const struct intel_mid_gpio_ddata gpio_tangier = { .ngpio = 192, .gplr_offset = 4, .flis_base = 0xff0c0000, .flis_len = 0x8000, .get_flis_offset = NULL, .chip_irq_type = INTEL_MID_IRQ_TYPE_EDGE, }; static const struct pci_device_id intel_gpio_ids[] = { { /* Lincroft */ PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x080f), .driver_data = (kernel_ulong_t)&gpio_lincroft, }, { /* Penwell AON */ PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x081f), .driver_data = (kernel_ulong_t)&gpio_penwell_aon, }, { /* Penwell Core */ PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x081a), .driver_data = (kernel_ulong_t)&gpio_penwell_core, }, { /* Cloverview Aon */ PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x08eb),
static ide_pci_device_t slc90e66_chipset __devinitdata = { .name = "SLC90E66", .init_hwif = init_hwif_slc90e66, .channels = 2, .autodma = AUTODMA, .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, .bootable = ON_BOARD, }; static int __devinit slc90e66_init_one(struct pci_dev *dev, const struct pci_device_id *id) { return ide_setup_pci_device(dev, &slc90e66_chipset); } static struct pci_device_id slc90e66_pci_tbl[] = { { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1), 0}, { 0, }, }; MODULE_DEVICE_TABLE(pci, slc90e66_pci_tbl); static struct pci_driver driver = { .name = "SLC90e66_IDE", .id_table = slc90e66_pci_tbl, .probe = slc90e66_init_one, }; static int slc90e66_ide_init(void) { return ide_pci_register_driver(&driver); }
{ PCI_VDEVICE(NVIDIA, 0x0d8a), board_ahci_mcp89 }, /* MCP89 */ { PCI_VDEVICE(NVIDIA, 0x0d8b), board_ahci_mcp89 }, /* MCP89 */ { PCI_VDEVICE(NVIDIA, 0x0d8c), board_ahci_mcp89 }, /* MCP89 */ { PCI_VDEVICE(NVIDIA, 0x0d8d), board_ahci_mcp89 }, /* MCP89 */ { PCI_VDEVICE(NVIDIA, 0x0d8e), board_ahci_mcp89 }, /* MCP89 */ { PCI_VDEVICE(NVIDIA, 0x0d8f), board_ahci_mcp89 }, /* MCP89 */ /* SiS */ { PCI_VDEVICE(SI, 0x1184), board_ahci }, /* SiS 966 */ { PCI_VDEVICE(SI, 0x1185), board_ahci }, /* SiS 968 */ { PCI_VDEVICE(SI, 0x0186), board_ahci }, /* SiS 968 */ /* Marvell */ { PCI_VDEVICE(MARVELL, 0x6145), board_ahci_mv }, /* 6145 */ { PCI_VDEVICE(MARVELL, 0x6121), board_ahci_mv }, /* 6121 */ { PCI_DEVICE(0x1b4b, 0x9123), .class = PCI_CLASS_STORAGE_SATA_AHCI, .class_mask = 0xffffff, .driver_data = board_ahci_yes_fbs }, /* 88se9128 */ { PCI_DEVICE(0x1b4b, 0x9125), .driver_data = board_ahci_yes_fbs }, /* 88se9125 */ { PCI_DEVICE(0x1b4b, 0x917a), .driver_data = board_ahci_yes_fbs }, /* 88se9172 */ { PCI_DEVICE(0x1b4b, 0x91a3), .driver_data = board_ahci_yes_fbs }, /* Promise */ { PCI_VDEVICE(PROMISE, 0x3f20), board_ahci }, /* PDC42819 */ /* Generic, PCI class code for AHCI */ { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
static long esb_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { int new_options, retval = -EINVAL; int new_heartbeat; void __user *argp = (void __user *)arg; int __user *p = argp; static const struct watchdog_info ident = { .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, .firmware_version = 0, .identity = ESB_MODULE_NAME, }; switch (cmd) { case WDIOC_GETSUPPORT: return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0; case WDIOC_GETSTATUS: return put_user(0, p); case WDIOC_GETBOOTSTATUS: return put_user(triggered, p); case WDIOC_SETOPTIONS: { if (get_user(new_options, p)) return -EFAULT; if (new_options & WDIOS_DISABLECARD) { esb_timer_stop(); retval = 0; } if (new_options & WDIOS_ENABLECARD) { esb_timer_start(); retval = 0; } return retval; } case WDIOC_KEEPALIVE: esb_timer_keepalive(); return 0; case WDIOC_SETTIMEOUT: { if (get_user(new_heartbeat, p)) return -EFAULT; if (esb_timer_set_heartbeat(new_heartbeat)) return -EINVAL; esb_timer_keepalive(); /* Fall */ } case WDIOC_GETTIMEOUT: return put_user(heartbeat, p); default: return -ENOTTY; } } /* * Kernel Interfaces */ static const struct file_operations esb_fops = { .owner = THIS_MODULE, .llseek = no_llseek, .write = esb_write, .unlocked_ioctl = esb_ioctl, .open = esb_open, .release = esb_release, }; static struct miscdevice esb_miscdev = { .minor = WATCHDOG_MINOR, .name = "watchdog", .fops = &esb_fops, }; /* * Data for PCI driver interface */ static DEFINE_PCI_DEVICE_TABLE(esb_pci_tbl) = { { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9), }, { 0, }, /* End of list */ }; MODULE_DEVICE_TABLE(pci, esb_pci_tbl); /* * Init & exit routines */ static unsigned char __devinit esb_getdevice(struct pci_dev *pdev) { if (pci_enable_device(pdev)) { ; goto err_devput; } if (pci_request_region(pdev, 0, ESB_MODULE_NAME)) { ; goto err_disable; } BASEADDR = pci_ioremap_bar(pdev, 0); if (BASEADDR == NULL) { /* Something's wrong here, BASEADDR has to be set */ ; goto err_release; } /* Done */ esb_pci = pdev; return 1; err_release: pci_release_region(pdev, 0); err_disable: pci_disable_device(pdev); err_devput: return 0; } static void __devinit esb_initdevice(void) { u8 val1; u16 val2; /* * Config register: * Bit 5 : 0 = Enable WDT_OUTPUT * Bit 2 : 0 = set the timer frequency to the PCI clock * divided by 2^15 (approx 1KHz). * Bits 1:0 : 11 = WDT_INT_TYPE Disabled. * The watchdog has two timers, it can be setup so that the * expiry of timer1 results in an interrupt and the expiry of * timer2 results in a reboot. We set it to not generate * any interrupts as there is not much we can do with it * right now. */ pci_write_config_word(esb_pci, ESB_CONFIG_REG, 0x0003); /* Check that the WDT isn't already locked */ pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val1); if (val1 & ESB_WDT_LOCK) ; /* Set the timer to watchdog mode and disable it for now */ pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x00); /* Check if the watchdog was previously triggered */ esb_unlock_registers(); val2 = readw(ESB_RELOAD_REG); if (val2 & ESB_WDT_TIMEOUT) triggered = WDIOF_CARDRESET; /* Reset WDT_TIMEOUT flag and timers */ esb_unlock_registers(); writew((ESB_WDT_TIMEOUT | ESB_WDT_RELOAD), ESB_RELOAD_REG); /* And set the correct timeout value */ esb_timer_set_heartbeat(heartbeat); } static int __devinit esb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) { int ret; cards_found++; if (cards_found == 1) // printk(KERN_INFO PFX "Intel 6300ESB WatchDog Timer Driver v%s\n", ; if (cards_found > 1) { ; return -ENODEV; } /* Check whether or not the hardware watchdog is there */ if (!esb_getdevice(pdev) || esb_pci == NULL) return -ENODEV; /* Check that the heartbeat value is within it's range; if not reset to the default */ if (heartbeat < 0x1 || heartbeat > 2 * 0x03ff) { heartbeat = WATCHDOG_HEARTBEAT; // printk(KERN_INFO PFX // "heartbeat value must be 1<heartbeat<2046, using %d\n", ; } /* Initialize the watchdog and make sure it does not run */ esb_initdevice(); /* Register the watchdog so that userspace has access to it */ ret = misc_register(&esb_miscdev); if (ret != 0) { // printk(KERN_ERR PFX // "cannot register miscdev on minor=%d (err=%d)\n", ; goto err_unmap; } // printk(KERN_INFO PFX // "initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n", ; return 0; err_unmap: iounmap(BASEADDR); pci_release_region(esb_pci, 0); pci_disable_device(esb_pci); esb_pci = NULL; return ret; }
#include <linux/init.h> #include <linux/module.h> #include <linux/pci.h> #include <linux/interrupt.h> #include "ioatdma.h" #include "ioatdma_registers.h" #include "ioatdma_hw.h" MODULE_VERSION(IOAT_DMA_VERSION); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Intel Corporation"); static struct pci_device_id ioat_pci_tbl[] = { /* I/OAT v1 platforms */ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_CNB) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_SCNB) }, { PCI_DEVICE(PCI_VENDOR_ID_UNISYS, PCI_DEVICE_ID_UNISYS_DMA_DIRECTOR) }, /* I/OAT v2 platforms */ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB) }, { 0, } }; struct ioat_device { struct pci_dev *pdev; void __iomem *iobase; struct ioatdma_device *dma; };
/* mei char device for registration */ static struct cdev mei_cdev; /* major number for device */ static int mei_major; /* The device pointer */ /* Currently this driver works as long as there is only a single AMT device. */ static struct pci_dev *mei_device; static struct class *mei_class; /* mei_pci_tbl - PCI Device ID Table */ static DEFINE_PCI_DEVICE_TABLE(mei_pci_tbl) = { {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82946GZ)}, {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G35)}, {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82Q965)}, {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G965)}, {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GM965)}, {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GME965)}, {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q35)}, {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82G33)}, {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q33)}, {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82X38)}, {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_3200)}, {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_6)}, {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_7)}, {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_8)}, {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_9)}, {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_10)},
.tx = &rt2800pci_queue_tx, .bcn = &rt2800pci_queue_bcn, .lib = &rt2800pci_rt2x00_ops, .drv = &rt2800pci_rt2800_ops, .hw = &rt2800pci_mac80211_ops, #ifdef CONFIG_RT2X00_LIB_DEBUGFS .debugfs = &rt2800_rt2x00debug, #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ }; /* * RT2800pci module information. */ #ifdef CONFIG_PCI static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = { { PCI_DEVICE(0x1814, 0x0601) }, { PCI_DEVICE(0x1814, 0x0681) }, { PCI_DEVICE(0x1814, 0x0701) }, { PCI_DEVICE(0x1814, 0x0781) }, { PCI_DEVICE(0x1814, 0x3090) }, { PCI_DEVICE(0x1814, 0x3091) }, { PCI_DEVICE(0x1814, 0x3092) }, { PCI_DEVICE(0x1432, 0x7708) }, { PCI_DEVICE(0x1432, 0x7727) }, { PCI_DEVICE(0x1432, 0x7728) }, { PCI_DEVICE(0x1432, 0x7738) }, { PCI_DEVICE(0x1432, 0x7748) }, { PCI_DEVICE(0x1432, 0x7758) }, { PCI_DEVICE(0x1432, 0x7768) }, { PCI_DEVICE(0x1462, 0x891a) }, { PCI_DEVICE(0x1a3b, 0x1059) },
#define TICKS_TO_SECS(ticks) ((ticks) * 128 / 1000) #define HPWDT_MAX_TIMER TICKS_TO_SECS(65535) #define DEFAULT_MARGIN 30 static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */ static unsigned int reload; /* the computed soft_margin */ static bool nowayout = WATCHDOG_NOWAYOUT; static char expect_release; static unsigned long hpwdt_is_open; static void __iomem *pci_mem_addr; /* the PCI-memory address */ static unsigned long __iomem *hpwdt_timer_reg; static unsigned long __iomem *hpwdt_timer_con; static const struct pci_device_id hpwdt_devices[] = { { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) }, /* iLO2 */ { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) }, /* iLO3 */ {0}, /* terminate list */ }; MODULE_DEVICE_TABLE(pci, hpwdt_devices); #ifdef CONFIG_HPWDT_NMI_DECODING #define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */ #define CRU_BIOS_SIGNATURE_VALUE 0x55524324 #define PCI_BIOS32_PARAGRAPH_LEN 16 #define PCI_ROM_BASE1 0x000F0000 #define ROM_SIZE 0x10000 struct bios32_service_dir { u32 signature; u32 entry_point;
#define PCI_DEVICE_ID_JR3_3_CHANNEL 0x3113 #define PCI_DEVICE_ID_JR3_4_CHANNEL 0x3114 static int jr3_pci_attach(struct comedi_device *dev, struct comedi_devconfig *it); static int jr3_pci_detach(struct comedi_device *dev); static struct comedi_driver driver_jr3_pci = { .driver_name = "jr3_pci", .module = THIS_MODULE, .attach = jr3_pci_attach, .detach = jr3_pci_detach, }; static DEFINE_PCI_DEVICE_TABLE(jr3_pci_pci_table) = { { PCI_DEVICE(PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_1_CHANNEL) }, { PCI_DEVICE(PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_1_CHANNEL_NEW) }, { PCI_DEVICE(PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_2_CHANNEL) }, { PCI_DEVICE(PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_3_CHANNEL) }, { PCI_DEVICE(PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_4_CHANNEL) }, {0} }; MODULE_DEVICE_TABLE(pci, jr3_pci_pci_table); struct jr3_pci_dev_private { struct pci_dev *pci_dev; int pci_enabled; volatile struct jr3_t *iobase; int n_channels;
.ai_encoding = das08_pcm_encode12, .ao = NULL, .ao_nbits = 0, .di = das08_di_rbits, .do_ = das08_do_wbits, .do_nchan = 3, .i8255_offset = 0, .i8254_offset = 0, .iosize = 16, }, }; #endif #ifdef CONFIG_COMEDI_PCI static DEFINE_PCI_DEVICE_TABLE(das08_pci_table) = { { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, PCI_DEVICE_ID_PCIDAS08) }, {0} }; MODULE_DEVICE_TABLE(pci, das08_pci_table); #endif #define devpriv ((struct das08_private_struct *)dev->private) #define thisboard ((const struct das08_board_struct *)dev->board_ptr) #define TIMEOUT 100000 static int das08_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) { int i, n;
.event_descs = snb_uncore_imc_events, .format_group = &snb_uncore_imc_format_group, .perf_ctr = SNB_UNCORE_PCI_IMC_DATA_READS_BASE, .event_mask = SNB_UNCORE_PCI_IMC_EVENT_MASK, .ops = &snb_uncore_imc_ops, .pmu = &snb_uncore_imc_pmu, }; static struct intel_uncore_type *snb_pci_uncores[] = { [SNB_PCI_UNCORE_IMC] = &snb_uncore_imc, NULL, }; static const struct pci_device_id snb_uncore_pci_ids[] = { { /* IMC */ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SNB_IMC), .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), }, { /* end: all zeroes */ }, }; static const struct pci_device_id ivb_uncore_pci_ids[] = { { /* IMC */ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IVB_IMC), .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), }, { /* IMC */ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IVB_E3_IMC), .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0), }, { /* end: all zeroes */ },
pci_set_drvdata(pdev, th); return 0; } static void intel_th_pci_remove(struct pci_dev *pdev) { struct intel_th *th = pci_get_drvdata(pdev); intel_th_free(th); } static const struct pci_device_id intel_th_pci_id_table[] = { { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x9d26), .driver_data = (kernel_ulong_t)0, }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa126), .driver_data = (kernel_ulong_t)0, }, { /* Kaby Lake PCH-H */ PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa2a6), .driver_data = (kernel_ulong_t)0, }, { 0 }, }; MODULE_DEVICE_TABLE(pci, intel_th_pci_id_table);
#include <linux/spinlock.h> #include <linux/timer.h> #include <linux/slab.h> #include <linux/pci_ids.h> #include <linux/pci.h> #include "../w1.h" #include "../w1_int.h" #include "../w1_log.h" MODULE_LICENSE("GPL"); MODULE_AUTHOR("Evgeniy Polyakov <*****@*****.**>"); MODULE_DESCRIPTION("Driver for transport(Dallas 1-wire protocol) over VGA DDC(matrox gpio)."); static struct pci_device_id matrox_w1_tbl[] = { { PCI_DEVICE(PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400) }, { }, }; MODULE_DEVICE_TABLE(pci, matrox_w1_tbl); static int matrox_w1_probe(struct pci_dev *, const struct pci_device_id *); static void matrox_w1_remove(struct pci_dev *); static struct pci_driver matrox_w1_pci_driver = { .name = "matrox_w1", .id_table = matrox_w1_tbl, .probe = matrox_w1_probe, .remove = matrox_w1_remove, }; /*
if (dev->flags & SPEC_FLAG_IRQREQUEST) free_irq(pdev->irq, dev); /* FIXME: Reenable if we are shared */ for (i = 0; i < 3; i++) iounmap(dev->remap[i]); release_firmware(dev->fw); pci_release_regions(pdev); pci_disable_device(pdev); vfree(dev->dmabuf); kfree(dev); } static const struct pci_device_id spec_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_CERN, PCI_DEVICE_ID_CERN_SPEC_V2) }, { 0, }, }; MODULE_DEVICE_TABLE(pci, spec_ids); static struct pci_driver spec_pci_driver = { .name = "spec", .id_table = spec_ids, .probe = spec_probe, .remove = __devexit_p(spec_remove), }; static int __init spec_init(void) { int ret; dev_t dev;