HIZC15_IRQ7, HIZC15_HIZ,
HIZC14_IRQ6, HIZC14_HIZ,
HIZC13_IRQ5, HIZC13_HIZ,
HIZC12_IRQ4, HIZC12_HIZ,
HIZC11_IRQ3, HIZC11_HIZ,
HIZC10_IRQ2, HIZC10_HIZ,
HIZC9_IRQ1, HIZC9_HIZ,
HIZC8_IRQ0, HIZC8_HIZ,
MSELB9_VIO, MSELB9_VIO2,
MSELB8_RGB, MSELB8_SYS,
PINMUX_FUNCTION_END,
};
static pinmux_enum_t pinmux_data[] = {
/* PTA */
PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_IN_PD, PTA7_OUT),
PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_IN_PD),
PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_IN_PD, PTA5_OUT),
PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_IN_PD),
PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_IN_PD),
PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_IN_PD),
PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_IN_PD),
PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_IN_PD),
/* PTB */
PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT),
PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT),
PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT),
PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT),
PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT),
SSI1_SDATA_MARK, SSI1_SCK_MARK, SSI1_WS_MARK, SSI1_CLK_MARK,
SSI2_SDATA_MARK, SSI2_SCK_MARK, SSI2_WS_MARK,
SSI3_SDATA_MARK, SSI3_SCK_MARK, SSI3_WS_MARK,
SDIF1CMD_MARK, SDIF1CD_MARK, SDIF1WP_MARK, SDIF1CLK_MARK,
SDIF1D3_MARK, SDIF1D2_MARK, SDIF1D1_MARK, SDIF1D0_MARK,
SDIF0CMD_MARK, SDIF0CD_MARK, SDIF0WP_MARK, SDIF0CLK_MARK,
SDIF0D3_MARK, SDIF0D2_MARK, SDIF0D1_MARK, SDIF0D0_MARK,
TCLK_MARK,
IRL7_MARK, IRL6_MARK, IRL5_MARK, IRL4_MARK,
PINMUX_MARK_END,
};
static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU),
PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT, PA6_IN_PU),
PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT, PA5_IN_PU),
PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT, PA4_IN_PU),
PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT, PA3_IN_PU),
PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT, PA2_IN_PU),
PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT, PA1_IN_PU),
PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT, PA0_IN_PU),
PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT, PB7_IN_PU),
PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT, PB6_IN_PU),
PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT, PB5_IN_PU),
PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT, PB4_IN_PU),
PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT, PB3_IN_PU),
PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT, PB2_IN_PU),
IRL3_MARK, IRL2_MARK, IRL1_MARK, IRL0_MARK,
TXD3_MARK, TXD2_MARK, TXD1_MARK, TXD0_MARK,
RXD3_MARK, RXD2_MARK, RXD1_MARK, RXD0_MARK,
CE2B_MARK, CE2A_MARK, IOIS16_MARK,
STATUS1_MARK, STATUS0_MARK,
IRQOUT_MARK,
PINMUX_MARK_END,
};
static pinmux_enum_t shx3_pinmux_data[] = {
/* PA GPIO */
PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU),
PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT, PA6_IN_PU),
PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT, PA5_IN_PU),
PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT, PA4_IN_PU),
PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT, PA3_IN_PU),
PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT, PA2_IN_PU),
PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT, PA1_IN_PU),
PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT, PA0_IN_PU),
/* PB GPIO */
PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT, PB7_IN_PU),
PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT, PB6_IN_PU),
PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT, PB5_IN_PU),
PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT, PB4_IN_PU),
PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT, PB3_IN_PU),
PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT, PB2_IN_PU),
PERR_MARK,
SERR_MARK,
WE7_CBE3_MARK,
WE6_CBE2_MARK,
WE5_CBE1_MARK,
WE4_CBE0_MARK,
SCIF2_RXD_MARK,
SIOF_RXD_MARK,
MRESETOUT_MARK,
IRQOUT_MARK,
PINMUX_MARK_END,
};
static const u16 pinmux_data[] = {
/* PA GPIO */
PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT),
PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT),
PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT),
PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT),
PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT),
PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT),
PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT),
PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT),
/* PB GPIO */
PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT),
PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT),
PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT),
PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT),
PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT),
PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT),
SCIF1_RTS_MARK, SCIF1_CTS_MARK, SCIF1_SCK_MARK,
TPU_TO1_MARK, TPU_TO0_MARK,
TPU_TI3B_MARK, TPU_TI3A_MARK,
TPU_TI2B_MARK, TPU_TI2A_MARK,
TPU_TO3_MARK, TPU_TO2_MARK,
SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK,
MMC_DAT_MARK, MMC_CMD_MARK,
MMC_CLK_MARK, MMC_VDDON_MARK,
MMC_ODMOD_MARK,
STATUS0_MARK, STATUS1_MARK,
PINMUX_MARK_END,
};
static pinmux_enum_t pinmux_data[] = {
/* PTA GPIO */
PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU),
PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU),
PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT, PTA5_IN_PU),
PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT, PTA4_IN_PU),
PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT, PTA3_IN_PU),
PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT, PTA2_IN_PU),
PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT, PTA1_IN_PU),
PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT, PTA0_IN_PU),
/* PTB GPIO */
PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT, PTB7_IN_PU),
PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT, PTB6_IN_PU),
PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT, PTB5_IN_PU),
PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT, PTB4_IN_PU),
PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT, PTB3_IN_PU),
PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT, PTB2_IN_PU),
FCE_MARK, FRB_MARK,
NAF7_MARK, NAF6_MARK, NAF5_MARK, NAF4_MARK,
NAF3_MARK, NAF2_MARK, NAF1_MARK, NAF0_MARK,
FSC_MARK, FOE_MARK, FCDE_MARK, FWE_MARK,
LCD_VEPWC_MARK, LCD_VCPWC_MARK, LCD_CLK_MARK, LCD_FLM_MARK,
LCD_M_DISP_MARK, LCD_CL2_MARK, LCD_CL1_MARK, LCD_DON_MARK,
LCD_DATA15_MARK, LCD_DATA14_MARK, LCD_DATA13_MARK, LCD_DATA12_MARK,
LCD_DATA11_MARK, LCD_DATA10_MARK, LCD_DATA9_MARK, LCD_DATA8_MARK,
LCD_DATA7_MARK, LCD_DATA6_MARK, LCD_DATA5_MARK, LCD_DATA4_MARK,
LCD_DATA3_MARK, LCD_DATA2_MARK, LCD_DATA1_MARK, LCD_DATA0_MARK,
PINMUX_MARK_END,
};
static const u16 pinmux_data[] = {
/* PA */
PINMUX_DATA(PA7_DATA, PA7_IN),
PINMUX_DATA(PA6_DATA, PA6_IN),
PINMUX_DATA(PA5_DATA, PA5_IN),
PINMUX_DATA(PA4_DATA, PA4_IN),
PINMUX_DATA(PA3_DATA, PA3_IN),
PINMUX_DATA(PA2_DATA, PA2_IN),
PINMUX_DATA(PA1_DATA, PA1_IN),
PINMUX_DATA(PA0_DATA, PA0_IN),
/* PB */
PINMUX_DATA(PB12_DATA, PB12MD_00, FORCE_OUT),
PINMUX_DATA(WDTOVF_MARK, PB12MD_01),
PINMUX_DATA(IRQOUT_MARK, PB12MD_10, PB12IRQ_00),
PINMUX_DATA(REFOUT_MARK, PB12MD_10, PB12IRQ_01),
PINMUX_DATA(IRQOUT_REFOUT_MARK, PB12MD_10, PB12IRQ_10),
PINMUX_DATA(UBCTRG_MARK, PB12MD_11),
SH_PFC_PIN_NAMED(4, 14, D14),
SH_PFC_PIN_NAMED(4, 15, D15),
SH_PFC_PIN_NAMED(4, 16, D16),
SH_PFC_PIN_NAMED(4, 17, D17),
};
/* Expand to a list of name_DATA, name_FN marks */
#define __PORT_DATA(pn, pfx, sfx) PINMUX_DATA(PORT##pfx##_DATA, PORT##pfx##_FN)
#define PINMUX_EMEV_DATA_ALL() CPU_ALL_PORT(__PORT_DATA, , unused)
static const u16 pinmux_data[] = {
PINMUX_EMEV_DATA_ALL(), /* PINMUX_DATA(PORTN_DATA, PORTN_FN), */
/* GPSR0 */
/* V9 */
PINMUX_DATA(JT_SEL_MARK, FN_JT_SEL),
/* U9 */
PINMUX_DATA(ERR_RST_REQB_MARK, FN_ERR_RST_REQB),
/* V8 */
PINMUX_DATA(REF_CLKO_MARK, FN_REF_CLKO),
/* U8 */
PINMUX_DATA(EXT_CLKI_MARK, FN_EXT_CLKI),
/* B22*/
PINMUX_IPSR_NOFN(LCD3_1_0_PORT18, LCD3_PXCLK, SEL_LCD3_1_0_00),
PINMUX_IPSR_NOFN(LCD3_1_0_PORT18, YUV3_CLK_O, SEL_LCD3_1_0_01),
/* C21 */
PINMUX_DATA(LCD3_PXCLKB_MARK, FN_LCD3_PXCLKB),
/* A21 */
PINMUX_IPSR_NOFN(LCD3_1_0_PORT20, LCD3_CLK_I, SEL_LCD3_1_0_00),
PINMUX_IPSR_NOFN(LCD3_1_0_PORT20, YUV3_CLK_I, SEL_LCD3_1_0_01),
/* B21 */