/** * @brief Configures the FSMC and GPIOs to interface with the SRAM memory. * This function must be called before any write/read operation * on the SRAM. * @param None * @retval None */ void SRAM_Init(void) { FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; FSMC_NORSRAMTimingInitTypeDef p; GPIO_InitTypeDef GPIO_InitStructure; /* Enable GPIOs clock */ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE | RCC_AHB1Periph_GPIOF | RCC_AHB1Periph_GPIOG, ENABLE); /* Enable FSMC clock */ RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE); /*-- GPIOs Configuration -----------------------------------------------------*/ /* +-------------------+--------------------+------------------+------------------+ | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 | | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 | | PD4 <-> FSMC_NOE | PE2 <-> FSMC_A23 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 | | PD5 <-> FSMC_NWE | PE3 <-> FSMC_A19 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 | | PD8 <-> FSMC_D13 | PE4 <-> FSMC_A20 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 | | PD9 <-> FSMC_D14 | PE5 <-> FSMC_A21 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 | | PD10 <-> FSMC_D15 | PE6 <-> FSMC_A22 | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 | | PD11 <-> FSMC_A16 | PE7 <-> FSMC_D4 | PF13 <-> FSMC_A7 |------------------+ | PD12 <-> FSMC_A17 | PE8 <-> FSMC_D5 | PF14 <-> FSMC_A8 | | PD13 <-> FSMC_A18 | PE9 <-> FSMC_D6 | PF15 <-> FSMC_A9 | | PD14 <-> FSMC_D0 | PE10 <-> FSMC_D7 |------------------+ | PD15 <-> FSMC_D1 | PE11 <-> FSMC_D8 | +-------------------| PE12 <-> FSMC_D9 | | PE13 <-> FSMC_D10 | | PE14 <-> FSMC_D11 | | PE15 <-> FSMC_D12 | +--------------------+ */ /* GPIOD configuration */ GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_Init(GPIOD, &GPIO_InitStructure); /* GPIOE configuration */ GPIO_PinAFConfig(GPIOE, GPIO_PinSource0 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource1 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource2 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource3 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource4 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource5 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource6 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource7 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource8 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource9 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource10 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource11 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource12 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource13 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource14 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource15 , GPIO_AF_FSMC); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11| GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15; GPIO_Init(GPIOE, &GPIO_InitStructure); /* GPIOF configuration */ GPIO_PinAFConfig(GPIOF, GPIO_PinSource0 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource1 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource2 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource3 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource4 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource5 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource12 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource13 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource14 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource15 , GPIO_AF_FSMC); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15; GPIO_Init(GPIOF, &GPIO_InitStructure); /* GPIOG configuration */ GPIO_PinAFConfig(GPIOG, GPIO_PinSource0 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOG, GPIO_PinSource1 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOG, GPIO_PinSource2 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOG, GPIO_PinSource3 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOG, GPIO_PinSource4 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOG, GPIO_PinSource5 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOG, GPIO_PinSource9 , GPIO_AF_FSMC); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 |GPIO_Pin_9; GPIO_Init(GPIOG, &GPIO_InitStructure); /*-- FSMC Configuration ------------------------------------------------------*/ p.FSMC_AddressSetupTime = 1; p.FSMC_AddressHoldTime = 0; p.FSMC_DataSetupTime = 2; p.FSMC_BusTurnAroundDuration = 0; p.FSMC_CLKDivision = 0; p.FSMC_DataLatency = 0; p.FSMC_AccessMode = FSMC_AccessMode_A; FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2; FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); /*!< Enable FSMC Bank1_SRAM2 Bank */ FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE); }
void hmc5883lInit(void) { int16_t magADC[3]; int i; int32_t xyz_total[3] = { 0, 0, 0 }; // 32 bit totals so they won't overflow. bool bret = true; // Error indicator gpio_config_t gpio; if (hmc5883Config) { #ifdef STM32F303 if (hmc5883Config->gpioAHBPeripherals) { RCC_AHBPeriphClockCmd(hmc5883Config->gpioAHBPeripherals, ENABLE); } #endif #ifdef STM32F10X if (hmc5883Config->gpioAPB2Peripherals) { RCC_APB2PeriphClockCmd(hmc5883Config->gpioAPB2Peripherals, ENABLE); } #endif #ifdef STM32F40_41xxx if (hmc5883Config->gpioAHB1Peripherals) { RCC_AHB1PeriphClockCmd(hmc5883Config->gpioAHB1Peripherals, ENABLE); } #endif gpio.pin = hmc5883Config->gpioPin; gpio.speed = Speed_2MHz; gpio.mode = Mode_IN_FLOATING; gpioInit(hmc5883Config->gpioPort, &gpio); } delay(50); i2cWrite(MAG_ADDRESS, HMC58X3_R_CONFA, 0x010 + HMC_POS_BIAS, HMC5883_BUS); // Reg A DOR = 0x010 + MS1, MS0 set to pos bias // Note that the very first measurement after a gain change maintains the same gain as the previous setting. // The new gain setting is effective from the second measurement and on. i2cWrite(MAG_ADDRESS, HMC58X3_R_CONFB, 0x60, HMC5883_BUS); // Set the Gain to 2.5Ga (7:5->011) delay(100); hmc5883lRead(magADC); for (i = 0; i < 10; i++) { // Collect 10 samples i2cWrite(MAG_ADDRESS, HMC58X3_R_MODE, 1, HMC5883_BUS); delay(50); hmc5883lRead(magADC); // Get the raw values in case the scales have already been changed. // Since the measurements are noisy, they should be averaged rather than taking the max. xyz_total[X] += magADC[X]; xyz_total[Y] += magADC[Y]; xyz_total[Z] += magADC[Z]; // Detect saturation. if (-4096 >= MIN(magADC[X], MIN(magADC[Y], magADC[Z]))) { bret = false; break; // Breaks out of the for loop. No sense in continuing if we saturated. } LED1_TOGGLE; } // Apply the negative bias. (Same gain) i2cWrite(MAG_ADDRESS, HMC58X3_R_CONFA, 0x010 + HMC_NEG_BIAS, HMC5883_BUS); // Reg A DOR = 0x010 + MS1, MS0 set to negative bias. for (i = 0; i < 10; i++) { i2cWrite(MAG_ADDRESS, HMC58X3_R_MODE, 1, HMC5883_BUS); delay(50); hmc5883lRead(magADC); // Get the raw values in case the scales have already been changed. // Since the measurements are noisy, they should be averaged. xyz_total[X] -= magADC[X]; xyz_total[Y] -= magADC[Y]; xyz_total[Z] -= magADC[Z]; // Detect saturation. if (-4096 >= MIN(magADC[X], MIN(magADC[Y], magADC[Z]))) { bret = false; break; // Breaks out of the for loop. No sense in continuing if we saturated. } LED1_TOGGLE; } magGain[X] = fabsf(660.0f * HMC58X3_X_SELF_TEST_GAUSS * 2.0f * 10.0f / xyz_total[X]); magGain[Y] = fabsf(660.0f * HMC58X3_Y_SELF_TEST_GAUSS * 2.0f * 10.0f / xyz_total[Y]); magGain[Z] = fabsf(660.0f * HMC58X3_Z_SELF_TEST_GAUSS * 2.0f * 10.0f / xyz_total[Z]); // leave test mode i2cWrite(MAG_ADDRESS, HMC58X3_R_CONFA, 0x70, HMC5883_BUS); // Configuration Register A -- 0 11 100 00 num samples: 8 ; output rate: 15Hz ; normal measurement mode i2cWrite(MAG_ADDRESS, HMC58X3_R_CONFB, 0x20, HMC5883_BUS); // Configuration Register B -- 001 00000 configuration gain 1.3Ga i2cWrite(MAG_ADDRESS, HMC58X3_R_MODE, 0x00, HMC5883_BUS); // Mode register -- 000000 00 continuous Conversion Mode delay(100); if (!bret) { // Something went wrong so get a best guess magGain[X] = 1.0f; magGain[Y] = 1.0f; magGain[Z] = 1.0f; } hmc5883lConfigureDataReadyInterruptHandling(); }
int main ( void ) { // enable nvic clock for dma // #if 1 NVIC_InitTypeDef NVIC_InitStructure; /* Enable the DMA Stream IRQ Channel */ NVIC_InitStructure.NVIC_IRQChannel = DMA_STREAM_IRQ; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); #endif // set us up the bomb // DMA_InitTypeDef DMA_InitStructure __attribute((aligned (4))); /* Enable the DMA clock */ RCC_AHB1PeriphClockCmd ( DMA_STREAM_CLOCK, ENABLE ); /* Configure the DMA Stream */ //DMA_Cmd ( DMA_STREAM, DISABLE ); DMA_DeInit ( DMA_STREAM ); while(DMA_GetCmdStatus(DMA_STREAM) != DISABLE); /* Set the parameters to be configured */ DMA_InitStructure.DMA_Channel = DMA_CHANNEL; // GPIO data register IDR input, ODR output DMA_InitStructure.DMA_BufferSize = (uint32_t) (BUFSIZE); #if 1 // M2M DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToMemory; DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)src; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)dst; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Enable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; #else #endif DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; //DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full; //Full 1QuarterFull DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; // Single DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; // Single INC4 INC8 INC16 DMA_Init(DMA_STREAM, &DMA_InitStructure); //DMA2_Stream1->CR &= ~DMA_SxCR_EN; //pixelclock_start(); //DMA2_Stream1->CR|=DMA_SxCR_EN; /* Enable DMA Transfer Complete interrupt */ DMA_ITConfig ( DMA_STREAM, DMA_IT_TC, ENABLE ); // interupts needed? DMA_Cmd ( DMA_STREAM, ENABLE ); //while(DMA_GetCmdStatus(DMA_STREAM) != ENABLE); RCC-> APB2ENR |= RCC_APB2ENR_TIM1EN; TIM1->PSC = 0; // clk is 16MHz, no prescaler TIM1->ARR = 100; // -> the whole 10-beat DMA transfer takes cca 1000 clk TIM1->DIER = TIM_DIER_UDE | TIM_DIER_UIE; /* Update DMA enable */ TIM1->CR1 = TIM_CR1_CEN; /* Counter enable */ while (!(DMA2->LISR & DMA_LISR_TCIF1)); // wait until DMA transfer finishes // wait forever while ( 1 ) { __asm__("nop"); // main spin } // while forever return 0; }
void init_USART1(uint32_t baudrate){ /* This is a concept that has to do with the libraries provided by ST * to make development easier the have made up something similar to * classes, called TypeDefs, which actually just define the common * parameters that every peripheral needs to work correctly * * They make our life easier because we don't have to mess around with * the low level stuff of setting bits in the correct registers */ GPIO_InitTypeDef GPIO_InitStruct; // this is for the GPIO pins used as TX and RX USART_InitTypeDef USART_InitStruct; // this is for the USART1 initilization NVIC_InitTypeDef NVIC_InitStructure; // this is used to configure the NVIC (nested vector interrupt controller) /* enable APB2 peripheral clock for USART1 * note that only USART1 and USART6 are connected to APB2 * the other USARTs are connected to APB1 */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); /* enable the peripheral clock for the pins used by * USART1, PB6 for TX and PB7 for RX */ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE); /* This sequence sets up the TX and RX pins * so they work correctly with the USART1 peripheral */ GPIO_InitStruct.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7; // Pins 6 (TX) and 7 (RX) are used GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF; // the pins are configured as alternate function so the USART peripheral has access to them GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz; // this defines the IO speed and has nothing to do with the baudrate! GPIO_InitStruct.GPIO_OType = GPIO_OType_PP; // this defines the output type as push pull mode (as opposed to open drain) GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP; // this activates the pullup resistors on the IO pins GPIO_Init(GPIOB, &GPIO_InitStruct); // now all the values are passed to the GPIO_Init() function which sets the GPIO registers /* The RX and TX pins are now connected to their AF * so that the USART1 can take over control of the * pins */ GPIO_PinAFConfig(GPIOB, GPIO_PinSource6, GPIO_AF_USART1); // GPIO_PinAFConfig(GPIOB, GPIO_PinSource7, GPIO_AF_USART1); /* Now the USART_InitStruct is used to define the * properties of USART1 */ USART_InitStruct.USART_BaudRate = baudrate; // the baudrate is set to the value we passed into this init function USART_InitStruct.USART_WordLength = USART_WordLength_8b;// we want the data frame size to be 8 bits (standard) USART_InitStruct.USART_StopBits = USART_StopBits_1; // we want 1 stop bit (standard) USART_InitStruct.USART_Parity = USART_Parity_No; // we don't want a parity bit (standard) USART_InitStruct.USART_HardwareFlowControl = USART_HardwareFlowControl_None; // we don't want flow control (standard) USART_InitStruct.USART_Mode = USART_Mode_Tx | USART_Mode_Rx; // we want to enable the transmitter and the receiver USART_Init(USART1, &USART_InitStruct); // again all the properties are passed to the USART_Init function which takes care of all the bit setting /* Here the USART1 receive interrupt is enabled * and the interrupt controller is configured * to jump to the USART1_IRQHandler() function * if the USART1 receive interrupt occurs */ USART_ITConfig(USART1, USART_IT_RXNE, ENABLE); // enable the USART1 receive interrupt NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; // we want to configure the USART1 interrupts NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;// this sets the priority group of the USART1 interrupts NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; // this sets the subpriority inside the group NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; // the USART1 interrupts are globally enabled NVIC_Init(&NVIC_InitStructure); // the properties are passed to the NVIC_Init function which takes care of the low level stuff // finally this enables the complete USART1 peripheral USART_Cmd(USART1, ENABLE); }
/** * Initialises all system peripherals */ void PIOS_SYS_Init(void) { /* Setup STM32 system (RCC, clock, PLL and Flash configuration) - CMSIS Function */ SystemInit(); SystemCoreClockUpdate(); /* update SystemCoreClock for use elsewhere */ /* * @todo might make sense to fetch the bus clocks and save them somewhere to avoid * having to use the clunky get-all-clocks API everytime we need one. */ /* Initialise Basic NVIC */ /* do this early to ensure that we take exceptions in the right place */ NVIC_Configuration(); /* Init the delay system */ PIOS_DELAY_Init(); /* * Turn on all the peripheral clocks. * Micromanaging clocks makes no sense given the power situation in the system, so * light up everything we might reasonably use here and just leave it on. */ RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE | RCC_AHB1Periph_GPIOF | RCC_AHB1Periph_GPIOG | RCC_AHB1Periph_GPIOH | RCC_AHB1Periph_GPIOI | RCC_AHB1Periph_CRC | RCC_AHB1Periph_FLITF | RCC_AHB1Periph_SRAM1 | RCC_AHB1Periph_SRAM2 | RCC_AHB1Periph_BKPSRAM | RCC_AHB1Periph_DMA1 | RCC_AHB1Periph_DMA2 | // RCC_AHB1Periph_ETH_MAC | No ethernet // RCC_AHB1Periph_ETH_MAC_Tx | // RCC_AHB1Periph_ETH_MAC_Rx | // RCC_AHB1Periph_ETH_MAC_PTP | // RCC_AHB1Periph_OTG_HS | No high-speed USB (requires external PHY) // RCC_AHB1Periph_OTG_HS_ULPI | No ULPI PHY (see above) 0, ENABLE); RCC_AHB2PeriphClockCmd( // RCC_AHB2Periph_DCMI | No camera @todo might make sense later for basic vision support? // RCC_AHB2Periph_CRYP | No crypto // RCC_AHB2Periph_HASH | No hash generator // RCC_AHB2Periph_RNG | No random numbers @todo might be good to have later if entropy is desired // RCC_AHB2Periph_OTG_FS | 0, ENABLE); RCC_AHB3PeriphClockCmd( // RCC_AHB3Periph_FSMC | No external static memory 0, ENABLE); RCC_APB1PeriphClockCmd( RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4 | RCC_APB1Periph_TIM5 | RCC_APB1Periph_TIM6 | RCC_APB1Periph_TIM7 | RCC_APB1Periph_TIM12 | RCC_APB1Periph_TIM13 | RCC_APB1Periph_TIM14 | RCC_APB1Periph_WWDG | RCC_APB1Periph_SPI2 | RCC_APB1Periph_SPI3 | RCC_APB1Periph_USART2 | RCC_APB1Periph_USART3 | RCC_APB1Periph_UART4 | RCC_APB1Periph_UART5 | RCC_APB1Periph_I2C1 | RCC_APB1Periph_I2C2 | RCC_APB1Periph_I2C3 | RCC_APB1Periph_CAN1 | RCC_APB1Periph_CAN2 | RCC_APB1Periph_PWR | RCC_APB1Periph_DAC | 0, ENABLE); RCC_APB2PeriphClockCmd( RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM8 | RCC_APB2Periph_USART1 | RCC_APB2Periph_USART6 | RCC_APB2Periph_ADC | RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2 | RCC_APB2Periph_ADC3 | RCC_APB2Periph_SDIO | RCC_APB2Periph_SPI1 | RCC_APB2Periph_SYSCFG | RCC_APB2Periph_TIM9 | RCC_APB2Periph_TIM10 | RCC_APB2Periph_TIM11 | 0, ENABLE); /* * Configure all pins as input / pullup to avoid issues with * uncommitted pins, excepting special-function pins that we need to * remain as-is. */ GPIO_InitTypeDef GPIO_InitStructure; GPIO_StructInit(&GPIO_InitStructure); GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; // default is un-pulled input GPIO_InitStructure.GPIO_Pin = GPIO_Pin_All; #if (PIOS_USB_ENABLED) GPIO_InitStructure.GPIO_Pin &= ~(GPIO_Pin_11 | GPIO_Pin_12); // leave USB D+/D- alone #endif GPIO_InitStructure.GPIO_Pin &= ~(GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15); // leave JTAG pins alone GPIO_Init(GPIOA, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_All; GPIO_InitStructure.GPIO_Pin &= ~(GPIO_Pin_3 | GPIO_Pin_4); // leave JTAG pins alone GPIO_Init(GPIOB, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_All; GPIO_Init(GPIOC, &GPIO_InitStructure); GPIO_Init(GPIOD, &GPIO_InitStructure); GPIO_Init(GPIOE, &GPIO_InitStructure); GPIO_Init(GPIOF, &GPIO_InitStructure); GPIO_Init(GPIOG, &GPIO_InitStructure); GPIO_Init(GPIOH, &GPIO_InitStructure); GPIO_Init(GPIOI, &GPIO_InitStructure); }
/** * @brief Decrypt Data using TDES * @note DATA transfer is done by DMA * @note DMA2 stream6 channel2 is used to transfer data from memory (the * EncryptedData Tab) to CRYP Peripheral (the INPUT data register). * @note DMA2 stream5 channel2 is used to transfer data from CRYP Peripheral * (the OUTPUT data register to memory (the DecryptedData Tab). * @param None * @retval None */ void TDES_Decrypt_DMA(void) { CRYP_InitTypeDef CRYP_InitStructure; CRYP_KeyInitTypeDef CRYP_KeyInitStructure; DMA_InitTypeDef DMA_InitStructure; /* Enable CRYP clock */ RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_CRYP, ENABLE); /* Enable DMA2 clock */ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); /* configure crypto as Decoder TDES *****************************************/ CRYP_FIFOFlush(); /* Crypto Init for Decryption process */ CRYP_InitStructure.CRYP_AlgoDir = CRYP_AlgoDir_Decrypt; CRYP_InitStructure.CRYP_AlgoMode = CRYP_AlgoMode_TDES_ECB; CRYP_InitStructure.CRYP_DataType = CRYP_DataType_32b; CRYP_Init(&CRYP_InitStructure); /* Key Initialisation */ CRYP_KeyInitStructure.CRYP_Key1Left = TDESkey[0]; CRYP_KeyInitStructure.CRYP_Key1Right= TDESkey[1]; CRYP_KeyInitStructure.CRYP_Key2Left = TDESkey[2]; CRYP_KeyInitStructure.CRYP_Key2Right= TDESkey[3]; CRYP_KeyInitStructure.CRYP_Key3Left = TDESkey[4]; CRYP_KeyInitStructure.CRYP_Key3Right= TDESkey[5]; CRYP_KeyInit(&CRYP_KeyInitStructure); CRYP_DMACmd(CRYP_DMAReq_DataOUT, ENABLE); CRYP_DMACmd(CRYP_DMAReq_DataIN, ENABLE); /* DMA Configuration ********************************************************/ /* set commun DMA parameters for Stream 5 and 6*/ DMA_DeInit(DMA2_Stream5); DMA_DeInit(DMA2_Stream6); DMA_InitStructure.DMA_Channel = DMA_Channel_2; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word; DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_BufferSize = DATA_SIZE; /* Set the parameters to be configured specific to stream 6*/ DMA_InitStructure.DMA_PeripheralBaseAddr = CRYP_DIN_REG_ADDR; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)EncryptedData; DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; /* Configure the DMA Stream 6 */ DMA_Init(DMA2_Stream6, &DMA_InitStructure); /* Set the parameters to be configured specific to stream 5*/ DMA_InitStructure.DMA_PeripheralBaseAddr = CRYP_DOUT_REG_ADDR; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)DecryptedData; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; /* Configure the DMA Stream 5 */ DMA_Init(DMA2_Stream5, &DMA_InitStructure); /* Enable DMA streams*/ DMA_Cmd(DMA2_Stream6, ENABLE); DMA_Cmd(DMA2_Stream5, ENABLE); /* Enable Crypo Processor */ CRYP_Cmd(ENABLE); /* wait until the last transfer from OUT FIFO : all encrypted Data are transfered from crypt processor */ while (DMA_GetFlagStatus(DMA2_Stream5, DMA_FLAG_TCIF5) == RESET); /* Disable Crypto and DMA ***************************************************/ CRYP_Cmd(DISABLE); CRYP_DMACmd(CRYP_DMAReq_DataOUT, DISABLE); CRYP_DMACmd(CRYP_DMAReq_DataIN, DISABLE); DMA_Cmd(DMA2_Stream5, DISABLE); DMA_Cmd(DMA2_Stream6, DISABLE); }
/** * @brief Configure the RTC peripheral by selecting the clock source. * @param None * @retval None */ static void RTC_Config(void) { /* Enable the PWR clock */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); /* Allow access to RTC */ PWR_BackupAccessCmd(ENABLE); #if defined (RTC_CLOCK_SOURCE_LSI) /* LSI used as RTC source clock*/ /* The RTC Clock may varies due to LSI frequency dispersion. */ /* Enable the LSI OSC */ RCC_LSICmd(ENABLE); /* Wait till LSI is ready */ while(RCC_GetFlagStatus(RCC_FLAG_LSIRDY) == RESET) { } /* Select the RTC Clock Source */ RCC_RTCCLKConfig(RCC_RTCCLKSource_LSI); /* ck_spre(1Hz) = RTCCLK(LSI) /(uwAsynchPrediv + 1)*(uwSynchPrediv + 1)*/ uwSynchPrediv = 0xFF; uwAsynchPrediv = 0x7F; #elif defined (RTC_CLOCK_SOURCE_LSE) /* LSE used as RTC source clock */ /* Enable the LSE OSC */ RCC_LSEConfig(RCC_LSE_ON); /* Wait till LSE is ready */ while(RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) { } /* Select the RTC Clock Source */ RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE); /* ck_spre(1Hz) = RTCCLK(LSE) /(uwAsynchPrediv + 1)*(uwSynchPrediv + 1)*/ uwSynchPrediv = 0xFF; uwAsynchPrediv = 0x7F; #else #error Please select the RTC Clock source inside the main.c file #endif /* RTC_CLOCK_SOURCE_LSI */ /* Enable the RTC Clock */ RCC_RTCCLKCmd(ENABLE); /* Wait for RTC APB registers synchronisation */ RTC_WaitForSynchro(); /* Write to the first RTC Backup Data Register */ RTC_WriteBackupRegister(RTC_BKP_DR0, FIRST_DATA); /* Display the new RCC BDCR and RTC TAFCR Registers */ LCD_UsrLog ("RTC Reconfig \n"); LCD_UsrLog ("RCC BDCR = 0x%x\n", RCC->BDCR); LCD_UsrLog ("RTC TAFCR = 0x%x\n", RTC->TAFCR); /* Set the Time */ RTC_TimeStructure.RTC_Hours = 0x08; RTC_TimeStructure.RTC_Minutes = 0x00; RTC_TimeStructure.RTC_Seconds = 0x00; /* Set the Date */ RTC_DateStructure.RTC_Month = RTC_Month_January; RTC_DateStructure.RTC_Date = 0x11; RTC_DateStructure.RTC_Year = 0x13; RTC_DateStructure.RTC_WeekDay = RTC_Weekday_Friday; /* Calendar Configuration */ RTC_InitStructure.RTC_AsynchPrediv = uwAsynchPrediv; RTC_InitStructure.RTC_SynchPrediv = uwSynchPrediv; RTC_InitStructure.RTC_HourFormat = RTC_HourFormat_24; RTC_Init(&RTC_InitStructure); /* Set Current Time and Date */ RTC_SetTime(RTC_Format_BCD, &RTC_TimeStructure); RTC_SetDate(RTC_Format_BCD, &RTC_DateStructure); /* Configure the RTC Wakeup Clock source and Counter (Wakeup event each 1 second) */ RTC_WakeUpClockConfig(RTC_WakeUpClock_RTCCLK_Div16); RTC_SetWakeUpCounter(0x7FF); /* Enable the Wakeup Interrupt */ RTC_ITConfig(RTC_IT_WUT, ENABLE); /* Enable Wakeup Counter */ RTC_WakeUpCmd(ENABLE); /* Backup SRAM ***************************************************************/ /* Enable BKPRAM Clock */ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_BKPSRAM, ENABLE); /* Write to Backup SRAM with 32-Bit Data */ for (uwIndex = 0x0; uwIndex < 0x1000; uwIndex += 4) { *(__IO uint32_t *) (BKPSRAM_BASE + uwIndex) = uwIndex; } /* Check the written Data */ for (uwIndex = 0x0; uwIndex < 0x1000; uwIndex += 4) { if ((*(__IO uint32_t *) (BKPSRAM_BASE + uwIndex)) != uwIndex) { uwErrorIndex++; } } if(uwErrorIndex) { LCD_ErrLog ("BKP SRAM Number of errors = %d\n", uwErrorIndex); } else { LCD_UsrLog ("BKP SRAM write OK \n"); } /* Enable the Backup SRAM low power Regulator to retain it's content in VBAT mode */ PWR_BackupRegulatorCmd(ENABLE); /* Wait until the Backup SRAM low power Regulator is ready */ while(PWR_GetFlagStatus(PWR_FLAG_BRR) == RESET) { } /* RTC Backup Data Registers **************************************************/ /* Write to RTC Backup Data Registers */ WriteToBackupReg(FIRST_DATA); }
void PWM_Init(void) { TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; TIM_OCInitTypeDef TIM_OCInitStructure; /* TIM config */ GPIO_InitTypeDef GPIO_InitStructure; /* TIM4 clock enable */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE); /* LEDs are on GPIOD */ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_14 ;// | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP ; GPIO_Init(GPIOD, &GPIO_InitStructure); // GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_TIM4); // GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_TIM4); GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_TIM4); // GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_TIM4); /* pwm set up */ /* Compute the prescaler value */ uint16_t PrescalerValue = (uint16_t) ((SystemCoreClock /2) / 21000000) - 1; /* Time base configuration */ TIM_TimeBaseStructure.TIM_Period = 52500; TIM_TimeBaseStructure.TIM_Prescaler = 31; TIM_TimeBaseStructure.TIM_ClockDivision = 0; TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure); /* PWM1 Mode configuration: Channel1 */ TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; TIM_OCInitStructure.TIM_Pulse = 0; TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; TIM_OC1Init(TIM4, &TIM_OCInitStructure); TIM_OC1PreloadConfig(TIM4, TIM_OCPreload_Enable); /* PWM1 Mode configuration: Channel2 */ TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; TIM_OCInitStructure.TIM_Pulse = 0; TIM_OC2Init(TIM4, &TIM_OCInitStructure); TIM_OC2PreloadConfig(TIM4, TIM_OCPreload_Enable); /* PWM1 Mode configuration: Channel3 */ TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; TIM_OCInitStructure.TIM_Pulse = 0; TIM_OC3Init(TIM4, &TIM_OCInitStructure); TIM_OC3PreloadConfig(TIM4, TIM_OCPreload_Enable); /* PWM1 Mode configuration: Channel4 */ TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; TIM_OCInitStructure.TIM_Pulse = 0; TIM_OC4Init(TIM4, &TIM_OCInitStructure); TIM_OC4PreloadConfig(TIM4, TIM_OCPreload_Enable); TIM_ARRPreloadConfig(TIM4, ENABLE); /* TIM4 enable counter */ TIM_Cmd(TIM4, ENABLE); TIM4->CCR3 = 0; // set brightness }
void WY_init(){ //Enable clock for GPOIG RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOG, ENABLE); //Initialize struct GPIO_InitTypeDef GPIO_InitDefG; //Pins 2,5,7 GPIO_InitDefG.GPIO_Pin = GPIO_Pin_2 | GPIO_Pin_5 | GPIO_Pin_7; //Mode output GPIO_InitDefG.GPIO_Mode = GPIO_Mode_OUT; //Output type push-pull GPIO_InitDefG.GPIO_OType = GPIO_OType_PP; //Without pull resistors GPIO_InitDefG.GPIO_PuPd = GPIO_PuPd_NOPULL; //50MHz pin speed GPIO_InitDefG.GPIO_Speed = GPIO_Speed_50MHz; //Initialize pins GPIO_Init(GPIOG, &GPIO_InitDefG); //Enable clock for GPOIA RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); GPIO_InitTypeDef GPIO_InitDefA; //Pins 8,10 GPIO_InitDefA.GPIO_Pin = GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_12; //Mode output GPIO_InitDefA.GPIO_Mode = GPIO_Mode_OUT; //Output type push-pull GPIO_InitDefA.GPIO_OType = GPIO_OType_PP; //Without pull resistors GPIO_InitDefA.GPIO_PuPd = GPIO_PuPd_NOPULL; //50MHz pin speed GPIO_InitDefA.GPIO_Speed = GPIO_Speed_50MHz; //Initialize pins GPIO_Init(GPIOA, &GPIO_InitDefA); //Enable clock for GPOIC RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); GPIO_InitTypeDef GPIO_InitDefC; //Pins 6,8 GPIO_InitDefC.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_8; //Mode output GPIO_InitDefC.GPIO_Mode = GPIO_Mode_OUT; //Output type push-pull GPIO_InitDefC.GPIO_OType = GPIO_OType_PP; //Without pull resistors GPIO_InitDefC.GPIO_PuPd = GPIO_PuPd_NOPULL; //50MHz pin speed GPIO_InitDefC.GPIO_Speed = GPIO_Speed_50MHz; //Initialize pins GPIO_Init(GPIOC, &GPIO_InitDefC); //Enable clock for GPOID RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE); GPIO_InitTypeDef GPIO_InitDefD; //Pins 8,10,9,14 GPIO_InitDefD.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_11 | GPIO_Pin_10 | GPIO_Pin_9 | GPIO_Pin_14; //Mode output GPIO_InitDefD.GPIO_Mode = GPIO_Mode_OUT; //Output type push-pull GPIO_InitDefD.GPIO_OType = GPIO_OType_PP; //Without pull resistors GPIO_InitDefD.GPIO_PuPd = GPIO_PuPd_NOPULL; //50MHz pin speed GPIO_InitDefD.GPIO_Speed = GPIO_Speed_50MHz; //Initialize pins GPIO_Init(GPIOD, &GPIO_InitDefD); //Enable clock for GPOIE RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOE, ENABLE); GPIO_InitTypeDef GPIO_InitDefE; //Pins 8,10,9,14 GPIO_InitDefE.GPIO_Pin = GPIO_Pin_14 | GPIO_Pin_15; //Mode output GPIO_InitDefE.GPIO_Mode = GPIO_Mode_OUT; //Output type push-pull GPIO_InitDefE.GPIO_OType = GPIO_OType_PP; //Without pull resistors GPIO_InitDefE.GPIO_PuPd = GPIO_PuPd_NOPULL; //50MHz pin speed GPIO_InitDefE.GPIO_Speed = GPIO_Speed_50MHz; //Initialize pins GPIO_Init(GPIOE, &GPIO_InitDefE); }
/** * @brief Configures the TIM Peripheral. * @param None * @retval None */ static void TIM_Config(void) { GPIO_InitTypeDef GPIO_InitStructure; TIM_OCInitTypeDef TIM_OCInitStructure; TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; /* --------------------------- System Clocks Configuration -----------------*/ /* TIM4 clock enable */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE); /* GPIOD clock enable */ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE); /*-------------------------- GPIO Configuration ----------------------------*/ /* GPIOD Configuration: Pins 12, 13, 14 and 15 in output push-pull */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_Init(GPIOD, &GPIO_InitStructure); /* Connect TIM4 pins to AF2 */ GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_TIM4); GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_TIM4); GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_TIM4); GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_TIM4); /* ----------------------------------------------------------------------- TIM4 Configuration: Output Compare Timing Mode: In this example TIM4 input clock (TIM4CLK) is set to 2 * APB1 clock (PCLK1), since APB1 prescaler is different from 1 (APB1 Prescaler = 4, see system_stm32f4xx.c file). TIM4CLK = 2 * PCLK1 PCLK1 = HCLK / 4 => TIM4CLK = 2*(HCLK / 4) = HCLK/2 = SystemCoreClock/2 To get TIM4 counter clock at 2 KHz, the prescaler is computed as follows: Prescaler = (TIM4CLK / TIM1 counter clock) - 1 Prescaler = (168 MHz/(2 * 2 KHz)) - 1 = 41999 To get TIM4 output clock at 1 Hz, the period (ARR)) is computed as follows: ARR = (TIM4 counter clock / TIM4 output clock) - 1 = 1999 TIM4 Channel1 duty cycle = (TIM4_CCR1/ TIM4_ARR)* 100 = 50% TIM4 Channel2 duty cycle = (TIM4_CCR2/ TIM4_ARR)* 100 = 50% TIM4 Channel3 duty cycle = (TIM4_CCR3/ TIM4_ARR)* 100 = 50% TIM4 Channel4 duty cycle = (TIM4_CCR4/ TIM4_ARR)* 100 = 50% ==> TIM4_CCRx = TIM4_ARR/2 = 1000 (where x = 1, 2, 3 and 4). Note: SystemCoreClock variable holds HCLK frequency and is defined in system_stm32f4xx.c file. Each time the core clock (HCLK) changes, user had to call SystemCoreClockUpdate() function to update SystemCoreClock variable value. Otherwise, any configuration based on this variable will be incorrect. ----------------------------------------------------------------------- */ /* Compute the prescaler value */ PrescalerValue = (uint16_t) ((SystemCoreClock /2) / 2000) - 1; /* Time base configuration */ TIM_TimeBaseStructure.TIM_Period = TIM_ARR; TIM_TimeBaseStructure.TIM_Prescaler = PrescalerValue; TIM_TimeBaseStructure.TIM_ClockDivision = 0; TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure); /* Enable TIM4 Preload register on ARR */ TIM_ARRPreloadConfig(TIM4, ENABLE); /* TIM PWM1 Mode configuration: Channel */ TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; TIM_OCInitStructure.TIM_Pulse = TIM_CCR; TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; /* Output Compare PWM1 Mode configuration: Channel1 */ TIM_OC1Init(TIM4, &TIM_OCInitStructure); TIM_CCxCmd(TIM4, TIM_Channel_1, DISABLE); TIM_OC1PreloadConfig(TIM4, TIM_OCPreload_Enable); /* Output Compare PWM1 Mode configuration: Channel2 */ TIM_OC2Init(TIM4, &TIM_OCInitStructure); TIM_CCxCmd(TIM4, TIM_Channel_2, DISABLE); TIM_OC2PreloadConfig(TIM4, TIM_OCPreload_Enable); /* Output Compare PWM1 Mode configuration: Channel3 */ TIM_OC3Init(TIM4, &TIM_OCInitStructure); TIM_CCxCmd(TIM4, TIM_Channel_3, DISABLE); TIM_OC3PreloadConfig(TIM4, TIM_OCPreload_Enable); /* Output Compare PWM1 Mode configuration: Channel4 */ TIM_OC4Init(TIM4, &TIM_OCInitStructure); TIM_CCxCmd(TIM4, TIM_Channel_4, DISABLE); TIM_OC4PreloadConfig(TIM4, TIM_OCPreload_Enable); /* TIM4 enable counter */ TIM_Cmd(TIM4, ENABLE); }
void USB_OTG_BSP_Init(USB_OTG_CORE_HANDLE *pdev) { GPIO_InitTypeDef GPIO_InitStructure; #ifndef USE_ULPI_PHY #ifdef USB_OTG_FS_LOW_PWR_MGMT_SUPPORT EXTI_InitTypeDef EXTI_InitStructure; NVIC_InitTypeDef NVIC_InitStructure; #endif #endif #ifdef USE_USB_OTG_FS RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_GPIOA , ENABLE); /* Configure SOF VBUS ID DM DP Pins */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_11 | GPIO_Pin_12; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ; GPIO_Init(GPIOA, &GPIO_InitStructure); GPIO_PinAFConfig(GPIOA,GPIO_PinSource8,GPIO_AF_OTG1_FS) ; GPIO_PinAFConfig(GPIOA,GPIO_PinSource9,GPIO_AF_OTG1_FS) ; GPIO_PinAFConfig(GPIOA,GPIO_PinSource11,GPIO_AF_OTG1_FS) ; GPIO_PinAFConfig(GPIOA,GPIO_PinSource12,GPIO_AF_OTG1_FS) ; /* this for ID line debug */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; GPIO_InitStructure.GPIO_OType = GPIO_OType_OD; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP ; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_Init(GPIOA, &GPIO_InitStructure); GPIO_PinAFConfig(GPIOA,GPIO_PinSource10,GPIO_AF_OTG1_FS) ; RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE); RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_OTG_FS, ENABLE) ; #else // USE_USB_OTG_HS #ifdef USE_ULPI_PHY // ULPI RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOH | RCC_AHB1Periph_GPIOI, ENABLE); GPIO_PinAFConfig(GPIOA,GPIO_PinSource3, GPIO_AF_OTG2_HS) ; // D0 GPIO_PinAFConfig(GPIOA,GPIO_PinSource5, GPIO_AF_OTG2_HS) ; // CLK GPIO_PinAFConfig(GPIOB,GPIO_PinSource0, GPIO_AF_OTG2_HS) ; // D1 GPIO_PinAFConfig(GPIOB,GPIO_PinSource1, GPIO_AF_OTG2_HS) ; // D2 GPIO_PinAFConfig(GPIOB,GPIO_PinSource5, GPIO_AF_OTG2_HS) ; // D7 GPIO_PinAFConfig(GPIOB,GPIO_PinSource10,GPIO_AF_OTG2_HS) ; // D3 GPIO_PinAFConfig(GPIOB,GPIO_PinSource11,GPIO_AF_OTG2_HS) ; // D4 GPIO_PinAFConfig(GPIOB,GPIO_PinSource12,GPIO_AF_OTG2_HS) ; // D5 GPIO_PinAFConfig(GPIOB,GPIO_PinSource13,GPIO_AF_OTG2_HS) ; // D6 GPIO_PinAFConfig(GPIOH,GPIO_PinSource4, GPIO_AF_OTG2_HS) ; // NXT GPIO_PinAFConfig(GPIOI,GPIO_PinSource11,GPIO_AF_OTG2_HS) ; // DIR GPIO_PinAFConfig(GPIOC,GPIO_PinSource0, GPIO_AF_OTG2_HS) ; // STP // CLK GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 ; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_Init(GPIOA, &GPIO_InitStructure); // D0 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3 ; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ; GPIO_Init(GPIOA, &GPIO_InitStructure); // D1 D2 D3 D4 D5 D6 D7 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_5 | GPIO_Pin_10 | GPIO_Pin_11| GPIO_Pin_12 | GPIO_Pin_13 ; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ; GPIO_Init(GPIOB, &GPIO_InitStructure); // STP GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 ; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_Init(GPIOC, &GPIO_InitStructure); //NXT GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_Init(GPIOH, &GPIO_InitStructure); //DIR GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 ; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_Init(GPIOI, &GPIO_InitStructure); RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_OTG_HS | RCC_AHB1Periph_OTG_HS_ULPI, ENABLE) ; #else #ifdef USE_I2C_PHY RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_GPIOB , ENABLE); /* Configure RESET INTN SCL SDA (Phy/I2C) Pins */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_10 | GPIO_Pin_11; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_Init(GPIOB, &GPIO_InitStructure); GPIO_PinAFConfig(GPIOB,GPIO_PinSource0,GPIO_AF_OTG2_FS) ; GPIO_PinAFConfig(GPIOB,GPIO_PinSource1,GPIO_AF_OTG2_FS) ; GPIO_PinAFConfig(GPIOB,GPIO_PinSource10,GPIO_AF_OTG2_FS) ; GPIO_PinAFConfig(GPIOB,GPIO_PinSource11,GPIO_AF_OTG2_FS); RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_OTG_HS, ENABLE) ; #else RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB , ENABLE); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_Init(GPIOB, &GPIO_InitStructure); GPIO_PinAFConfig(GPIOB,GPIO_PinSource12, GPIO_AF_OTG2_FS) ; GPIO_PinAFConfig(GPIOB,GPIO_PinSource13,GPIO_AF_OTG2_FS) ; GPIO_PinAFConfig(GPIOB,GPIO_PinSource14,GPIO_AF_OTG2_FS) ; GPIO_PinAFConfig(GPIOB,GPIO_PinSource15,GPIO_AF_OTG2_FS) ; RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_OTG_HS, ENABLE) ; #endif #endif // USE_ULPI_PHY #endif //USB_OTG_HS /* enable the PWR clock */ RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE); /* Configure the Key button in EXTI mode */ STM_EVAL_PBInit(BUTTON_USER, BUTTON_MODE_EXTI); #ifdef USB_OTG_FS_LOW_PWR_MGMT_SUPPORT EXTI_ClearITPendingBit(EXTI_Line18); EXTI_InitStructure.EXTI_Line = EXTI_Line18; EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; EXTI_InitStructure.EXTI_LineCmd = ENABLE; EXTI_Init(&EXTI_InitStructure); EXTI_ClearITPendingBit(EXTI_Line18); NVIC_InitStructure.NVIC_IRQChannel = OTG_FS_WKUP_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); EXTI_ClearITPendingBit(EXTI_Line18); #endif #ifdef USB_OTG_HS_LOW_PWR_MGMT_SUPPORT EXTI_ClearITPendingBit(EXTI_Line20); EXTI_InitStructure.EXTI_Line = EXTI_Line20; EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; EXTI_InitStructure.EXTI_LineCmd = ENABLE; EXTI_Init(&EXTI_InitStructure); EXTI_ClearITPendingBit(EXTI_Line20); NVIC_InitStructure.NVIC_IRQChannel = OTG_HS_WKUP_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); EXTI_ClearITPendingBit(EXTI_Line20); #endif EXTI_ClearITPendingBit(USER_BUTTON_EXTI_LINE); }
/** * @brief Initializes peripherals used by the I2C EEPROM driver. * @param None * @retval None */ void sEE_LowLevel_Init(void) { GPIO_InitTypeDef GPIO_InitStructure; /*!< sEE_I2C Periph clock enable */ RCC_APB1PeriphClockCmd(sEE_I2C_CLK, ENABLE); /*!< sEE_I2C_SCL_GPIO_CLK and sEE_I2C_SDA_GPIO_CLK Periph clock enable */ RCC_AHB1PeriphClockCmd(sEE_I2C_SCL_GPIO_CLK | sEE_I2C_SDA_GPIO_CLK, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE); /* Reset sEE_I2C IP */ RCC_APB1PeriphResetCmd(sEE_I2C_CLK, ENABLE); /* Release reset signal of sEE_I2C IP */ RCC_APB1PeriphResetCmd(sEE_I2C_CLK, DISABLE); /*!< GPIO configuration */ /*!< Configure sEE_I2C pins: SCL */ GPIO_InitStructure.GPIO_Pin = sEE_I2C_SCL_PIN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_OType = GPIO_OType_OD; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_Init(sEE_I2C_SCL_GPIO_PORT, &GPIO_InitStructure); /*!< Configure sEE_I2C pins: SDA */ GPIO_InitStructure.GPIO_Pin = sEE_I2C_SDA_PIN; GPIO_Init(sEE_I2C_SDA_GPIO_PORT, &GPIO_InitStructure); /* Connect PXx to I2C_SCL*/ GPIO_PinAFConfig(sEE_I2C_SCL_GPIO_PORT, sEE_I2C_SCL_SOURCE, sEE_I2C_SCL_AF); /* Connect PXx to I2C_SDA*/ GPIO_PinAFConfig(sEE_I2C_SDA_GPIO_PORT, sEE_I2C_SDA_SOURCE, sEE_I2C_SDA_AF); /* Configure and enable I2C DMA TX Channel interrupt */ NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C_DMA_TX_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = sEE_I2C_DMA_PREPRIO; NVIC_InitStructure.NVIC_IRQChannelSubPriority = sEE_I2C_DMA_SUBPRIO; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); /* Configure and enable I2C DMA RX Channel interrupt */ NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C_DMA_RX_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = sEE_I2C_DMA_PREPRIO; NVIC_InitStructure.NVIC_IRQChannelSubPriority = sEE_I2C_DMA_SUBPRIO; NVIC_Init(&NVIC_InitStructure); /*!< I2C DMA TX and RX channels configuration */ /* Enable the DMA clock */ RCC_AHB1PeriphClockCmd(sEE_I2C_DMA_CLK, ENABLE); /* Clear any pending flag on Rx Stream */ DMA_ClearFlag(sEE_I2C_DMA_STREAM_TX, sEE_TX_DMA_FLAG_FEIF | sEE_TX_DMA_FLAG_DMEIF | sEE_TX_DMA_FLAG_TEIF | \ sEE_TX_DMA_FLAG_HTIF | sEE_TX_DMA_FLAG_TCIF); /* Disable the EE I2C Tx DMA stream */ DMA_Cmd(sEE_I2C_DMA_STREAM_TX, DISABLE); /* Configure the DMA stream for the EE I2C peripheral TX direction */ DMA_DeInit(sEE_I2C_DMA_STREAM_TX); sEEDMA_InitStructure.DMA_Channel = sEE_I2C_DMA_CHANNEL; sEEDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)sEE_I2C_DR_Address; sEEDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)0; /* This parameter will be configured durig communication */; sEEDMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; /* This parameter will be configured durig communication */ sEEDMA_InitStructure.DMA_BufferSize = 0xFFFF; /* This parameter will be configured durig communication */ sEEDMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; sEEDMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; sEEDMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; sEEDMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; sEEDMA_InitStructure.DMA_Mode = DMA_Mode_Normal; sEEDMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; sEEDMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable; sEEDMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full; sEEDMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; sEEDMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_Init(sEE_I2C_DMA_STREAM_TX, &sEEDMA_InitStructure); /* Clear any pending flag on Rx Stream */ DMA_ClearFlag(sEE_I2C_DMA_STREAM_RX, sEE_RX_DMA_FLAG_FEIF | sEE_RX_DMA_FLAG_DMEIF | sEE_RX_DMA_FLAG_TEIF | \ sEE_RX_DMA_FLAG_HTIF | sEE_RX_DMA_FLAG_TCIF); /* Disable the EE I2C DMA Rx stream */ DMA_Cmd(sEE_I2C_DMA_STREAM_RX, DISABLE); /* Configure the DMA stream for the EE I2C peripheral RX direction */ DMA_DeInit(sEE_I2C_DMA_STREAM_RX); DMA_Init(sEE_I2C_DMA_STREAM_RX, &sEEDMA_InitStructure); /* Enable the DMA Channels Interrupts */ DMA_ITConfig(sEE_I2C_DMA_STREAM_TX, DMA_IT_TC, ENABLE); DMA_ITConfig(sEE_I2C_DMA_STREAM_RX, DMA_IT_TC, ENABLE); }
void dma_wrap_base<Impl>::init() { RCC_AHB1PeriphClockCmd(Impl::get_rcc(), ENABLE); }
/** * @brief Configures the USART Peripheral. * @param None * @retval None */ static void USART_Config(void) { USART_InitTypeDef USART_InitStructure; GPIO_InitTypeDef GPIO_InitStructure; /* Peripheral Clock Enable -------------------------------------------------*/ /* Enable GPIO clock */ RCC_AHB1PeriphClockCmd(USARTx_TX_GPIO_CLK | USARTx_RX_GPIO_CLK, ENABLE); /* Enable USART clock */ USARTx_CLK_INIT(USARTx_CLK, ENABLE); /* Enable the DMA clock */ RCC_AHB1PeriphClockCmd(USARTx_DMAx_CLK, ENABLE); /* USARTx GPIO configuration -----------------------------------------------*/ /* Connect USART pins to AF7 */ GPIO_PinAFConfig(USARTx_TX_GPIO_PORT, USARTx_TX_SOURCE, USARTx_TX_AF); GPIO_PinAFConfig(USARTx_RX_GPIO_PORT, USARTx_RX_SOURCE, USARTx_RX_AF); /* Configure USART Tx and Rx as alternate function push-pull */ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; GPIO_InitStructure.GPIO_Pin = USARTx_TX_PIN; GPIO_Init(USARTx_TX_GPIO_PORT, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Pin = USARTx_RX_PIN; GPIO_Init(USARTx_RX_GPIO_PORT, &GPIO_InitStructure); /* USARTx configuration ----------------------------------------------------*/ /* Enable the USART OverSampling by 8 */ USART_OverSampling8Cmd(USARTx, ENABLE); /* USARTx configured as follows: - BaudRate = 5250000 baud - Maximum BaudRate that can be achieved when using the Oversampling by 8 is: (USART APB Clock / 8) Example: - (USART3 APB1 Clock / 8) = (42 MHz / 8) = 5250000 baud - (USART1 APB2 Clock / 8) = (84 MHz / 8) = 10500000 baud - Maximum BaudRate that can be achieved when using the Oversampling by 16 is: (USART APB Clock / 16) Example: (USART3 APB1 Clock / 16) = (42 MHz / 16) = 2625000 baud Example: (USART1 APB2 Clock / 16) = (84 MHz / 16) = 5250000 baud - Word Length = 8 Bits - one Stop Bit - No parity - Hardware flow control disabled (RTS and CTS signals) - Receive and transmit enabled */ USART_InitStructure.USART_BaudRate = 5250000; USART_InitStructure.USART_WordLength = USART_WordLength_8b; USART_InitStructure.USART_StopBits = USART_StopBits_1; /* When using Parity the word length must be configured to 9 bits */ USART_InitStructure.USART_Parity = USART_Parity_No; USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; USART_Init(USARTx, &USART_InitStructure); /* Configure DMA controller to manage USART TX and RX DMA request ----------*/ /* Configure DMA Initialization Structure */ DMA_InitStructure.DMA_BufferSize = BUFFERSIZE ; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable ; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull ; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single ; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; DMA_InitStructure.DMA_PeripheralBaseAddr =(uint32_t) (&(USARTx->DR)) ; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_Priority = DMA_Priority_High; /* Configure TX DMA */ DMA_InitStructure.DMA_Channel = USARTx_TX_DMA_CHANNEL ; DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral ; DMA_InitStructure.DMA_Memory0BaseAddr =(uint32_t)aTxBuffer ; DMA_Init(USARTx_TX_DMA_STREAM,&DMA_InitStructure); /* Configure RX DMA */ DMA_InitStructure.DMA_Channel = USARTx_RX_DMA_CHANNEL ; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory ; DMA_InitStructure.DMA_Memory0BaseAddr =(uint32_t)aRxBuffer ; DMA_Init(USARTx_RX_DMA_STREAM,&DMA_InitStructure); /* Enable USART */ USART_Cmd(USARTx, ENABLE); }
/* COLLISION TEST GPIO INIT */ void SweepRobot_CollisionTestGPIOInit(void) { TIM_TimeBaseInitTypeDef TIM_TimeBaseInitStructure; TIM_OCInitTypeDef TIM_OCInitStructure; GPIO_InitTypeDef GPIO_InitStructure; RCC_AHB1PeriphClockCmd(COLLISION_FRONT_TEST_CTRL_GPIO_PERIPH_ID, ENABLE); RCC_AHB1PeriphClockCmd(COLLISION_SIDE_TEST_CTRL_GPIO_PERIPH_ID, ENABLE); RCC_APB2PeriphClockCmd(COLLISION_TEST_STEER_MOTOR_CTRL_TIM_PERIPH_ID, ENABLE); GPIO_InitStructure.GPIO_Pin = COLLISION_SIDE_TEST_CTRL_L_PIN |\ COLLISION_SIDE_TEST_CTRL_R_PIN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_Init(COLLISION_SIDE_TEST_CTRL_GPIO, &GPIO_InitStructure); GPIO_WriteBit(COLLISION_SIDE_TEST_CTRL_GPIO, COLLISION_SIDE_TEST_CTRL_L_PIN, Bit_SET); GPIO_WriteBit(COLLISION_SIDE_TEST_CTRL_GPIO, COLLISION_SIDE_TEST_CTRL_R_PIN, Bit_SET); GPIO_InitStructure.GPIO_Pin = COLLISION_FRONT_TEST_CTRL_L_PIN |\ COLLISION_FRONT_TEST_CTRL_R_PIN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_Init(COLLISION_FRONT_TEST_CTRL_GPIO, &GPIO_InitStructure); GPIO_WriteBit(COLLISION_FRONT_TEST_CTRL_GPIO, COLLISION_FRONT_TEST_CTRL_L_PIN, Bit_SET); GPIO_WriteBit(COLLISION_FRONT_TEST_CTRL_GPIO, COLLISION_FRONT_TEST_CTRL_R_PIN, Bit_SET); GPIO_InitStructure.GPIO_Pin = COLLISION_TEST_LEFT_STEER_MOTOR_CTRL_PIN |\ COLLISION_TEST_RIGHT_STEER_MOTOR_CTRL_PIN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_Init(COLLISION_TEST_STEER_MOTOR_CTRL_GPIO, &GPIO_InitStructure); GPIO_PinAFConfig(COLLISION_TEST_STEER_MOTOR_CTRL_GPIO, COLLISION_TEST_LEFT_STEER_MOTOR_CTRL_PIN_SOURCE, COLLISION_TEST_STEER_MOTOR_CTRL_GPIO_AF_PPP); GPIO_PinAFConfig(COLLISION_TEST_STEER_MOTOR_CTRL_GPIO, COLLISION_TEST_RIGHT_STEER_MOTOR_CTRL_PIN_SOURCE, COLLISION_TEST_STEER_MOTOR_CTRL_GPIO_AF_PPP); TIM_DeInit(COLLISION_TEST_STEER_MOTOR_CTRL_TIM); TIM_TimeBaseInitStructure.TIM_Period = 20000-1; TIM_TimeBaseInitStructure.TIM_Prescaler = 168-1; TIM_TimeBaseInitStructure.TIM_ClockDivision = TIM_CKD_DIV1; TIM_TimeBaseInitStructure.TIM_CounterMode = TIM_CounterMode_Up; TIM_TimeBaseInit(COLLISION_TEST_STEER_MOTOR_CTRL_TIM, &TIM_TimeBaseInitStructure); TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; TIM_OC1Init(COLLISION_TEST_STEER_MOTOR_CTRL_TIM, &TIM_OCInitStructure); TIM_OC2Init(COLLISION_TEST_STEER_MOTOR_CTRL_TIM, &TIM_OCInitStructure); TIM_OC1PreloadConfig(COLLISION_TEST_STEER_MOTOR_CTRL_TIM, TIM_OCPreload_Enable); TIM_OC2PreloadConfig(COLLISION_TEST_STEER_MOTOR_CTRL_TIM, TIM_OCPreload_Enable); TIM_ARRPreloadConfig(COLLISION_TEST_STEER_MOTOR_CTRL_TIM, ENABLE); TIM_SetCompare1(COLLISION_TEST_STEER_MOTOR_CTRL_TIM, COLLISION_TEST_LEFT_STEERING_MOTOR_IDLE_POS); TIM_SetCompare2(COLLISION_TEST_STEER_MOTOR_CTRL_TIM, COLLISION_TEST_RIGHT_STEERING_MOTOR_IDLE_POS); TIM_Cmd(COLLISION_TEST_STEER_MOTOR_CTRL_TIM, ENABLE); }
void MPL115_Init(void)//(MPL115A1_InitTypeDef *MPL115A1_InitStruct) { GPIO_InitTypeDef GPIO_InitStructure; SPI_InitTypeDef SPI_InitStructure; /* Enable the SPI periph */ RCC_APB1PeriphClockCmd(MPL115A1_SPI_CLK, ENABLE); /* Enable SCK, MOSI and MISO GPIO clocks */ RCC_AHB1PeriphClockCmd(MPL115A1_SPI_SCK_GPIO_CLK | MPL115A1_SPI_MISO_GPIO_CLK | MPL115A1_SPI_MOSI_GPIO_CLK, ENABLE); /* Enable CS GPIO clock */ RCC_AHB1PeriphClockCmd(MPL115A1_SPI_CS_GPIO_CLK, ENABLE); GPIO_PinAFConfig(MPL115A1_SPI_SCK_GPIO_PORT, MPL115A1_SPI_SCK_SOURCE, MPL115A1_SPI_SCK_AF); GPIO_PinAFConfig(MPL115A1_SPI_MISO_GPIO_PORT, MPL115A1_SPI_MISO_SOURCE, MPL115A1_SPI_MISO_AF); GPIO_PinAFConfig(MPL115A1_SPI_MOSI_GPIO_PORT, MPL115A1_SPI_MOSI_SOURCE, MPL115A1_SPI_MOSI_AF); GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; /* SPI SCK pin configuration */ GPIO_InitStructure.GPIO_Pin = MPL115A1_SPI_SCK_PIN; GPIO_Init(MPL115A1_SPI_SCK_GPIO_PORT, &GPIO_InitStructure); /* SPI MOSI pin configuration */ GPIO_InitStructure.GPIO_Pin = MPL115A1_SPI_MOSI_PIN; GPIO_Init(MPL115A1_SPI_MOSI_GPIO_PORT, &GPIO_InitStructure); /* SPI MISO pin configuration */ GPIO_InitStructure.GPIO_Pin = MPL115A1_SPI_MISO_PIN; GPIO_Init(MPL115A1_SPI_MISO_GPIO_PORT, &GPIO_InitStructure); /* SPI configuration -------------------------------------------------------*/ SPI_I2S_DeInit(MPL115A1_SPI); SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_32; SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; SPI_InitStructure.SPI_CRCPolynomial = 7; SPI_InitStructure.SPI_Mode = SPI_Mode_Master; SPI_Init(MPL115A1_SPI, &SPI_InitStructure); /* Enable SPI1 */ SPI_Cmd(MPL115A1_SPI, ENABLE); /* Configure GPIO PIN for Lis Chip select */ GPIO_InitStructure.GPIO_Pin = MPL115A1_SPI_CS_PIN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_Init(MPL115A1_SPI_CS_GPIO_PORT, &GPIO_InitStructure); GPIO_Init(MPL115A1_SPI_SHDN_GPIO_PORT, &GPIO_InitStructure); /* Deselect : Chip Select high */ GPIO_SetBits(MPL115A1_SPI_CS_GPIO_PORT, MPL115A1_SPI_CS_PIN); /* turn on MPL115 */ //GPIO_ResetBits(MPL115A1_SPI_SHDN_GPIO_PORT, MPL115A1_SPI_SHDN_PIN); GPIO_SetBits(MPL115A1_SPI_SHDN_GPIO_PORT, MPL115A1_SPI_SHDN_PIN); }
DAC_TIM6Class::DAC_TIM6Class(){ waveBuffer = malloc(sizeof(uint16_t) * WAVE_MEMORY_LENGTH); if(waveBuffer==NULL){ while(1){} } for(int i=0;i<WAVE_MEMORY_LENGTH;i++){ waveBuffer[i] = 2048+1024*sinf(2*M_PI*i/WAVE_MEMORY_LENGTH); } RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA,ENABLE); ///////////////////////////////////// //GPIO ///////////////////////////////////// GPIO_InitTypeDef gpioa4_5; GPIO_StructInit(&gpioa4_5); gpioa4_5.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5; gpioa4_5.GPIO_Mode = GPIO_Mode_AN; gpioa4_5.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_Init(GPIOA,&gpioa4_5); RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC,ENABLE); ///////////////////////////////////// //DAC ///////////////////////////////////// DAC_InitTypeDef dac1; DAC_StructInit(&dac1); dac1.DAC_LFSRUnmask_TriangleAmplitude =DAC_LFSRUnmask_Bits11_0; dac1.DAC_OutputBuffer = DAC_OutputBuffer_Enable; dac1.DAC_Trigger = DAC_Trigger_T6_TRGO; dac1.DAC_WaveGeneration = DAC_WaveGeneration_None; DAC_Init(DAC_Channel_1,&dac1); DAC_SetDualChannelData(DAC_Align_12b_R,0,0); DAC_Cmd(DAC_Channel_1,ENABLE); DAC_DMACmd(DAC_Channel_1,ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM6,ENABLE); TIM_TimeBaseInitTypeDef timebase; timebase.TIM_ClockDivision = TIM_CKD_DIV1; timebase.TIM_CounterMode = TIM_CounterMode_Up; timebase.TIM_Prescaler = 168-1; timebase.TIM_Period = 1; TIM_TimeBaseInit(TIM6,&timebase); TIM6->CR2 = 0x20; //MasterModeSelection TIM_ITConfig(TIM6,TIM_IT_Update,ENABLE); RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1,ENABLE); DMA_InitTypeDef dma1_5; DMA_StructInit(&dma1_5); dma1_5.DMA_PeripheralBaseAddr = (uint32_t)&(DAC->DHR12R1); dma1_5.DMA_Memory0BaseAddr = (uint32_t)waveBuffer; dma1_5.DMA_DIR = DMA_DIR_MemoryToPeripheral; dma1_5.DMA_BufferSize = WAVE_MEMORY_LENGTH; dma1_5.DMA_PeripheralInc = DMA_PeripheralInc_Disable; dma1_5.DMA_MemoryInc = DMA_MemoryInc_Enable; dma1_5.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; dma1_5.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; dma1_5.DMA_Mode = DMA_Mode_Circular; dma1_5.DMA_Priority = DMA_Priority_VeryHigh; dma1_5.DMA_Channel = DMA_Channel_7; DMA_Init(DMA1_Stream5,&dma1_5); DMA_Cmd(DMA1_Stream5,ENABLE); TIM_Cmd(TIM6,ENABLE); }
static void init_pa7_dsm2() { EXTERNAL_RF_ON(); // Timer8 setupPulsesDSM2(EXTERNAL_MODULE); RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN ; // Enable portA clock #if defined(REV3) configure_pins( PIN_INTPPM_OUT, PIN_PERIPHERAL | PIN_PORTA | PIN_PER_1 | PIN_OS25 | PIN_PUSHPULL ) ; #else GPIO_InitTypeDef GPIO_InitStructure; RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIO_EXTPPM, ENABLE); GPIO_PinAFConfig(GPIO_EXTPPM, GPIO_PinSource_EXTPPM, GPIO_AF_TIM8); GPIO_InitStructure.GPIO_Pin = PIN_EXTPPM_OUT; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_Init(GPIO_EXTPPM, &GPIO_InitStructure); #endif RCC->APB2ENR |= RCC_APB2ENR_TIM8EN ; // Enable clock RCC->AHB1ENR |= RCC_AHB1ENR_DMA2EN ; // Enable DMA2 clock TIM8->CR1 &= ~TIM_CR1_CEN ; TIM8->ARR = 44000 ; // 22mS TIM8->CCR2 = 40000 ; // Update time TIM8->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz #if defined(REV3) TIM8->CCER = TIM_CCER_CC1E | TIM_CCER_CC1P ; #else TIM8->CCER = TIM_CCER_CC1NE | TIM_CCER_CC1NP ; #endif TIM8->CR2 = TIM_CR2_OIS1 ; // O/P idle high TIM8->BDTR = TIM_BDTR_MOE ; // Enable outputs TIM8->CCR1 = dsm2Stream[0] ; TIM8->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0 ; // Force O/P high TIM8->EGR = 1 ; // Restart // TIM8->SR &= ~TIM_SR_UIF ; // Clear flag // TIM8->SR &= ~TIM_SR_CC2IF ; // Clear flag TIM8->DIER |= TIM_DIER_CC1DE ; // Enable DMA on CC1 match TIM8->DCR = 13 ; // DMA to CC1 // TIM8->CR1 = TIM_CR1_OPM ; // Just run once // Enable the DMA channel here, DMA2 stream 2, channel 7 DMA2_Stream2->CR &= ~DMA_SxCR_EN ; // Disable DMA DMA2->LIFCR = DMA_LIFCR_CTCIF2 | DMA_LIFCR_CHTIF2 | DMA_LIFCR_CTEIF2 | DMA_LIFCR_CDMEIF2 | DMA_LIFCR_CFEIF2 ; // Write ones to clear bits DMA2_Stream2->CR = DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_2 | DMA_SxCR_PL_0 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0 | DMA_SxCR_PFCTRL ; DMA2_Stream2->PAR = CONVERT_PTR_UINT(&TIM8->DMAR); DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&dsm2Stream[1]); // DMA2_Stream2->FCR = 0x05 ; //DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ; // DMA2_Stream2->NDTR = 100 ; DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA TIM8->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0 ; // Toggle CC1 o/p TIM8->SR &= ~TIM_SR_CC2IF ; // Clear flag TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt TIM8->CR1 |= TIM_CR1_CEN ; NVIC_EnableIRQ(TIM8_CC_IRQn) ; NVIC_SetPriority(TIM8_CC_IRQn, 7); }
void sbus_dma_init(void) { { DMA_InitTypeDef DMA_InitStructure; RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); DMA_DeInit(DMA2_Stream5); DMA_InitStructure.DMA_Channel = DMA_Channel_4; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; // Receive DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)sbusbuffer; DMA_InitStructure.DMA_BufferSize = (uint16_t)RXSBUSBUFFERSIZE; DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&USART1->DR;//usart2 DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_Init(DMA2_Stream5, &DMA_InitStructure); /* Enable the USART Rx DMA request */ USART_DMACmd(USART1, USART_DMAReq_Rx, ENABLE);//usart2 DMA_ITConfig(DMA2_Stream5, DMA_IT_TC, ENABLE); /* Enable the DMA RX Stream */ DMA_Cmd(DMA2_Stream5, ENABLE); //DMA_InitTypeDef DMA_InitStructure; //RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE); //DMA_DeInit(DMA1_Stream5); //DMA_InitStructure.DMA_Channel = DMA_Channel_4; //DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; // Receive //DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)sbusbuffer; //DMA_InitStructure.DMA_BufferSize = (uint16_t)RXSBUSBUFFERSIZE; //DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&USART2->DR;//usart2 //DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; //DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; //DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; //DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; //DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; //DMA_InitStructure.DMA_Priority = DMA_Priority_High; //DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; //DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full; //DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; //DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; //DMA_Init(DMA1_Stream5, &DMA_InitStructure); /* Enable the USART Rx DMA request */ //USART_DMACmd(USART2, USART_DMAReq_Rx, ENABLE); //DMA_ITConfig(DMA1_Stream5, DMA_IT_TC, ENABLE); /* Enable the DMA RX Stream */ //DMA_Cmd(DMA1_Stream5, ENABLE); } }
static void W25Q16_Configuration(void) { GPIO_InitTypeDef GPIO_InitStructure; SPI_InitTypeDef SPI_InitStructure; RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE); RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC , ENABLE); // RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO , ENABLE); GPIO_PinAFConfig(GPIOB,GPIO_PinSource10,GPIO_AF_SPI2); GPIO_PinAFConfig(GPIOB,GPIO_PinSource14,GPIO_AF_SPI2); GPIO_PinAFConfig(GPIOB,GPIO_PinSource15,GPIO_AF_SPI2); GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN; /*!< SPI SCK pin configuration */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; GPIO_Init(GPIOB, &GPIO_InitStructure); /*!< SPI MOSI pin configuration */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_14; GPIO_Init(GPIOB, &GPIO_InitStructure); /*!< SPI MISO pin configuration */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15; GPIO_Init(GPIOB, &GPIO_InitStructure); /*!< Configure sFLASH Card CS pin in output pushpull mode ********************/ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_Init(GPIOC, &GPIO_InitStructure); W25Q16_CS_HIGH(); /*!< SPI configuration */ SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; SPI_InitStructure.SPI_Mode = SPI_Mode_Master; SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; SPI_InitStructure.SPI_CPOL = SPI_CPOL_High; SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge; SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256; SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; SPI_InitStructure.SPI_CRCPolynomial = 7; SPI_Init(SPI2, &SPI_InitStructure); /*!< Enable the sFLASH_SPI */ SPI_Cmd(SPI2 , ENABLE); // /*-----------------端口配置-------------------*/ // /* SPI1_SCK SPI1_MISO SPI1_MOSI*/ // GPIO_InitStructure.GPIO_Pin = W25Q16_SCK_PIN | W25Q16_MISO_PIN | W25Q16_MOSI_PIN; // GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; // GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; // GPIO_Init(W25Q16_PORT, &GPIO_InitStructure); // // /* FLASH_CS */ // GPIO_InitStructure.GPIO_Pin = W25Q16_CS_PIN; // GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; // GPIO_Init(W25Q16_PORT, &GPIO_InitStructure); // // /*-----------------SPI配置--------------------*/ // /* 初始化 */ // SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; // SPI_InitStructure.SPI_Mode = SPI_Mode_Master; // SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; // SPI_InitStructure.SPI_CPOL = SPI_CPOL_High; /*串行时钟稳定状态是高电平*/ // SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;/* 时钟活跃边沿???*/ // SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; // SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256; /*SPI波特率预分频*/ // SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; /*高位在前*/ // SPI_InitStructure.SPI_CRCPolynomial = 7; /*the polynomial used for the CRC calculation*/ // SPI_Init(W25Q16_SPI, &SPI_InitStructure); // // /* SPI使能 */ // SPI_Cmd(W25Q16_SPI, ENABLE); }
/** * @brief Main program * @param None * @retval None */ int main(void) { NVIC_InitTypeDef NVIC_InitStructure; EXTI_InitTypeDef EXTI_InitStructure; /*!< At this stage the microcontroller clock setting is already configured, this is done through SystemInit() function which is called from startup files (startup_stm32f40_41xxx.s/startup_stm32f427_437xx.s/startup_stm32f429_439xx.s) before to branch to application main. */ /* Configure the external interrupt "WAKEUP" and "TAMPER" buttons */ STM_EVAL_PBInit(BUTTON_TAMPER , BUTTON_MODE_GPIO); STM_EVAL_PBInit(BUTTON_WAKEUP , BUTTON_MODE_GPIO); /* Initialize the LCD */ LCD_Init(); /* Configure the LCD Log Module */ LCD_LOG_Init(); LCD_LOG_SetHeader((uint8_t*)"RTC Backup Domain Example"); LCD_LOG_SetFooter ((uint8_t*)" Copyright (c) STMicroelectronics" ); /* Display the default RCC BDCR and RTC TAFCR Registers */ LCD_UsrLog ("Entry Point \n"); LCD_UsrLog ("RCC BDCR = 0x%x\n", RCC->BDCR); LCD_UsrLog ("RTC TAFCR = 0x%x\n", RTC->TAFCR); /* Enable the PWR APB1 Clock Interface */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); /* Allow access to BKP Domain */ PWR_BackupAccessCmd(ENABLE); /* Configure one bit for preemption priority */ NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1); /* Enable the RTC Interrupt */ NVIC_InitStructure.NVIC_IRQChannel = RTC_WKUP_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); /* EXTI configuration */ EXTI_ClearITPendingBit(EXTI_Line22); EXTI_InitStructure.EXTI_Line = EXTI_Line22; EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; EXTI_InitStructure.EXTI_LineCmd = ENABLE; EXTI_Init(&EXTI_InitStructure); if(RTC_ReadBackupRegister(RTC_BKP_DR0) != FIRST_DATA) { LCD_UsrLog ("RTC Config PLZ Wait. \n"); /* RTC Configuration */ RTC_Config(); /* Adjust Current Time */ Time_Adjust(); /* Adjust Current Date */ Date_Adjust(); } else { /* Wait for RTC APB registers synchronisation */ RTC_WaitForSynchro(); RTC_ClearITPendingBit(RTC_IT_WUT); EXTI_ClearITPendingBit(EXTI_Line22); /* Backup SRAM ***************************************************************/ /* Enable BKPSRAM Clock */ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_BKPSRAM, ENABLE); /* Check the written Data */ for (uwIndex = 0x0; uwIndex < 0x1000; uwIndex += 4) { if ((*(__IO uint32_t *) (BKPSRAM_BASE + uwIndex)) != uwIndex) { uwErrorIndex++; } } if(uwErrorIndex) { LCD_ErrLog ("BKP SRAM Number of errors = %d\n", uwErrorIndex); } else { LCD_UsrLog ("BKP SRAM Content OK \n"); } /* RTC Backup Data Registers **************************************************/ /* Check if RTC Backup DRx registers data are correct */ if (CheckBackupReg(FIRST_DATA) == 0x00) { /* OK, RTC Backup DRx registers data are correct */ LCD_UsrLog ("OK, RTC Backup DRx registers data are correct. \n"); } else { /* Error, RTC Backup DRx registers data are not correct */ LCD_ErrLog ("RTC Backup DRx registers data are not correct\n"); } } while (1) { /* Infinite loop */ Calendar_Show(); } }
void SPI_Config(void) { GPIO_InitTypeDef structGPIO; SPI_InitTypeDef structSPI; DMA_InitTypeDef structDMA; NVIC_InitTypeDef NVIC_InitStructure; RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE); RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB, ENABLE); //configure GPIO structGPIO.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6; //spi1 structGPIO.GPIO_Mode = GPIO_Mode_AF; structGPIO.GPIO_Speed = GPIO_Speed_50MHz; structGPIO.GPIO_OType = GPIO_OType_PP; structGPIO.GPIO_PuPd = GPIO_PuPd_UP; GPIO_Init(GPIOA, &structGPIO); GPIO_PinAFConfig(GPIOA, GPIO_PinSource4, GPIO_AF_SPI1); GPIO_PinAFConfig(GPIOA, GPIO_PinSource5, GPIO_AF_SPI1); GPIO_PinAFConfig(GPIOA, GPIO_PinSource6, GPIO_AF_SPI1); structGPIO.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15; //spi2 GPIO_Init(GPIOB, &structGPIO); GPIO_PinAFConfig(GPIOB, GPIO_PinSource5, GPIO_AF_SPI1); GPIO_PinAFConfig(GPIOB, GPIO_PinSource12, GPIO_AF_SPI2); GPIO_PinAFConfig(GPIOB, GPIO_PinSource13, GPIO_AF_SPI2); GPIO_PinAFConfig(GPIOB, GPIO_PinSource14, GPIO_AF_SPI2); GPIO_PinAFConfig(GPIOB, GPIO_PinSource15, GPIO_AF_SPI2); //init spi SPI_StructInit(&structSPI); structSPI.SPI_Direction = SPI_Direction_1Line_Rx; structSPI.SPI_Mode = SPI_Mode_Slave; structSPI.SPI_DataSize = SPI_DataSize_16b; SPI_Init(SPI1, &structSPI); SPI_Init(SPI2, &structSPI); SPI_Cmd(SPI1, ENABLE); SPI_Cmd(SPI2, ENABLE); //init DMA SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Rx, ENABLE); structDMA.DMA_Channel = DMA_Channel_3; structDMA.DMA_PeripheralBaseAddr = SPI1_ADDR; structDMA.DMA_Memory0BaseAddr = (uint32_t)getAnalogBuf(0); structDMA.DMA_DIR = DMA_DIR_PeripheralToMemory; structDMA.DMA_BufferSize = SIZE_BUF * 2; structDMA.DMA_PeripheralInc = DMA_PeripheralInc_Disable; structDMA.DMA_MemoryInc = DMA_MemoryInc_Enable; structDMA.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; structDMA.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; structDMA.DMA_Mode = DMA_Mode_Circular; structDMA.DMA_Priority = DMA_Priority_VeryHigh; structDMA.DMA_FIFOMode = DMA_FIFOMode_Enable; structDMA.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull; structDMA.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_Init(DMA2_Stream0, &structDMA); structDMA.DMA_Channel = DMA_Channel_0; structDMA.DMA_PeripheralBaseAddr = SPI2_ADDR; structDMA.DMA_Memory0BaseAddr = (uint32_t)getAnalogBuf(1); DMA_Init(DMA1_Stream3, &structDMA); //init DMA interrupt DMA_ITConfig(DMA2_Stream0, DMA_IT_TC, ENABLE); NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream0_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); DMA_ITConfig(DMA1_Stream3, DMA_IT_TC, ENABLE); NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream3_IRQn; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; NVIC_Init(&NVIC_InitStructure); //enable DMA DMA_Cmd(DMA2_Stream0, ENABLE); DMA_Cmd(DMA1_Stream3, ENABLE); //initialize the analog part initAnalog(); }
void adcInit(drv_adc_config_t *init) { ADC_InitTypeDef ADC_InitStructure; DMA_InitTypeDef DMA_InitStructure; uint8_t i; uint8_t configuredAdcChannels = 0; memset(&adcConfig, 0, sizeof(adcConfig)); #if !defined(VBAT_ADC_PIN) && !defined(EXTERNAL1_ADC_PIN) && !defined(RSSI_ADC_PIN) && !defined(CURRENT_METER_ADC_PIN) UNUSED(init); #endif #ifdef VBAT_ADC_PIN if (init->enableVBat) { IOInit(IOGetByTag(IO_TAG(VBAT_ADC_PIN)), OWNER_SYSTEM, RESOURCE_ADC); IOConfigGPIO(IOGetByTag(IO_TAG(VBAT_ADC_PIN)), IO_CONFIG(GPIO_Mode_AN, 0, GPIO_OType_OD, GPIO_PuPd_NOPULL)); adcConfig[ADC_BATTERY].adcChannel = VBAT_ADC_CHANNEL; adcConfig[ADC_BATTERY].dmaIndex = configuredAdcChannels++; adcConfig[ADC_BATTERY].enabled = true; adcConfig[ADC_BATTERY].sampleTime = ADC_SampleTime_480Cycles; } #endif #ifdef EXTERNAL1_ADC_PIN if (init->enableExternal1) { IOInit(IOGetByTag(IO_TAG(EXTERNAL1_ADC_PIN)), OWNER_SYSTEM, RESOURCE_ADC); IOConfigGPIO(IOGetByTag(IO_TAG(EXTERNAL1_ADC_PIN)), IO_CONFIG(GPIO_Mode_AN, 0, GPIO_OType_OD, GPIO_PuPd_NOPULL)); adcConfig[ADC_EXTERNAL1].adcChannel = EXTERNAL1_ADC_CHANNEL; adcConfig[ADC_EXTERNAL1].dmaIndex = configuredAdcChannels++; adcConfig[ADC_EXTERNAL1].enabled = true; adcConfig[ADC_EXTERNAL1].sampleTime = ADC_SampleTime_480Cycles; } #endif #ifdef RSSI_ADC_PIN if (init->enableRSSI) { IOInit(IOGetByTag(IO_TAG(RSSI_ADC_PIN)), OWNER_SYSTEM, RESOURCE_ADC); IOConfigGPIO(IOGetByTag(IO_TAG(RSSI_ADC_PIN)), IO_CONFIG(GPIO_Mode_AN, 0, GPIO_OType_OD, GPIO_PuPd_NOPULL)); adcConfig[ADC_RSSI].adcChannel = RSSI_ADC_CHANNEL; adcConfig[ADC_RSSI].dmaIndex = configuredAdcChannels++; adcConfig[ADC_RSSI].enabled = true; adcConfig[ADC_RSSI].sampleTime = ADC_SampleTime_480Cycles; } #endif #ifdef CURRENT_METER_ADC_PIN if (init->enableCurrentMeter) { IOInit(IOGetByTag(IO_TAG(CURRENT_METER_ADC_PIN)), OWNER_SYSTEM, RESOURCE_ADC); IOConfigGPIO(IOGetByTag(IO_TAG(CURRENT_METER_ADC_PIN)), IO_CONFIG(GPIO_Mode_AN, 0, GPIO_OType_OD, GPIO_PuPd_NOPULL)); adcConfig[ADC_CURRENT].adcChannel = CURRENT_METER_ADC_CHANNEL; adcConfig[ADC_CURRENT].dmaIndex = configuredAdcChannels++; adcConfig[ADC_CURRENT].enabled = true; adcConfig[ADC_CURRENT].sampleTime = ADC_SampleTime_480Cycles; } #endif //RCC_ADCCLKConfig(RCC_ADC12PLLCLK_Div256); // 72 MHz divided by 256 = 281.25 kHz RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE); DMA_DeInit(DMA2_Stream4); DMA_StructInit(&DMA_InitStructure); DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&ADC1->DR; DMA_InitStructure.DMA_Channel = DMA_Channel_0; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)adcValues; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; DMA_InitStructure.DMA_BufferSize = configuredAdcChannels; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = configuredAdcChannels > 1 ? DMA_MemoryInc_Enable : DMA_MemoryInc_Disable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_Init(DMA2_Stream4, &DMA_InitStructure); DMA_Cmd(DMA2_Stream4, ENABLE); // calibrate /* ADC_VoltageRegulatorCmd(ADC1, ENABLE); delay(10); ADC_SelectCalibrationMode(ADC1, ADC_CalibrationMode_Single); ADC_StartCalibration(ADC1); while(ADC_GetCalibrationStatus(ADC1) != RESET); ADC_VoltageRegulatorCmd(ADC1, DISABLE); */ ADC_CommonInitTypeDef ADC_CommonInitStructure; ADC_CommonStructInit(&ADC_CommonInitStructure); ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent; ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div8; ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles; ADC_CommonInit(&ADC_CommonInitStructure); ADC_StructInit(&ADC_InitStructure); ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NbrOfConversion = configuredAdcChannels; ADC_InitStructure.ADC_ScanConvMode = configuredAdcChannels > 1 ? ENABLE : DISABLE; // 1=scan more that one channel in group ADC_Init(ADC1, &ADC_InitStructure); uint8_t rank = 1; for (i = 0; i < ADC_CHANNEL_COUNT; i++) { if (!adcConfig[i].enabled) { continue; } ADC_RegularChannelConfig(ADC1, adcConfig[i].adcChannel, rank++, adcConfig[i].sampleTime); } ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE); ADC_DMACmd(ADC1, ENABLE); ADC_Cmd(ADC1, ENABLE); ADC_SoftwareStartConv(ADC1); }
void adc_configure(){ ADC_InitTypeDef ADC_init_structure; GPIO_InitTypeDef GPIO_initStructre; DMA_InitTypeDef DMA_InitStructure; NVIC_InitTypeDef NVIC_InitStructure; // Clock configuration RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1,ENABLE); RCC_AHB1PeriphClockCmd(RCC_AHB1ENR_GPIOAEN,ENABLE); RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); // Analog pin configuration ADC1->PA1, ADC2->PA2 GPIO_initStructre.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_2; GPIO_initStructre.GPIO_Mode = GPIO_Mode_AN; GPIO_initStructre.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_Init(GPIOA,&GPIO_initStructre); // ADC structure configuration ADC_DeInit(); ADC_init_structure.ADC_DataAlign = ADC_DataAlign_Left; ADC_init_structure.ADC_Resolution = ADC_Resolution_12b; ADC_init_structure.ADC_ContinuousConvMode = DISABLE; ADC_init_structure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T2_TRGO; ADC_init_structure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_Rising; ADC_init_structure.ADC_NbrOfConversion = 1; ADC_init_structure.ADC_ScanConvMode = DISABLE; ADC_Init(ADCx,&ADC_init_structure); // Select the channel to be read from ADC_RegularChannelConfig(ADCx,ADC_Channel_3,1,ADC_SampleTime_144Cycles); /* DMA configuration **************************************/ DMA_DeInit(DMA_STREAMx); DMA_InitStructure.DMA_Channel = DMA_CHANNELx; DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)ADCx_DR_ADDRESS; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)adc_buf; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; DMA_InitStructure.DMA_BufferSize = ADC_BUF_SZ; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_Init(DMA_STREAMx, &DMA_InitStructure); /* Enable DMA request after last transfer (Single-ADC mode) */ ADC_DMARequestAfterLastTransferCmd(ADCx, ENABLE); /* Enable ADC1 DMA */ ADC_DMACmd(ADCx, ENABLE); /* DMA2_Stream0 enable */ DMA_Cmd(DMA_STREAMx, ENABLE); /* Enable DMA Half & Complete interrupts */ DMA_ITConfig(DMA2_Stream0, DMA_IT_TC | DMA_IT_HT, ENABLE); /* Enable the DMA Stream IRQ Channel */ NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream0_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); // Enable and start ADC conversion ADC_Cmd(ADC1,ENABLE); ADC_SoftwareStartConv(ADC1); }
void port_fsmc_init(void) { FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; //FSMC_NORSRAMTimingInitTypeDef p; GPIO_InitTypeDef GPIO_InitStructure; FSMC_NORSRAMTimingInitTypeDef Timing_read,Timing_write; FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &Timing_read; FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &Timing_write; FSMC_NORSRAMStructInit(&FSMC_NORSRAMInitStructure); /*--------------------- read timings configuration ---------------------*/ Timing_read.FSMC_AddressSetupTime = 3; /* [3:0] F2/F4 1~15 HCLK */ Timing_read.FSMC_AddressHoldTime = 0; /* [7:4] keep 0x00 in SRAM mode */ Timing_read.FSMC_DataSetupTime = 4; /* [15:8] F2/F4 0~255 HCLK */ /* [19:16] Time between NEx high to NEx low (BUSTURN HCLK) */ Timing_read.FSMC_BusTurnAroundDuration = 1; Timing_read.FSMC_CLKDivision = 0; /* [24:20] keep 0x00 in SRAM mode */ Timing_read.FSMC_DataLatency = 0; /* [27:25] keep 0x00 in SRAM mode */ Timing_read.FSMC_AccessMode = FSMC_AccessMode_A; /*--------------------- write timings configuration ---------------------*/ Timing_write.FSMC_AddressSetupTime = 2; /* [3:0] F2/F4 1~15 HCLK */ Timing_write.FSMC_AddressHoldTime = 0; /* [7:4] keep 0x00 in SRAM mode */ Timing_write.FSMC_DataSetupTime = 3; /* [15:8] F2/F4 0~255 HCLK */ /* [19:16] Time between NEx high to NEx low (BUSTURN HCLK) */ Timing_write.FSMC_BusTurnAroundDuration = 1; Timing_write.FSMC_CLKDivision = 0; /* [24:20] keep 0x00 in SRAM mode */ Timing_write.FSMC_DataLatency = 0; /* [27:25] keep 0x00 in SRAM mode */ Timing_write.FSMC_AccessMode = FSMC_AccessMode_A; /* Enable GPIOs clock */ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE | RCC_AHB1Periph_GPIOF | RCC_AHB1Periph_GPIOG, ENABLE); /* Enable FSMC clock */ RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE); /* Configure the BL pin */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_Init(GPIOF, &GPIO_InitStructure); GPIO_ResetBits(GPIOF,GPIO_Pin_9); /* +-------------------+--------------------+------------------+------------------+ + SRAM pins assignment + +-------------------+--------------------+------------------+------------------+ | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 | | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 | | PD4 <-> FSMC_NOE | PE7 <-> FSMC_D4 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 | | PD5 <-> FSMC_NWE | PE8 <-> FSMC_D5 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 | | PD8 <-> FSMC_D13 | PE9 <-> FSMC_D6 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 | | PD9 <-> FSMC_D14 | PE10 <-> FSMC_D7 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 | | PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8 | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 | | PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9 | PF13 <-> FSMC_A7 |------------------+ | PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10 | PF14 <-> FSMC_A8 | | PD14 <-> FSMC_D0 | PE14 <-> FSMC_D11 | PF15 <-> FSMC_A9 | | PD15 <-> FSMC_D1 | PE15 <-> FSMC_D12 |------------------+ +-------------------+--------------------+ */ /* +-------------------+--------------------+------------------+-------------------+ + STM32 FSMC pins assignment + +-------------------+--------------------+------------------+-------------------+ | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 | | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 | | PD4 <-> FSMC_NOE | PE3 <-> FSMC_A19 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 | | PD5 <-> FSMC_NWE | PE4 <-> FSMC_A20 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 | | PD8 <-> FSMC_D13 | PE7 <-> FSMC_D4 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 | | PD9 <-> FSMC_D14 | PE8 <-> FSMC_D5 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 | | PD10 <-> FSMC_D15 | PE9 <-> FSMC_D6 | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 | | PD11 <-> FSMC_A16 | PE10 <-> FSMC_D7 | PF13 <-> FSMC_A7 | PG12 <-> FSMC_NE4 | | PD12 <-> FSMC_A17 | PE11 <-> FSMC_D8 | PF14 <-> FSMC_A8 |-------------------+ | PD13 <-> FSMC_A18 | PE12 <-> FSMC_D9 | PF15 <-> FSMC_A9 | | PD14 <-> FSMC_D0 | PE13 <-> FSMC_D10 |------------------+ | PD15 <-> FSMC_D1 | PE14 <-> FSMC_D11 | | PD7 <-> FSMC_NE1 | PE15 <-> FSMC_D12 | +-------------------+--------------------+ */ /* GPIOD configuration */ GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource6, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource7, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC); //GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC); //GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_FSMC); //GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC); /* GPIOE configuration */ //GPIO_PinAFConfig(GPIOE, GPIO_PinSource0 , GPIO_AF_FSMC); //GPIO_PinAFConfig(GPIOE, GPIO_PinSource1 , GPIO_AF_FSMC); //GPIO_PinAFConfig(GPIOE, GPIO_PinSource3 , GPIO_AF_FSMC); //GPIO_PinAFConfig(GPIOE, GPIO_PinSource4 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource7 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource8 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource9 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource10 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource11 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource12 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource13 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource14 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource15 , GPIO_AF_FSMC); /* GPIOF configuration */ GPIO_PinAFConfig(GPIOF, GPIO_PinSource0 , GPIO_AF_FSMC); /*GPIO_PinAFConfig(GPIOF, GPIO_PinSource1 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource2 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource3 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource4 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource5 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource12 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource13 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource14 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource15 , GPIO_AF_FSMC);*/ /* GPIOG configuration */ /*GPIO_PinAFConfig(GPIOG, GPIO_PinSource0 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOG, GPIO_PinSource1 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOG, GPIO_PinSource2 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOG, GPIO_PinSource3 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOG, GPIO_PinSource4 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOG, GPIO_PinSource5 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOG, GPIO_PinSource9 , GPIO_AF_FSMC);*/ GPIO_PinAFConfig(GPIOG, GPIO_PinSource12 , GPIO_AF_FSMC); GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 /*| GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13*/ | GPIO_Pin_14 | GPIO_Pin_15; GPIO_Init(GPIOD, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Pin = /*GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_3 |*/ GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15; GPIO_Init(GPIOE, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 /*| GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15*/; GPIO_Init(GPIOF, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Pin =/* GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_9 |*/ GPIO_Pin_12; GPIO_Init(GPIOG, &GPIO_InitStructure); FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4; FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &Timing_read; FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &Timing_write; FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); /*!< Enable FSMC Bank1_SRAM1 Bank */ FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE); }
void i2c_config(i2c_port_t i2c_port, uint32_t speed) { i2c_t i2c = i2c_port.i2c; pin_t scl = i2c_port.scl; pin_t sda = i2c_port.sda; I2C_TypeDef * id = i2cs[i2c]; uint8_t af; switch (i2c) { case i2c_port_1: af = GPIO_AF_I2C1; RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE); break; case i2c_port_2: af = GPIO_AF_I2C2; RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C2, ENABLE); break; case i2c_port_3: af = GPIO_AF_I2C3; RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C3, ENABLE); break; default: return; } uint32_t port_flags = 0; port_flags |= 1 << scl.port; port_flags |= 1 << sda.port; RCC_AHB1PeriphClockCmd(port_flags, ENABLE); GPIO_InitTypeDef GPIO_InitStructure; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_OType = GPIO_OType_OD; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Pin = 1 << scl.pin; GPIO_PinAFConfig(stm32f4xx_gpio_ports[scl.port], scl.pin, af); GPIO_Init(stm32f4xx_gpio_ports[scl.port], &GPIO_InitStructure); GPIO_InitStructure.GPIO_Pin = 1 << sda.pin; GPIO_PinAFConfig(stm32f4xx_gpio_ports[sda.port], sda.pin, af); GPIO_Init(stm32f4xx_gpio_ports[sda.port], &GPIO_InitStructure); //Init I2C I2C_InitTypeDef i2cdef; i2cdef.I2C_Mode = I2C_Mode_I2C; i2cdef.I2C_DutyCycle = I2C_DutyCycle_2; i2cdef.I2C_OwnAddress1 = 0x00; i2cdef.I2C_Ack = I2C_Ack_Enable; i2cdef.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit; i2cdef.I2C_ClockSpeed = speed; I2C_Init(id, &i2cdef); I2C_Cmd(id, ENABLE); /* #if (defined(I2C1_USE_DMA_TX) || defined(I2C1_USE_DMA_RX) || defined(I2C2_USE_DMA_TX) || defined(I2C2_USE_DMA_RX)) i2c_dma_init(id); #endif */ }
/** * @brief ADC1 Channel Vbat configuration * @note This function Configure the ADC peripheral 1) Enable peripheral clocks 2) DMA2_Stream0 channel 0 configuration 3) Configure ADC1 Channel18 (VBAT) * @param None * @retval None */ static void ADC_Config(void) { ADC_InitTypeDef ADC_InitStructure; ADC_CommonInitTypeDef ADC_CommonInitStructure; DMA_InitTypeDef DMA_InitStructure; /* Enable peripheral clocks *************************************************/ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); RCC_APB2PeriphClockCmd(ADCx_CLK, ENABLE); /* DMA2_Stream0 channel0 configuration **************************************/ DMA_DeInit(DMA2_Stream0); DMA_InitStructure.DMA_Channel = DMA_CHANNELx; DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)ADCx_DR_ADDRESS; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&uhADCConvertedValue; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; DMA_InitStructure.DMA_BufferSize = 1; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_Init(DMA_STREAMx, &DMA_InitStructure); /* DMA2_Stream0 enable */ DMA_Cmd(DMA_STREAMx, ENABLE); /* ADC Common Init **********************************************************/ ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent; ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2; ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles; ADC_CommonInit(&ADC_CommonInitStructure); /* ADC1 Init ****************************************************************/ ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; ADC_InitStructure.ADC_ScanConvMode = DISABLE; ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NbrOfConversion = 1; ADC_Init(ADCx, &ADC_InitStructure); /* Enable ADC1 DMA */ ADC_DMACmd(ADCx, ENABLE); /* ADC1 regular channel18 (VBAT) configuration ******************************/ ADC_RegularChannelConfig(ADCx, ADC_Channel_Vbat, 1, ADC_SampleTime_15Cycles); /* Enable VBAT channel */ ADC_VBATCmd(ENABLE); /* Enable DMA request after last transfer (Single-ADC mode) */ ADC_DMARequestAfterLastTransferCmd(ADCx, ENABLE); /* Enable ADC1 **************************************************************/ ADC_Cmd(ADCx, ENABLE); }
void AdcInitialise(void) { /* ADC1 configuration *******************************************************/ ADC_InitTypeDef ADC_InitStructure; ADC_CommonInitTypeDef ADC_CommonInitStructure; DMA_InitTypeDef DMA_InitStructure; GPIO_InitTypeDef GPIO_InitStructure; /* Enable ADC1, DMA2 and GPIO clocks ****************************************/ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2 | RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE); /* DMA2 Stream0 channel0 configuration **************************************/ DMA_InitStructure.DMA_Channel = DMA_Channel_0; DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&ADCx->DR); DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&ADCx_Buffer; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; DMA_InitStructure.DMA_BufferSize = ADCx_BUFFER_SIZE; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_Init(DMA2_Stream0, &DMA_InitStructure); DMA_Cmd(DMA2_Stream0, ENABLE); /* Configure ADC1 Channel12 pin as analog input ******************************/ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1; GPIO_Init(GPIOA, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; GPIO_Init(GPIOA, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; GPIO_Init(GPIOA, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0; GPIO_Init(GPIOB, &GPIO_InitStructure); /* ADC Common Init **********************************************************/ ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent; ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2; ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles; ADC_CommonInit(&ADC_CommonInitStructure); /* ADC1 Init ****************************************************************/ ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; ADC_InitStructure.ADC_ScanConvMode = ENABLE; ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NbrOfConversion = 4; ADC_Init(ADCx, &ADC_InitStructure); /* ADC1 regular channel configuration *************************************/ ADC_RegularChannelConfig(ADCx, ADC_Channel_1, 1, ADC_SampleTime_480Cycles); ADC_RegularChannelConfig(ADCx, ADC_Channel_2, 2, ADC_SampleTime_480Cycles); ADC_RegularChannelConfig(ADCx, ADC_Channel_8, 3, ADC_SampleTime_480Cycles); ADC_RegularChannelConfig(ADCx, ADC_Channel_3, 4, ADC_SampleTime_480Cycles); /* Enable DMA request after last transfer (Single-ADC mode) */ ADC_DMARequestAfterLastTransferCmd(ADCx, ENABLE); /* Enable ADC1 DMA */ ADC_DMACmd(ADCx, ENABLE); /* Enable ADC1 */ ADC_Cmd(ADCx, ENABLE); /* Start ADC1 Software Conversion */ ADC_SoftwareStartConv(ADCx); }
/* SPI2_MOSI: PB15 SPI2_MISO: PB14 SPI2_SCK : PB13 CS0: PG10 SPI FLASH CS1: PB12 TOUCH CS2: PG7 WIFI */ static void rt_hw_spi2_init(void) { /* register spi bus */ { static struct stm32_spi_bus stm32_spi; GPIO_InitTypeDef GPIO_InitStructure; RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE); GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; /*!< SPI SCK pin configuration */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15; GPIO_Init(GPIOB, &GPIO_InitStructure); /* Connect alternate function */ GPIO_PinAFConfig(GPIOB, GPIO_PinSource13, GPIO_AF_SPI2); GPIO_PinAFConfig(GPIOB, GPIO_PinSource14, GPIO_AF_SPI2); GPIO_PinAFConfig(GPIOB, GPIO_PinSource15, GPIO_AF_SPI2); stm32_spi_register(SPI2, &stm32_spi, "spi2"); } /* attach cs */ { static struct rt_spi_device spi_device; static struct stm32_spi_cs spi_cs; GPIO_InitTypeDef GPIO_InitStructure; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; /* spi21: PG10 */ spi_cs.GPIOx = GPIOG; spi_cs.GPIO_Pin = GPIO_Pin_10; RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOG, ENABLE); GPIO_InitStructure.GPIO_Pin = spi_cs.GPIO_Pin; GPIO_SetBits(spi_cs.GPIOx, spi_cs.GPIO_Pin); GPIO_Init(spi_cs.GPIOx, &GPIO_InitStructure); rt_spi_bus_attach_device(&spi_device, "spi20", "spi2", (void*)&spi_cs); } /* attach cs */ { static struct rt_spi_device spi_device; static struct stm32_spi_cs spi_cs; GPIO_InitTypeDef GPIO_InitStructure; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; /* spi21: PB12 */ spi_cs.GPIOx = GPIOB; spi_cs.GPIO_Pin = GPIO_Pin_12; RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE); GPIO_InitStructure.GPIO_Pin = spi_cs.GPIO_Pin; GPIO_SetBits(spi_cs.GPIOx, spi_cs.GPIO_Pin); GPIO_Init(spi_cs.GPIOx, &GPIO_InitStructure); rt_spi_bus_attach_device(&spi_device, "spi21", "spi2", (void*)&spi_cs); } /* attach cs */ { static struct rt_spi_device spi_device; static struct stm32_spi_cs spi_cs; GPIO_InitTypeDef GPIO_InitStructure; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; /* spi20: PG7 */ spi_cs.GPIOx = GPIOG; spi_cs.GPIO_Pin = GPIO_Pin_7; RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOG, ENABLE); GPIO_InitStructure.GPIO_Pin = spi_cs.GPIO_Pin; GPIO_SetBits(spi_cs.GPIOx, spi_cs.GPIO_Pin); GPIO_Init(spi_cs.GPIOx, &GPIO_InitStructure); rt_spi_bus_attach_device(&spi_device, "spi22", "spi2", (void*)&spi_cs); } }
void USB_OTG_BSP_Init(USB_OTG_CORE_HANDLE *pdev) { // EXTI_InitTypeDef EXTI_InitStructure; #ifdef USE_STM3210C_EVAL RCC_OTGFSCLKConfig(RCC_OTGFSCLKSource_PLLVCO_Div3); RCC_AHBPeriphClockCmd(RCC_AHBPeriph_OTG_FS, ENABLE) ; #else // USE_STM322xG_EVAL GPIO_InitTypeDef GPIO_InitStructure; #ifdef USE_USB_OTG_FS RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_GPIOA , ENABLE); /* Configure SOF ID DM DP Pins */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_11 | GPIO_Pin_12; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ; GPIO_Init(GPIOA, &GPIO_InitStructure); GPIO_PinAFConfig(GPIOA,GPIO_PinSource8,GPIO_AF_OTG1_FS) ; GPIO_PinAFConfig(GPIOA,GPIO_PinSource11,GPIO_AF_OTG1_FS) ; GPIO_PinAFConfig(GPIOA,GPIO_PinSource12,GPIO_AF_OTG1_FS) ; /* Configure VBUS Pin */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; GPIO_InitStructure.GPIO_OType = GPIO_OType_OD; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ; GPIO_Init(GPIOA, &GPIO_InitStructure); /* Configure ID pin */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; GPIO_InitStructure.GPIO_OType = GPIO_OType_OD; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP ; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_Init(GPIOA, &GPIO_InitStructure); GPIO_PinAFConfig(GPIOA,GPIO_PinSource10,GPIO_AF_OTG1_FS) ; RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE); RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_OTG_FS, ENABLE) ; #else // USE_USB_OTG_HS #ifdef USE_ULPI_PHY // ULPI RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOH | RCC_AHB1Periph_GPIOI, ENABLE); GPIO_PinAFConfig(GPIOA,GPIO_PinSource3, GPIO_AF_OTG2_HS) ; // D0 GPIO_PinAFConfig(GPIOA,GPIO_PinSource5, GPIO_AF_OTG2_HS) ; // CLK GPIO_PinAFConfig(GPIOB,GPIO_PinSource0, GPIO_AF_OTG2_HS) ; // D1 GPIO_PinAFConfig(GPIOB,GPIO_PinSource1, GPIO_AF_OTG2_HS) ; // D2 GPIO_PinAFConfig(GPIOB,GPIO_PinSource5, GPIO_AF_OTG2_HS) ; // D7 GPIO_PinAFConfig(GPIOB,GPIO_PinSource10,GPIO_AF_OTG2_HS) ; // D3 GPIO_PinAFConfig(GPIOB,GPIO_PinSource11,GPIO_AF_OTG2_HS) ; // D4 GPIO_PinAFConfig(GPIOB,GPIO_PinSource12,GPIO_AF_OTG2_HS) ; // D5 GPIO_PinAFConfig(GPIOB,GPIO_PinSource13,GPIO_AF_OTG2_HS) ; // D6 GPIO_PinAFConfig(GPIOH,GPIO_PinSource4, GPIO_AF_OTG2_HS) ; // NXT GPIO_PinAFConfig(GPIOI,GPIO_PinSource11,GPIO_AF_OTG2_HS) ; // DIR GPIO_PinAFConfig(GPIOC,GPIO_PinSource0, GPIO_AF_OTG2_HS) ; // STP // CLK GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 ; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_Init(GPIOA, &GPIO_InitStructure); // D0 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3 ; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ; GPIO_Init(GPIOA, &GPIO_InitStructure); // D1 D2 D3 D4 D5 D6 D7 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_5 | GPIO_Pin_10 | GPIO_Pin_11| GPIO_Pin_12 | GPIO_Pin_13 ; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ; GPIO_Init(GPIOB, &GPIO_InitStructure); // STP GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 ; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_Init(GPIOC, &GPIO_InitStructure); //NXT GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_Init(GPIOH, &GPIO_InitStructure); //DIR GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 ; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_Init(GPIOI, &GPIO_InitStructure); RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_OTG_HS | RCC_AHB1Periph_OTG_HS_ULPI, ENABLE) ; #else RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB , ENABLE); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_14 | GPIO_Pin_15; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_Init(GPIOB, &GPIO_InitStructure); GPIO_PinAFConfig(GPIOB,GPIO_PinSource12, GPIO_AF_OTG2_FS) ; GPIO_PinAFConfig(GPIOB,GPIO_PinSource14,GPIO_AF_OTG2_FS) ; GPIO_PinAFConfig(GPIOB,GPIO_PinSource15,GPIO_AF_OTG2_FS) ; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; GPIO_Init(GPIOB, &GPIO_InitStructure); RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_OTG_HS, ENABLE) ; #endif #endif //USB_OTG_HS #endif //USE_STM322xG_EVAL /* Intialize Timer for delay function */ USB_OTG_BSP_TimeInit(); }