/*NRF24L01初始化 //***************************************************************************************/ void init_NRF24L01(void) { inerDelay_us(100); CE=0; // chip enable CSN=1; // Spi disable SCK=0; // Spi clock line init high SPI_Write_Buf(WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH); // 写本地地址 SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, RX_ADDRESS, RX_ADR_WIDTH); // 写接收端地址 SPI_RW_Reg(WRITE_REG + EN_AA, 0x01); // 频道0自动 ACK应答允许 SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); // 允许接收地址只有频道0,如果需要多频道可以参考Page21 SPI_RW_Reg(WRITE_REG + RF_CH, 0); // 设置信道工作为2.4GHZ,收发必须一致 SPI_RW_Reg(WRITE_REG + RX_PW_P0, RX_PLOAD_WIDTH); //设置接收数据长度,本次设置为32字节 SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); //设置发射速率为1MHZ,发射功率为最大值0dB SPI_RW_Reg(WRITE_REG+SETUP_RETR,0x0a); // SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e); // IRQ收发完成中断响应,16位CRC,主发送 }
/*NRF24L01初始化 //***************************************************************************************/ void init_NRF24L01(void) { inerDelay_us(100); CE=0; // chip enable CSN=1; // Spi disable SCK=0; // Spi clock line init high SPI_Write_Buf(WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH); // 写本地地址 SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, RX0_ADDRESS, RX_ADR_WIDTH); // 写接收端地址 P0 SPI_Write_Buf(WRITE_REG + RX_ADDR_P1, RX1_ADDRESS, RX_ADR_WIDTH); // 写接收端地址 P1 SPI_Write_Buf(WRITE_REG + RX_ADDR_P2, RX2_ADDRESS, 1); // 写接收端地址 P2 SPI_Write_Buf(WRITE_REG + RX_ADDR_P3, RX3_ADDRESS, 1); // 写接收端地址 P3 SPI_Write_Buf(WRITE_REG + RX_ADDR_P4, RX4_ADDRESS, 1); // 写接收端地址 P4 SPI_Write_Buf(WRITE_REG + RX_ADDR_P5, RX5_ADDRESS, 1); // 写接收端地址 P5 SPI_RW_Reg(WRITE_REG + EN_AA,0x3F); // 频道0 - 5 自动 ACK应答允许 SPI_RW_Reg(WRITE_REG + EN_RXADDR,0x3F); // 允许接收地址频道0 - 5 SPI_RW_Reg(WRITE_REG + RF_CH, 0); // 设置信道工作为2.4GHZ,收发必须一致 SPI_RW_Reg(WRITE_REG + RX_PW_P0, RX_PLOAD_WIDTH); //设置接收数据长度,本次设置为RX_PLOAD_WIDTH字节 SPI_RW_Reg(WRITE_REG + RX_PW_P1, RX_PLOAD_WIDTH); //设置接收数据长度,本次设置为RX_PLOAD_WIDTH字节 SPI_RW_Reg(WRITE_REG + RX_PW_P2, RX_PLOAD_WIDTH); //设置接收数据长度,本次设置为RX_PLOAD_WIDTH字节 SPI_RW_Reg(WRITE_REG + RX_PW_P3, RX_PLOAD_WIDTH); //设置接收数据长度,本次设置为RX_PLOAD_WIDTH字节 SPI_RW_Reg(WRITE_REG + RX_PW_P4, RX_PLOAD_WIDTH); //设置接收数据长度,本次设置为RX_PLOAD_WIDTH字节 SPI_RW_Reg(WRITE_REG + RX_PW_P5, RX_PLOAD_WIDTH); //设置接收数据长度,本次设置为RX_PLOAD_WIDTH字节 SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); //设置发射速率为1MHZ,发射功率为最大值0dB CE=1; // chip disable }
unsigned char NRF24L01_Check(void) { uchar check_in_buf[5]={0x11,0x22,0x33,0x44,0x55}; uchar check_out_buf[5]={0x00}; SPI_Write_Buf(WRITE_REG+TX_ADDR,check_in_buf,5);//写入5个字节的地址. SPI_Read_Buf(TX_ADDR,check_out_buf,5); //读出写入的地址 if((check_out_buf[0] == 0x11)&&(check_out_buf[1] == 0x22)&&(check_out_buf[2] == 0x33)&&(check_out_buf[3] == 0x44)&&(check_out_buf[4] == 0x55)) return 0; else return 1; }
//检测24L01是否存在 //返回值:0,成功;1,失败 uchar NRF_Check(void) { uchar buf[5]={0XA5,0XA5,0XA5,0XA5,0XA5}; uchar i; SPI_Write_Buf(WRITE_REG+TX_ADDR,buf,5);//写入5个字节的地址. SPI_Read_Buf(TX_ADDR,buf,5); //读出写入的地址 for(i=0;i<5;i++)if(buf[i]!=0XA5)break; if(i!=5)return 1;//检测24L01错误 return 0; //检测到24L01 }
void init_NRF24L01(void) { //init SPI SPCR=0x51; //set this to 0x50 for 1 mbits SPSR=0x00; //inerDelay_us(100); _delay_us(100); cbi(PORTC,CE);//CE=0; // chip enable sbi(PORTC,CSN);//CSN=1; // Spi disable //SCK=0; // Spi clock line init high SPI_Write_Buf(WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH); // SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, RX_ADDRESS, RX_ADR_WIDTH); // SPI_RW_Reg(WRITE_REG + EN_AA, 0x00); // EN P0, 2-->P1 SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); //Enable data P0 SPI_RW_Reg(WRITE_REG + RF_CH, 2); // Chanel 0 RF = 2400 + RF_CH* (1or 2 M) SPI_RW_Reg(WRITE_REG + RX_PW_P0, RX_PLOAD_WIDTH); // Do rong data truyen 32 byte SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); // 1M, 0dbm SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e); // Enable CRC, 2 byte CRC, Send }
void nRF24L01_TxPacket(unsigned char * tx_buf) { CE=0; //StandBy I模式 SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e); sta=SPI_Read(STATUS); // 读取状态寄存其来判断数据接收状况 SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); // 装载接收端地址 SPI_Write_Buf(WR_TX_PLOAD, tx_buf, TX_PLOAD_WIDTH); // 装载数据 CE=1; //置高CE,激发数据发送 inerDelay_us(10); inerDelay_us(10); SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f); // IRQ收发完成中断响应,16位CRC,主发送 SPI_RW_Reg(WRITE_REG+STATUS,0x07); /* if(TX_DS) { CE = 0; //SPI使能 SPI_RW_Reg(WRITE_REG+STATUS,0x07); //接收到数据后RX_DR,TX_DS,MAX_PT都置高为1,通过写1来清楚中断标志 R_S_Byte(0x73); } */ CE=1; //置高CE,激发数据发送 inerDelay_us(10); }
void RX_Mode(void) { CE = 0; SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); // 接收设备接收通道0使用和发送设备相同的发送地址 SPI_RW_Reg(WRITE_REG + EN_AA, 0x01); // 使能接收通道0自动应答 SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); // 使能接收通道0 SPI_RW_Reg(WRITE_REG + RF_CH, 40); // 选择射频通道0x40 SPI_RW_Reg(WRITE_REG + RX_PW_P0, TX_PLOAD_WIDTH); // 接收通道0选择和发送通道相同有效数据宽度 SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); // 数据传输率1Mbps,发射功率0dBm,低噪声放大器增益 SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f); // CRC使能,16位CRC校验,上电,接收模式 CE = 1; // 拉高CE启动接收设备 }
/************************************************** 函数:nrf24l01_setRx() 描述: 设置节点切换为接收模式 **************************************************/ void nrf24l01_setRx(void) { CE_L; #ifdef DEBUG printk("CE_L\n"); #endif udelay(2); /* SPI_Write_Buf(WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH); // 写本地地址 SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, RX_ADDRESS, RX_ADR_WIDTH); // 写接收端地址 SPI_RW_Reg(WRITE_REG + EN_AA, 0x01); // 频道0自动 ACK应答允许 SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); // 允许接收地址只有频道0 SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x0a); // 自动重发延时等待250us+86us,自动重发10次 SPI_RW_Reg(WRITE_REG + RF_CH, 40); // 设置信道工作为2.4GHZ,选择射频通道0x40,收发必须一致 SPI_RW_Reg(WRITE_REG + RX_PW_P0, RX_PLOAD_WIDTH); //设置接收数据长度,本次设置为4字节 SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); //设置发射速率为1MHZ,发射功率为最大值0dB SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f); // IRQ收发完成中断响应,16位CRC ,主接收 */ SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, RX_ADDRESS, RX_ADR_WIDTH); // 接收设备接收通道0使用和发送设备相同的发送地址 SPI_RW_Reg(WRITE_REG + EN_AA, 0x01); // 使能接收通道0自动应答 SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); // 使能接收通道0 SPI_RW_Reg(WRITE_REG + RF_CH, 40); // 选择射频通道0x40 SPI_RW_Reg(WRITE_REG + RX_PW_P0, TX_PLOAD_WIDTH); // 接收通道0选择和发送通道相同有效数据宽度 SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); // 数据传输率1Mbps,发射功率0dBm,低噪声放大器增益 SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f); // CRC使能,16位CRC校验,上电,接收模式 #ifdef DEBUG printk("=========================================\n"); printk("WRITE_REG + EN_AA : %x\n",SPI_Read(WRITE_REG + EN_AA)); printk("WRITE_REG + EN_RXADDR : %x \n",SPI_Read(WRITE_REG + EN_RXADDR)); printk("WRITE_REG + RF_CH : %x \n",SPI_Read(WRITE_REG + RF_CH)); printk("WRITE_REG + RX_PW_P0 : %x \n",SPI_Read(WRITE_REG + RX_PW_P0)); printk("WRITE_REG + RF_SETUP : %x \n",SPI_Read(WRITE_REG + RF_SETUP)); printk("WRITE_REG + CONFIG : %x \n",SPI_Read(WRITE_REG + CONFIG)); //SPI_RW_Reg(WRITE_REG + EN_AA, 0x01); // 使能接收通道0自动应答 //SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); // 使能接收通道0 //SPI_RW_Reg(WRITE_REG + RF_CH, 40); // 选择射频通道0x40 //SPI_RW_Reg(WRITE_REG + RX_PW_P0, TX_PLOAD_WIDTH); // 接收通道0选择和发送通道相同有效数据宽度 //SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); // 数据传输率1Mbps,发射功率0dBm,低噪声放大器增益 //SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f); // CRC使能,16位CRC校验,上电,接收模式 #endif udelay(6); CE_H; #ifdef DEBUG printk("CE_H\n"); #endif udelay(130); }
//该函数初始化NRF24L01到RX模式 //设置RX地址,写RX数据宽度,选择RF频道,波特率和LNA HCURR //当CE变高后,即进入RX模式,并可以接收数据了 void RX_Mode(void) { CE=0; SPI_Write_Buf(WRITE_REG+RX_ADDR_P0,(uchar*)RX_ADDRESS,RX_ADR_WIDTH);//写RX节点地址 SPI_RW_Reg(WRITE_REG+EN_AA,0x01); //使能通道0的自动应答 SPI_RW_Reg(WRITE_REG+EN_RXADDR,0x01);//使能通道0的接收地址 SPI_RW_Reg(WRITE_REG+RF_CH,40); //设置RF通信频率 SPI_RW_Reg(WRITE_REG+RX_PW_P0,RX_PLOAD_WIDTH);//选择通道0的有效数据宽度 SPI_RW_Reg(WRITE_REG+RF_SETUP,0x0f);//设置TX发射参数,0db增益,2Mbps,低噪声增益开启 SPI_RW_Reg(WRITE_REG+CONFIG, 0x0f);//配置基本工作模式的参数;PWR_UP,EN_CRC,16BIT_CRC,接收模式 CE = 1; //CE为高,进入接收模式 }
void nRF24L01_Init(void) { SPI_Init(); nRF24L01_CE_CLR; // chip enable nRF24L01_CSN_SET; // Spi disable nRF24L01_SCK_CLR; // Spi clock line init high SPI_Write_Buf(WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH); SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, RX_ADR_WIDTH); SPI_RW_Reg(WRITE_REG + CONFIG, 0xc); // 16-CRC #ifdef nRF24L01_TX_Debug //SPI_RW_Reg(WRITE_REG + EN_AA, 0x00); //SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x00); //SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x00); #elif (defined nRF24L01_RX_Debug) //SPI_RW_Reg(WRITE_REG + EN_AA, 0x00); //SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); #else SPI_RW_Reg(WRITE_REG + EN_AA, 0x00); SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x0a); #endif SPI_RW_Reg(WRITE_REG + SETUP_AW, 0x03); // Setup address width=5 bytes SPI_RW_Reg(WRITE_REG + RF_CH, 0); SPI_RW_Reg(WRITE_REG + RX_PW_P0, RX_PLOAD_WIDTH); SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); // Disable dynamic payloads, to match dynamic_payloads_enabled setting SPI_RW_Reg(WRITE_REG + DYNPD, 0x0); SPI_RW_Reg(FLUSH_TX,0xff); SPI_RW_Reg(WRITE_REG + STATUS,0xff); SPI_RW_Reg(FLUSH_RX,0xff); }
void NRFLib::send_message(unsigned char buf[]) { //flushTX(); SPI_RW_Reg(WRITE_REG + STATUS, 0x30); // Clear MAX_RT and TX_DS bits. if (!_txmode) TXMode(); SPI_Write_Buf(WR_TX_PLOAD, buf, _payload); // Send it! digitalWrite(_cepin, 1); delay(1); digitalWrite(_cepin, 0); }
// Sends packet currenting in the tx_buf. int nrf24l01plus_Send_Packet(void) { int rec = 0; unsigned char status = SPI_Rd(STATUS); // read register STATUS's value if(status&TX_DS || status&MAX_RT) // if receive data ready (TX_DS) interrupt { PIO_Clear(&CE); SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e); SPI_RW_Reg(FLUSH_TX,0); SPI_Write_Buf(WR_TX_PLOAD,tx_buf,TX_PLOAD_WIDTH); // write playload to TX_FIFO rec = 1; PIO_Set(&CE); } SPI_RW_Reg(WRITE_REG+STATUS,status); // clear RX_DR or TX_DS or MAX_RT interrupt flag return rec; }
void NRFLib::init(void) { pinMode(_cepin, OUTPUT); pinMode(_csnpin, OUTPUT); SPI85.begin(); digitalWrite(_cepin, 0); // chip enable digitalWrite(_csnpin, 1); // Spi disable SPI_RW_Reg(WRITE_REG + EN_AA, 0x01); // Enable Auto.Ack:Pipe0 SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); // Enable Pipe0 SPI_RW_Reg(WRITE_REG + RF_CH, 120); // Select RF channel 120 SPI_RW_Reg(WRITE_REG + RX_PW_P0, _payload); // Select same RX payload width as TX Payload width SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x27); // TX_PWR:0dBm, Datarate:250kbps SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0xff); // Up to 15retries with 4ms wait in between. SPI_Write_Buf(WRITE_REG + TX_ADDR, _tx_addr, ADR_WIDTH); // Writes TX_Address to nRF24L01 }
uchar NRF24L01_Check(void) {//check if there is a NRE24L01 uchar check_in_buf[5]={0x11,0x22,0x33,0x44,0x55}; uchar check_out_buf[5]={0x00}; NRF_SCK0; NRF_CSN1; NRF_CE0; SPI_Write_Buf(WRITE_REG+TX_ADDR, check_in_buf, 5); SPI_Read_Buf(READ_REG+TX_ADDR, check_out_buf, 5); if((check_out_buf[0] == 0x11)&&\ (check_out_buf[1] == 0x22)&&\ (check_out_buf[2] == 0x33)&&\ (check_out_buf[3] == 0x44)&&\ (check_out_buf[4] == 0x55))return 0; else return 1; }
//启动NRF24L01发送一次数据 //txbuf:待发送数据首地址 //返回值:发送完成状况 uchar NRF24L01_TxPacket(uchar *txbuf) { uchar sta; CE=0; SPI_Write_Buf(WR_TX_PLOAD,txbuf,TX_PLOAD_WIDTH);//写数据到TX BUF 32个字节 CE=1;//启动发送 while(IRQ!=0);//等待发送完成 sta=SPI_Read(STATUS); //读取状态寄存器的值 SPI_RW_Reg(WRITE_REG+STATUS,sta); //清除TX_DS或MAX_RT中断标志 if(sta&MAX_TX)//达到最大重发次数 { SPI_RW_Reg(FLUSH_TX,0xff); return MAX_TX; } if(sta&TX_OK) { return TX_OK; } return 1; }
uchar NRF24L01_TxPacket(uchar *txbuf) { uchar stat = 0; NRF_CE0; SPI_Write_Buf(WR_TX_PLOAD,txbuf,TX_PLOAD_WIDTH); NRF_CE1; while(NRF_IRQ_READ); stat = SPI_Read_Reg(STATUS); SPI_Write_Reg(WRITE_REG+STATUS,stat); if(stat&MAX_TX)//达到最大重发次数 { SPI_Write_Reg(FLUSH_TX,0xff);//清除TX FIFO寄存器 return MAX_TX; } if(stat&TX_OK)//发送完成 { return TX_OK; } return 0xff;//发送失败 }
uchar nRF24L01_RxPacket(uchar *rx_buf) { uchar revale=0; SPI_Write_Buf(WRITE_REG + RX_ADDR_P0,RX0_ADDRESS, RX_ADR_WIDTH); CE=0; SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f); // IRQ收发完成中断响应,16位CRC ,主接收 CE = 1; inerDelay_us(130); sta=SPI_Read(STATUS); // 读取状态寄存其来判断数据接收状况 if(RX_DR) // 判断是否接收到数据 { CE = 0; //SPI使能 SPI_Read_Buf(RD_RX_PLOAD,rx_buf,RX_PLOAD_WIDTH);// read receive payload from RX_FIFO buffer revale =1; //读取数据完成标志 switch(sta%16/2) { case 0: { write_com(0x80+0x43); write_data((rx_buf[1]*256+rx_buf[2])/100%10+48); write_data(((rx_buf[1]*256+rx_buf[2])/10)%10+48); write_data('.'); write_data((rx_buf[1]*256+rx_buf[2])%10+48); write_data(0xdf); write_data('c'); break; } case 1: { write_com(0x80+0x03); write_data(((rx_buf[1]*256+rx_buf[2])/100)%10+48); write_data(((rx_buf[1]*256+rx_buf[2])/10)%10+48); write_data('.'); write_data((rx_buf[1]*256+rx_buf[2])%10+48); write_data(0xdf); write_data('c'); break; } } } SPI_RW_Reg(WRITE_REG+STATUS,sta); //接收到数据后RX_DR,TX_DS,MAX_PT都置高为1,通过写1来清楚中断标志 return revale; }
/************************************************** Function: Send_Packet Description: fill FIFO to send a packet Parameter: type: WR_TX_PLOAD or W_TX_PAYLOAD_NOACK_CMD pbuf: a buffer pointer len: packet length Return: None **************************************************/ char Send_Packet(UINT8 type,UINT8* pbuf,UINT8 len) { UINT8 fifo_sta; SwitchToTxMode(); //switch to tx mode fifo_sta=SPI_Read_Reg(FIFO_STATUS); // read register FIFO_STATUS's value if((fifo_sta&FIFO_STATUS_TX_FULL)==0)//if not full, send data (write buff) { //RED_LED = 1; SPI_Write_Buf(type, pbuf, len); // Writes data to buffer //delay_50ms(); //RED_LED = 0; //delay_50ms(); _delay_ms(100); } return 0; }
void RFM73_Initialize() { UINT8 i,j,temp; UINT8 WriteArr[12]; //DelayMs(100);//delay more than 50ms. _delay_ms(200); SwitchCFG(0); for(i=0;i<20;i++) { SPI_Write_Reg((WRITE_REG|Bank0_Reg[i][0]),Bank0_Reg[i][1]); } /*//reg 10 - Rx0 addr SPI_Write_Buf((WRITE_REG|10),RX0_Address,5); //REG 11 - Rx1 addr SPI_Write_Buf((WRITE_REG|11),RX1_Address,5); //REG 16 - TX addr SPI_Write_Buf((WRITE_REG|16),RX0_Address,5);*/ //reg 10 - Rx0 addr for(j=0;j<5;j++) { WriteArr[j]=RX0_Address[j]; } SPI_Write_Buf((WRITE_REG|10),&(WriteArr[0]),5); //REG 11 - Rx1 addr for(j=0;j<5;j++) { WriteArr[j]=RX1_Address[j]; } SPI_Write_Buf((WRITE_REG|11),&(WriteArr[0]),5); //REG 16 - TX addr for(j=0;j<5;j++) { WriteArr[j]=RX0_Address[j]; } SPI_Write_Buf((WRITE_REG|16),&(WriteArr[0]),5); // printf("\nEnd Load Reg"); i=SPI_Read_Reg(29);//read Feature Register ???????§??¶??¬?¤¶?»??? Payload With ACK?¬???????????¬·??? ACTIVATE????????????0x73),?»??????¶??¬?¤¶?»??? Payload With ACK (REG28,REG29). if(i==0) // i!=0 showed that chip has been actived.so do not active again. SPI_Write_Reg(ACTIVATE_CMD,0x73);// Active for(i=22;i>=21;i--) { SPI_Write_Reg((WRITE_REG|Bank0_Reg[i][0]),Bank0_Reg[i][1]); //SPI_Write_Reg_Bank0(Bank0_Reg[i][0],Bank0_Reg[i][1]); } //********************Write Bank1 register****************** SwitchCFG(1); for(i=0;i<=8;i++)//reverse { for(j=0;j<4;j++) WriteArr[j]=(Bank1_Reg0_13[i]>>(8*(j) ) )&0xff; SPI_Write_Buf((WRITE_REG|i),&(WriteArr[0]),4); } for(i=9;i<=13;i++) { for(j=0;j<4;j++) WriteArr[j]=(Bank1_Reg0_13[i]>>(8*(3-j) ) )&0xff; SPI_Write_Buf((WRITE_REG|i),&(WriteArr[0]),4); } //SPI_Write_Buf((WRITE_REG|14),&(Bank1_Reg14[0]),11); for(j=0;j<11;j++) { WriteArr[j]=Bank1_Reg14[j]; } SPI_Write_Buf((WRITE_REG|14),&(WriteArr[0]),11); //toggle REG4<25,26> for(j=0;j<4;j++) //WriteArr[j]=(RegArrFSKAnalog[4]>>(8*(j) ) )&0xff; WriteArr[j]=(Bank1_Reg0_13[4]>>(8*(j) ) )&0xff; WriteArr[0]=WriteArr[0]|0x06; SPI_Write_Buf((WRITE_REG|4),&(WriteArr[0]),4); WriteArr[0]=WriteArr[0]&0xf9; SPI_Write_Buf((WRITE_REG|4),&(WriteArr[0]),4); //**************************Test spi*****************************// //SPI_Write_Reg((WRITE_REG|Bank0_Reg[2][0]),0x0f); //test_data = SPI_Read_Reg(0x02); //DelayMs(10); _delay_ms(50); //********************switch back to Bank0 register access****************** SwitchCFG(0); SwitchToRxMode();//switch to RX mode }
void NRFLib::TXMode(void) { digitalWrite(_cepin, 0); SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, _tx_addr, ADR_WIDTH); // RX_Addr0 same as TX_Adr for Auto.Ack SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e); // Set PWR_UP bit, enable CRC(2 unsigned chars) & Prim:TX. MAX_RT & TX_DS enabled.. _txmode = true; }