void commUartInit ( void ) { /*********** UART 0 ***************/ SysCtlPeripheralEnable ( SYSCTL_PERIPH_UART0 ); // // Set GPIO A0 and A1 as UART pins. // GPIOPinConfigure ( GPIO_PA0_U0RX ); GPIOPinConfigure ( GPIO_PA1_U0TX ); GPIOPinTypeUART ( GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1 ); UARTConfigSetExpClk ( UART0_BASE, SysCtlClockGet(), SPEED_UART_STD, ( UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE ) ); UARTFIFOEnable ( UART0_BASE ); UARTFIFOLevelSet ( UART0_BASE , UART_FIFO_TX4_8 , UART_FIFO_RX4_8 ); UARTIntEnable ( UART0_BASE, UART_INT_RX | UART_INT_RT ); /*********** UART 1 ***************/ SysCtlPeripheralEnable ( SYSCTL_PERIPH_UART1 ); // // Set GPIO D2 and D3 as UART pins. // GPIOPinConfigure ( GPIO_PD2_U1RX ); GPIOPinConfigure ( GPIO_PD3_U1TX ); GPIOPinTypeUART ( GPIO_PORTD_BASE, GPIO_PIN_2 | GPIO_PIN_3 ); UARTConfigSetExpClk ( UART1_BASE, SysCtlClockGet(), SPEED_UART_STD, ( UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE) ); UARTFIFOEnable ( UART1_BASE ); UARTFIFOLevelSet ( UART1_BASE , UART_FIFO_TX4_8 , UART_FIFO_RX4_8 ); UARTIntEnable ( UART1_BASE, UART_INT_RX | UART_INT_RT ); /*********** UART 2 ***************/ SysCtlPeripheralEnable ( SYSCTL_PERIPH_UART2 ); // // Set GPIO G0 and G1 as UART pins. // GPIOPinConfigure ( GPIO_PG0_U2RX ); GPIOPinConfigure ( GPIO_PG1_U2TX ); GPIOPinTypeUART ( GPIO_PORTG_BASE, GPIO_PIN_0 | GPIO_PIN_1 ); UARTConfigSetExpClk ( UART2_BASE, SysCtlClockGet(), SPEED_UART_RS485, ( UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE ) ); UARTFIFOEnable ( UART2_BASE ); UARTFIFOLevelSet ( UART2_BASE , UART_FIFO_TX4_8 , UART_FIFO_RX4_8 ); UARTIntEnable ( UART2_BASE, UART_INT_RX | UART_INT_RT ); }
//***************************************************************************** // // Initializes the RemoTI UART driver interface to a remote network processor. // // \param ui32Base is the base address of the UART peripheral to be used. // Caller must call SysCtlPeripheralEnable for this UART peripheral prior to // calling this init funciton. // // This function will initialize the ring buffers used for transmit and receive // of data to and from the RNP. It also configures the UART peripheral for a // default setting. Enables receive interrupts. Transmit interrupts are // enabled when a transmit is in progress. Master interrupt enable must be // turned on by the application. // // \note Users of this driver are also responsible to assign // RemoTIUARTIntHandler() as the interrupt routine associated with the UART // peripheral of choice. // // \return None. // //***************************************************************************** void RemoTIUARTInit(uint32_t ui32Base) { // // Save the UART peripheral base address for later use. // g_ui32UARTBase = ui32Base; // // Initialize the TX and RX ring buffers for storage of our data. // RingBufInit(&g_rbRemoTIRxRingBuf, g_pui8RxBuf, REMOTI_UART_TX_BUF_SIZE); RingBufInit(&g_rbRemoTITxRingBuf, g_pui8TxBuf, REMOTI_UART_TX_BUF_SIZE); // // Configure UART clock settings. // UARTConfigSetExpClk(ui32Base, SysCtlClockGet(), 115200, (UART_CONFIG_WLEN_8 | UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE | UART_FLOWCONTROL_NONE)); // // Configure the UART FIFO. Enable the UART and Enable RX interrupts. // UARTFIFOLevelSet(ui32Base, UART_FIFO_TX1_8, UART_FIFO_RX1_8); UARTEnable(ui32Base); UARTFIFODisable(ui32Base); UARTIntEnable(ui32Base, UART_INT_RX); }
void uartInitRs485(void) { unsigned long cfg = 0; SysCtlPeripheralEnable ( SYSCTL_PERIPH_UART2 ); // // Set GPIO A0 and A1 as UART pins. // GPIOPinConfigure ( GPIO_PG0_U2RX ); GPIOPinConfigure ( GPIO_PG1_U2TX ); GPIOPinTypeUART ( GPIO_PORTG_BASE, GPIO_PIN_0 | GPIO_PIN_1 ); //GPIOPadConfigSet ( GPIO_PORTG_BASE, GPIO_PIN_0 | GPIO_PIN_1, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU ); cfg = UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE ; if (SysParam[SP_CHECKBIT] == 0x02) { cfg &= ~ UART_CONFIG_PAR_MASK; cfg |= UART_CONFIG_PAR_EVEN; } UARTConfigSetExpClk ( UART2_BASE, SysCtlClockGet(), BaudRateTable[SysParam[SP_BAUDRATE]], cfg); UARTFIFOEnable ( UART2_BASE ); UARTFIFOLevelSet ( UART2_BASE , UART_FIFO_TX4_8 , UART_FIFO_RX1_8 ); UARTIntEnable ( UART2_BASE, UART_INT_RX | UART_INT_RT ); }
/****************************************************************************** * UART-0 Configuration VCP (Virtual Com Port) * ---------------------------------------------------------------------------- * UART 0 -> Port A -> Pins PA0(Tx) & PA1(Rx) * 9600-8N1 * ******************************************************************************/ void PSO_UART0Config() { SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); /* Enable UART Module 0 */ SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); /* Enable GPIO Port A for UART-0 use */ GPIOPinConfigure(GPIO_PA0_U0RX); GPIOPinConfigure(GPIO_PA1_U0TX); GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), 115200, UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE); /* UART-0 interrupt configuration */ UARTDisable(UART0_BASE); UARTFIFOEnable(UART0_BASE); IntEnable(INT_UART0); UARTFIFOLevelSet(UART0_BASE, UART_FIFO_TX1_8, UART_FIFO_RX7_8); UARTIntEnable(UART0_BASE, UART_INT_RX); // | UART_INT_RT UARTEnable(UART0_BASE); UARTFIFOEnable(UART0_BASE); }
void UARTHandler(uint32_t channel) { uint32_t FIFOlevTX, FIFOlevRX; uint32_t int_status; int_status = UARTIntStatus(uart_ports[channel], true); // We'll be adjusting the FIFOs, so snapshot the current state. UARTFIFOLevelGet(uart_ports[channel],&FIFOlevTX,&FIFOlevRX); // ------------------ TX Logic ----------------------- // The FIFO Triggered highwater, and now it's drained. // Clear the IRQ and reset the FIFO trigger level. // Exit the handler and possible return to start over if ( (int_status & UART_MIS_TXMIS) != 0 ) { // We don't need another interrupt. Disable it and restore the // threshhold. HWREG(uart_ports[channel] + UART_O_IM) &= ~(UART_IM_TXIM); UARTFIFOLevelSet(uart_ports[channel],UART_FIFO_TX4_8,FIFOlevRX); return; } // ------------------ RX Logic ----------------------- // If we're at RX 1/8, just raise it. // If we're at RX 1/4, THe FIFO is starting to overlfow. Send the XOFF // and raise the trigger level so we get another IRQ if ( (int_status & UART_MIS_RXMIS) != 0 ) { if (FIFOlevRX == UART_FIFO_RX1_8 ) { UARTFIFOLevelSet(uart_ports[channel],FIFOlevTX,UART_FIFO_RX2_8); } if (FIFOlevRX == UART_FIFO_RX2_8 ) { UARTFIFOLevelSet(uart_ports[channel],FIFOlevTX,UART_FIFO_RX7_8); UARTCharPut(uart_ports[channel],XOFFCHAR); // BLocking. Should be OK. } } // Clear it. UARTIntClear(uart_ports[channel], int_status); }
int main(void) { char cThisChar; SysCtlClockSet(SYSCTL_SYSDIV_5 | SYSCTL_USE_PLL |SYSCTL_XTAL_16MHZ| SYSCTL_OSC_MAIN ); //Para el SW1 /*SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF); GPIODirModeSet(GPIO_PORTF_BASE, 0xFF, GPIO_DIR_MODE_IN); GPIOPinIntEnable(GPIO_PORTB_BASE, 0xFF); IntEnable(INT_GPIOF);*/ SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); GPIOPinConfigure(GPIO_PA0_U0RX); GPIOPinConfigure(GPIO_PA1_U0TX); GPIOPinConfigure(GPIO_PB0_U1RX); GPIOPinConfigure(GPIO_PB1_U1TX); GPIOPinTypeUART(GPIO_PORTB_BASE, GPIO_PIN_0 | GPIO_PIN_1); GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); UARTConfigSetExpClk(UART1_BASE, SysCtlClockGet(), 9600, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), 9600, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); UARTFIFOLevelSet(UART1_BASE,UART_FIFO_TX7_8,UART_FIFO_RX7_8); UARTIntClear(UART1_BASE, UART_INT_TX | UART_INT_RX); UARTIntEnable(UART1_BASE, UART_INT_RX); UARTFIFOEnable(UART1_BASE); IntMasterEnable(); UARTEnable(UART1_BASE); IntEnable(INT_UART1); for(n=0; n<sizeof(buferA); n++){ UARTCharPut(UART1_BASE, buferA[n]);} for(m=0; m<sizeof(buferC); m++){ UARTCharPut(UART1_BASE, buferC[m]);} while(1){;} }
void uartStart(void) { unsigned int intFlags = 0; unsigned int config = 0; /* Enabling the PSC for UART2.*/ /* roger, crash PSCModuleControl(SOC_PSC_1_REGS, HW_PSC_UART2, PSC_POWERDOMAIN_ALWAYS_ON, PSC_MDCTL_NEXT_ENABLE); */ /* Setup PINMUX */ UARTPinMuxSetup(2, FALSE); /* Enabling the transmitter and receiver*/ UARTEnable(SOC_UART_2_REGS); /* 1 stopbit, 8-bit character, no parity */ config = UART_WORDL_8BITS; /* Configuring the UART parameters*/ UARTConfigSetExpClk(SOC_UART_2_REGS, SOC_UART_2_MODULE_FREQ, BAUD_115200, config, UART_OVER_SAMP_RATE_16); /* Enabling the FIFO and flushing the Tx and Rx FIFOs.*/ UARTFIFOEnable(SOC_UART_2_REGS); /* Setting the UART Receiver Trigger Level*/ UARTFIFOLevelSet(SOC_UART_2_REGS, UART_RX_TRIG_LEVEL_1); /* ** Enable AINTC to handle interrupts. Also enable IRQ interrupt in ARM ** processor. */ /* Do int from config, not by starterware SetupInt(); */ /* Configure AINTC to receive and handle UART interrupts. */ /* Do int from config, not by starterware ConfigureIntUART(); */ /* Preparing the 'intFlags' variable to be passed as an argument.*/ /* intFlags |= (UART_INT_LINE_STAT | \ UART_INT_TX_EMPTY | \ UART_INT_RXDATA_CTI); */ intFlags |= (UART_INT_LINE_STAT | \ UART_INT_RXDATA_CTI); /* Enable the Interrupts in UART.*/ UARTIntEnable(SOC_UART_2_REGS, intFlags); }
void serial_init() { rx_buffer_head = rx_buffer_tail = 0; tx_buffer_head = tx_buffer_tail = 0; #ifdef PART_LM4F120H5QR //code for ARM SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOA ); //enable pins which correspond to RxD and TxD signals SysCtlDelay( 26 ); // Delay 1usec for peripherial to start GPIOPinConfigure( GPIO_PA0_U0RX ); //configure pin to be RxD of UART0 GPIOPinConfigure( GPIO_PA1_U0TX ); //configure pin to be TxD of UART0 GPIOPinTypeUART( GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1 ); //configure pins 0 and 1 of PORTA to be RxD and TxD SysCtlPeripheralEnable( SYSCTL_PERIPH_UART0 ); // Enable the UART0 peripheral for use. SysCtlDelay( 26 ); // Delay 1usec for peripherial to start UARTConfigSetExpClk( UART0_BASE, SysCtlClockGet(), 115200, UART_CONFIG_WLEN_8 | UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE ); //115200 baud, 8-N-1 UARTFIFOLevelSet( UART0_BASE, UART_FIFO_TX1_8, UART_FIFO_RX1_8 ); //Interrupt if TX FIFO is almost empty or any character is received. UARTIntDisable( UART0_BASE, 0xFFFFFFFF ); // Disable all interrupt sources for UART0 module UARTIntEnable( UART0_BASE, UART_INT_RX | UART_INT_RT ); //Enable only receive interrupts UARTIntRegister( UART0_BASE, arm_uart_interrupt_handler ); IntPrioritySet( INT_UART0, 64 ); // lowest priority for UART interrupts IntEnable( INT_UART0 ); //Enable UART0 interrupts in the NVIC UARTEnable( UART0_BASE ); //Enable UART0 to work #else //code for AVR // Set baud rate #if BAUD_RATE < 57600 uint16_t UBRR0_value = ((F_CPU / (8L * BAUD_RATE)) - 1)/2 ; UCSR0A &= ~(1 << U2X0); // baud doubler off - Only needed on Uno XX #else uint16_t UBRR0_value = ((F_CPU / (4L * BAUD_RATE)) - 1)/2; UCSR0A |= (1 << U2X0); // baud doubler on for high baud rates, i.e. 115200 #endif UBRR0H = UBRR0_value >> 8; UBRR0L = UBRR0_value; // enable rx and tx UCSR0B |= 1<<RXEN0; UCSR0B |= 1<<TXEN0; // enable interrupt on complete reception of a byte UCSR0B |= 1<<RXCIE0; // defaults to 8-bit, no parity, 1 stop bit #endif //for ARM }
int main(void) { //FRESULT rc; SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_PLL |SYSCTL_XTAL_16MHZ| SYSCTL_OSC_MAIN ); SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); GPIOPinConfigure(GPIO_PA0_U0RX); GPIOPinConfigure(GPIO_PA1_U0TX); GPIOPinConfigure(GPIO_PB0_U1RX); GPIOPinConfigure(GPIO_PB1_U1TX); GPIOPinTypeUART(GPIO_PORTB_BASE, GPIO_PIN_0 | GPIO_PIN_1); GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); UARTConfigSetExpClk(UART1_BASE, SysCtlClockGet(), 9600, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), 9600, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); //rc = f_mount(0, &Fatfs); //rc = f_open(&Fil, "HELLO.TXT", FA_WRITE | FA_CREATE_ALWAYS); UARTFIFOLevelSet(UART1_BASE,UART_FIFO_TX7_8,UART_FIFO_RX7_8); //fijo los umbrales para la ocurrencia de la interrupcion //UARTTxIntModeSet(UART1_BASE, UART_TXINT_MODE_FIFO); // Habilito la interrupcion //IntRegister(UART1_BASE, UARTinterrupcion); //UARTIntRegister(UART1_BASE, UARTinterrupcion); //registra un manejador de interrupciones para la interrupcion de la UART UARTIntClear(UART1_BASE, UART_INT_TX | UART_INT_RX); //limpia los flags de interrupcion UARTIntEnable(UART1_BASE, UART_INT_RX); UARTFIFOEnable(UART1_BASE); IntMasterEnable(); UARTEnable(UART1_BASE); //habilita transmision y recepcion IntEnable(INT_UART1); //habilita las fuentes de interrupcion de la UART while(1){;} }
void InitUart4(void) { SysCtlPeripheralEnable(SYSCTL_PERIPH_UART4); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); GPIOPinConfigure(GPIO_PA2_U4RX); GPIOPinConfigure(GPIO_PA3_U4TX); GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3); UARTFIFOLevelSet(UART4_BASE, UART_FIFO_TX1_8, UART_FIFO_RX1_8); UARTTxIntModeSet(UART4_BASE, UART_TXINT_MODE_EOT); UARTFIFOEnable(UART4_BASE); IntEnable(INT_UART4); UARTIntEnable(UART4_BASE, UART_INT_RX | UART_INT_RT | UART_INT_TX); }
void InitUart2(void) { SysCtlPeripheralEnable(SYSCTL_PERIPH_UART2); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); GPIOPinConfigure(GPIO_PA6_U2RX); GPIOPinConfigure(GPIO_PA7_U2TX); GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_6 | GPIO_PIN_7); UARTFIFOLevelSet(UART2_BASE, UART_FIFO_TX1_8, UART_FIFO_RX1_8); UARTTxIntModeSet(UART2_BASE, UART_TXINT_MODE_EOT); UARTFIFOEnable(UART2_BASE); IntEnable(INT_UART2); UARTIntEnable(UART2_BASE, UART_INT_RX | UART_INT_RT | UART_INT_TX); }
void InitUart0(void) { SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); GPIOPinConfigure(GPIO_PA0_U0RX); GPIOPinConfigure(GPIO_PA1_U0TX); GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); UARTFIFOLevelSet(UART0_BASE, UART_FIFO_TX1_8, UART_FIFO_RX1_8); UARTTxIntModeSet(UART0_BASE, UART_TXINT_MODE_EOT); UARTFIFOEnable(UART0_BASE); IntEnable(INT_UART0); UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT | UART_INT_TX); }
void UART_init(void) { SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), 9600, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); UARTFIFOEnable(UART0_BASE); UARTFIFOLevelSet(UART0_BASE, UART_FIFO_TX1_8, UART_FIFO_RX4_8); UARTIntClear(UART0_BASE, 0xFFFFFFFF); IntEnable(INT_UART0); UARTIntEnable(UART0_BASE, UART_INT_RX); uart_transmit("AmpTraXX2!\n", 11); }
/** * @brief Función para inicializar uno de los puertos UART. * * @return - * * Inicializa el puerto 0 de la UART. */ int UART_open(int nPort) { initUartPins(nPort); UARTDisable(gs_ul_uarts_bases[nPort]); UARTConfigSetExpClk(gs_ul_uarts_bases[nPort], SysCtlClockGet(), BAUD_RATE, DATA_FRAME); UARTEnable(gs_ul_uarts_bases[nPort]); gs_cu_uarts[nPort].inHead = 0; gs_cu_uarts[nPort].inTail = 0; gs_cu_uarts[nPort].inHead = 0; gs_cu_uarts[nPort].inTail = 0; gs_cu_uarts[nPort].intWhileWriting = 0; gs_cu_uarts[nPort].writingToBuf=0; UARTFIFOLevelSet(gs_ul_uarts_bases[nPort], UART_FIFO_TX1_8, UART_FIFO_RX1_8); IntEnable(gs_ul_uarts_ints[nPort]); UARTIntEnable(gs_ul_uarts_bases[nPort], UART_INT_TX | UART_INT_RX | UART_INT_RT); return 0; }
//***************************************************************************** // // Configure the UART and pb0,pb1. This is used for communicating with 7681. // //***************************************************************************** s8 ConfigureUART1(u32 BaudRate, u8 Prio) { if (BaudRate > 115200) { /* 波特率太高,错误返回 */ return(AC_RET_ERROR); } // // Enable the GPIO Peripheral used by the UART. // ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); // // Enable UART1 // ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1); // // Configure GPIO Pins for UART mode. // ROM_GPIOPinConfigure(GPIO_PB0_U1RX); ROM_GPIOPinConfigure(GPIO_PB1_U1TX); ROM_GPIOPinTypeUART(GPIO_PORTB_BASE, GPIO_PIN_0 | GPIO_PIN_1); // // Use the internal 16MHz oscillator as the UART clock source. // UARTClockSourceSet(UART1_BASE, UART_CLOCK_PIOSC); // // Initialize the UART for console I/O. // UARTConfigSetExpClk(UART1_BASE, 16000000, BaudRate, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); IntPrioritySet(INT_UART1, Prio<<5); /* 设置中断优先级 */ UARTFIFOLevelSet(UART1_BASE, UART_FIFO_TX1_8, UART_FIFO_RX4_8); IntEnable(INT_UART1); /* 使能串口0系统中断 */ UARTIntEnable(UART1_BASE, UART_INT_RX | UART_INT_RT); /* 使能串口0接收中断和接收超时*/ /* 中断 */ UARTEnable(UART1_BASE); return AC_RET_OK; }
int main(void) { char cThisChar; FRESULT rc; /* Result code */ SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ); SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); GPIOPinConfigure(GPIO_PB0_U1RX); GPIOPinConfigure(GPIO_PB1_U1TX); GPIOPinTypeUART(GPIO_PORTB_BASE, GPIO_PIN_0 | GPIO_PIN_1); UARTConfigSetExpClk(UART1_BASE, SysCtlClockGet(), 9600, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); UARTFIFOLevelSet(UART1_BASE,UART_FIFO_TX7_8,UART_FIFO_RX7_8); UARTTxIntModeSet(UART1_BASE, UART_TXINT_MODE_FIFO) ; // Habilito la interrupcion UARTIntRegister(UART1_BASE,UART1IntHandler); UARTIntClear(UART1_BASE, UART_INT_TX | UART_INT_RX); UARTEnable(UART1_BASE); IntEnable(INT_UART1); UARTIntEnable(UART1_BASE, UART_INT_RX | UART_INT_TX); rc = f_mount(0, &Fatfs); //registra un area de trabajo rc = f_open(&Fil, "Buff.TXT", FA_WRITE | FA_CREATE_ALWAYS); //abre o crea un archivo cThisChar = UARTCharGet(UART1_BASE); rc = f_write(&Fil, Buff, contador, &bw); rc = f_close(&Fil); return(0); }
/*---------------------------------------------------------------------------*/ void uart_init(void) { /* Enable clock for GPIO port A */ SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); /* Enable clock for UART0 */ SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); /* Configure the IO mux to map UART0 signals to PA0/PA1 */ GPIOPinConfigure(GPIO_PA0_U0RX); GPIOPinConfigure(GPIO_PA1_U0TX); /* Configure the pins as UART */ GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); /* * UART Interrupt Masks: * Acknowledge RX and RX Timeout * Acknowledge Framing, Overrun and Break Errors */ UARTIntEnable(UART0_BASE, (UART_INT_RX | UART_INT_RT | UART_INT_OE | UART_INT_BE | UART_INT_FE)); /* Set FIFO levels */ UARTFIFOLevelSet(UART0_BASE, UART_FIFO_TX4_8, UART_FIFO_RX1_8); /* Make sure the UART is disabled before trying to configure it */ UARTDisable(UART0_BASE); /* Baud Rate Generation */ UARTConfigSetExpClk(UART0_BASE, sys_clock, UART_CONF_BAUD_RATE, (UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE | UART_CONFIG_WLEN_8)); /* Enable UART0 Interrupts */ IntEnable(INT_UART0); /* UART Enable */ UARTEnable(UART0_BASE); }
void putchar_uart(uint32_t *frame) { count_sapi_putchar_out++; // This will block if the FIFO is full. UARTCharPut(uart_ports[frame[0]],frame[1]); // The RIS bit gets set when you have room for more while in FIFO mode. // If the TX bit was set before, there was room // If its still set now, there is still room. if ( (HWREG(uart_ports[frame[0]] + UART_O_RIS) & UART_RIS_TXRIS) != 0 ) { frame[0] = 0; return; } // From here on, we're dealing with throttling uint32_t FIFOlevTX, FIFOlevRX; // If the FIFO is full, or we have triggered highwater, we will adjust the // FIFO Trigger level and enable the IRQ UARTFIFOLevelGet(uart_ports[frame[0]],&FIFOlevTX,&FIFOlevRX); // If we were below before, and we are above now, its highwater. // Set the FIFO level down so that we'll take an interrupt // when it drains. if ( (HWREG(uart_ports[frame[0]] + UART_O_RIS) & UART_RIS_TXRIS) == 0 ) { count_sapi_putchar_highwater++; UARTFIFOLevelSet(uart_ports[frame[0]],UART_FIFO_TX2_8,FIFOlevRX); } // Enable the IRQ so that the handler can wake us. HWREG(uart_ports[frame[0]] + UART_O_IM) |= UART_IM_TXIM; // In either case, we tell the App. frame[0] = -1; return; }
void uartb_init(unsigned long speed){ SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); GPIOPinTypeUART(GPIO_PORTB_BASE, GPIO_PIN_0|GPIO_PIN_1); GPIOPinConfigure(GPIO_PB0_U1RX); GPIOPinConfigure(GPIO_PB1_U1TX); SysCtlPeripheralDisable(SYSCTL_PERIPH_UART0); SysCtlPeripheralEnable(UART_BUFFERIZED_PERIF); // Initialize the UART. Set the baud rate, number of data bits, turn off // parity, number of stop bits, and stick mode. UARTConfigSetExpClk(UART_BUFFERIZED_BASE, SysCtlClockGet(), speed, UART_BUFFERIZED_FLAGS); // Enable the UART. UARTEnable(UART_BUFFERIZED_BASE); // Use hardware FIFO to reduce the amount of interruptions UARTFIFOEnable(UART_BUFFERIZED_BASE); // Set fifo limit for interruption triggering at 7/8 th of the fifo size UARTFIFOLevelSet(UART_BUFFERIZED_BASE,UART_FIFO_TX7_8,UART_FIFO_RX7_8); // Flush characters. Spin here until bus is empty // while(UARTCharGetNonBlocking(UART_BUFFERIZED_BASE)>=0); // Register UART interrupt UARTIntRegister(UART_BUFFERIZED_BASE,uartb_intHandler); // Enable UART interruptions IntEnable(INT_UART1); UARTIntDisable(UART_BUFFERIZED_BASE,UART_INT_TX); UARTIntEnable(UART_BUFFERIZED_BASE,UART_INT_RT|UART_INT_RX); // IntMasterEnable(); }
/** * \brief This function initializes the specified UART instance for use. * This does the following: * 1> Sets the baud rate of communication. \n * 2> Configures the line characteristics. Specifically, this: * a> sets the Word Length in each character frame as 8 bits. * b> selects No parity option. * c> selects one stop bit in each frame. * * 3> Enables the FIFO mode for transmitter and receiver. * 4> Sets the Receiver FIFO Trigger Level. * * \param baudRate The baud rate to be used for communication. * \param rxTrigLevel The receiver trigger level. This can take one of the * following four values: * 1> UART_RX_TRIG_LEVEL_1 * 2> UART_RX_TRIG_LEVEL_4 * 3> UART_RX_TRIG_LEVEL_8 * 4> UART_RX_TRIG_LEVEL_14 * * * \return None. */ static void UARTStdioInitExpClk(unsigned int baudRate, unsigned int rxTrigLevel) { /* Enables the transmitter and receiver*/ UARTEnable(UART_CONSOLE_BASE); /* Configuring the UART parameters*/ /* 8-bit work length, no parity, 1 stop bit. */ /* The UART module input frequency shall be 150MHz.*/ UARTConfigSetExpClk(UART_CONSOLE_BASE, SOC_UART_2_MODULE_FREQ, baudRate, UART_WORDL_8BITS, UART_OVER_SAMP_RATE_16); /* Enables FIFO mode for transmitter and receiver.*/ UARTFIFOEnable(UART_CONSOLE_BASE); /* Sets the receiver FIFO Trigger level.*/ UARTFIFOLevelSet(UART_CONSOLE_BASE, rxTrigLevel); }
void enableUART(uint8_t UART, unsigned long baudRate) { // We must unlock PD7 to use UART2 if (UART == 2) { // GPIO Port D Lock Register is at 0x40007520 HWREG(0x40007520) = GPIO_LOCK_KEY; // GPIO Port D Control Register is at 0x40007524 HWREG(0x40007524) = 0x80; } // Enable the UART peripheral in SysCtl ROM_SysCtlPeripheralEnable(SysCtlGPIOs[UARTPins[UART][0] / 8]); ROM_SysCtlPeripheralSleepEnable(SysCtlGPIOs[UARTPins[UART][0] / 8]); ROM_SysCtlPeripheralEnable(SysCtlUARTs[UART]); ROM_SysCtlPeripheralSleepEnable(SysCtlUARTs[UART]); // Configure the associated GPIO pins for UART ROM_GPIOPinConfigure(UARTPins[UART][2]); ROM_GPIOPinConfigure(UARTPins[UART][3]); ROM_GPIOPinTypeUART(GPIO[UARTPins[UART][0] / 8], bit8[UARTPins[UART][0] % 8] | bit8[UARTPins[UART][1] % 8]); // Configure the UART ROM_UARTConfigSetExpClk(UARTBASE[UART], ROM_SysCtlClockGet(), baudRate, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); ROM_UARTFIFOEnable(UARTBASE[UART]); // Configure the UART receive (rx) interrupt ROM_UARTIntEnable(UARTBASE[UART], UART_INT_RX); UARTFIFOLevelSet(UARTBASE[UART], UART_FIFO_TX4_8, UART_FIFO_RX4_8); UARTIntRegister(UARTBASE[UART], rxInterrupts[UART]); ROM_IntPrioritySet(UART_INTs[UART], 0x00); // Enable the UART ROM_UARTEnable(UARTBASE[UART]); }
void getchar_uart(uint32_t *frame) { count_sapi_streamgetchar++; unsigned long uart = frame[0]; frame[0] = UARTCharGet(uart_ports[uart]); // If the UART isn't empty, we're done if ( (HWREG(uart_ports[uart] + UART_O_FR) & UART_FR_RXFE) == 0 ) { return; } // If we're here, the FIFO is empty now. // Figure out if we need to issue the XON. uint32_t FIFOlevTX, FIFOlevRX; UARTFIFOLevelGet(uart_ports[uart],&FIFOlevTX,&FIFOlevRX); if ( FIFOlevRX != UART_FIFO_RX1_8 ) { // Send the XON and lower the level UARTFIFOLevelSet(uart_ports[uart],FIFOlevTX,UART_FIFO_RX1_8); UARTCharPut(uart_ports[uart],XONCHAR); count_sapi_streamgetchar_xon++; } return; }
void SAPIUARTInit(int channel) { UARTFIFOEnable(uart_ports[channel]); UARTFIFOLevelSet(uart_ports[channel], UART_FIFO_TX4_8, UART_FIFO_RX1_8); UARTIntEnable(uart_ports[channel], UART_INT_RT|UART_INT_RX|UART_INT_OE); }
int InitUART(unsigned long ulBase, unsigned long ulUARTClk,unsigned long ulBaud, unsigned long ulConfig) { if(ulBase == UART0_BASE) { // // Enable the peripherals used by this example. // SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); //Enable GPIO for UART0 //PA0-> U0RX //PA1-> U0Tx GPIOPinConfigure(GPIO_PA0_U0RX); GPIOPinConfigure(GPIO_PA1_U0TX); // // Set GPIO A0 and A1 as UART pins. // GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); // // Configure COM0 Controp the UART for 19,200, 8-N-1 operation. // //UARTConfigSetExpClk(ulBase, ulUARTClk, ulBaud,ulConfig); #if defined(stabilizition) // // Configure the UART for 19,200, 8-N-1 operation. // Mux Must to get EVEN PAR bin from the Engine // UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), 19200, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_EVEN)); #else UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), 460800, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); #endif // // Enable the UART interrupt. // IntEnable(INT_UART0); UARTFIFOLevelSet(UART0_BASE,UART_FIFO_TX1_8,UART_FIFO_RX1_8); //UARTIntRegister(UART0_BASE,UART0IntHandler); UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_TX | UART_INT_RT); return 0; } else if(ulBase == UART1_BASE) { // // Enable the peripherals used by this example. // SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1); // Set B 0 and 1 to alternative use //GPIODirModeSet(GPIO_PORTB_BASE, GPIO_PIN_0, GPIO_DIR_MODE_HW); //GPIODirModeSet(GPIO_PORTB_BASE, GPIO_PIN_1, GPIO_DIR_MODE_HW);//GPIO_DIR_MODE_HW //Enable GPIO for UART1 //PB0-> U1RX //PB1-> U1Tx GPIOPinConfigure(GPIO_PB0_U1RX); GPIOPinConfigure(GPIO_PB1_U1TX); // // Set GPIO A0 and A1 as UART pins. // GPIOPinTypeUART(GPIO_PORTB_BASE, GPIO_PIN_0 | GPIO_PIN_1); // // Configure COM1 OMAP the UART for 115,200, 8-N-1 operation. // UARTConfigSetExpClk(UART1_BASE, SysCtlClockGet(), 9600, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); // // Enable the UART interrupt. // IntEnable(INT_UART1); UARTFIFOLevelSet(UART1_BASE,UART_FIFO_TX1_8,UART_FIFO_RX1_8); //UARTIntRegister(UART1_BASE,UART1IntHandler); UARTIntEnable(UART1_BASE, UART_INT_RX | UART_INT_TX | UART_INT_RT); return 0; } else return -1; }
/********************************************************************************************** * Main *********************************************************************************************/ void main(void) { //After tomorrow's test flight. FOR THE LOVE OF GOD MOVE THESE INITALIZATIONS TO FUNCTIONS /********************************************************************************************** * Local Variables *********************************************************************************************/ unsigned long ultrasonic = 0; // Enable lazy stacking for interrupt handlers. This allows floating-point // instructions to be used within interrupt handlers, but at the expense of // extra stack usage. FPULazyStackingEnable(); //Set the clock speed to 80MHz aka max speed SysCtlClockSet(SYSCTL_SYSDIV_2_5 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ); /*unsigned long test[2]; test[0] = 180; test[1] = 10; short bob[1]; bob[0] = ((char)test[0]<<8)|(char)test[1]; float jimmy = (short)(((char)test[0]<<8)|(char)test[1]); jimmy /= 26;*/ /********************************************************************************************** * Peripheral Initialization Awake *********************************************************************************************/ SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF); //Turn on GPIO communication on F pins for switches SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE); //Turn on GPIO for ADC SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); //Turn on GPIO for the PWM comms SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); //Turn on GPIO for LED test SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD); //Turn on GPIO for UART SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0); //Turn on Timer for PWM SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER1); //Turn on Timer for PWM SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER2); //Turn on Timer for PWM SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER3); //Turn on Timer for PWM SysCtlPeripheralEnable(SYSCTL_PERIPH_I2C1); //Turn on I2C communication I2C slot 0 SysCtlPeripheralEnable(SYSCTL_PERIPH_UART2); //Turn on the UART com SysCtlPeripheralEnable(SYSCTL_PERIPH_WDOG); //Turn on the watchdog timer. This is a risky idea but I think it's for the best. /********************************************************************************************** * Peripheral Initialization Sleep *********************************************************************************************/ /*SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_GPIOF); //This sets what peripherals are still enabled in sleep mode while UART would be nice, it would require the clock operate at full speed which is :P SysCtlPeripheralSleepDisable(SYSCTL_PERIPH_GPIOB); SysCtlPeripheralSleepDisable(SYSCTL_PERIPH_GPIOA); SysCtlPeripheralSleepDisable(SYSCTL_PERIPH_TIMER0); SysCtlPeripheralSleepDisable(SYSCTL_PERIPH_TIMER1); SysCtlPeripheralSleepDisable(SYSCTL_PERIPH_TIMER2); SysCtlPeripheralSleepDisable(SYSCTL_PERIPH_TIMER3); SysCtlPeripheralSleepDisable(SYSCTL_PERIPH_SSI0); SysCtlPeripheralSleepDisable(SYSCTL_PERIPH_I2C1); SysCtlPeripheralSleepDisable(SYSCTL_PERIPH_ADC); SysCtlPeripheralClockGating(true); //I'm not sure about this one maybe remove it */ /********************************************************************************************** * PWM Initialization *********************************************************************************************/ SysCtlDelay((SysCtlClockGet() / (1000 * 3))*100); //This shouldn't be needed will test to remove //PWM pin Setup //PWM 0 on GPIO PB6, PWM 1 on pin 4... etc GPIOPinConfigure(GPIO_PB6_T0CCP0); //Pitch - yaw + GPIOPinConfigure(GPIO_PB4_T1CCP0); //Pitch + yaw + GPIOPinConfigure(GPIO_PB0_T2CCP0); //Roll - yaw - GPIOPinConfigure(GPIO_PB2_T3CCP0); //Roll + yaw - GPIOPinTypeTimer(GPIO_PORTB_BASE, (GPIO_PIN_6|GPIO_PIN_4|GPIO_PIN_0|GPIO_PIN_2)); //Prescale the timers so they are slow enough to work with the ESC TimerPrescaleSet(TIMER0_BASE,TIMER_A,2); TimerPrescaleSet(TIMER1_BASE,TIMER_A,2); TimerPrescaleSet(TIMER2_BASE,TIMER_A,2); TimerPrescaleSet(TIMER3_BASE,TIMER_A,2); //Basic LED Out Test Not sure why this is here look into This just turns on an LED that I don't have plugged in. should remove later GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_3); GPIOPinWrite(GPIO_PORTA_BASE,GPIO_PIN_3,0xFF); //GPIOPinTypeGPIOOutputOD(GPIO_PORTB_BASE,GPIO_PIN_0); //Timers Setup for PWM and the load for the countdown TimerConfigure(TIMER0_BASE, TIMER_CFG_SPLIT_PAIR|TIMER_CFG_A_PWM); TimerLoadSet(TIMER0_BASE, TIMER_A, ulPeriod -1); TimerConfigure(TIMER1_BASE, TIMER_CFG_SPLIT_PAIR|TIMER_CFG_A_PWM); TimerLoadSet(TIMER1_BASE, TIMER_A, ulPeriod -1); TimerConfigure(TIMER2_BASE, TIMER_CFG_SPLIT_PAIR|TIMER_CFG_A_PWM); TimerLoadSet(TIMER2_BASE, TIMER_A, (ulPeriod -1)); TimerConfigure(TIMER3_BASE, TIMER_CFG_SPLIT_PAIR|TIMER_CFG_A_PWM); TimerLoadSet(TIMER3_BASE, TIMER_A, ulPeriod -1); //TimerPrescaleSet(TIMER2_BASE, TIMER_A, extender1); //TimerLoadSet(TIMER2_BASE, TIMER_A, period1); //Set the match which is when the thing will pull high TimerMatchSet(TIMER0_BASE, TIMER_A, 254); //Duty cycle = (1-%desired)*1000 note this means this number is percent low not percent high TimerMatchSet(TIMER1_BASE, TIMER_A, 254); TimerMatchSet(TIMER2_BASE, TIMER_A, 254); TimerMatchSet(TIMER3_BASE, TIMER_A, 254); //TimerPrescaleMatchSet(TIMER2_BASE, TIMER_A, extender2); //TimerMatchSet(TIMER2_BASE, TIMER_A, period2); //Enable the timers TimerEnable(TIMER0_BASE, TIMER_A); TimerEnable(TIMER1_BASE, TIMER_A); TimerEnable(TIMER2_BASE, TIMER_A); TimerEnable(TIMER3_BASE, TIMER_A); /********************************************************************************************** * onboard Chip interrupt Initialization *********************************************************************************************/ //These two buttons are used to reset the bluetooth module in case of disconnection GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE,GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3); //RGB LED's GPIOPinWrite(GPIO_PORTF_BASE,GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3,0x00); HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY_DD; //Sw1 (PF4) is unaviable unless you make it only a GPIOF input via these commands HWREG(GPIO_PORTF_BASE + GPIO_O_CR) = 0x1; GPIOPinTypeGPIOInput(GPIO_PORTF_BASE,GPIO_PIN_0|GPIO_PIN_4); //Onboard buttons (PF0=Sw2,PF4=Sw1 GPIOPadConfigSet(GPIO_PORTF_BASE, GPIO_PIN_0|GPIO_PIN_4, GPIO_STRENGTH_2MA,GPIO_PIN_TYPE_STD_WPU); //This will make the buttons falling edge (a press pulls them low) //void (*functionPtr)(void) = &onBoardInteruptHandle; GPIOPortIntRegister(GPIO_PORTF_BASE, onBoardInteruptHandle); //set function to handle interupt GPIOIntTypeSet(GPIO_PORTF_BASE,GPIO_PIN_0|GPIO_PIN_4,GPIO_FALLING_EDGE); //Set the interrupt as falling edge GPIOPinIntEnable(GPIO_PORTF_BASE,GPIO_PIN_0|GPIO_PIN_4); //Enable the interrupt //IntMasterEnable(); IntEnable(INT_GPIOF); /********************************************************************************************** * UART Initialization *********************************************************************************************/ //Unlock PD7 HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY_DD; HWREG(GPIO_PORTD_BASE + GPIO_O_CR) = 0x80; GPIOPinConfigure(GPIO_PD7_U2TX); //Set PD7 as TX GPIOPinTypeUART(GPIO_PORTD_BASE, GPIO_PIN_7); GPIOPinConfigure(GPIO_PD6_U2RX); //Set PD6 as RX GPIOPinTypeUART(GPIO_PORTD_BASE, GPIO_PIN_6); UARTConfigSetExpClk(UART2_BASE,SysCtlClockGet(),115200,UART_CONFIG_WLEN_8|UART_CONFIG_STOP_ONE|UART_CONFIG_PAR_NONE); //I believe the Xbee defaults to no parity I do know it's 9600 baud though, changed to 115200 for bluetooth reasons UARTFIFOLevelSet(UART2_BASE,UART_FIFO_TX1_8,UART_FIFO_RX1_8); //Set's how big the fifo needs to be in order to call the interrupt handler, 2byte UARTIntRegister(UART2_BASE,Uart2IntHandler); //Regiester the interrupt handler UARTIntClear(UART2_BASE, UART_INT_TX | UART_INT_RX); //Clear the interrupt UARTIntEnable(UART2_BASE, UART_INT_TX | UART_INT_RX); //Enable the interrupt to trigger on both TX and RX event's. Could possibly remove TX UARTEnable(UART2_BASE); //Enable UART IntEnable(INT_UART2); //Second way to enable handler not sure if needed using anyway /********************************************************************************************** * I2C Initialization *********************************************************************************************/ //Serious credit to the man who made the Arduino version of this. he gave me addresses and equations. Sadly Arduino obfuscates what really is happening //Link posted on blog page //gyro address = 0x68 not 0x69 GPIOPinConfigure(GPIO_PA7_I2C1SDA); GPIOPinTypeI2C(GPIO_PORTA_BASE, GPIO_PIN_7); //Set GPA7 as SDA GPIOPinConfigure(GPIO_PA6_I2C1SCL); GPIOPinTypeI2CSCL(GPIO_PORTA_BASE, GPIO_PIN_6); //Set GPA6 as SCL I2CMasterInitExpClk(I2C1_MASTER_BASE,SysCtlClockGet(),false); //I think it operates at 100kbps I2CMasterEnable(I2C1_MASTER_BASE); //Initalize the accelerometer Address = 0x53 GPIOPinWrite(GPIO_PORTF_BASE,GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3,0x02); UARTSend(0xAB); I2CTransmit(0x53,0x2D,0x00); I2CTransmit(0x53,0x2D,0x10); I2CTransmit(0x53,0x2D,0x08); //Initalize the gyroscope Address = 0x68 I2CTransmit(0x68,0x3E,0x00); I2CTransmit(0x68,0x15,0x07); I2CTransmit(0x68,0x16,0x1E); I2CTransmit(0x68,0x17,0x00); UARTSend(0xAC); /********************************************************************************************** * SysTick Initialization *********************************************************************************************/ SysTickIntRegister(SysTickIntHandler); SysTickIntEnable(); SysTickPeriodSet((SysCtlClockGet() / (1000 * 3))*timeBetweenCalculations); //This sets the period for the delay. the last num is the num of milliseconds SysTickEnable(); /********************************************************************************************** * Watchdog Initialization *********************************************************************************************/ WatchdogReloadSet(WATCHDOG_BASE, 0xFEEFEEFF); //Set the timer for a reset WatchdogIntRegister(WATCHDOG_BASE,WatchdogIntHandler); //Enable interrupt WatchdogIntClear(WATCHDOG_BASE); WatchdogIntEnable(WATCHDOG_BASE); WatchdogEnable(WATCHDOG_BASE); //Enable the actual timer IntEnable(INT_WATCHDOG); /********************************************************************************************** * Preflight motor inialization maybe not necessary not going to test *********************************************************************************************/ PWMSet(TIMER0_BASE,998); PWMSet(TIMER1_BASE,998); PWMSet(TIMER2_BASE,998); PWMSet(TIMER3_BASE,998); recievedCommands[0]=253; SysCtlDelay((SysCtlClockGet() / (1000 * 3))*100); //Very important to ensure motor see's a start high (998 makes 0 sense but it works so shhhh don't tell anyone) GPIOPinWrite(GPIO_PORTF_BASE,GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3,0x06); while(1){ WatchdogReloadSet(WATCHDOG_BASE, 0xFEEFEEFF); //Feed the dog a new time //UARTSend(recievedCommands[0]); //SysCtlDelay(50000); //Set 4 PWM Outputs //Get Acc data I2CRead(0x53,0x32,6,quadAcc); //Address blah blah 2 for each axis rawAccToG(quadAcc,RwAcc); /*GPIOPinWrite(GPIO_PORTF_BASE,GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3,0x04); //Blue //Get Gyro data /************************************** Gyro ITG-3200 I2C registers: temp MSB = 1B, temp LSB = 1C x axis MSB = 1D, x axis LSB = 1E y axis MSB = 1F, y axis LSB = 20 z axis MSB = 21, z axis LSB = 22 *************************************/ I2CRead(0x68,0x1B,8,quadGyro); //Address blah blah 2 for each axis + 2 for temperature. why. because why not rawGyroToDegsec(quadGyro,Gyro_ds); //GPIOPinWrite(GPIO_PORTF_BASE,GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3,0x02); //Red //Get the actual angles in XYZ. Store them in RwEst //getInclination(RwAcc, RwEst, RwGyro, Gyro_ds, Awz); //After this function is called RwEst will hold the roll pitch and yaw //RwEst will be returned in PITCH, ROLL, YAW 0, 1, 2 remember this order very important. Little obvious but yaw is worthless /*if(RwEst[1]>0.5){ GPIOPinWrite(GPIO_PORTF_BASE,GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3,0x06); //Red Blue, Correct data read in }else{ GPIOPinWrite(GPIO_PORTF_BASE,GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3,0x0A); //Red Green, The correct data is not there }*/ /*GPIOPinWrite(GPIO_PORTF_BASE,GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3,0x06); //Red Blue, Correct data read in float test=RwAcc[0]*100; //These two commands work char temp = (char)test; //UARTSend((char)(RwAcc[0])*100); //This one does not UARTSend(temp); //UARTSend((char)(RwAcc[1])*100); UARTSend(0xAA); SysCtlDelay((SysCtlClockGet() / (1000 * 3))*1); */ } }
Fd_t uart_Open(char *ifName, unsigned long flags) { /* Configure CS (PE0) and nHIB (PE4) lines */ SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE); ROM_GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_4); ROM_GPIOPinWrite(GPIO_PORTE_BASE,GPIO_PIN_4, PIN_LOW); /* configuring UART interface */ SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC); GPIOPinConfigure(GPIO_PB0_U1RX); GPIOPinConfigure(GPIO_PB1_U1TX); ROM_GPIOPinTypeUART(GPIO_PORTB_BASE, GPIO_PIN_0 | GPIO_PIN_1); GPIOPinConfigure(GPIO_PC4_U1RTS); GPIOPinConfigure(GPIO_PC5_U1CTS); ROM_GPIOPinTypeUART(GPIO_PORTC_BASE, GPIO_PIN_4 | GPIO_PIN_5); GPIOPadConfigSet(GPIO_PORTB_BASE, GPIO_PIN_0, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU); /* configure with baud rate 115200 */ ROM_UARTConfigSetExpClk(UART1_BASE, ROM_SysCtlClockGet(), 115200, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); UARTFlowControlSet(UART1_BASE, UART_FLOWCONTROL_TX | UART_FLOWCONTROL_RX); UARTFIFOLevelSet(UART1_BASE, UART_FIFO_TX1_8, UART_FIFO_RX1_8); ROM_UARTEnable(UART1_BASE); ROM_UARTFIFOEnable(UART1_BASE); ROM_IntEnable(INT_UART1); ROM_UARTIntEnable(UART1_BASE, UART_INT_RX); ROM_UARTIntDisable(UART1_BASE, UART_INT_TX | UART_INT_RT); /* configure host IRQ line */ GPIOPinTypeGPIOInput(GPIO_PORTB_BASE, GPIO_PIN_2); GPIOPadConfigSet(GPIO_PORTB_BASE, GPIO_PIN_2, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPD); GPIOIntTypeSet(GPIO_PORTB_BASE, GPIO_PIN_2, GPIO_RISING_EDGE); GPIOIntClear(GPIO_PORTB_BASE,GPIO_PIN_2); GPIOIntDisable(GPIO_PORTB_BASE,GPIO_PIN_2); ROM_IntEnable(INT_GPIOB); ROM_IntMasterEnable(); IntIsMasked = FALSE; /* Enable WLAN interrupt */ CC3100_InterruptEnable(); /* 50 ms delay */ ROM_SysCtlDelay((ROM_SysCtlClockGet()/(3*1000))*50 ); return NONOS_RET_OK; }
/************************************************************************************************* * @fn HalUARTOpenIsr() * * @brief Open a port based on the configuration * * @param port - UART port * config - contains configuration information * cBack - Call back function where events will be reported back * * @return Status of the function call *************************************************************************************************/ uint8 HalUARTOpenIsr(uint8 port, halUARTCfg_t *config) { if (uartRecord.configured) { HalUARTClose(port); } if (config->baudRate > HAL_UART_BR_115200) { return HAL_UART_BAUDRATE_ERROR; } if (((uartRecord.rx.pBuffer = osal_mem_alloc(config->rx.maxBufSize)) == NULL) || ((uartRecord.tx.pBuffer = osal_mem_alloc(config->tx.maxBufSize)) == NULL)) { if (uartRecord.rx.pBuffer != NULL) { osal_mem_free(uartRecord.rx.pBuffer); uartRecord.rx.pBuffer = NULL; } return HAL_UART_MEM_FAIL; } if(config->flowControl) { IOCPinConfigPeriphOutput(GPIO_D_BASE, GPIO_PIN_3, IOC_MUX_OUT_SEL_UART1_RTS); GPIOPinTypeUARTOutput(GPIO_D_BASE, GPIO_PIN_3); IOCPinConfigPeriphInput(GPIO_B_BASE, GPIO_PIN_0, IOC_UARTCTS_UART1); GPIOPinTypeUARTInput(GPIO_B_BASE, GPIO_PIN_0); } IntEnable(HAL_UART_INT_CTRL); uartRecord.configured = TRUE; uartRecord.baudRate = config->baudRate; uartRecord.flowControl = config->flowControl; uartRecord.flowControlThreshold = (config->flowControlThreshold > config->rx.maxBufSize) ? 0 : config->flowControlThreshold; uartRecord.idleTimeout = config->idleTimeout; uartRecord.rx.maxBufSize = config->rx.maxBufSize; uartRecord.tx.maxBufSize = config->tx.maxBufSize; uartRecord.intEnable = config->intEnable; uartRecord.callBackFunc = config->callBackFunc; UARTConfigSetExpClk(HAL_UART_PORT, SysCtrlClockGet(), UBRRTable[uartRecord.baudRate], (UART_CONFIG_WLEN_8 | UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE)); /* FIFO level set to 1/8th for both RX and TX which is 2 bytes */ UARTFIFOLevelSet(HAL_UART_PORT, UART_FIFO_TX1_8, UART_FIFO_RX1_8); UARTFIFOEnable(HAL_UART_PORT); /* Clear and enable UART TX, RX, CTS and Recieve Timeout interrupt */ UARTIntClear(HAL_UART_PORT, (UART_INT_RX | UART_INT_TX | UART_INT_CTS | UART_INT_RT )); UARTIntEnable(HAL_UART_PORT, (UART_INT_RX | UART_INT_TX | UART_INT_CTS | UART_INT_RT )); if(config->flowControl) { /* Enable hardware flow control by enabling CTS and RTS */ HWREG(HAL_UART_PORT + UART_O_CTL) |= (UART_CTL_CTSEN | UART_CTL_RTSEN ); } UARTEnable(HAL_UART_PORT); return HAL_UART_SUCCESS; }
//***************************************************************************** // //! Main function handling the UART and DMA configuration. It takes 8 //! characters from terminal without displaying them. The string of 8 //! caracters will be printed on the terminal as soon as 8th character is //! typed in. //! //! \param None //! //! \return None //! //***************************************************************************** void main() { // // Initailizing the board // BoardInit(); // // Initialize the RX done flash // bRxDone = false; // // Initialize uDMA // UDMAInit(); // // Muxing for Enabling UART_TX and UART_RX. // PinMuxConfig(); // // Register interrupt handler for UART // MAP_UARTIntRegister(UARTA0_BASE,UARTIntHandler); // // Enable DMA done interrupts for uart // MAP_UARTIntEnable(UARTA0_BASE,UART_INT_DMARX); // // Initialising the Terminal. // MAP_UARTConfigSetExpClk(CONSOLE,MAP_PRCMPeripheralClockGet(CONSOLE_PERIPH), UART_BAUD_RATE, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE)); // // Clear terminal // ClearTerm(); // // Display Banner // DisplayBanner(APP_NAME); Message("\t\t****************************************************\n\r"); Message("\t\t Type in a string of 8 characters, the characters \n\r"); Message("\t\t will not be displayed on the terminal until \n\r"); Message("\t\t 8th character is entered.\n\r") ; Message("\t\t****************************************************\n\r"); Message("\n\n\n\r"); // // Set the message // Message("Type in 8 characters:"); // // Configure the UART Tx and Rx FIFO level to 1/8 i.e 2 characters // UARTFIFOLevelSet(UARTA0_BASE,UART_FIFO_TX1_8,UART_FIFO_RX1_8); // // Setup DMA transfer for UART A0 // UDMASetupTransfer(UDMA_CH8_UARTA0_RX, UDMA_MODE_BASIC, 8, UDMA_SIZE_8, UDMA_ARB_2, (void *)(UARTA0_BASE+UART_O_DR), UDMA_SRC_INC_NONE, (void *)ucTextBuff, UDMA_DST_INC_8); // // Enable Rx DMA request from UART // MAP_UARTDMAEnable(UARTA0_BASE,UART_DMA_RX); // // Wait for RX to complete // while(!bRxDone) { } // // Setup DMA transfer for UART A0 // UDMASetupTransfer(UDMA_CH9_UARTA0_TX, UDMA_MODE_BASIC, 8, UDMA_SIZE_8, UDMA_ARB_2, (void *)ucTextBuff, UDMA_SRC_INC_8, (void *)(UARTA0_BASE+UART_O_DR), UDMA_DST_INC_NONE); // // Enable TX DMA request // MAP_UARTDMAEnable(UARTA0_BASE,UART_DMA_TX); while(1) { // // Inifite loop // } }
void InitUartInterface(uint32_t sys_clock) { uart_rx_read_index = 0; uart_rx_write_index = 0; const uint32_t dma_rx_primary = UDMA_CHANNEL_UART1RX | UDMA_PRI_SELECT; SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1); SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_UART1); //921600 //460800 uint32_t uart_config = UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE; UARTConfigSetExpClk(UART1_BASE, sys_clock, 921600, uart_config); GPIOPinConfigure(GPIO_PB0_U1RX); GPIOPinConfigure(GPIO_PB1_U1TX); GPIOPinTypeUART(GPIO_PORTB_BASE, GPIO_PIN_0 | GPIO_PIN_1); UARTFIFOLevelSet(UART1_BASE, UART_FIFO_TX4_8, UART_FIFO_RX4_8); UARTEnable(UART1_BASE); //UARTDMAEnable(UART1_BASE, UART_DMA_RX | UART_DMA_TX); UARTDMAEnable(UART1_BASE, UART_DMA_RX); // Put the attributes in a known state for the uDMA UART1RX channel. These // should already be disabled by default. uint32_t dma_config = UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST | UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK; uDMAChannelAttributeDisable(UDMA_CHANNEL_UART1RX, dma_config); uint32_t dma_control = UDMA_SIZE_8 | UDMA_SRC_INC_NONE | UDMA_DST_INC_8 | UDMA_ARB_4; uDMAChannelControlSet(dma_rx_primary, dma_control); uDMAChannelTransferSet(dma_rx_primary, UDMA_MODE_BASIC, (void *)(UART1_BASE + UART_O_DR), &uart_rx_buf[uart_rx_write_index], UART_RX_BLOCK_SIZE); // Put the attributes in a known state for the uDMA UART1TX channel. These // should already be disabled by default. // uDMAChannelAttributeDisable(UDMA_CHANNEL_UART1TX, // UDMA_ATTR_ALTSELECT | // UDMA_ATTR_HIGH_PRIORITY | // UDMA_ATTR_REQMASK); // Set the USEBURST attribute for the uDMA UART TX channel. This will // force the controller to always use a burst when transferring data from // the TX buffer to the UART. This is somewhat more effecient bus usage // than the default which allows single or burst transfers. //uDMAChannelAttributeEnable(UDMA_CHANNEL_UART1TX, UDMA_ATTR_USEBURST); // Configure the control parameters for the UART TX. The uDMA UART TX // channel is used to transfer a block of data from a buffer to the UART. // The data size is 8 bits. The source address increment is 8-bit bytes // since the data is coming from a buffer. The destination increment is // none since the data is to be written to the UART data register. The // arbitration size is set to 4, which matches the UART TX FIFO trigger // threshold. // uDMAChannelControlSet(UDMA_CHANNEL_UART1TX | UDMA_PRI_SELECT, // UDMA_SIZE_8 | UDMA_SRC_INC_8 | // UDMA_DST_INC_NONE | // UDMA_ARB_4); // Set up the transfer parameters for the uDMA UART TX channel. This will // configure the transfer source and destination and the transfer size. // Basic mode is used because the peripheral is making the uDMA transfer // request. The source is the TX buffer and the destination is the UART // data register. // uDMAChannelTransferSet(UDMA_CHANNEL_UART1TX | UDMA_PRI_SELECT, // UDMA_MODE_BASIC, g_ui8TxBuf, // (void *)(UART1_BASE + UART_O_DR), // sizeof(g_ui8TxBuf)); // Now both the uDMA UART TX and RX channels are primed to start a // transfer. As soon as the channels are enabled, the peripheral will // issue a transfer request and the data transfers will begin. uDMAChannelEnable(UDMA_CHANNEL_UART1RX); //uDMAChannelEnable(UDMA_CHANNEL_UART1TX); // Enable the UART DMA TX/RX interrupts. //UARTIntEnable(UART1_BASE, UART_INT_DMATX | UART_INT_DMATX); UARTIntEnable(UART1_BASE, UART_INT_DMARX); IntEnable(INT_UART1); MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0); MAP_TimerConfigure(TIMER0_BASE, TIMER_CFG_PERIODIC); MAP_TimerLoadSet(TIMER0_BASE, TIMER_A, sys_clock / 2000); MAP_IntEnable(INT_TIMER0A); MAP_TimerIntEnable(TIMER0_BASE, TIMER_TIMA_TIMEOUT); MAP_TimerEnable(TIMER0_BASE, TIMER_A); MAP_IntPrioritySet(INT_TIMER0A, 0xC0); }