/**********************************************************************//** * @brief Executes the record. * * - Unlocks the Flash and initialize to long-word write mode * - Initializes the Timer to trigger ADC12 samples * - When the operation is done, locks the flash, disables the DMA, and stops * the timer * * @param none * * @return none *************************************************************************/ static void record(void) { halLcdPrintLine(" Recording ", 6, INVERT_TEXT | OVERWRITE_TEXT); halLcdPrintLineCol("Stop", 8, 12, OVERWRITE_TEXT); FCTL3 = FWKEY; // Unlock the flash for write FCTL1 = FWKEY + BLKWRT; DMA0CTL = DMADSTINCR_3 + DMAEN + DMADSTBYTE + DMASRCBYTE + DMAIE; // Enable Long-Word write, all 32 bits will be written once // 4 bytes are loaded TBCCTL1 &= ~CCIFG; TBCTL |= MC0; __bis_SR_register(LPM0_bits + GIE); // Enable interrupts, enter LPM0 __no_operation(); TBCTL &= ~MC0; DMA0CTL &= ~( DMAEN + DMAIE); FCTL3 = FWKEY + LOCK; // Lock the flash from write }
VOID Init_StartUp(VOID) { unsigned short bGIE; bGIE = (__get_SR_register() &GIE); //save interrupt status __disable_interrupt(); // Disable global interrupts # ifdef __MSP430F6638 // only for F663x devices! while (BAKCTL & LOCKBAK) // check if bit for backup subsystem is cleared { BAKCTL &= ~LOCKBAK; // clear lock backup bit for backup subsystem } # endif Init_Ports(); // Init ports (do first ports because clocks do change ports) SetVCore(3); // USB core requires the VCore set to 1.8 volt, independ of CPU clock frequency Init_Clock(); # if 0 // Use for FET boards // Configure P1.6 as a button input P1DIR &= ~BIT6; // Input P1OUT |= BIT6; P1REN |= BIT6; // Together with P1OUT, creates a pullup P1IFG &= ~BIT6; // Clear the flag P1IE |= BIT6; // Enable interrupts # else // Use for F5529 EXP board P1DIR &= ~BIT7; // Input P1OUT |= BIT7; P1REN |= BIT7; // Together with P1OUT, creates a pullup P1IFG &= ~BIT7; // Clear the flag P1IE |= BIT7; // Enable interrupts # endif __bis_SR_register(bGIE); //restore interrupt status }
//---------------------------------------------------------------------------- BYTE USB_init(VOID) { WORD bGIE = __get_SR_register() &GIE; //save interrupt status // atomic operation - disable interrupts __disable_interrupt(); // Disable global interrupts // configuration of USB module USBKEYPID = 0x9628; // set KEY and PID to 0x9628 -> access to configuration registers enabled USBPHYCTL = PUSEL; // use DP and DM as USB terminals (not needed because an external PHY is connected to port 9) USBPWRCTL = VUSBEN + SLDOAON; // enable primary and secondary LDO (3.3 and 1.8 V) { volatile unsigned int i; for (i =0; i < USB_MCLK_FREQ/1000*2/10; i++); // wait some time for LDOs (1ms delay) } USBPWRCTL = VUSBEN + SLDOAON + VBONIE; // enable interrupt VBUSon USBKEYPID = 0x9600; // access to configuration registers disabled //reset events mask wUsbEventMask = 0; //init Serial Number #if (USB_STR_INDEX_SERNUM != 0) USB_InitSerialStringDescriptor(); #endif // init memcpy() function: DMA or non-DMA USB_initMemcpy(); #ifdef _MSC_ MscResetCtrlLun(); #endif __bis_SR_register(bGIE); //restore interrupt status return kUSB_succeed; }
int main(void) { WDTCTL = WDTPW | WDTHOLD; // Stop WDT // GPIO Setup P1OUT = 0; P1DIR = BIT0; // For LED // Set up XT1 PJSEL0 = BIT4 | BIT5; // For XT1 // Clock System Setup CSCTL0_H = CSKEY >> 8; // Unlock CS registers CSCTL1 = DCOFSEL_0; // Set DCO to 1MHz CSCTL2 = SELA__LFXTCLK | SELS__DCOCLK | SELM__DCOCLK; CSCTL3 = DIVA__1 | DIVS__1 | DIVM__1; // Set all dividers CSCTL4 &= ~LFXTOFF; do { CSCTL5 &= ~LFXTOFFG; // Clear XT1 fault flag SFRIFG1 &= ~OFIFG; } while (SFRIFG1 & OFIFG); // Test oscillator fault flag RTCCTL01 = RTCRDYIE | RTCTEV_0; // Real-time clock ready interrupt enable // to trigger interrupt every second // Every minute event // Disable the GPIO power-on default high-impedance mode to activate // previously configured port settings PM5CTL0 &= ~LOCKLPM5; SFRIE1 = OFIE; // Enable osc fault interrupt __bis_SR_register(LPM3_bits + GIE); // Enter LPM3, enable interrupts __no_operation(); // For debugger }
int main() { // Stop watchdog timer WDTCTL = WDTPW | WDTHOLD; // save reset information SysRstIv = SYSRSTIV; //auxiliaryClock.selectSource( Clock::config::clockSource::XT2CLK ); //auxiliaryClock.setDivider( Clock::config::clockDivider::div_16 ); auxiliaryClock.selectSource( Clock::config::clockSource::DCOCLKDIV ); auxiliaryClock.setDivider( Clock::config::clockDivider::div_4 ); led.setMode( Gpio::config::mode::gpio ); led.setIOMode( Gpio::config::ioMode::output ); led2.setMode( Gpio::config::mode::gpio ); led2.setIOMode( Gpio::config::ioMode::output ); timerA0.config( GpTimer::config::mode::countUp, GpTimer::config::divider::div_1, GpTimer::config::extDivider::div_5, GpTimer::config::timerInterrupt::enabled, GpTimer::config::clockSource::ACLK ); timerA0.configChannel( 50000, GpTimer::channel::SUBTIMER0 ); __bis_SR_register( GIE ); // Enable interrupts globally while( 1 ) { common::sw_delay(); led.toggle(); } }
void main (void) { WDTCTL = WDTPW + WDTHOLD; // Stop WDT // 5ms delay to compensate for time to startup between MSP430 and CC1100/2500 __delay_cycles(5000); TI_CC_SPISetup(); // Initialize SPI port DCOCTL = 0; // Select lowest DCOx and MODx settings BCSCTL1 = CALBC1_1MHZ; // Set DCO DCOCTL = CALDCO_1MHZ; P2SEL = 0; // Sets P2.6 & P2.7 as GPIO TI_CC_PowerupResetCCxxxx(); // Reset CCxxxx writeRFSettings(); // Write RF settings to config reg TI_CC_SPIWriteBurstReg(TI_CCxxx0_PATABLE, paTable, paTableLen);//Write PATABLE // Configure ports -- switch inputs, LEDs, GDO0 to RX packet info from CCxxxx COM_Init(); TI_CC_SW_PxREN = TI_CC_SW1; // Enable Pull up resistor TI_CC_SW_PxOUT = TI_CC_SW1; // Enable pull up resistor TI_CC_SW_PxIES = TI_CC_SW1; // Int on falling edge TI_CC_SW_PxIFG &= ~(TI_CC_SW1); // Clr flags TI_CC_SW_PxIE = TI_CC_SW1; // Activate interrupt enables TI_CC_LED_PxOUT &= ~(TI_CC_LED1 + TI_CC_LED2); // Outputs = 0 TI_CC_LED_PxDIR |= TI_CC_LED1 + TI_CC_LED2;// LED Direction to Outputs TI_CC_GDO0_PxIES |= TI_CC_GDO0_PIN; // Int on falling edge (end of pkt) TI_CC_GDO0_PxIFG &= ~TI_CC_GDO0_PIN; // Clear flag TI_CC_GDO0_PxIE |= TI_CC_GDO0_PIN; // Enable int on end of packet TI_CC_SPIStrobe(TI_CCxxx0_SRX); // Initialize CCxxxx in RX mode. // When a pkt is received, it will // signal on GDO0 and wake CPU __bis_SR_register(LPM0_bits + GIE); // Enter LPM3, enable interrupts }
/* ----------------CapTouchIdleMode----------------------------------------- * Device stays in LPM3 'sleep' mode, only Proximity Sensor is used to detect * any movement triggering device wake up * ------------------------------------------------------------------------*/ void CapTouchIdleMode(void) { /* Send status via UART: 'sleep' = [0xDE, 0xAD] */ SendByte(SLEEP_MODE_UART_CODE); SendByte(SLEEP_MODE_UART_CODE2); /* Set DCO to 1MHz */ /* Set SMCLK to 8MHz / 8 = 1MHz */ // BCSCTL1 = CALBC1_8MHZ; // DCOCTL = CALDCO_8MHZ; // BCSCTL2 |= DIVS_3; /* Set SMCLK to 1MHz / 4 = 250kHz */ BCSCTL1 = CALBC1_1MHZ; DCOCTL = CALDCO_1MHZ; BCSCTL2 |= DIVS_2; P1OUT |= BIT0; // Turn on center LED deltaCnts[0] = 0; /* Sleeping in LPM3 with ACLK/100 = 12Khz/100 = 120Hz wake up interval */ /* Measure proximity sensor count upon wake up */ /* Wake up if proximity deltaCnts > THRESHOLD */ do { TACCR0 = 100; TACTL = TASSEL_1 + MC_1; TACCTL0 |= CCIE; __bis_SR_register(LPM3_bits+GIE); TACCTL0 &= ~CCIE; TI_CAPT_Custom(&proximity_sensor,deltaCnts); } while (deltaCnts[0] <= PROXIMITY_THRESHOLD); P1OUT &= ~BIT0; // Turn off center LED }
void main(void) { WDTCTL = WDTPW + WDTHOLD; // Stop WDT BCSCTL1 |= XTS; // ACLK = LFXT1 = HF XTAL BCSCTL3 |= LFXT1S1; // 3 – 16MHz crystal or resonator do { IFG1 &= ~OFIFG; // Clear OSCFault flag for (i = 0xFF; i > 0; i--); // Time for flag to set } while (IFG1 & OFIFG); // OSCFault flag still set? BCSCTL2 |= SELM_3 + SELS; // MCLK = SMCLK = LFXT1 (safe) P3SEL = 0x30; // P3.4,5 = USCI_A0 TXD/RXD UCA0CTL1 |= UCSSEL_2; // SMCLK UCA0BR0 = 160; // 8MHz/19200 = ~416.6 UCA0BR1 = 1; // UCA0MCTL = UCBRS2 + UCBRS1; // Modulation UCBRSx = 6 UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** IE2 |= UCA0RXIE; // Enable USCI_A0 RX interrupt __bis_SR_register(LPM0_bits + GIE); // Enter LPM0, interrupts enabled }
int main(void) { // Initialisation WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer // GPIO pin setup P1DIR = STROBE + OE; // Set up output pins P1OUT &= ~0xFF; // Turn off all outputs P1REN |= SW1; P1OUT|=SW1; // Set pull-up resistor for switch pin // Port1 interrupt setup P1IE |= A|B|SW1; // Enable interrupt for pins connected to A and B P1IES |= A|B|SW1; // Configure interrupt to fire on transition from high to low P1IFG &= ~(A|B|SW1); // Clear interrupt flags for pins connected to A and B // Timer interrupt setup TACTL=TASSEL_2+MC_1; // Up timer CCTL0=CCIE; // Enable timer interrupt TACCR0=800; // Interrupt every 800 clicks // SPI peripheral configuration P1SEL = DATA + CLK; // Set pin function selectors for SPI mode P1SEL2 = DATA + CLK; // Set pin function selectors for SPI mode UCA0CTL1 = UCSWRST; // **Put USCI(SPI) state machine in reset** UCA0CTL0 |= UCMST|UCMSB|UCSYNC|UCCKPH; // Synchronous, MSB first, Master mode, Load data on pin going high UCA0CTL1 |= UCSSEL_2; // Clock source is main clock UCA0BR0 |= 0x02; // Clock=Clock_source/2 UCA0BR1 = 0; // Second clock divider register setup UCA0MCTL = 0; // No modulation UCA0CTL1 &= ~UCSWRST; // **Initialize USCI(SPI) state machine** IE2 |= UCA0TXIE; // Enable SPI interrupt on transmit // CPU setup __bis_SR_register(GIE); // Enable CPU interrupt handling BCSCTL1 = CALBC1_16MHZ; // Set DCO to 16MHz factory calibration value DCOCTL = CALDCO_16MHZ; // Main loop while(1){ } return 0; }
//***************************************************************************** // //! \brief Initiates a single byte Reception at the Master End with timeout //! //! This function sends a START and STOP immediately to indicate Single byte //! reception //! //! \param baseAddress is the base address of the I2C Master module. //! \param timeout is the amount of time to wait until giving up //! //! Modified bits are \b GIE of \b SR register; bits \b UCTXSTT and \b UCTXSTP //! of \b UCBxCTL1 register. //! //! \return STATUS_SUCCESS or STATUS_FAILURE of the transmission process. // //***************************************************************************** bool USCI_I2C_masterSingleReceiveStartWithTimeout(uint32_t baseAddress, uint32_t timeout ) { //local variable to store GIE status uint16_t gieStatus; assert(timeout > 0); //Store current SR register gieStatus = __get_SR_register() & GIE; //Disable global interrupt __disable_interrupt(); //Set USCI in Receive mode HWREG8(baseAddress + OFS_UCBxCTL1) &= ~UCTR; //Send start condition. HWREG8(baseAddress + OFS_UCBxCTL1) |= UCTXSTT; //Poll for Start bit to complete while ((!(HWREG8(baseAddress + OFS_UCBxIFG) & UCTXSTT)) && --timeout) ; //Check if transfer timed out if (timeout == 0) return STATUS_FAIL; //Send stop condition. HWREG8(baseAddress + OFS_UCBxCTL1) |= UCTXSTP; //Reinstate SR register __bis_SR_register(gieStatus); return STATUS_SUCCESS; }
int main(void) { WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer BCSCTL1 = CALBC1_8MHZ; // Set DCO to 8Mhz DCOCTL = CALDCO_8MHZ; // Set DCO to 8Mhz P1DIR = BIT0; // P1.0 and P1.6 are the red+green LEDs P1OUT = BIT0; btn_init(); uart_init(); uart_send('>'); // uart_set_tx_isr_ptr(uart_tx_isr); __bis_SR_register(GIE); while(1){ uart_send(btn_sequence()); P1OUT ^= BIT0; } return 0; }
__interrupt void TIMER1_A1_ISR(void){ switch(__even_in_range(TA1IV,14)){ case 0: break; // No interrupt case 2: // CCR1 not used // Put code here for CCR1 timeA1_CCR1++; sleeping__++; unsigned int ST; ST = sleep_time; if(sleeping__==ST) { PJOUT &=~ IOT_WAKEUP; P3OUT &=~ LCD_BACKLITE; //LPM4; __bis_SR_register(LPM4_bits + GIE); //PJOUT &=~ IOT_WAKEUP; } TA1CCR1 += TA1CCR1_INTERVAL; // Add Offset to TACCR1 break; case 4: // CCR2 not used // Put code here for CCR2 // TA2CCR2 += TA2CCR2_INTERVAL; // Add Offset to TACCR2 break; case 6: break; // reserved case 8: break; // reserved case 10: break; // reserved case 12: break; // reserved case 14: // overflow // Put code here for overflow break; default: break; } }
void setupClock(void){ // PMAPPWD = 0x02D52; // Get write-access to port mapping regs // P1MAP1 = PM_SMCLK; // PMAPPWD = 0; // Lock port mapping registers // // P1DIR |= BIT1; // P1SEL |= BIT1; // UCSCTL3 |= SELREF_2; // Set DCO FLL reference = REFO UCSCTL4 |= SELA_2; // Set ACLK = REFO __bis_SR_register(SCG0); // Disable the FLL control loop UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx UCSCTL1 = DCORSEL_5; // Select DCO range 16MHz operation UCSCTL2 = FLLD_1 + 249; // Set DCO Multiplier for 8MHz // (N + 1) * FLLRef = Fdco // (249 + 1) * 32768 = 8MHz // Set FLL Div = fDCOCLK/2 __bic_SR_register(SCG0); // Enable the FLL control loop // Worst-case settling time for the DCO when the DCO range bits have been // changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx // UG for optimization. // 32 x 32 x 8 MHz / 32,768 Hz = 250000 = MCLK cycles for DCO to settle __delay_cycles(125000); __delay_cycles(125000); // Loop until XT1,XT2 & DCO fault flag is cleared do { UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG); // Clear XT2,XT1,DCO fault flags SFRIFG1 &= ~OFIFG; // Clear fault flags }while (SFRIFG1&OFIFG); // Test oscillator fault flag }
void main(void) { WDTCTL = WDT_ADLY_250; // WDT 250ms, ACLK, interval timer SFRIE1 |= WDTIE; // Enable WDT interrupt P1DIR |= 0x01; // Set P1.0 to output direction PJSEL |= BIT4+BIT5; // Port select XT1 UCSCTL6 &= ~(XT1OFF); // XT1 On UCSCTL6 |= XCAP_3; // Internal load cap UCSCTL3 = 0; // FLL Reference Clock = XT1 // Loop until XT1 & DCO stabilizes - In this case loop until XT1 and DCo settle do { UCSCTL7 &= ~(XT1LFOFFG + XT1HFOFFG + DCOFFG); // Clear XT1,DCO fault flags SFRIFG1 &= ~OFIFG; // Clear fault flags }while (SFRIFG1&OFIFG); // Test oscillator fault flag UCSCTL6 &= ~(XT1DRIVE_3); // Xtal is now stable, reduce drive strength UCSCTL4 |= SELA_0; // ACLK = LFTX1 (by default) __bis_SR_register(LPM3_bits + GIE); // Enter LPM3, enable interrupts __no_operation(); // For debugger }
void main(void) { WDTCTL = WDTPW + WDTHOLD; // Stop WDT BCSCTL1 = CALBC1_1MHZ; // Set DCO DCOCTL = CALDCO_1MHZ; P1DIR = 0xFF; // All P1.x outputs P1OUT = 0; // All P1.x reset P2SEL = 0x02; // P2.1 = SMCLK, others GPIO P2DIR = 0xFF; // All P2.x outputs P2OUT = 0; // All P2.x reset P3SEL = 0x30; // P3.4,5 = USCI_A0 TXD/RXD P3DIR = 0xFF; // All P3.x outputs P3OUT = 0; // All P3.x reset P4DIR = 0xFF; // All P4.x outputs P4OUT = 0; // All P4.x reset UCA0CTL1 |= UCSSEL_2; // SMCLK UCA0BR0 = 8; // 1MHz 115200 UCA0BR1 = 0; // 1MHz 115200 UCA0MCTL = UCBRS2 + UCBRS0; // Modulation UCBRSx = 5 UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** IE2 |= UCA0RXIE; // Enable USCI_A0 RX interrupt __bis_SR_register(LPM4_bits + GIE); // Enter LPM4, interrupts enabled }
int main(void) { //WDT config WDTCTL = WDT_ADLY_1000; // WDT 1000ms, ACLK, interval timer IE1 |= WDTIE; // Enable WDT interrupt BCSCTL1 = CALBC1_1MHZ; // Set DCO to 1MHz DCOCTL = CALDCO_1MHZ; USCI_init(); ADC_init(); int_flag = 0; __enable_interrupt(); while(1) { if(int_flag != 0) { //wdt trigger int_flag = 0; //clear flag ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start __bis_SR_register(CPUOFF + GIE); // LPM0 with interrupts enabled // oF = ((A10/1024)*1500mV)-923mV)*1/1.97mV = A10*761/1024 - 468 temp = ADC10MEM; IntDegF = ((temp - 630) * 761) / 1024; // oC = ((A10/1024)*1500mV)-986mV)*1/3.55mV = A10*423/1024 - 278 temp = ADC10MEM; IntDegC = ((temp - 673) * 423) / 1024; //print result over uart TX("$A10 Deg F:"); itoa(IntDegF, buffer, 10); TX(buffer); TX("!\r\n"); TX("$A10 Deg C:"); itoa(IntDegC, buffer, 10); TX(buffer); TX("!\r\n"); } } return 0; }
int main(void) { WDTCTL = WDT_ADLY_1000; // WDT 1s*4 interval timer BCSCTL1 |= DIVA_1; // ACLK/2 BCSCTL3 |= LFXT1S_2; // ACLK = VLO IE1 |= WDTIE; // Enable WDT interrupt P1DIR = 0xFF; // All P1.x outputs P1OUT = 0; // All P1.x reset P2SEL = 0; // All P2.x GPIO function P2DIR = 0xFF; // All P2.x outputs P2OUT = 0; // All P2.x reset P3DIR = 0xFF; // All P3.x outputs P3OUT = 0; // All P3.x reset P4DIR = 0xFF; // All P4.x outputs P4OUT = 0; // All P4.x reset while(1) { __bis_SR_register(LPM3_bits + GIE); // Enter LPM3, enable interrupts P1OUT |= 0x01; // Set P1.0 LED on for (i = 5000; i > 0; i--); // Delay P1OUT &= ~0x01; // Clear P1.0 LED off } }
void main(void) { WDTCTL = WDTPW + WDTHOLD; // Stop WDT // Configure ports P1SEL |= BIT6+BIT7; // P1.6,7 - option select P1DIR |= BIT6+BIT7; // P1.6,7 - outputs P2SEL |= BIT0; // P2.0 option select P2DIR |= BIT0; // P2.0 outputs P1DIR |= 0x01; // P1.0 - Outputs // XT1 configure PJSEL |= BIT4+BIT5; // Port select XT1 UCSCTL6 &= ~(XT1OFF); // XT1 On UCSCTL6 |= XCAP_3; // Internal load cap UCSCTL3 = 0; // FLL Reference Clock = XT1 // Loop until XT1 & DCO stabilizes - In this case loop until XT1 and DCo settle do { UCSCTL7 &= ~(XT1LFOFFG + XT1HFOFFG + DCOFFG); // Clear XT1,DCO fault flags SFRIFG1 &= ~OFIFG; // Clear fault flags }while (SFRIFG1&OFIFG); // Test oscillator fault flag UCSCTL6 &= ~(XT1DRIVE_3); // Xtal is now stable, reduce drive strength UCSCTL4 |= SELA_0; // ACLK = LFTX1 (by default) // Configure TD0 TD0CCTL0 = OUTMOD_4 + CCIE; // CCR0 toggle, interrupt enabled TD0CCTL1 = OUTMOD_4 + CCIE; // CCR1 toggle, interrupt enabled TD0CCTL2 = OUTMOD_4 + CCIE; // CCR2 toggle, interrupt enabled TD0CTL0 = TDSSEL_1 + MC_2 + TDCLR + TDIE; // ACLK, contmode, clear TDR, // interrupt enabled __bis_SR_register(LPM3_bits + GIE); // Enter LPM3, interrupts enabled __no_operation(); // For debugger }
static void Bsp_SetClocks(void) { /* Configure CPU clock for 12MHz */ /* If clock settings are changed, remember to update BSP_TIMER_CLK_MHZ. * Otherwise, all timer settings would be incorrect. */ UCSCTL3 |= SELREF_2; /* Set DCO FLL reference = REFO */ UCSCTL4 |= SELA_2; /* Set ACLK = REFO */ __bis_SR_register(SCG0); /* Disable the FLL control loop */ UCSCTL0 = 0x0000; /* Set lowest possible DCOx, MODx */ UCSCTL1 = DCORSEL_5; /* Select DCO range 24MHz operation */ UCSCTL2 = FLLD_1 + 374; /* Set DCO Multiplier for 12MHz * (N + 1) * FLLRef = Fdco * (374 + 1) * 32768 = 12MHz * Set FLL Div = fDCOCLK/2 */ __bic_SR_register(SCG0); /* Enable the FLL control loop */ /* Worst-case settling time for the DCO when the DCO range bits have been * changed is n x 32 x 32 x f_MCLK / f_FLL_reference. * 32 x 32 x 12 MHz / 32,768 Hz = 375000 = MCLK cycles for DCO to settle */ __delay_cycles(375000); /* Loop until XT1,XT2 & DCO fault flag is cleared */ do { UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG); /* Clear XT2,XT1,DCO fault flags */ SFRIFG1 &= ~OFIFG; /* Clear fault flags */ } while (SFRIFG1 & OFIFG); /* Test oscillator fault flag */ /* Select REFO as ACLK source and DCOCLK as MCLK and SMCLK source */ UCSCTL4 = SELA__REFOCLK | SELS__DCOCLKDIV | SELM__DCOCLKDIV; }
void main(void) { WDTCTL = WDTPW + WDTHOLD; // Stop WDT P1DIR |= BIT6; // P1.6 output direction P1SEL |= BIT6; // Select CBOUT function on P1.6 // Setup ComparatorB CBCTL0 |= CBIPEN + CBIPSEL_0; // Enable V+, input channel CB0 CBCTL1 |= CBPWRMD_0; // CBMRVS=0 => select VREF1 as ref when CBOUT // is high and VREF0 when CBOUT is low // High-Speed Power mode CBCTL2 |= CBRSEL; // VRef is applied to -terminal CBCTL2 |= CBRS_1+CBREF13; // VREF1 is Vcc*1/4 CBCTL2 |= CBREF04+CBREF03; // VREF0 is Vcc*3/4 CBCTL3 |= BIT0; // Input Buffer Disable @P6.0/CB0 CBCTL1 |= CBON; // Turn On ComparatorB __delay_cycles(75); // delay for the reference to settle __bis_SR_register(LPM4_bits); // Enter LPM4 __no_operation(); // For debug }
void main(void) { WDTCTL = WDTPW + WDTHOLD; // Stop WDT P3SEL |= 0x06; // Assign I2C pins to USCI_B0 UCB0CTL1 |= UCSWRST; // Enable SW reset UCB0CTL0 = UCMST + UCMODE_3 + UCSYNC; // I2C Master, synchronous mode UCB0CTL1 = UCSSEL_2 + UCSWRST; // Use SMCLK, keep SW reset UCB0BR0 = 12; // fSCL = SMCLK/12 = ~100kHz UCB0BR1 = 0; UCB0I2CSA = 0x48; // Slave Address is 048h UCB0CTL1 &= ~UCSWRST; // Clear SW reset, resume operation IE2 |= UCB0TXIE; // Enable TX interrupt while (1) { PTxData = (unsigned char *)TxData; // TX array start address TXByteCtr = sizeof TxData; // Load TX byte counter while (UCB0CTL1 & UCTXSTP); // Ensure stop condition got sent UCB0CTL1 |= UCTR + UCTXSTT; // I2C TX, start condition __bis_SR_register(CPUOFF + GIE); // Enter LPM0 w/ interrupts // Remain in LPM0 until all data // is TX'd } }
int main(void) { WDTCTL = WDTPW + WDTHOLD; // Stop WDT // Setup oscillator for 16MHz operation BCSCTL1 = CALBC1_16MHZ; DCOCTL = CALDCO_16MHZ; // Wait for changes to take effect __delay_cycles(4000); // Initialize cc2500 and register callback function to process incoming data setup_cc2500(rx_callback); LED_PxOUT &= ~(LED1 + LED2); //Outputs LED_PxDIR = LED1 + LED2; //Outputs // Configure ports -- switch inputs, LEDs, GDO0 to RX packet info from CCxxxx P2OUT |= (BIT0 | BIT1 | BIT2); P2DIR |= BIT0 | BIT1 | BIT2; __bis_SR_register(LPM1_bits + GIE); // Enter LPM3, enable interrupts }
void TransmitPacket(void) { P3OUT |= BIT6; // Pulse LED during Transmit txBytesLeft = PACKET_LEN; txPosition = 0; packetTransmit = 0; transmitting = 1; Strobe( RF_STX ); // Strobe STX TA0CCR1 = TX_TIMER_PERIOD; // x cycles * 1/32768 = y us TA0CCTL1 |= CCIE; TA0CTL |= MC_2 + TACLR; // Start the timer- continuous mode __bis_SR_register(LPM3_bits + GIE); __no_operation(); TA0CCR1 = TX_TIMER_PERIOD; // x cycles * 1/32768 = y us TA0CCTL1 &= ~(CCIE); TA0CTL &= ~(MC_3); // Turn off timer P3OUT &= ~BIT6; // Turn off LED after Transmit }
void setupRTC_calender(Sleep_time_t Sleep_time) { RTCNT4=0x00; RTCNT3=0x00; RTCNT2=0x00; RTCNT1=0x00; RTCCTL01 |= RTCMODE; RTCCTL01 |= RTCAIE; //RTCCTL01 |= RTCTEV0; RTCHOUR = 0; RTCMIN = 0; RTCADAY = 0; RTCADOW = 0; RTCAHOUR = 0x80+Sleep_time.hrs; RTCAMIN = 0x80+Sleep_time.mins; RTCPS0CTL = RT1SSEL_0 + RT1PSDIV_7; //source RT0PS from ACLK RTCPS1CTL = RT1SSEL_2 + RT1IP_6;// + RT1PSIE; // Source RT1PS from RT0PS generates an interrupt every 1 sec. // do'nt care in calender mode RT1PSDIV_7 RTCPS1CTL __bis_SR_register(GIE); RTCCTL01 &= ~RTCHOLD; }
void main(void) { WDTCTL = WDTPW+WDTHOLD; // Stop watchdog timer while(!(P2IN&BIT4)); // If clock sig from mstr stays low, // it is not yet in SPI mode PMAPPWD = 0x02D52; // Get write-access to port mapping regs P2MAP0 = PM_UCA0SIMO; // Map UCA0SIMO output to P2.0 P2MAP2 = PM_UCA0SOMI; // Map UCA0SOMI output to P2.2 P2MAP4 = PM_UCA0CLK; // Map UCA0CLK output to P2.4 PMAPPWD = 0; // Lock port mapping registers P2DIR |= BIT0 + BIT2 + BIT4; // ACLK, MCLK, SMCLK set out to pins P2SEL |= BIT0 + BIT2 + BIT4; // P2.0,2,4 for debugging purposes UCA0CTL1 |= UCSWRST; // **Put state machine in reset** UCA0CTL0 |= UCSYNC+UCCKPL+UCMSB; // 3-pin, 8-bit SPI slave, // Clock polarity high, MSB UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt __bis_SR_register(LPM4_bits + GIE); // Enter LPM4, enable interrupts }
/* Aborts an active receive operation on interface intfNum. Returns the number of bytes that were received and transferred to the data location established for this receive operation. */ BYTE USBHID_abortReceive(WORD* size, BYTE intfNum) { unsigned short bGIE; bGIE = (__get_SR_register() &GIE); //save interrupt status __disable_interrupt(); //disable interrupts - atomic operation *size = 0; //set received bytes count to 0 //is receive operation underway? if (HidReadCtrl[INTFNUM_OFFSET(intfNum)].pUserBuffer) { //how many bytes are already received? *size = HidReadCtrl[INTFNUM_OFFSET(intfNum)].nBytesToReceive - HidReadCtrl[INTFNUM_OFFSET(intfNum)].nBytesToReceiveLeft; HidReadCtrl[INTFNUM_OFFSET(intfNum)].nBytesInEp = 0; HidReadCtrl[INTFNUM_OFFSET(intfNum)].pUserBuffer = NULL; HidReadCtrl[INTFNUM_OFFSET(intfNum)].nBytesToReceiveLeft = 0; } //restore interrupt status __bis_SR_register(bGIE); //restore interrupt status return kUSB_succeed; }
void main(void) { volatile unsigned int i; // Use volatile to prevent removal // by compiler optimization WDTCTL = WDTPW + WDTHOLD; // Stop WDT FLL_CTL0 |= XCAP14PF; // Configure load caps for (i = 0; i < 10000; i++); // Delay for 32 kHz crystal to // stabilize SD16CTL = SD16REFON + SD16SSEL1; // 1.2V ref, SMCLK SD16CCTL0 |= SD16GRP+SD16OSR_1024; // Group with CH1 SD16CCTL1 |= SD16GRP; // Group with CH2 SD16CCTL2 |= SD16GRP; // Group with CH3 SD16CCTL3 |= SD16GRP; // Group with CH4 SD16CCTL4 |= SD16GRP; // Group with CH5 SD16CCTL5 |= SD16GRP; // Group with CH6 SD16CCTL6 |= SD16IE; // Enable interrupt for (i = 0; i < 0x3600; i++); // Delay for 1.2V ref startup SD16CCTL6 |= SD16SC; // Set bit to start conversion __bis_SR_register(LPM0_bits + GIE); // Enter LPM0 w/ interrupts }
int main(void) { // hold the watchdog timer WDTCTL = WDTPW + WDTHOLD; // board init_board(); // reset local variables memset(&app_vars, 0, sizeof(app_vars)); // initialize the ipmt module dn_ipmg_init( dn_ipmg_notif_cb, // notifCb app_vars.notifBuf, // notifBuf sizeof(app_vars.notifBuf), // notifBufLen dn_ipmg_reply_cb, // replyCb dn_ipmg_status_cb // statusCb ); // schedule the first event fsm_scheduleEvent(CMD_PERIOD, &api_initiateConnect); __bis_SR_register(LPM0_bits | GIE); }
int main(void) { WDTCTL = WDTPW + WDTHOLD; // Stop WDT TI_USCI_I2C_slaveinit(start_cb, transmit_cb, receive_cb, 0x23); //_EINT(); // BCSCTL1 = CALBC1_16MHZ; // DCOCTL = CALDCO_16MHZ; // LPM0; BCSCTL1 = CALBC1_16MHZ; DCOCTL = CALDCO_16MHZ; volatile unsigned long i; // __enable_interrupt(); __bis_SR_register(GIE); while(1) __asm__("nop"); return 0; }
int main(void) { // Stop watchdog timer WDTCTL = WDTPW + WDTHOLD; // setup IOs for the LEDs LED_DIR |= LEDS; // Set LED ports as to output direction LED_OUT &= ~LEDS; // Set the LEDs off LED_OUT |= LED_R; // Set on the red LED // Set DCO to 1 MHz: DCOCTL = 0; // Select lowest DCOx and MODx settings BCSCTL1 = CALBC1_1MHZ; // Set range DCOCTL = CALDCO_1MHZ; // Set DCO step + modulation // MSP430G2231 has one calibrated frequency (1MHz) // BCSCTL1 = 0x86 // DCOCTL = 0xB7 // MSP430G2553 has four calibrated frequencies (1, 8, 12, 16MHz) // Set DCO to 16 MHz DCOCTL = 0; // Select lowest DCOx and MODx settings // RSEL = 15 -> 15.25MHz at DCO=3 ([DS] p. 23) BCSCTL1 = XT2OFF | (RSEL3 | RSEL2 | RSEL1 | RSEL0); //DCOCTL = ( DCO1 | DCO0) | 0; // DCO = 3 -> 15.25MHz DCOCTL = (DCO2 ) | 0; // DCO = 4 -> 15.25 * 1.08 = 16.47MHz CCTL0 = CCIE; // Capture/compare interrupt enable TACTL = TASSEL_2 + MC_2; // Set the timer A to SMCLCK, Continuous // Clear the timer and enable timer interrupt __enable_interrupt(); // LPM0 with interrupts enabled __bis_SR_register(LPM0_bits + GIE); return 0; }