uint8_t RF24::read_payload(void* buf, uint8_t len) { uint8_t status; uint8_t* current = reinterpret_cast<uint8_t*>(buf); uint8_t data_len = min(len,payload_size); uint8_t blank_len = dynamic_payloads_enabled ? 0 : payload_size - data_len; //printf("[Reading %u bytes %u blanks]",data_len,blank_len); csn(LOW); status = SPI.transfer( R_RX_PAYLOAD ); while ( data_len-- ) *current++ = SPI.transfer(0xff); while ( blank_len-- ) SPI.transfer(0xff); csn(HIGH); return status; }
uint8_t RF24::write_register(uint8_t reg, uint8_t value) { uint8_t status; IF_SERIAL_DEBUG(printf_P(PSTR("write_register(%02x,%02x)\r\n"),reg,value)); #if defined (__arm__) && !defined ( CORE_TEENSY ) status = SPI.transfer(csn_pin, W_REGISTER | ( REGISTER_MASK & reg ), SPI_CONTINUE); SPI.transfer(csn_pin,value); #else csn(LOW); status = SPI.transfer( W_REGISTER | ( REGISTER_MASK & reg ) ); SPI.transfer(value); csn(HIGH); #endif return status; }
uint8_t RF24::write_register(uint8_t reg, const uint8_t* buf, uint8_t len) { uint8_t status; #if defined (RF24_LINUX) csn(LOW); uint8_t * prx = spi_rxbuff; uint8_t * ptx = spi_txbuff; uint8_t size = len + 1; // Add register value to transmit buffer *ptx++ = ( W_REGISTER | ( REGISTER_MASK & reg ) ); while ( len-- ) *ptx++ = *buf++; #if defined (RF24_SPIDEV) _SPI.transfernb( (char *) spi_txbuff, (char *) spi_rxbuff, size); #else bcm2835_spi_transfernb( (char *) spi_txbuff, (char *) spi_rxbuff, size); #endif status = *prx; // status is 1st byte of receive buffer #elif defined (__arm__) && !defined ( CORE_TEENSY ) status = _SPI.transfer(csn_pin, W_REGISTER | ( REGISTER_MASK & reg ), SPI_CONTINUE ); while ( --len){ _SPI.transfer(csn_pin,*buf++, SPI_CONTINUE); } _SPI.transfer(csn_pin,*buf++); #else csn(LOW); status = _SPI.transfer( W_REGISTER | ( REGISTER_MASK & reg ) ); while ( len-- ) _SPI.transfer(*buf++); csn(HIGH); #endif return status; }
uint8_t RF24::write_payload(const void* buf, uint8_t len) { uint8_t status; const uint8_t* current = reinterpret_cast<const uint8_t*>(buf); uint8_t data_len = min(len,payload_size); uint8_t blank_len = dynamic_payloads_enabled ? 0 : payload_size - data_len; //SERIAL("[Writing %u bytes %u blanks]",data_len,blank_len); csn(LOW); status = SPI.transfer( W_TX_PAYLOAD ); while ( data_len-- ) SPI.transfer(*current++); while ( blank_len-- ) SPI.transfer(0); csn(HIGH); return status; }
uint8_t RF24::read_register(uint8_t reg, uint8_t* buf, uint8_t len) { uint8_t status; #if defined (RF24_LINUX) uint8_t * prx = spi_rxbuff; uint8_t * ptx = spi_txbuff; uint8_t size = len + 1; // Add register value to transmit buffer *ptx++ = ( R_REGISTER | ( REGISTER_MASK & reg ) ); while (len--){ *ptx++ = NOP; } // Dummy operation, just for reading csn(LOW); //In this case, calling csn(LOW) configures the spi settings bcm2835_spi_transfernb( (char *) spi_txbuff, (char *) spi_rxbuff, size); status = *prx++; // status is 1st byte of receive buffer // decrement before to skip status byte while ( --size ){ *buf++ = *prx++; } #elif defined (__arm__) && !defined ( CORE_TEENSY ) status = _SPI.transfer(csn_pin, R_REGISTER | ( REGISTER_MASK & reg ), SPI_CONTINUE ); while ( len-- > 1 ){ *buf++ = _SPI.transfer(csn_pin,0xff, SPI_CONTINUE); } *buf++ = _SPI.transfer(csn_pin,0xff); #else csn(LOW); status = _SPI.transfer( R_REGISTER | ( REGISTER_MASK & reg ) ); while ( len-- ){ *buf++ = _SPI.transfer(0xff); } csn(HIGH); #endif return status; }
void SPI_IRQ(void) { if (sSpiInformation.ulSpiState == eSPI_STATE_POWERUP) { //This means IRQ line was low call a callback of HCI Layer to inform on event sSpiInformation.ulSpiState = eSPI_STATE_INITIALIZED; } else if (sSpiInformation.ulSpiState == eSPI_STATE_IDLE) { sSpiInformation.ulSpiState = eSPI_STATE_READ_IRQ; //IRQ line goes down - we are start reception csn(LOW); // // Wait for TX/RX Compete which will come as DMA interrupt // SpiReadHeader(); sSpiInformation.ulSpiState = eSPI_STATE_READ_EOT; SSIContReadOperation(); } else if (sSpiInformation.ulSpiState == eSPI_STATE_WRITE_IRQ) { SpiWriteDataSynchronous(sSpiInformation.pTxPacket, sSpiInformation.usTxPacketLength); sSpiInformation.ulSpiState = eSPI_STATE_IDLE; csn(HIGH); } return; }
uint8_t RF24::write_register(uint8_t reg, const uint8_t* buf, uint8_t len) { uint8_t status; #if defined (__arm__) && !defined ( CORE_TEENSY ) status = SPI.transfer(csn_pin, W_REGISTER | ( REGISTER_MASK & reg ), SPI_CONTINUE ); while ( --len){ SPI.transfer(csn_pin,*buf++, SPI_CONTINUE); } SPI.transfer(csn_pin,*buf++); #else csn(LOW); status = SPI.transfer( W_REGISTER | ( REGISTER_MASK & reg ) ); while ( len-- ) SPI.transfer(*buf++); csn(HIGH); #endif return status; }
uint8_t RF24::read_register(uint8_t reg, uint8_t* buf, uint8_t len) { uint8_t status; #if defined (__arm__) && !defined ( CORE_TEENSY ) status = SPI.transfer(csn_pin, R_REGISTER | ( REGISTER_MASK & reg ), SPI_CONTINUE ); while ( len-- > 1 ){ *buf++ = SPI.transfer(csn_pin,0xff, SPI_CONTINUE); } *buf++ = SPI.transfer(csn_pin,0xff); #else csn(LOW); status = SPI.transfer( R_REGISTER | ( REGISTER_MASK & reg ) ); while ( len-- ){ *buf++ = SPI.transfer(0xff); } csn(HIGH); #endif return status; }
uint8_t RF24::read_payload(void* buf, uint8_t len) { uint8_t status; uint8_t* current = reinterpret_cast<uint8_t*>(buf); csn(LOW); status = SPI.transfer( R_RX_PAYLOAD ); uint8_t data_len = min(len,payload_size); while ( data_len-- ) *current++ = SPI.transfer(0xff); // This does not seem to be needed. Keeping it here in case // removing it does cause problems for static payloads // // Read the remaining payload off the chip, even though we will // throw it away. //uint8_t blank_len = payload_size - data_len; //while ( blank_len-- ) // SPI.transfer(0xff); csn(HIGH); return status; }
uint8_t RF24::write_payload(const void* buf, uint8_t len) { uint8_t status; const uint8_t* current = reinterpret_cast<const uint8_t*>(buf); csn(LOW); status = SPI.transfer( W_TX_PAYLOAD ); uint8_t data_len = min(len,payload_size); while ( data_len-- ) SPI.transfer(*current++); // This does not seem to be needed. Keeping it here in case // removing it does cause problems for static payloads // // Send blanks out to the chip to finish off the payload //uint8_t blank_len = payload_size - data_len; //while ( blank_len-- ) // SPI.transfer(0); csn(HIGH); return status; }
inline void RF24::endTransaction() { csn(HIGH); #if defined (RF24_SPI_TRANSACTIONS) _SPI.endTransaction(); #endif }
inline void RF24::beginTransaction() { #if defined (RF24_SPI_TRANSACTIONS) _SPI.beginTransaction(SPISettings(RF_SPI_SPEED, MSBFIRST, SPI_MODE0)); #endif csn(LOW); }
NABoolean CmpSqlSession::validateVolatileQualifiedName(QualifiedName &inName) { if (NOT Get_SqlParser_Flags(ALLOW_VOLATILE_SCHEMA_IN_TABLE_NAME)) { if (NOT inName.getCatalogName().isNull()) { // cannot be a 3-part name *CmpCommon::diags() << DgSqlCode(-4192); return FALSE; } if (NOT inName.getSchemaName().isNull()) { // validate that the schemaName part is the currentUserName if (inName.getSchemaName() != externalUserName_) { *CmpCommon::diags() << DgSqlCode(-4191) << DgString0(inName.getSchemaName()) << DgString1(externalUserName_); return FALSE; } } } else { // Volatile schema name is allowed. // Make sure that it is a valid volatile 3 part name. if ((NOT inName.getCatalogName().isNull()) && (NOT inName.getSchemaName().isNull())) { // move to a temp to upcase ComSchemaName csn(inName.getSchemaName()); ULng32 len = MINOF(strlen(csn.getSchemaNamePartAsAnsiString().data()), strlen(COM_VOLATILE_SCHEMA_PREFIX)); NAString upSch(csn.getSchemaNamePartAsAnsiString().data()); upSch.toUpper(); if ((len < strlen(COM_VOLATILE_SCHEMA_PREFIX)) || (strncmp(upSch.data(), COM_VOLATILE_SCHEMA_PREFIX, len) != 0)) { *CmpCommon::diags() << DgSqlCode(-4192); return FALSE; } } else if (NOT inName.getSchemaName().isNull()) { // 2 part name // validate that the schemaName part is the currentUserName if (inName.getSchemaName() != externalUserName_) { *CmpCommon::diags() << DgSqlCode(-4191) << DgString0(inName.getSchemaName()) << DgString1(externalUserName_); return FALSE; } } } return TRUE; }
long SpiWrite(unsigned char *pUserBuffer, unsigned short usLength) { unsigned char ucPad = 0; // // Figure out the total length of the packet in order to figure out if there is padding or not // if(!(usLength & 0x0001)) { ucPad++; } pUserBuffer[0] = WRITE; pUserBuffer[1] = HI(usLength + ucPad); pUserBuffer[2] = LO(usLength + ucPad); pUserBuffer[3] = 0; pUserBuffer[4] = 0; usLength += (SPI_HEADER_SIZE + ucPad); // The magic number that resides at the end of the TX/RX buffer (1 byte after the allocated size) // for the purpose of detection of the overrun. If the magic number is overriten - buffer overrun // occurred - and we will stuck here forever! if (wlan_tx_buffer[CC3000_TX_BUFFER_SIZE - 1] != CC3000_BUFFER_MAGIC_NUMBER) { while (1) ; } // Serial.println("Checking for state"); // print_spi_state(); if (sSpiInformation.ulSpiState == eSPI_STATE_POWERUP) { while (sSpiInformation.ulSpiState != eSPI_STATE_INITIALIZED){ } ; } if (sSpiInformation.ulSpiState == eSPI_STATE_INITIALIZED) { // // This is time for first TX/RX transactions over SPI: the IRQ is down - so need to send read buffer size command // SpiFirstWrite(pUserBuffer, usLength); } else { // We need to prevent here race that can occur in case 2 back to back // packets are sent to the device, so the state will move to IDLE and once //again to not IDLE due to IRQ tSLInformation.WlanInterruptDisable(); while (sSpiInformation.ulSpiState != eSPI_STATE_IDLE) { ; } sSpiInformation.ulSpiState = eSPI_STATE_WRITE_IRQ; sSpiInformation.pTxPacket = pUserBuffer; sSpiInformation.usTxPacketLength = usLength; // assert CS //digitalWrite(HOST_nCS, LOW); csn(LOW); // reenable IRQ tSLInformation.WlanInterruptEnable(); } // check for a missing interrupt between the CS assertion and enabling back the interrupts if (tSLInformation.ReadWlanInterruptPin() == 0) { // Serial.println("writing synchronous data"); SpiWriteDataSynchronous(sSpiInformation.pTxPacket, sSpiInformation.usTxPacketLength); sSpiInformation.ulSpiState = eSPI_STATE_IDLE; //deassert CS csn(HIGH); } // // Due to the fact that we are currently implementing a blocking situation // here we will wait till end of transaction // while (eSPI_STATE_IDLE != sSpiInformation.ulSpiState) ; //Serial.println("done with spi write"); return(0); }