static int mag3110_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) { struct mag3110_data *data = iio_priv(indio_dev); int rate; if (iio_buffer_enabled(indio_dev)) return -EBUSY; switch (mask) { case IIO_CHAN_INFO_SAMP_FREQ: rate = mag3110_get_samp_freq_index(data, val, val2); if (rate < 0) return -EINVAL; data->ctrl_reg1 &= ~MAG3110_CTRL_DR_MASK; data->ctrl_reg1 |= rate << MAG3110_CTRL_DR_SHIFT; return i2c_smbus_write_byte_data(data->client, MAG3110_CTRL_REG1, data->ctrl_reg1); case IIO_CHAN_INFO_CALIBBIAS: if (val < -10000 || val > 10000) return -EINVAL; return i2c_smbus_write_word_swapped(data->client, MAG3110_OFF_X + 2 * chan->scan_index, val << 1); default: return -EINVAL; } }
static int ad7606_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long m) { int ret; struct ad7606_state *st = iio_priv(indio_dev); unsigned int scale_uv; switch (m) { case 0: mutex_lock(&indio_dev->mlock); if (iio_buffer_enabled(indio_dev)) ret = -EBUSY; else ret = ad7606_scan_direct(indio_dev, chan->address); mutex_unlock(&indio_dev->mlock); if (ret < 0) return ret; *val = (short) ret; return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: scale_uv = (st->range * 1000 * 2) >> st->chip_info->channels[0].scan_type.realbits; *val = scale_uv / 1000; *val2 = (scale_uv % 1000) * 1000; return IIO_VAL_INT_PLUS_MICRO; } return -EINVAL; }
static int mma8452_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) { struct mma8452_data *data = iio_priv(indio_dev); __be16 buffer[3]; int i, ret; switch (mask) { case IIO_CHAN_INFO_RAW: if (iio_buffer_enabled(indio_dev)) return -EBUSY; mutex_lock(&data->lock); ret = mma8452_read(data, buffer); mutex_unlock(&data->lock); if (ret < 0) return ret; *val = sign_extend32(be16_to_cpu( buffer[chan->scan_index]) >> chan->scan_type.shift, chan->scan_type.realbits - 1); return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: i = data->data_cfg & MMA8452_DATA_CFG_FS_MASK; *val = data->chip_info->mma_scales[i][0]; *val2 = data->chip_info->mma_scales[i][1]; return IIO_VAL_INT_PLUS_MICRO; case IIO_CHAN_INFO_SAMP_FREQ: i = mma8452_get_odr_index(data); *val = mma8452_samp_freq[i][0]; *val2 = mma8452_samp_freq[i][1]; return IIO_VAL_INT_PLUS_MICRO; case IIO_CHAN_INFO_CALIBBIAS: ret = i2c_smbus_read_byte_data(data->client, MMA8452_OFF_X + chan->scan_index); if (ret < 0) return ret; *val = sign_extend32(ret, 7); return IIO_VAL_INT; case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY: if (data->data_cfg & MMA8452_DATA_CFG_HPF_MASK) { ret = mma8452_read_hp_filter(data, val, val2); if (ret < 0) return ret; } else { *val = 0; *val2 = 0; } return IIO_VAL_INT_PLUS_MICRO; } return -EINVAL; }
static void tiadc_step_config(struct iio_dev *indio_dev) { struct tiadc_device *adc_dev = iio_priv(indio_dev); unsigned int stepconfig; int i, steps; /* * There are 16 configurable steps and 8 analog input * lines available which are shared between Touchscreen and ADC. * * Steps backwards i.e. from 16 towards 0 are used by ADC * depending on number of input lines needed. * Channel would represent which analog input * needs to be given to ADC to digitalize data. */ steps = TOTAL_STEPS - adc_dev->channels; if (iio_buffer_enabled(indio_dev)) stepconfig = STEPCONFIG_AVG_16 | STEPCONFIG_FIFO1 | STEPCONFIG_MODE_SWCNT; else stepconfig = STEPCONFIG_AVG_16 | STEPCONFIG_FIFO1; for (i = 0; i < adc_dev->channels; i++) { int chan; chan = adc_dev->channel_line[i]; tiadc_writel(adc_dev, REG_STEPCONFIG(steps), stepconfig | STEPCONFIG_INP(chan)); tiadc_writel(adc_dev, REG_STEPDELAY(steps), STEPCONFIG_OPENDLY); adc_dev->channel_step[i] = steps; steps++; } }
static int ad7606_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long m) { int ret; struct ad7606_state *st = iio_priv(indio_dev); switch (m) { case IIO_CHAN_INFO_RAW: mutex_lock(&indio_dev->mlock); if (iio_buffer_enabled(indio_dev)) ret = -EBUSY; else ret = ad7606_scan_direct(indio_dev, chan->address); mutex_unlock(&indio_dev->mlock); if (ret < 0) return ret; *val = (short) ret; return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: *val = st->range * 2; *val2 = st->chip_info->channels[0].scan_type.realbits; return IIO_VAL_FRACTIONAL_LOG2; } return -EINVAL; }
static int mxc4005_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) { struct mxc4005_data *data = iio_priv(indio_dev); int ret; switch (mask) { case IIO_CHAN_INFO_RAW: switch (chan->type) { case IIO_ACCEL: if (iio_buffer_enabled(indio_dev)) return -EBUSY; ret = mxc4005_read_axis(data, chan->address); if (ret < 0) return ret; *val = sign_extend32(ret >> chan->scan_type.shift, chan->scan_type.realbits - 1); return IIO_VAL_INT; default: return -EINVAL; } case IIO_CHAN_INFO_SCALE: ret = mxc4005_read_scale(data); if (ret < 0) return ret; *val = 0; *val2 = ret; return IIO_VAL_INT_PLUS_MICRO; default: return -EINVAL; } }
static int mag3110_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) { struct mag3110_data *data = iio_priv(indio_dev); __be16 buffer[3]; int i, ret; switch (mask) { case IIO_CHAN_INFO_RAW: if (iio_buffer_enabled(indio_dev)) return -EBUSY; switch (chan->type) { case IIO_MAGN: /* in 0.1 uT / LSB */ ret = mag3110_read(data, buffer); if (ret < 0) return ret; *val = sign_extend32( be16_to_cpu(buffer[chan->scan_index]), 15); return IIO_VAL_INT; case IIO_TEMP: /* in 1 C / LSB */ mutex_lock(&data->lock); ret = mag3110_request(data); if (ret < 0) { mutex_unlock(&data->lock); return ret; } ret = i2c_smbus_read_byte_data(data->client, MAG3110_DIE_TEMP); mutex_unlock(&data->lock); if (ret < 0) return ret; *val = sign_extend32(ret, 7); return IIO_VAL_INT; default: return -EINVAL; } case IIO_CHAN_INFO_SCALE: switch (chan->type) { case IIO_MAGN: *val = 0; *val2 = 1000; return IIO_VAL_INT_PLUS_MICRO; case IIO_TEMP: *val = 1000; return IIO_VAL_INT; default: return -EINVAL; } case IIO_CHAN_INFO_SAMP_FREQ: i = data->ctrl_reg1 >> MAG3110_CTRL_DR_SHIFT; *val = mag3110_samp_freq[i][0]; *val2 = mag3110_samp_freq[i][1]; return IIO_VAL_INT_PLUS_MICRO; } return -EINVAL; }
static int mma8452_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) { struct mma8452_data *data = iio_priv(indio_dev); int i, ret; if (iio_buffer_enabled(indio_dev)) return -EBUSY; switch (mask) { case IIO_CHAN_INFO_SAMP_FREQ: i = mma8452_get_samp_freq_index(data, val, val2); if (i < 0) return i; data->ctrl_reg1 &= ~MMA8452_CTRL_DR_MASK; data->ctrl_reg1 |= i << MMA8452_CTRL_DR_SHIFT; return mma8452_change_config(data, MMA8452_CTRL_REG1, data->ctrl_reg1); case IIO_CHAN_INFO_SCALE: i = mma8452_get_scale_index(data, val, val2); if (i < 0) return i; data->data_cfg &= ~MMA8452_DATA_CFG_FS_MASK; data->data_cfg |= i; return mma8452_change_config(data, MMA8452_DATA_CFG, data->data_cfg); case IIO_CHAN_INFO_CALIBBIAS: if (val < -128 || val > 127) return -EINVAL; return mma8452_change_config(data, MMA8452_OFF_X + chan->scan_index, val); case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY: if (val == 0 && val2 == 0) { data->data_cfg &= ~MMA8452_DATA_CFG_HPF_MASK; } else { data->data_cfg |= MMA8452_DATA_CFG_HPF_MASK; ret = mma8452_set_hp_filter_frequency(data, val, val2); if (ret < 0) return ret; } return mma8452_change_config(data, MMA8452_DATA_CFG, data->data_cfg); default: return -EINVAL; } }
static int max1363_read_single_chan(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, long m) { int ret = 0; s32 data; u8 rxbuf[2]; struct max1363_state *st = iio_priv(indio_dev); struct i2c_client *client = st->client; mutex_lock(&indio_dev->mlock); /* * If monitor mode is enabled, the method for reading a single * channel will have to be rather different and has not yet * been implemented. * * Also, cannot read directly if buffered capture enabled. */ if (st->monitor_on || iio_buffer_enabled(indio_dev)) { ret = -EBUSY; goto error_ret; } /* Check to see if current scan mode is correct */ if (st->current_mode != &max1363_mode_table[chan->address]) { /* Update scan mode if needed */ st->current_mode = &max1363_mode_table[chan->address]; ret = max1363_set_scan_mode(st); if (ret < 0) goto error_ret; } if (st->chip_info->bits != 8) { /* Get reading */ data = st->recv(client, rxbuf, 2); if (data < 0) { ret = data; goto error_ret; } data = (rxbuf[1] | rxbuf[0] << 8) & ((1 << st->chip_info->bits) - 1); } else { /* Get reading */ data = st->recv(client, rxbuf, 1); if (data < 0) { ret = data; goto error_ret; } data = rxbuf[0]; } *val = data; error_ret: mutex_unlock(&indio_dev->mlock); return ret; }
static int kxcjk1013_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) { struct kxcjk1013_data *data = iio_priv(indio_dev); int ret; switch (mask) { case IIO_CHAN_INFO_RAW: mutex_lock(&data->mutex); if (iio_buffer_enabled(indio_dev)) ret = -EBUSY; else { ret = kxcjk1013_set_power_state(data, true); if (ret < 0) { mutex_unlock(&data->mutex); return ret; } ret = kxcjk1013_get_acc_reg(data, chan->scan_index); if (ret < 0) { kxcjk1013_set_power_state(data, false); mutex_unlock(&data->mutex); return ret; } *val = sign_extend32(ret >> 4, 11); ret = kxcjk1013_set_power_state(data, false); } mutex_unlock(&data->mutex); if (ret < 0) return ret; return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: *val = 0; *val2 = KXCJK1013_scale_table[data->range].scale; return IIO_VAL_INT_PLUS_MICRO; case IIO_CHAN_INFO_SAMP_FREQ: mutex_lock(&data->mutex); ret = kxcjk1013_get_odr(data, val, val2); mutex_unlock(&data->mutex); return ret; default: return -EINVAL; } }
static int mma7455_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) { struct mma7455_data *mma7455 = iio_priv(indio_dev); unsigned int reg; __le16 data; int ret; switch (mask) { case IIO_CHAN_INFO_RAW: if (iio_buffer_enabled(indio_dev)) return -EBUSY; ret = mma7455_drdy(mma7455); if (ret) return ret; ret = regmap_bulk_read(mma7455->regmap, chan->address, &data, sizeof(data)); if (ret) return ret; *val = sign_extend32(le16_to_cpu(data), 9); return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: *val = 0; *val2 = MMA7455_10BIT_SCALE; return IIO_VAL_INT_PLUS_MICRO; case IIO_CHAN_INFO_SAMP_FREQ: ret = regmap_read(mma7455->regmap, MMA7455_REG_CTL1, ®); if (ret) return ret; if (reg & MMA7455_CTL1_DFBW_MASK) *val = 250; else *val = 125; return IIO_VAL_INT; } return -EINVAL; }
static int mma8452_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) { struct mma8452_data *data = iio_priv(indio_dev); __be16 buffer[3]; int i, ret; switch (mask) { case IIO_CHAN_INFO_RAW: if (iio_buffer_enabled(indio_dev)) return -EBUSY; mutex_lock(&data->lock); ret = mma8452_read(data, buffer); mutex_unlock(&data->lock); if (ret < 0) return ret; *val = sign_extend32( be16_to_cpu(buffer[chan->scan_index]) >> 4, 11); return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: i = data->data_cfg & MMA8452_DATA_CFG_FS_MASK; *val = mma8452_scales[i][0]; *val2 = mma8452_scales[i][1]; return IIO_VAL_INT_PLUS_MICRO; case IIO_CHAN_INFO_SAMP_FREQ: i = (data->ctrl_reg1 & MMA8452_CTRL_DR_MASK) >> MMA8452_CTRL_DR_SHIFT; *val = mma8452_samp_freq[i][0]; *val2 = mma8452_samp_freq[i][1]; return IIO_VAL_INT_PLUS_MICRO; case IIO_CHAN_INFO_CALIBBIAS: ret = i2c_smbus_read_byte_data(data->client, MMA8452_OFF_X + chan->scan_index); if (ret < 0) return ret; *val = sign_extend32(ret, 7); return IIO_VAL_INT; } return -EINVAL; }
static void ak89xx_work_func(struct work_struct *work) { struct inv_ak89xx_state_s *st = container_of((struct delayed_work *)work, struct inv_ak89xx_state_s, work); struct iio_dev *indio_dev = iio_priv_to_dev(st); unsigned long delay = msecs_to_jiffies(st->delay); mutex_lock(&indio_dev->mlock); if (!(iio_buffer_enabled(indio_dev))) goto error_ret; st->timestamp = get_time_ns(); schedule_delayed_work(&st->work, delay); inv_read_ak89xx_fifo(indio_dev); INV_I2C_INC_COMPASSIRQ(); error_ret: mutex_unlock(&indio_dev->mlock); }
static irqreturn_t vf610_adc_isr(int irq, void *dev_id) { struct iio_dev *indio_dev = (struct iio_dev *)dev_id; struct vf610_adc *info = iio_priv(indio_dev); int coco; coco = readl(info->regs + VF610_REG_ADC_HS); if (coco & VF610_ADC_HS_COCO0) { info->value = vf610_adc_read_data(info); if (iio_buffer_enabled(indio_dev)) { info->buffer[0] = info->value; iio_push_to_buffers_with_timestamp(indio_dev, info->buffer, iio_get_time_ns()); iio_trigger_notify_done(indio_dev->trig); } else complete(&info->completion); } return IRQ_HANDLED; }
/** * ak89xx_read_raw() - read raw method. */ static int ak89xx_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) { struct inv_ak89xx_state_s *st = iio_priv(indio_dev); int scale = 0; switch (mask) { case 0: if (!(iio_buffer_enabled(indio_dev))) return -EINVAL; if (chan->type == IIO_MAGN) { *val = st->compass_data[chan->channel2 - IIO_MOD_X]; return IIO_VAL_INT; } return -EINVAL; case IIO_CHAN_INFO_SCALE: if (chan->type == IIO_MAGN) { if (st->compass_id == COMPASS_ID_AK8975) scale = 9830; else if (st->compass_id == COMPASS_ID_AK8972) scale = 19661; else if (st->compass_id == COMPASS_ID_AK8963) { if (st->compass_scale) scale = 4915; /* 16 bit */ else scale = 19661; /* 14 bit */ } scale *= (1L << 15); *val = scale; return IIO_VAL_INT; } return -EINVAL; default: return -EINVAL; } }
static int mpl3115_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) { struct mpl3115_data *data = iio_priv(indio_dev); s32 tmp = 0; int ret; switch (mask) { case IIO_CHAN_INFO_RAW: if (iio_buffer_enabled(indio_dev)) return -EBUSY; switch (chan->type) { case IIO_PRESSURE: /* in 0.25 pascal / LSB */ mutex_lock(&data->lock); ret = mpl3115_request(data); if (ret < 0) { mutex_unlock(&data->lock); return ret; } ret = i2c_smbus_read_i2c_block_data(data->client, MPL3115_OUT_PRESS, 3, (u8 *) &tmp); mutex_unlock(&data->lock); if (ret < 0) return ret; *val = sign_extend32(be32_to_cpu(tmp) >> 12, 23); return IIO_VAL_INT; case IIO_TEMP: /* in 0.0625 celsius / LSB */ mutex_lock(&data->lock); ret = mpl3115_request(data); if (ret < 0) { mutex_unlock(&data->lock); return ret; } ret = i2c_smbus_read_i2c_block_data(data->client, MPL3115_OUT_TEMP, 2, (u8 *) &tmp); mutex_unlock(&data->lock); if (ret < 0) return ret; *val = sign_extend32(be32_to_cpu(tmp) >> 20, 15); return IIO_VAL_INT; default: return -EINVAL; } case IIO_CHAN_INFO_SCALE: switch (chan->type) { case IIO_PRESSURE: *val = 0; *val2 = 250; /* want kilopascal */ return IIO_VAL_INT_PLUS_MICRO; case IIO_TEMP: *val = 0; *val2 = 62500; return IIO_VAL_INT_PLUS_MICRO; default: return -EINVAL; } } return -EINVAL; }
static int vf610_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) { struct vf610_adc *info = iio_priv(indio_dev); unsigned int hc_cfg; long ret; switch (mask) { case IIO_CHAN_INFO_RAW: case IIO_CHAN_INFO_PROCESSED: mutex_lock(&indio_dev->mlock); if (iio_buffer_enabled(indio_dev)) { mutex_unlock(&indio_dev->mlock); return -EBUSY; } reinit_completion(&info->completion); hc_cfg = VF610_ADC_ADCHC(chan->channel); hc_cfg |= VF610_ADC_AIEN; writel(hc_cfg, info->regs + VF610_REG_ADC_HC0); ret = wait_for_completion_interruptible_timeout (&info->completion, VF610_ADC_TIMEOUT); if (ret == 0) { mutex_unlock(&indio_dev->mlock); return -ETIMEDOUT; } if (ret < 0) { mutex_unlock(&indio_dev->mlock); return ret; } switch (chan->type) { case IIO_VOLTAGE: *val = info->value; break; case IIO_TEMP: /* * Calculate in degree Celsius times 1000 * Using the typical sensor slope of 1.84 mV/°C * and VREFH_ADC at 3.3V, V at 25°C of 699 mV */ *val = 25000 - ((int)info->value - VF610_VTEMP25_3V3) * 1000000 / VF610_TEMP_SLOPE_COEFF; break; default: mutex_unlock(&indio_dev->mlock); return -EINVAL; } mutex_unlock(&indio_dev->mlock); return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: *val = info->vref_uv / 1000; *val2 = info->adc_feature.res_mode; return IIO_VAL_FRACTIONAL_LOG2; case IIO_CHAN_INFO_SAMP_FREQ: *val = info->sample_freq_avail[info->adc_feature.sample_rate]; *val2 = 0; return IIO_VAL_INT; default: break; } return -EINVAL; }
static int max1363_read_single_chan(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, long m) { int ret = 0; s32 data; char rxbuf[2]; const unsigned long *mask; struct max1363_state *st = iio_priv(indio_dev); struct i2c_client *client = st->client; mutex_lock(&indio_dev->mlock); /* * If monitor mode is enabled, the method for reading a single * channel will have to be rather different and has not yet * been implemented. */ if (st->monitor_on) { ret = -EBUSY; goto error_ret; } /* If ring buffer capture is occurring, query the buffer */ if (iio_buffer_enabled(indio_dev)) { mask = max1363_mode_table[chan->address].modemask; data = max1363_single_channel_from_ring(mask, st); if (data < 0) { ret = data; goto error_ret; } } else { /* Check to see if current scan mode is correct */ if (st->current_mode != &max1363_mode_table[chan->address]) { /* Update scan mode if needed */ st->current_mode = &max1363_mode_table[chan->address]; ret = max1363_set_scan_mode(st); if (ret < 0) goto error_ret; } if (st->chip_info->bits != 8) { /* Get reading */ data = i2c_master_recv(client, rxbuf, 2); if (data < 0) { ret = data; goto error_ret; } data = (s32)(rxbuf[1]) | ((s32)(rxbuf[0] & 0x0F)) << 8; } else { /* Get reading */ data = i2c_master_recv(client, rxbuf, 1); if (data < 0) { ret = data; goto error_ret; } data = rxbuf[0]; } } *val = data; error_ret: mutex_unlock(&indio_dev->mlock); return ret; }
static int ltr501_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) { struct ltr501_data *data = iio_priv(indio_dev); __le16 buf[2]; int ret, i; switch (mask) { case IIO_CHAN_INFO_PROCESSED: if (iio_buffer_enabled(indio_dev)) return -EBUSY; switch (chan->type) { case IIO_LIGHT: mutex_lock(&data->lock_als); ret = ltr501_read_als(data, buf); mutex_unlock(&data->lock_als); if (ret < 0) return ret; *val = ltr501_calculate_lux(le16_to_cpu(buf[1]), le16_to_cpu(buf[0])); return IIO_VAL_INT; default: return -EINVAL; } case IIO_CHAN_INFO_RAW: if (iio_buffer_enabled(indio_dev)) return -EBUSY; switch (chan->type) { case IIO_INTENSITY: mutex_lock(&data->lock_als); ret = ltr501_read_als(data, buf); mutex_unlock(&data->lock_als); if (ret < 0) return ret; *val = le16_to_cpu(chan->address == LTR501_ALS_DATA1 ? buf[0] : buf[1]); return IIO_VAL_INT; case IIO_PROXIMITY: mutex_lock(&data->lock_ps); ret = ltr501_read_ps(data); mutex_unlock(&data->lock_ps); if (ret < 0) return ret; *val = ret & LTR501_PS_DATA_MASK; return IIO_VAL_INT; default: return -EINVAL; } case IIO_CHAN_INFO_SCALE: switch (chan->type) { case IIO_INTENSITY: i = (data->als_contr & data->chip_info->als_gain_mask) >> data->chip_info->als_gain_shift; *val = data->chip_info->als_gain[i].scale; *val2 = data->chip_info->als_gain[i].uscale; return IIO_VAL_INT_PLUS_MICRO; case IIO_PROXIMITY: i = (data->ps_contr & LTR501_CONTR_PS_GAIN_MASK) >> LTR501_CONTR_PS_GAIN_SHIFT; *val = data->chip_info->ps_gain[i].scale; *val2 = data->chip_info->ps_gain[i].uscale; return IIO_VAL_INT_PLUS_MICRO; default: return -EINVAL; } case IIO_CHAN_INFO_INT_TIME: switch (chan->type) { case IIO_INTENSITY: return ltr501_read_it_time(data, val, val2); default: return -EINVAL; } case IIO_CHAN_INFO_SAMP_FREQ: switch (chan->type) { case IIO_INTENSITY: return ltr501_als_read_samp_freq(data, val, val2); case IIO_PROXIMITY: return ltr501_ps_read_samp_freq(data, val, val2); default: return -EINVAL; } } return -EINVAL; }
static int ltr501_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) { struct ltr501_data *data = iio_priv(indio_dev); int i, ret, freq_val, freq_val2; struct ltr501_chip_info *info = data->chip_info; if (iio_buffer_enabled(indio_dev)) return -EBUSY; switch (mask) { case IIO_CHAN_INFO_SCALE: switch (chan->type) { case IIO_INTENSITY: i = ltr501_get_gain_index(info->als_gain, info->als_gain_tbl_size, val, val2); if (i < 0) return -EINVAL; data->als_contr &= ~info->als_gain_mask; data->als_contr |= i << info->als_gain_shift; return regmap_write(data->regmap, LTR501_ALS_CONTR, data->als_contr); case IIO_PROXIMITY: i = ltr501_get_gain_index(info->ps_gain, info->ps_gain_tbl_size, val, val2); if (i < 0) return -EINVAL; data->ps_contr &= ~LTR501_CONTR_PS_GAIN_MASK; data->ps_contr |= i << LTR501_CONTR_PS_GAIN_SHIFT; return regmap_write(data->regmap, LTR501_PS_CONTR, data->ps_contr); default: return -EINVAL; } case IIO_CHAN_INFO_INT_TIME: switch (chan->type) { case IIO_INTENSITY: if (val != 0) return -EINVAL; mutex_lock(&data->lock_als); i = ltr501_set_it_time(data, val2); mutex_unlock(&data->lock_als); return i; default: return -EINVAL; } case IIO_CHAN_INFO_SAMP_FREQ: switch (chan->type) { case IIO_INTENSITY: ret = ltr501_als_read_samp_freq(data, &freq_val, &freq_val2); if (ret < 0) return ret; ret = ltr501_als_write_samp_freq(data, val, val2); if (ret < 0) return ret; /* update persistence count when changing frequency */ ret = ltr501_write_intr_prst(data, chan->type, 0, data->als_period); if (ret < 0) return ltr501_als_write_samp_freq(data, freq_val, freq_val2); return ret; case IIO_PROXIMITY: ret = ltr501_ps_read_samp_freq(data, &freq_val, &freq_val2); if (ret < 0) return ret; ret = ltr501_ps_write_samp_freq(data, val, val2); if (ret < 0) return ret; /* update persistence count when changing frequency */ ret = ltr501_write_intr_prst(data, chan->type, 0, data->ps_period); if (ret < 0) return ltr501_ps_write_samp_freq(data, freq_val, freq_val2); return ret; default: return -EINVAL; } } return -EINVAL; }
static void tiadc_step_config(struct iio_dev *indio_dev) { struct tiadc_device *adc_dev = iio_priv(indio_dev); struct device *dev = adc_dev->mfd_tscadc->dev; unsigned int stepconfig; int i, steps = 0; /* * There are 16 configurable steps and 8 analog input * lines available which are shared between Touchscreen and ADC. * * Steps forwards i.e. from 0 towards 16 are used by ADC * depending on number of input lines needed. * Channel would represent which analog input * needs to be given to ADC to digitalize data. */ for (i = 0; i < adc_dev->channels; i++) { int chan; chan = adc_dev->channel_line[i]; if (adc_dev->step_avg[i] > STEPCONFIG_AVG_16) { dev_warn(dev, "chan %d step_avg truncating to %d\n", chan, STEPCONFIG_AVG_16); adc_dev->step_avg[i] = STEPCONFIG_AVG_16; } if (adc_dev->step_avg[i]) stepconfig = STEPCONFIG_AVG(ffs(adc_dev->step_avg[i]) - 1) | STEPCONFIG_FIFO1; else stepconfig = STEPCONFIG_FIFO1; if (iio_buffer_enabled(indio_dev)) stepconfig |= STEPCONFIG_MODE_SWCNT; tiadc_writel(adc_dev, REG_STEPCONFIG(steps), stepconfig | STEPCONFIG_INP(chan)); if (adc_dev->open_delay[i] > STEPDELAY_OPEN_MASK) { dev_warn(dev, "chan %d open delay truncating to 0x3FFFF\n", chan); adc_dev->open_delay[i] = STEPDELAY_OPEN_MASK; } if (adc_dev->sample_delay[i] > 0xFF) { dev_warn(dev, "chan %d sample delay truncating to 0xFF\n", chan); adc_dev->sample_delay[i] = 0xFF; } tiadc_writel(adc_dev, REG_STEPDELAY(steps), STEPDELAY_OPEN(adc_dev->open_delay[i]) | STEPDELAY_SAMPLE(adc_dev->sample_delay[i])); adc_dev->channel_step[i] = steps; steps++; } }