static int mipi_dsi_off(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
struct msm_panel_info *pinfo;
mfd = platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
if (mdp_rev >= MDP_REV_41)
mutex_lock(&mfd->dma->ov_mutex);
else
down(&mfd->dma->mutex);
mdp4_overlay_dsi_state_set(ST_DSI_SUSPEND);
/* make sure dsi clk is on so that
* dcs commands can be sent
*/
mipi_dsi_clk_cfg(1);
/* make sure dsi_cmd_mdp is idle */
mipi_dsi_cmd_mdp_busy();
/*
* Desctiption: change to DSI_CMD_MODE since it needed to
* tx DCS dsiplay off comamnd to panel
*/
mipi_dsi_op_mode_config(DSI_CMD_MODE);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (pinfo->lcd.vsync_enable) {
if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
if (MDP_REV_303 != mdp_rev)
gpio_free(vsync_gpio);
}
//ensure platform TE off modify TE IRQ GPIO to output 0
//mipi_dsi_set_tear_off(mfd);
}
}
ret = panel_next_off(pdev);
#ifdef CONFIG_MSM_BUS_SCALING
mdp_bus_scale_update_request(0);
#endif
spin_lock_bh(&dsi_clk_lock);
mipi_dsi_clk_disable();
/* disbale dsi engine */
MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0);
mipi_dsi_phy_ctrl(0);
mipi_dsi_ahb_ctrl(0);
spin_unlock_bh(&dsi_clk_lock);
mipi_dsi_unprepare_clocks();
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
mipi_dsi_pdata->dsi_power_save(0);
if (mdp_rev >= MDP_REV_41)
mutex_unlock(&mfd->dma->ov_mutex);
else
up(&mfd->dma->mutex);
pr_debug("%s-:\n", __func__);
return ret;
}
static int mipi_dsi_off(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
struct msm_panel_info *pinfo;
pr_debug("%s+:\n", __func__);
mfd = platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
if (mdp_rev >= MDP_REV_41)
mutex_lock(&mfd->dma->ov_mutex);
else
down(&mfd->dma->mutex);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
mipi_dsi_prepare_ahb_clocks();
mipi_dsi_ahb_ctrl(1);
mipi_dsi_clk_enable();
/* make sure dsi_cmd_mdp is idle */
mipi_dsi_cmd_mdp_busy();
}
/*
* Desctiption: change to DSI_CMD_MODE since it needed to
* tx DCS dsiplay off comamnd to panel
*/
mipi_dsi_op_mode_config(DSI_CMD_MODE);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (pinfo->lcd.vsync_enable) {
if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
if (MDP_REV_303 != mdp_rev)
gpio_free(vsync_gpio);
}
mipi_dsi_set_tear_off(mfd);
}
}
ret = panel_next_off(pdev);
spin_lock_bh(&dsi_clk_lock);
mipi_dsi_clk_disable();
/* disbale dsi engine */
MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0);
mipi_dsi_phy_ctrl(0);
mipi_dsi_ahb_ctrl(0);
spin_unlock_bh(&dsi_clk_lock);
mipi_dsi_unprepare_clocks();
mipi_dsi_unprepare_ahb_clocks();
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_client_reset)
mipi_dsi_pdata->dsi_client_reset(1);
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
mipi_dsi_pdata->dsi_power_save(0);
if (mdp_rev >= MDP_REV_41)
mutex_unlock(&mfd->dma->ov_mutex);
else
up(&mfd->dma->mutex);
pr_debug("%s-:\n", __func__);
return ret;
}
static int mipi_dsi_off(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
struct msm_panel_info *pinfo;
mfd = platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
if (mdp_rev >= MDP_REV_41)
mutex_lock(&mfd->dma->ov_mutex);
else
down(&mfd->dma->mutex);
mdp4_overlay_dsi_state_set(ST_DSI_SUSPEND);
/*
* Description: dsi clock is need to perform shutdown.
* mdp4_dsi_cmd_dma_busy_wait() will enable dsi clock if disabled.
* also, wait until dma (overlay and dmap) finish.
*/
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (mdp_rev >= MDP_REV_41) {
mdp4_dsi_cmd_dma_busy_wait(mfd);
mdp4_dsi_blt_dmap_busy_wait(mfd);
mipi_dsi_mdp_busy_wait(mfd);
} else {
mdp3_dsi_cmd_dma_busy_wait(mfd);
}
} else {
/* video mode, wait until fifo cleaned */
mipi_dsi_controller_cfg(0);
}
/*
* Desctiption: change to DSI_CMD_MODE since it needed to
* tx DCS dsiplay off comamnd to panel
*/
mipi_dsi_op_mode_config(DSI_CMD_MODE);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (pinfo->lcd.vsync_enable) {
if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
if (MDP_REV_303 != mdp_rev)
gpio_free(vsync_gpio);
}
mipi_dsi_set_tear_off(mfd);
}
}
ret = panel_next_off(pdev);
#ifdef CONFIG_MSM_BUS_SCALING
mdp_bus_scale_update_request(0);
#endif
local_bh_disable();
mipi_dsi_clk_disable();
local_bh_enable();
/* disbale dsi engine */
MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0);
mipi_dsi_phy_ctrl(0);
local_bh_disable();
mipi_dsi_ahb_ctrl(0);
local_bh_enable();
mipi_dsi_unprepare_clocks();
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
mipi_dsi_pdata->dsi_power_save(0);
if (mdp_rev >= MDP_REV_41)
mutex_unlock(&mfd->dma->ov_mutex);
else
up(&mfd->dma->mutex);
pr_debug("%s-:\n", __func__);
return ret;
}
int mdp4_dtv_off(struct platform_device *pdev)
{
struct msm_fb_data_type *mfd;
int ret = 0;
int cndx = 0;
int undx;
struct vsycn_ctrl *vctrl;
struct mdp4_overlay_pipe *pipe;
struct vsync_update *vp;
mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
mutex_lock(&mfd->dma->ov_mutex);
vctrl = &vsync_ctrl_db[cndx];
wake_up_interruptible_all(&vctrl->wait_queue);
mdp4_dtv_wait4vsync(cndx);
pipe = vctrl->base_pipe;
if (pipe != NULL) {
/* sanity check, free pipes besides base layer */
mdp4_overlay_unset_mixer(pipe->mixer_num);
if (hdmi_prim_display && mfd->ref_cnt == 0) {
/* adb stop */
if (pipe->pipe_type == OVERLAY_TYPE_BF)
mdp4_overlay_borderfill_stage_down(pipe);
/* pipe == rgb2 */
vctrl->base_pipe = NULL;
} else {
mdp4_mixer_stage_down(pipe, 1);
mdp4_overlay_pipe_free(pipe);
vctrl->base_pipe = NULL;
}
}
mdp4_dtv_tg_off(vctrl);
atomic_set(&vctrl->suspend, 1);
mdp4_overlay_panel_mode_unset(MDP4_MIXER1, MDP4_PANEL_DTV);
undx = vctrl->update_ndx;
vp = &vctrl->vlist[undx];
if (vp->update_cnt) {
/*
* pipe's iommu will be freed at next overlay play
* and iommu_drop statistic will be increased by one
*/
pr_warn("%s: update_cnt=%d\n", __func__, vp->update_cnt);
mdp4_dtv_pipe_clean(vp);
}
ret = panel_next_off(pdev);
mdp_footswitch_ctrl(FALSE);
/* Mdp clock disable */
mdp_clk_ctrl(0);
mutex_unlock(&mfd->dma->ov_mutex);
pr_info("%s:\n", __func__);
return ret;
}
static int mipi_dsi_off(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
struct msm_panel_info *pinfo;
pr_debug("%s+:\n", __func__);
mfd = platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
if (mdp_rev >= MDP_REV_41)
mutex_lock(&mfd->dma->ov_mutex);
else
down(&mfd->dma->mutex);
#if defined(FEATURE_SKYDISP_DISPLAY_FLICKER_SHARP_IPS)
//printk(KERN_ERR "[SKY_LCD] %s : %d\n", __FUNCTION__, __LINE__);
ret = panel_next_off(pdev);
#endif
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
mipi_dsi_prepare_clocks();
mipi_dsi_ahb_ctrl(1);
mipi_dsi_clk_enable();
/* make sure dsi_cmd_mdp is idle */
mipi_dsi_cmd_mdp_busy();
}
/*
* Desctiption: change to DSI_CMD_MODE since it needed to
* tx DCS dsiplay off comamnd to panel
*/
mipi_dsi_op_mode_config(DSI_CMD_MODE);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (pinfo->lcd.vsync_enable) {
if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
if (MDP_REV_303 != mdp_rev)
gpio_free(vsync_gpio);
}
mipi_dsi_set_tear_off(mfd);
}
}
#if defined(FEATURE_SKYDISP_DISPLAY_FLICKER_SHARP_IPS)
/* panel_next_off changed : set before mipi_clock/mode_config etc... */
#else
ret = panel_next_off(pdev);
#endif
#ifdef CONFIG_MSM_BUS_SCALING
mdp_bus_scale_update_request(0);
#endif
mipi_dsi_clk_disable();
/* disbale dsi engine */
MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0);
mipi_dsi_phy_ctrl(0);
mipi_dsi_ahb_ctrl(0);
mipi_dsi_unprepare_clocks();
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
mipi_dsi_pdata->dsi_power_save(0);
if (mdp_rev >= MDP_REV_41)
mutex_unlock(&mfd->dma->ov_mutex);
else
up(&mfd->dma->mutex);
pr_debug("End of %s ....:\n", __func__);
return ret;
}
int mdp4_dtv_off(struct platform_device *pdev)
{
struct msm_fb_data_type *mfd;
int ret = 0;
int cndx = 0;
int undx;
struct vsycn_ctrl *vctrl;
struct mdp4_overlay_pipe *pipe;
struct vsync_update *vp;
int mixer = 0;
mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
mutex_lock(&mfd->dma->ov_mutex);
vctrl = &vsync_ctrl_db[cndx];
mdp4_dtv_wait4vsync(cndx);
atomic_set(&vctrl->vsync_resume, 0);
complete_all(&vctrl->vsync_comp);
vctrl->wait_vsync_cnt = 0;
pipe = vctrl->base_pipe;
if (pipe != NULL) {
mixer = pipe->mixer_num;
mdp4_overlay_unset_mixer(mixer);
if (hdmi_prim_display && mfd->ref_cnt == 0) {
if (pipe->pipe_type == OVERLAY_TYPE_BF)
mdp4_overlay_borderfill_stage_down(pipe);
vctrl->base_pipe = NULL;
} else {
mdp4_mixer_stage_down(pipe, 1);
mdp4_overlay_pipe_free(pipe, 1);
vctrl->base_pipe = NULL;
}
}
mdp4_dtv_tg_off(vctrl);
atomic_set(&vctrl->suspend, 1);
mdp4_overlay_panel_mode_unset(MDP4_MIXER1, MDP4_PANEL_DTV);
undx = vctrl->update_ndx;
vp = &vctrl->vlist[undx];
if (vp->update_cnt) {
pr_warn("%s: update_cnt=%d\n", __func__, vp->update_cnt);
mdp4_dtv_pipe_clean(vp);
}
ret = panel_next_off(pdev);
#if 0
mdp_footswitch_ctrl(FALSE);
#endif
mdp4_overlay_iommu_unmap_freelist(mixer);
mdp4_overlay_iommu_unmap_freelist(mixer);
mdp_clk_ctrl(0);
mutex_unlock(&mfd->dma->ov_mutex);
pr_info("%s:\n", __func__);
return ret;
}
