/*
* Map a timer interrupt to one or more CPUs
*/
static void __init tsi108_pic_maptimer(u_int timer, u_int cpumask)
{
ASSERT(timer >= 0 && timer < TSI108PIC_NUM_TIMERS);
tsi108_pic_write_reg(TSI108_INT_GTDR(timer), physmask(cpumask));
mb();
}
void xics_set_affinity(unsigned int virq, unsigned long cpumask)
{
irq_desc_t *desc = irq_desc + virq;
unsigned int irq;
unsigned long flags;
long status;
unsigned long xics_status[2];
u32 newmask;
virq -= XICS_IRQ_OFFSET;
irq = virt_irq_to_real(virq);
if (irq == XICS_IPI)
return;
spin_lock_irqsave(&desc->lock, flags);
status = rtas_call(ibm_get_xive, 1, 3, (void *)&xics_status, irq);
if (status) {
printk("xics_set_affinity: irq=%d ibm,get-xive returns %ld\n",
irq, status);
goto out;
}
/* For the moment only implement delivery to all cpus or one cpu */
if (cpumask == 0xffffffff)
newmask = default_distrib_server;
else
newmask = physmask(cpumask);
status = rtas_call(ibm_set_xive, 3, 1, NULL,
irq, newmask, xics_status[1]);
if (status) {
printk("xics_set_affinity irq=%d ibm,set-xive returns %ld\n",
irq, status);
goto out;
}
out:
spin_unlock_irqrestore(&desc->lock, flags);
}
void tsi108_pic_set_affinity(unsigned int irq_nr, unsigned long cpumask)
{
tsi108_pic_mapirq(irq_nr, physmask(cpumask), 0);
}
