static void __init mackerel_init(void)
{
struct pm_domain_device domain_devices[] = {
{ "A4LC", &lcdc_device, },
{ "A4LC", &hdmi_lcdc_device, },
{ "A4LC", &meram_device, },
{ "A4MP", &fsi_device, },
{ "A3SP", &usbhs0_device, },
{ "A3SP", &usbhs1_device, },
{ "A3SP", &nand_flash_device, },
{ "A3SP", &sdhi0_device, },
#if !IS_ENABLED(CONFIG_MMC_SH_MMCIF)
{ "A3SP", &sdhi1_device, },
#else
{ "A3SP", &sh_mmcif_device, },
#endif
{ "A3SP", &sdhi2_device, },
{ "A4R", &ceu_device, },
};
u32 srcr4;
struct clk *clk;
regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
/* External clock source */
clk_set_rate(&sh7372_dv_clki_clk, 27000000);
pinctrl_register_mappings(mackerel_pinctrl_map,
ARRAY_SIZE(mackerel_pinctrl_map));
sh7372_pinmux_init();
gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
/* FSI2 port A (ak4643) */
gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */
gpio_request(9, NULL);
gpio_request(10, NULL);
gpio_direction_none(GPIO_PORT9CR); /* FSIAOBT needs no direction */
gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */
intc_set_priority(IRQ_FSI, 3); /* irq priority FSI(3) > SMSC911X(2) */
/* FSI2 port B (HDMI) */
__raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
/* set SPU2 clock to 119.6 MHz */
clk = clk_get(NULL, "spu_clk");
if (!IS_ERR(clk)) {
clk_set_rate(clk, clk_round_rate(clk, 119600000));
clk_put(clk);
}
/* Keypad */
irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
/* Touchscreen */
irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
/* Accelerometer */
irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
/* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
srcr4 = __raw_readl(SRCR4);
__raw_writel(srcr4 | (1 << 13), SRCR4);
udelay(50);
__raw_writel(srcr4 & ~(1 << 13), SRCR4);
i2c_register_board_info(0, i2c0_devices,
ARRAY_SIZE(i2c0_devices));
i2c_register_board_info(1, i2c1_devices,
ARRAY_SIZE(i2c1_devices));
sh7372_add_standard_devices();
platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
rmobile_add_devices_to_domains(domain_devices,
ARRAY_SIZE(domain_devices));
hdmi_init_pm_clock();
sh7372_pm_init();
pm_clk_add(&fsi_device.dev, "spu2");
pm_clk_add(&hdmi_lcdc_device.dev, "hdmi");
}
static int __init devices_setup(void)
{
u16 sw = __raw_readw(SW4140); /* select camera, monitor */
struct clk *clk;
u16 fpga_out;
/* register board specific self-refresh code */
sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
SUSP_SH_RSTANDBY,
&ms7724se_sdram_enter_start,
&ms7724se_sdram_enter_end,
&ms7724se_sdram_leave_start,
&ms7724se_sdram_leave_end);
regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
/* Reset Release */
fpga_out = __raw_readw(FPGA_OUT);
/* bit4: NTSC_PDN, bit5: NTSC_RESET */
fpga_out &= ~((1 << 1) | /* LAN */
(1 << 4) | /* AK8813 PDN */
(1 << 5) | /* AK8813 RESET */
(1 << 6) | /* VIDEO DAC */
(1 << 7) | /* AK4643 */
(1 << 8) | /* IrDA */
(1 << 12) | /* USB0 */
(1 << 14)); /* RMII */
__raw_writew(fpga_out | (1 << 4), FPGA_OUT);
udelay(10);
/* AK8813 RESET */
__raw_writew(fpga_out | (1 << 5), FPGA_OUT);
udelay(10);
__raw_writew(fpga_out, FPGA_OUT);
/* turn on USB clocks, use external clock */
__raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
/* Let LED9 show STATUS2 */
gpio_request(GPIO_FN_STATUS2, NULL);
/* Lit LED10 show STATUS0 */
gpio_request(GPIO_FN_STATUS0, NULL);
/* Lit LED11 show PDSTATUS */
gpio_request(GPIO_FN_PDSTATUS, NULL);
/* enable USB0 port */
__raw_writew(0x0600, 0xa40501d4);
/* enable USB1 port */
__raw_writew(0x0600, 0xa4050192);
/* enable IRQ 0,1,2 */
gpio_request(GPIO_FN_INTC_IRQ0, NULL);
gpio_request(GPIO_FN_INTC_IRQ1, NULL);
gpio_request(GPIO_FN_INTC_IRQ2, NULL);
/* enable SCIFA3 */
gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
/* enable LCDC */
gpio_request(GPIO_FN_LCDD23, NULL);
gpio_request(GPIO_FN_LCDD22, NULL);
gpio_request(GPIO_FN_LCDD21, NULL);
gpio_request(GPIO_FN_LCDD20, NULL);
gpio_request(GPIO_FN_LCDD19, NULL);
gpio_request(GPIO_FN_LCDD18, NULL);
gpio_request(GPIO_FN_LCDD17, NULL);
gpio_request(GPIO_FN_LCDD16, NULL);
gpio_request(GPIO_FN_LCDD15, NULL);
gpio_request(GPIO_FN_LCDD14, NULL);
gpio_request(GPIO_FN_LCDD13, NULL);
gpio_request(GPIO_FN_LCDD12, NULL);
gpio_request(GPIO_FN_LCDD11, NULL);
gpio_request(GPIO_FN_LCDD10, NULL);
gpio_request(GPIO_FN_LCDD9, NULL);
gpio_request(GPIO_FN_LCDD8, NULL);
gpio_request(GPIO_FN_LCDD7, NULL);
gpio_request(GPIO_FN_LCDD6, NULL);
gpio_request(GPIO_FN_LCDD5, NULL);
gpio_request(GPIO_FN_LCDD4, NULL);
gpio_request(GPIO_FN_LCDD3, NULL);
gpio_request(GPIO_FN_LCDD2, NULL);
gpio_request(GPIO_FN_LCDD1, NULL);
gpio_request(GPIO_FN_LCDD0, NULL);
gpio_request(GPIO_FN_LCDDISP, NULL);
gpio_request(GPIO_FN_LCDHSYN, NULL);
gpio_request(GPIO_FN_LCDDCK, NULL);
gpio_request(GPIO_FN_LCDVSYN, NULL);
gpio_request(GPIO_FN_LCDDON, NULL);
gpio_request(GPIO_FN_LCDVEPWC, NULL);
gpio_request(GPIO_FN_LCDVCPWC, NULL);
gpio_request(GPIO_FN_LCDRD, NULL);
gpio_request(GPIO_FN_LCDLCLK, NULL);
__raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
/* enable CEU0 */
gpio_request(GPIO_FN_VIO0_D15, NULL);
gpio_request(GPIO_FN_VIO0_D14, NULL);
gpio_request(GPIO_FN_VIO0_D13, NULL);
gpio_request(GPIO_FN_VIO0_D12, NULL);
gpio_request(GPIO_FN_VIO0_D11, NULL);
gpio_request(GPIO_FN_VIO0_D10, NULL);
gpio_request(GPIO_FN_VIO0_D9, NULL);
gpio_request(GPIO_FN_VIO0_D8, NULL);
gpio_request(GPIO_FN_VIO0_D7, NULL);
gpio_request(GPIO_FN_VIO0_D6, NULL);
gpio_request(GPIO_FN_VIO0_D5, NULL);
gpio_request(GPIO_FN_VIO0_D4, NULL);
gpio_request(GPIO_FN_VIO0_D3, NULL);
gpio_request(GPIO_FN_VIO0_D2, NULL);
gpio_request(GPIO_FN_VIO0_D1, NULL);
gpio_request(GPIO_FN_VIO0_D0, NULL);
gpio_request(GPIO_FN_VIO0_VD, NULL);
gpio_request(GPIO_FN_VIO0_CLK, NULL);
gpio_request(GPIO_FN_VIO0_FLD, NULL);
gpio_request(GPIO_FN_VIO0_HD, NULL);
/* enable CEU1 */
gpio_request(GPIO_FN_VIO1_D7, NULL);
gpio_request(GPIO_FN_VIO1_D6, NULL);
gpio_request(GPIO_FN_VIO1_D5, NULL);
gpio_request(GPIO_FN_VIO1_D4, NULL);
gpio_request(GPIO_FN_VIO1_D3, NULL);
gpio_request(GPIO_FN_VIO1_D2, NULL);
gpio_request(GPIO_FN_VIO1_D1, NULL);
gpio_request(GPIO_FN_VIO1_D0, NULL);
gpio_request(GPIO_FN_VIO1_FLD, NULL);
gpio_request(GPIO_FN_VIO1_HD, NULL);
gpio_request(GPIO_FN_VIO1_VD, NULL);
gpio_request(GPIO_FN_VIO1_CLK, NULL);
/* KEYSC */
gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
gpio_request(GPIO_FN_KEYIN4, NULL);
gpio_request(GPIO_FN_KEYIN3, NULL);
gpio_request(GPIO_FN_KEYIN2, NULL);
gpio_request(GPIO_FN_KEYIN1, NULL);
gpio_request(GPIO_FN_KEYIN0, NULL);
gpio_request(GPIO_FN_KEYOUT3, NULL);
gpio_request(GPIO_FN_KEYOUT2, NULL);
gpio_request(GPIO_FN_KEYOUT1, NULL);
gpio_request(GPIO_FN_KEYOUT0, NULL);
/* enable FSI */
gpio_request(GPIO_FN_FSIMCKA, NULL);
gpio_request(GPIO_FN_FSIIASD, NULL);
gpio_request(GPIO_FN_FSIOASD, NULL);
gpio_request(GPIO_FN_FSIIABCK, NULL);
gpio_request(GPIO_FN_FSIIALRCK, NULL);
gpio_request(GPIO_FN_FSIOABCK, NULL);
gpio_request(GPIO_FN_FSIOALRCK, NULL);
gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
/* set SPU2 clock to 83.4 MHz */
clk = clk_get(NULL, "spu_clk");
if (!IS_ERR(clk)) {
clk_set_rate(clk, clk_round_rate(clk, 83333333));
clk_put(clk);
}
/* change parent of FSI A */
clk = clk_get(NULL, "fsia_clk");
if (!IS_ERR(clk)) {
/* 48kHz dummy clock was used to make sure 1/1 divide */
clk_set_rate(&sh7724_fsimcka_clk, 48000);
clk_set_parent(clk, &sh7724_fsimcka_clk);
clk_set_rate(clk, 48000);
clk_put(clk);
}
/* SDHI0 connected to cn7 */
gpio_request(GPIO_FN_SDHI0CD, NULL);
gpio_request(GPIO_FN_SDHI0WP, NULL);
gpio_request(GPIO_FN_SDHI0D3, NULL);
gpio_request(GPIO_FN_SDHI0D2, NULL);
gpio_request(GPIO_FN_SDHI0D1, NULL);
gpio_request(GPIO_FN_SDHI0D0, NULL);
gpio_request(GPIO_FN_SDHI0CMD, NULL);
gpio_request(GPIO_FN_SDHI0CLK, NULL);
/* SDHI1 connected to cn8 */
gpio_request(GPIO_FN_SDHI1CD, NULL);
gpio_request(GPIO_FN_SDHI1WP, NULL);
gpio_request(GPIO_FN_SDHI1D3, NULL);
gpio_request(GPIO_FN_SDHI1D2, NULL);
gpio_request(GPIO_FN_SDHI1D1, NULL);
gpio_request(GPIO_FN_SDHI1D0, NULL);
gpio_request(GPIO_FN_SDHI1CMD, NULL);
gpio_request(GPIO_FN_SDHI1CLK, NULL);
/* enable IrDA */
gpio_request(GPIO_FN_IRDA_OUT, NULL);
gpio_request(GPIO_FN_IRDA_IN, NULL);
/*
* enable SH-Eth
*
* please remove J33 pin from your board !!
*
* ms7724 board should not use GPIO_FN_LNKSTA pin
* So, This time PTX5 is set to input pin
*/
gpio_request(GPIO_FN_RMII_RXD0, NULL);
gpio_request(GPIO_FN_RMII_RXD1, NULL);
gpio_request(GPIO_FN_RMII_TXD0, NULL);
gpio_request(GPIO_FN_RMII_TXD1, NULL);
gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
gpio_request(GPIO_FN_RMII_TX_EN, NULL);
gpio_request(GPIO_FN_RMII_RX_ER, NULL);
gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
gpio_request(GPIO_FN_MDIO, NULL);
gpio_request(GPIO_FN_MDC, NULL);
gpio_request(GPIO_PTX5, NULL);
gpio_direction_input(GPIO_PTX5);
sh_eth_init();
if (sw & SW41_B) {
/* 720p */
lcdc_info.ch[0].lcd_modes = lcdc_720p_modes;
lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_720p_modes);
} else {
/* VGA */
lcdc_info.ch[0].lcd_modes = lcdc_vga_modes;
lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_vga_modes);
}
if (sw & SW41_A) {
/* Digital monitor */
lcdc_info.ch[0].interface_type = RGB18;
lcdc_info.ch[0].flags = 0;
} else {
/* Analog monitor */
lcdc_info.ch[0].interface_type = RGB24;
lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
}
/* VOU */
gpio_request(GPIO_FN_DV_D15, NULL);
gpio_request(GPIO_FN_DV_D14, NULL);
gpio_request(GPIO_FN_DV_D13, NULL);
gpio_request(GPIO_FN_DV_D12, NULL);
gpio_request(GPIO_FN_DV_D11, NULL);
gpio_request(GPIO_FN_DV_D10, NULL);
gpio_request(GPIO_FN_DV_D9, NULL);
gpio_request(GPIO_FN_DV_D8, NULL);
gpio_request(GPIO_FN_DV_CLKI, NULL);
gpio_request(GPIO_FN_DV_CLK, NULL);
gpio_request(GPIO_FN_DV_VSYNC, NULL);
gpio_request(GPIO_FN_DV_HSYNC, NULL);
/* Initialize CEU platform devices separately to map memory first */
device_initialize(&ms7724se_ceu_devices[0]->dev);
arch_setup_pdev_archdata(ms7724se_ceu_devices[0]);
dma_declare_coherent_memory(&ms7724se_ceu_devices[0]->dev,
ceu0_dma_membase, ceu0_dma_membase,
ceu0_dma_membase +
CEU_BUFFER_MEMORY_SIZE - 1);
platform_device_add(ms7724se_ceu_devices[0]);
device_initialize(&ms7724se_ceu_devices[1]->dev);
arch_setup_pdev_archdata(ms7724se_ceu_devices[1]);
dma_declare_coherent_memory(&ms7724se_ceu_devices[1]->dev,
ceu1_dma_membase, ceu1_dma_membase,
ceu1_dma_membase +
CEU_BUFFER_MEMORY_SIZE - 1);
platform_device_add(ms7724se_ceu_devices[1]);
return platform_add_devices(ms7724se_devices,
ARRAY_SIZE(ms7724se_devices));
}
static int __init mxg_devices_setup(void)
{
return platform_add_devices(mxg_devices,
ARRAY_SIZE(mxg_devices));
}
static int __init pnx8550_platform_init(void)
{
return platform_add_devices(pnx8550_platform_devices,
ARRAY_SIZE(pnx8550_platform_devices));
}
static void __init ap4evb_init(void)
{
struct pm_domain_device domain_devices[] = {
{ "A4LC", &lcdc1_device, },
{ "A4LC", &lcdc_device, },
{ "A4MP", &fsi_device, },
{ "A3SP", &sh_mmcif_device, },
{ "A3SP", &sdhi0_device, },
{ "A3SP", &sdhi1_device, },
{ "A4R", &ceu_device, },
};
u32 srcr4;
struct clk *clk;
regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
/* External clock source */
clk_set_rate(&sh7372_dv_clki_clk, 27000000);
sh7372_pinmux_init();
/* enable SCIFA0 */
gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
/* enable SMSC911X */
gpio_request(GPIO_FN_CS5A, NULL);
gpio_request(GPIO_FN_IRQ6_39, NULL);
/* enable Debug switch (S6) */
gpio_request_one(GPIO_PORT32, GPIOF_IN | GPIOF_EXPORT, NULL);
gpio_request_one(GPIO_PORT33, GPIOF_IN | GPIOF_EXPORT, NULL);
gpio_request_one(GPIO_PORT34, GPIOF_IN | GPIOF_EXPORT, NULL);
gpio_request_one(GPIO_PORT35, GPIOF_IN | GPIOF_EXPORT, NULL);
/* SDHI0 */
gpio_request(GPIO_FN_SDHICD0, NULL);
gpio_request(GPIO_FN_SDHIWP0, NULL);
gpio_request(GPIO_FN_SDHICMD0, NULL);
gpio_request(GPIO_FN_SDHICLK0, NULL);
gpio_request(GPIO_FN_SDHID0_3, NULL);
gpio_request(GPIO_FN_SDHID0_2, NULL);
gpio_request(GPIO_FN_SDHID0_1, NULL);
gpio_request(GPIO_FN_SDHID0_0, NULL);
/* SDHI1 */
gpio_request(GPIO_FN_SDHICMD1, NULL);
gpio_request(GPIO_FN_SDHICLK1, NULL);
gpio_request(GPIO_FN_SDHID1_3, NULL);
gpio_request(GPIO_FN_SDHID1_2, NULL);
gpio_request(GPIO_FN_SDHID1_1, NULL);
gpio_request(GPIO_FN_SDHID1_0, NULL);
/* MMCIF */
gpio_request(GPIO_FN_MMCD0_0, NULL);
gpio_request(GPIO_FN_MMCD0_1, NULL);
gpio_request(GPIO_FN_MMCD0_2, NULL);
gpio_request(GPIO_FN_MMCD0_3, NULL);
gpio_request(GPIO_FN_MMCD0_4, NULL);
gpio_request(GPIO_FN_MMCD0_5, NULL);
gpio_request(GPIO_FN_MMCD0_6, NULL);
gpio_request(GPIO_FN_MMCD0_7, NULL);
gpio_request(GPIO_FN_MMCCMD0, NULL);
gpio_request(GPIO_FN_MMCCLK0, NULL);
/* USB enable */
gpio_request(GPIO_FN_VBUS0_1, NULL);
gpio_request(GPIO_FN_IDIN_1_18, NULL);
gpio_request(GPIO_FN_PWEN_1_115, NULL);
gpio_request(GPIO_FN_OVCN_1_114, NULL);
gpio_request(GPIO_FN_EXTLP_1, NULL);
gpio_request(GPIO_FN_OVCN2_1, NULL);
/* setup USB phy */
__raw_writew(0x8a0a, IOMEM(0xE6058130)); /* USBCR4 */
/* enable FSI2 port A (ak4643) */
gpio_request(GPIO_FN_FSIAIBT, NULL);
gpio_request(GPIO_FN_FSIAILR, NULL);
gpio_request(GPIO_FN_FSIAISLD, NULL);
gpio_request(GPIO_FN_FSIAOSLD, NULL);
gpio_request_one(GPIO_PORT161, GPIOF_OUT_INIT_LOW, NULL); /* slave */
gpio_request(GPIO_PORT9, NULL);
gpio_request(GPIO_PORT10, NULL);
gpio_direction_none(GPIO_PORT9CR); /* FSIAOBT needs no direction */
gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */
/* card detect pin for MMC slot (CN7) */
gpio_request_one(GPIO_PORT41, GPIOF_IN, NULL);
/* setup FSI2 port B (HDMI) */
gpio_request(GPIO_FN_FSIBCK, NULL);
__raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
/* set SPU2 clock to 119.6 MHz */
clk = clk_get(NULL, "spu_clk");
if (!IS_ERR(clk)) {
clk_set_rate(clk, clk_round_rate(clk, 119600000));
clk_put(clk);
}
/*
* set irq priority, to avoid sound chopping
* when NFS rootfs is used
* FSI(3) > SMSC911X(2)
*/
intc_set_priority(IRQ_FSI, 3);
i2c_register_board_info(0, i2c0_devices,
ARRAY_SIZE(i2c0_devices));
i2c_register_board_info(1, i2c1_devices,
ARRAY_SIZE(i2c1_devices));
#ifdef CONFIG_AP4EVB_QHD
/*
* For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
* IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
*/
/* enable KEYSC */
gpio_request(GPIO_FN_KEYOUT0, NULL);
gpio_request(GPIO_FN_KEYOUT1, NULL);
gpio_request(GPIO_FN_KEYOUT2, NULL);
gpio_request(GPIO_FN_KEYOUT3, NULL);
gpio_request(GPIO_FN_KEYOUT4, NULL);
gpio_request(GPIO_FN_KEYIN0_136, NULL);
gpio_request(GPIO_FN_KEYIN1_135, NULL);
gpio_request(GPIO_FN_KEYIN2_134, NULL);
gpio_request(GPIO_FN_KEYIN3_133, NULL);
gpio_request(GPIO_FN_KEYIN4, NULL);
/* enable TouchScreen */
irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
tsc_device.irq = IRQ28;
i2c_register_board_info(1, &tsc_device, 1);
/* LCDC0 */
lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
lcdc_info.ch[0].interface_type = RGB24;
lcdc_info.ch[0].clock_divider = 1;
lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
lcdc_info.ch[0].panel_cfg.width = 44;
lcdc_info.ch[0].panel_cfg.height = 79;
platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
#else
/*
* For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
* IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
*/
gpio_request(GPIO_FN_LCDD17, NULL);
gpio_request(GPIO_FN_LCDD16, NULL);
gpio_request(GPIO_FN_LCDD15, NULL);
gpio_request(GPIO_FN_LCDD14, NULL);
gpio_request(GPIO_FN_LCDD13, NULL);
gpio_request(GPIO_FN_LCDD12, NULL);
gpio_request(GPIO_FN_LCDD11, NULL);
gpio_request(GPIO_FN_LCDD10, NULL);
gpio_request(GPIO_FN_LCDD9, NULL);
gpio_request(GPIO_FN_LCDD8, NULL);
gpio_request(GPIO_FN_LCDD7, NULL);
gpio_request(GPIO_FN_LCDD6, NULL);
gpio_request(GPIO_FN_LCDD5, NULL);
gpio_request(GPIO_FN_LCDD4, NULL);
gpio_request(GPIO_FN_LCDD3, NULL);
gpio_request(GPIO_FN_LCDD2, NULL);
gpio_request(GPIO_FN_LCDD1, NULL);
gpio_request(GPIO_FN_LCDD0, NULL);
gpio_request(GPIO_FN_LCDDISP, NULL);
gpio_request(GPIO_FN_LCDDCK, NULL);
gpio_request_one(GPIO_PORT189, GPIOF_OUT_INIT_HIGH, NULL); /* backlight */
gpio_request_one(GPIO_PORT151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
lcdc_info.clock_source = LCDC_CLK_BUS;
lcdc_info.ch[0].interface_type = RGB18;
lcdc_info.ch[0].clock_divider = 3;
lcdc_info.ch[0].flags = 0;
lcdc_info.ch[0].panel_cfg.width = 152;
lcdc_info.ch[0].panel_cfg.height = 91;
/* enable TouchScreen */
irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
tsc_device.irq = IRQ7;
i2c_register_board_info(0, &tsc_device, 1);
#endif /* CONFIG_AP4EVB_QHD */
/* CEU */
/*
* TODO: reserve memory for V4L2 DMA buffers, when a suitable API
* becomes available
*/
/* MIPI-CSI stuff */
gpio_request(GPIO_FN_VIO_CKO, NULL);
clk = clk_get(NULL, "vck1_clk");
if (!IS_ERR(clk)) {
clk_set_rate(clk, clk_round_rate(clk, 13000000));
clk_enable(clk);
clk_put(clk);
}
sh7372_add_standard_devices();
/* HDMI */
gpio_request(GPIO_FN_HDMI_HPD, NULL);
gpio_request(GPIO_FN_HDMI_CEC, NULL);
/* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
#define SRCR4 IOMEM(0xe61580bc)
srcr4 = __raw_readl(SRCR4);
__raw_writel(srcr4 | (1 << 13), SRCR4);
udelay(50);
__raw_writel(srcr4 & ~(1 << 13), SRCR4);
platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
rmobile_add_devices_to_domains(domain_devices,
ARRAY_SIZE(domain_devices));
hdmi_init_pm_clock();
sh7372_pm_init();
pm_clk_add(&fsi_device.dev, "spu2");
pm_clk_add(&lcdc1_device.dev, "hdmi");
}
int __init db1200_dev_setup(void)
{
unsigned long pfc;
unsigned short sw;
int swapped, bid;
struct clk *c;
bid = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));
if ((bid == BCSR_WHOAMI_PB1200_DDR1) ||
(bid == BCSR_WHOAMI_PB1200_DDR2)) {
if (pb1200_res_fixup())
return -ENODEV;
}
/* GPIO7 is low-level triggered CPLD cascade */
irq_set_irq_type(AU1200_GPIO7_INT, IRQ_TYPE_LEVEL_LOW);
bcsr_init_irq(DB1200_INT_BEGIN, DB1200_INT_END, AU1200_GPIO7_INT);
/* SMBus/SPI on PSC0, Audio on PSC1 */
pfc = alchemy_rdsys(AU1000_SYS_PINFUNC);
pfc &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
pfc &= ~(SYS_PINFUNC_P1A | SYS_PINFUNC_P1B | SYS_PINFUNC_FS3);
pfc |= SYS_PINFUNC_P1C; /* SPI is configured later */
alchemy_wrsys(pfc, AU1000_SYS_PINFUNC);
/* get 50MHz for I2C driver on PSC0 */
c = clk_get(NULL, "psc0_intclk");
if (!IS_ERR(c)) {
pfc = clk_round_rate(c, 50000000);
if ((pfc < 1) || (abs(50000000 - pfc) > 2500000))
pr_warn("DB1200: cant get I2C close to 50MHz\n");
else
clk_set_rate(c, pfc);
clk_prepare_enable(c);
clk_put(c);
}
/* insert/eject pairs: one of both is always screaming. To avoid
* issues they must not be automatically enabled when initially
* requested.
*/
irq_set_status_flags(DB1200_SD0_INSERT_INT, IRQ_NOAUTOEN);
irq_set_status_flags(DB1200_SD0_EJECT_INT, IRQ_NOAUTOEN);
irq_set_status_flags(DB1200_PC0_INSERT_INT, IRQ_NOAUTOEN);
irq_set_status_flags(DB1200_PC0_EJECT_INT, IRQ_NOAUTOEN);
irq_set_status_flags(DB1200_PC1_INSERT_INT, IRQ_NOAUTOEN);
irq_set_status_flags(DB1200_PC1_EJECT_INT, IRQ_NOAUTOEN);
i2c_register_board_info(0, db1200_i2c_devs,
ARRAY_SIZE(db1200_i2c_devs));
spi_register_board_info(db1200_spi_devs,
ARRAY_SIZE(db1200_i2c_devs));
/* SWITCHES: S6.8 I2C/SPI selector (OFF=I2C ON=SPI)
* S6.7 AC97/I2S selector (OFF=AC97 ON=I2S)
* or S12 on the PB1200.
*/
/* NOTE: GPIO215 controls OTG VBUS supply. In SPI mode however
* this pin is claimed by PSC0 (unused though, but pinmux doesn't
* allow to free it without crippling the SPI interface).
* As a result, in SPI mode, OTG simply won't work (PSC0 uses
* it as an input pin which is pulled high on the boards).
*/
pfc = alchemy_rdsys(AU1000_SYS_PINFUNC) & ~SYS_PINFUNC_P0A;
/* switch off OTG VBUS supply */
gpio_request(215, "otg-vbus");
gpio_direction_output(215, 1);
printk(KERN_INFO "%s device configuration:\n", get_system_type());
sw = bcsr_read(BCSR_SWITCHES);
if (sw & BCSR_SWITCHES_DIP_8) {
db1200_devs[0] = &db1200_i2c_dev;
bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
pfc |= (2 << 17); /* GPIO2 block owns GPIO215 */
printk(KERN_INFO " S6.8 OFF: PSC0 mode I2C\n");
printk(KERN_INFO " OTG port VBUS supply available!\n");
} else {
db1200_devs[0] = &db1200_spi_dev;
bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_PSC0MUX);
pfc |= (1 << 17); /* PSC0 owns GPIO215 */
printk(KERN_INFO " S6.8 ON : PSC0 mode SPI\n");
printk(KERN_INFO " OTG port VBUS supply disabled\n");
}
alchemy_wrsys(pfc, AU1000_SYS_PINFUNC);
/* Audio: DIP7 selects I2S(0)/AC97(1), but need I2C for I2S!
* so: DIP7=1 || DIP8=0 => AC97, DIP7=0 && DIP8=1 => I2S
*/
sw &= BCSR_SWITCHES_DIP_8 | BCSR_SWITCHES_DIP_7;
if (sw == BCSR_SWITCHES_DIP_8) {
bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_PSC1MUX);
db1200_audio_dev.name = "au1xpsc_i2s";
db1200_sound_dev.name = "db1200-i2s";
printk(KERN_INFO " S6.7 ON : PSC1 mode I2S\n");
} else {
bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC1MUX, 0);
db1200_audio_dev.name = "au1xpsc_ac97";
db1200_sound_dev.name = "db1200-ac97";
printk(KERN_INFO " S6.7 OFF: PSC1 mode AC97\n");
}
/* Audio PSC clock is supplied externally. (FIXME: platdata!!) */
__raw_writel(PSC_SEL_CLK_SERCLK,
(void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
wmb();
db1x_register_pcmcia_socket(
AU1000_PCMCIA_ATTR_PHYS_ADDR,
AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
AU1000_PCMCIA_MEM_PHYS_ADDR,
AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
AU1000_PCMCIA_IO_PHYS_ADDR,
AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
DB1200_PC0_INT, DB1200_PC0_INSERT_INT,
/*DB1200_PC0_STSCHG_INT*/0, DB1200_PC0_EJECT_INT, 0);
db1x_register_pcmcia_socket(
AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004000000,
AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1,
AU1000_PCMCIA_IO_PHYS_ADDR + 0x004000000,
AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1,
DB1200_PC1_INT, DB1200_PC1_INSERT_INT,
/*DB1200_PC1_STSCHG_INT*/0, DB1200_PC1_EJECT_INT, 1);
swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT;
db1x_register_norflash(64 << 20, 2, swapped);
platform_add_devices(db1200_devs, ARRAY_SIZE(db1200_devs));
/* PB1200 is a DB1200 with a 2nd MMC and Camera connector */
if ((bid == BCSR_WHOAMI_PB1200_DDR1) ||
(bid == BCSR_WHOAMI_PB1200_DDR2))
platform_add_devices(pb1200_devs, ARRAY_SIZE(pb1200_devs));
return 0;
}
void __init msm_add_devices(void)
{
platform_add_devices(devices, ARRAY_SIZE(devices));
}
void __init msm_fb_add_devices(void)
{
int rc = 0;
msm7x27a_set_display_params(prim_panel_name);
if (disable_splash)
mdp_pdata.cont_splash_enabled = 0x0;
platform_add_devices(msm_fb_devices,
ARRAY_SIZE(msm_fb_devices));
#if 0 // Qualcomm Target setting
if (machine_is_msm7627a_qrd1())
platform_add_devices(qrd_fb_devices,
ARRAY_SIZE(qrd_fb_devices));
else if (machine_is_msm7627a_evb() || machine_is_msm8625_evb()
|| machine_is_msm8625_evt()) {
mipi_NT35510_pdata.bl_lock = 1;
mipi_NT35516_pdata.bl_lock = 1;
if (disable_splash)
mdp_pdata.cont_splash_enabled = 0x0;
platform_add_devices(evb_fb_devices,
ARRAY_SIZE(evb_fb_devices));
} else if (machine_is_msm7627a_qrd3() || machine_is_msm8625_qrd7()) {
sku3_lcdc_lcd_camera_power_init();
mdp_pdata.cont_splash_enabled = 0x0;
platform_add_devices(qrd3_fb_devices,
ARRAY_SIZE(qrd3_fb_devices));
} else {
mdp_pdata.cont_splash_enabled = 0x0;
platform_add_devices(msm_fb_devices,
ARRAY_SIZE(msm_fb_devices));
}
#endif
msm_fb_register_device("mdp", &mdp_pdata);
#ifdef CONFIG_FB_MSM_LCDC
// if (machine_is_msm7625a_surf() || machine_is_msm7x27a_surf() ||
// machine_is_msm8625_surf() || machine_is_msm7627a_qrd3()
// || machine_is_msm8625_qrd7())
msm_fb_register_device("lcdc", &lcdc_pdata);
#endif
#ifdef CONFIG_FB_MSM_MIPI_DSI
msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
#endif
if (machine_is_msm7627a_evb() || machine_is_msm8625_evb()
|| machine_is_msm8625_evt()) {
gpio_reg_2p85v = regulator_get(&mipi_dsi_device.dev,
"lcd_vdd");
if (IS_ERR(gpio_reg_2p85v))
pr_err("%s:ext_2p85v regulator get failed", __func__);
gpio_reg_1p8v = regulator_get(&mipi_dsi_device.dev,
"lcd_vddi");
if (IS_ERR(gpio_reg_1p8v))
pr_err("%s:ext_1p8v regulator get failed", __func__);
if (mdp_pdata.cont_splash_enabled) {
/*Enable EXT_2.85 and 1.8 regulators*/
rc = regulator_enable(gpio_reg_2p85v);
if (rc < 0)
pr_err("%s: reg enable failed\n", __func__);
rc = regulator_enable(gpio_reg_1p8v);
if (rc < 0)
pr_err("%s: reg enable failed\n", __func__);
}
}
}
static void __init em_x270_userspace_consumers_init(void)
{
platform_add_devices(ARRAY_AND_SIZE(em_x270_userspace_consumers));
}
/* LGE_CHANGE_E: 2012/11/2 [email protected] U0 Flash Porting */ void __init msm7627a_camera_init(void) { #ifndef CONFIG_MSM_CAMERA_V4L2 int rc; #endif pr_debug("msm7627a_camera_init Entered\n"); if (machine_is_msm7627a_qrd3() || machine_is_msm8625_qrd7()) { #ifdef CONFIG_OV7692 ov7692_cam_req_gpio[0].gpio = GPIO_SKU7_CAM_VGA_SHDN; ov7692_cam_gpio_set_tbl[0].gpio = GPIO_SKU7_CAM_VGA_SHDN; ov7692_cam_gpio_set_tbl[1].gpio = GPIO_SKU7_CAM_VGA_SHDN; msm_camera_sensor_ov5647_data.sensor_pwd = GPIO_SKU7_CAM_5MP_SHDN_N; msm_camera_sensor_ov5647_data.sensor_reset = GPIO_SKU7_CAM_5MP_CAMIF_RESET; #endif } /* LCD and camera power (VREG & LDO) init */ if (machine_is_msm7627a_evb() || machine_is_msm8625_evb() || machine_is_msm8625_evt() || machine_is_msm7627a_qrd3() || machine_is_msm8625_qrd7()) { #ifndef CONFIG_MSM_CAMERA_V4L2 lcd_camera_power_init(); #endif #ifdef CONFIG_OV5647 evb_camera_gpio_cfg(); #endif } #ifndef CONFIG_MSM_CAMERA_V4L2 if (machine_is_msm7627a_qrd1()) { qrd1_camera_gpio_cfg(); platform_add_devices(camera_devices_qrd, ARRAY_SIZE(camera_devices_qrd)); } else if (machine_is_msm7627a_evb() || machine_is_msm8625_evb() || machine_is_msm8625_evt() || machine_is_msm7627a_qrd3() || machine_is_msm8625_qrd7()) { platform_add_devices(camera_devices_evb, ARRAY_SIZE(camera_devices_evb)); } else if (machine_is_msm7627a_qrd3()) return; else platform_add_devices(camera_devices_msm, ARRAY_SIZE(camera_devices_msm)); #endif /* LGE_CHANGE_S: 2012/11/2 [email protected] U0 Camera Bring Up */ #ifndef CONFIG_MACH_LGE if (!machine_is_msm7627a_qrd1() || !machine_is_msm7627a_evb() || !machine_is_msm8625_evb() || !machine_is_msm8625_evt() || !machine_is_msm7627a_qrd3() || !machine_is_msm8625_qrd7()) register_i2c_devices(); #endif /* LGE_CHANGE_E: 2012/11/2 [email protected] U0 Camera Bring Up */ #ifndef CONFIG_MSM_CAMERA_V4L2 rc = regulator_bulk_get(NULL, ARRAY_SIZE(regs_camera), regs_camera); if (rc) { pr_err("%s: could not get regulators: %d\n", __func__, rc); return; } rc = regulator_bulk_set_voltage(ARRAY_SIZE(regs_camera), regs_camera); if (rc) { pr_err("%s: could not set voltages: %d\n", __func__, rc); return; } #endif #if defined(CONFIG_MSM_CAMERA_V4L2) msm7x27a_init_cam(); #endif #ifndef CONFIG_MSM_CAMERA_V4L2 if (machine_is_msm7627a_qrd1()) { i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID, i2c_camera_devices_qrd, ARRAY_SIZE(i2c_camera_devices_qrd)); } else if (machine_is_msm7627a_evb() || machine_is_msm8625_evb() || machine_is_msm8625_evt() || machine_is_msm7627a_qrd3() || machine_is_msm8625_qrd7()) { pr_debug("machine_is_msm7627a_evb i2c_register_board_info\n"); i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID, i2c_camera_devices_evb, ARRAY_SIZE(i2c_camera_devices_evb)); } else #endif pr_debug("i2c_register_board_info\n"); i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID, i2c_camera_devices, ARRAY_SIZE(i2c_camera_devices)); /* LGE_CHANGE_S: 2012/11/2 [email protected] U0 Camera Bring Up */ #ifdef CONFIG_LEDS_AS364X lge_add_gpio_i2c_device(lge_init_i2c_camera); #endif /* LGE_CHANGE_E: 2012/11/2 [email protected] U0 Camera Bring Up */ }
static int __init rts7751r2d_devices_setup(void)
{
return platform_add_devices(rts7751r2d_devices,
ARRAY_SIZE(rts7751r2d_devices));
}
static int __init sa1100_init(void)
{
pm_power_off = sa1100_power_off;
return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
}
static void __init osk_mistral_init(void)
{
/* NOTE: we could actually tell if there's a Mistral board
* attached, e.g. by trying to read something from the ads7846.
* But this arch_init() code is too early for that, since we
* can't talk to the ads or even the i2c eeprom.
*/
/* parallel camera interface */
omap_cfg_reg(J15_1610_CAM_LCLK);
omap_cfg_reg(J18_1610_CAM_D7);
omap_cfg_reg(J19_1610_CAM_D6);
omap_cfg_reg(J14_1610_CAM_D5);
omap_cfg_reg(K18_1610_CAM_D4);
omap_cfg_reg(K19_1610_CAM_D3);
omap_cfg_reg(K15_1610_CAM_D2);
omap_cfg_reg(K14_1610_CAM_D1);
omap_cfg_reg(L19_1610_CAM_D0);
omap_cfg_reg(L18_1610_CAM_VS);
omap_cfg_reg(L15_1610_CAM_HS);
omap_cfg_reg(M19_1610_CAM_RSTZ);
omap_cfg_reg(Y15_1610_CAM_OUTCLK);
/* serial camera interface */
omap_cfg_reg(H19_1610_CAM_EXCLK);
omap_cfg_reg(W13_1610_CCP_CLKM);
omap_cfg_reg(Y12_1610_CCP_CLKP);
/* CCP_DATAM CONFLICTS WITH UART1.TX (and serial console) */
/* omap_cfg_reg(Y14_1610_CCP_DATAM); */
omap_cfg_reg(W14_1610_CCP_DATAP);
/* CAM_PWDN */
if (gpio_request(11, "cam_pwdn") == 0) {
omap_cfg_reg(N20_1610_GPIO11);
gpio_direction_output(11, 0);
} else
pr_debug("OSK+Mistral: CAM_PWDN is awol\n");
/* omap_cfg_reg(P19_1610_GPIO6); */ /* BUSY */
gpio_request(6, "ts_busy");
gpio_direction_input(6);
omap_cfg_reg(P20_1610_GPIO4); /* PENIRQ */
gpio_request(4, "ts_int");
gpio_direction_input(4);
set_irq_type(OMAP_GPIO_IRQ(4), IRQT_FALLING);
spi_register_board_info(mistral_boardinfo,
ARRAY_SIZE(mistral_boardinfo));
/* the sideways button (SW1) is for use as a "wakeup" button */
omap_cfg_reg(N15_1610_MPUIO2);
if (gpio_request(OMAP_MPUIO(2), "wakeup") == 0) {
int ret = 0;
gpio_direction_input(OMAP_MPUIO(2));
set_irq_type(OMAP_GPIO_IRQ(OMAP_MPUIO(2)), IRQT_RISING);
#ifdef CONFIG_PM
/* share the IRQ in case someone wants to use the
* button for more than wakeup from system sleep.
*/
ret = request_irq(OMAP_GPIO_IRQ(OMAP_MPUIO(2)),
&osk_mistral_wake_interrupt,
IRQF_SHARED, "mistral_wakeup",
&osk_mistral_wake_interrupt);
if (ret != 0) {
gpio_free(OMAP_MPUIO(2));
printk(KERN_ERR "OSK+Mistral: no wakeup irq, %d?\n",
ret);
} else
enable_irq_wake(OMAP_GPIO_IRQ(OMAP_MPUIO(2)));
#endif
} else
printk(KERN_ERR "OSK+Mistral: wakeup button is awol\n");
/* LCD: backlight, and power; power controls other devices on the
* board, like the touchscreen, EEPROM, and wakeup (!) switch.
*/
omap_cfg_reg(PWL);
if (gpio_request(2, "lcd_pwr") == 0)
gpio_direction_output(2, 1);
platform_add_devices(mistral_devices, ARRAY_SIZE(mistral_devices));
}
int __init db1000_dev_setup(void)
{
int board = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));
int c0, c1, d0, d1, s0, s1, flashsize = 32, twosocks = 1;
unsigned long pfc;
struct clk *c, *p;
if (board == BCSR_WHOAMI_DB1500) {
c0 = AU1500_GPIO2_INT;
c1 = AU1500_GPIO5_INT;
d0 = AU1500_GPIO0_INT;
d1 = AU1500_GPIO3_INT;
s0 = AU1500_GPIO1_INT;
s1 = AU1500_GPIO4_INT;
} else if (board == BCSR_WHOAMI_DB1100) {
c0 = AU1100_GPIO2_INT;
c1 = AU1100_GPIO5_INT;
d0 = AU1100_GPIO0_INT;
d1 = AU1100_GPIO3_INT;
s0 = AU1100_GPIO1_INT;
s1 = AU1100_GPIO4_INT;
gpio_request(19, "sd0_cd");
gpio_request(20, "sd1_cd");
gpio_direction_input(19); /* sd0 cd# */
gpio_direction_input(20); /* sd1 cd# */
/* spi_gpio on SSI0 pins */
pfc = alchemy_rdsys(AU1000_SYS_PINFUNC);
pfc |= (1 << 0); /* SSI0 pins as GPIOs */
alchemy_wrsys(pfc, AU1000_SYS_PINFUNC);
spi_register_board_info(db1100_spi_info,
ARRAY_SIZE(db1100_spi_info));
/* link LCD clock to AUXPLL */
p = clk_get(NULL, "auxpll_clk");
c = clk_get(NULL, "lcd_intclk");
if (!IS_ERR(c) && !IS_ERR(p)) {
clk_set_parent(c, p);
clk_set_rate(c, clk_get_rate(p));
}
if (!IS_ERR(c))
clk_put(c);
if (!IS_ERR(p))
clk_put(p);
platform_add_devices(db1100_devs, ARRAY_SIZE(db1100_devs));
platform_device_register(&db1100_spi_dev);
} else if (board == BCSR_WHOAMI_DB1000) {
c0 = AU1000_GPIO2_INT;
c1 = AU1000_GPIO5_INT;
d0 = AU1000_GPIO0_INT;
d1 = AU1000_GPIO3_INT;
s0 = AU1000_GPIO1_INT;
s1 = AU1000_GPIO4_INT;
platform_add_devices(db1000_devs, ARRAY_SIZE(db1000_devs));
} else if ((board == BCSR_WHOAMI_PB1500) ||
(board == BCSR_WHOAMI_PB1500R2)) {
c0 = AU1500_GPIO203_INT;
d0 = AU1500_GPIO201_INT;
s0 = AU1500_GPIO202_INT;
twosocks = 0;
flashsize = 64;
/* RTC and daughtercard irqs */
irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_LOW);
irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW);
/* EPSON S1D13806 0x1b000000
* SRAM 1MB/2MB 0x1a000000
* DS1693 RTC 0x0c000000
*/
} else if (board == BCSR_WHOAMI_PB1100) {
c0 = AU1100_GPIO11_INT;
d0 = AU1100_GPIO9_INT;
s0 = AU1100_GPIO10_INT;
twosocks = 0;
flashsize = 64;
/* pendown, rtc, daughtercard irqs */
irq_set_irq_type(AU1100_GPIO8_INT, IRQ_TYPE_LEVEL_LOW);
irq_set_irq_type(AU1100_GPIO12_INT, IRQ_TYPE_LEVEL_LOW);
irq_set_irq_type(AU1100_GPIO13_INT, IRQ_TYPE_LEVEL_LOW);
/* EPSON S1D13806 0x1b000000
* SRAM 1MB/2MB 0x1a000000
* DiskOnChip 0x0d000000
* DS1693 RTC 0x0c000000
*/
platform_add_devices(db1100_devs, ARRAY_SIZE(db1100_devs));
} else
return 0; /* unknown board, no further dev setup to do */
irq_set_irq_type(d0, IRQ_TYPE_EDGE_BOTH);
irq_set_irq_type(c0, IRQ_TYPE_LEVEL_LOW);
irq_set_irq_type(s0, IRQ_TYPE_LEVEL_LOW);
db1x_register_pcmcia_socket(
AU1000_PCMCIA_ATTR_PHYS_ADDR,
AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
AU1000_PCMCIA_MEM_PHYS_ADDR,
AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
AU1000_PCMCIA_IO_PHYS_ADDR,
AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
c0, d0, /*s0*/0, 0, 0);
if (twosocks) {
irq_set_irq_type(d1, IRQ_TYPE_EDGE_BOTH);
irq_set_irq_type(c1, IRQ_TYPE_LEVEL_LOW);
irq_set_irq_type(s1, IRQ_TYPE_LEVEL_LOW);
db1x_register_pcmcia_socket(
AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004000000,
AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1,
AU1000_PCMCIA_IO_PHYS_ADDR + 0x004000000,
AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1,
c1, d1, /*s1*/0, 0, 1);
}
platform_add_devices(db1x00_devs, ARRAY_SIZE(db1x00_devs));
db1x_register_norflash(flashsize << 20, 4 /* 32bit */, F_SWAPPED);
return 0;
}
static void __init htcleo_init(void)
{
#ifdef CONFIG_HTCLEO_BLINK_AT_BOOT
volatile unsigned *bank6_in, *bank6_out;
#endif
printk("htcleo_init()\n");
msm_hw_reset_hook = htcleo_reset;
do_grp_reset();
do_sdc1_reset();
msm_acpu_clock_init(&htcleo_clock_data);
perflock_init(&htcleo_perflock_data);
#if defined(CONFIG_MSM_SERIAL_DEBUGGER)
msm_serial_debug_init(MSM_UART1_PHYS, INT_UART1,
&msm_device_uart1.dev, 1, MSM_GPIO_TO_INT(139));
#endif
init_dex_comm();
#ifdef CONFIG_SERIAL_MSM_HS
msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
msm_device_uart_dm1.name = "msm_serial_hs"; /* for bcm */
msm_device_uart_dm1.resource[3].end = 6;
#endif
config_gpio_table(bt_gpio_table, ARRAY_SIZE(bt_gpio_table));
parse_tag_bdaddr();
bt_export_bd_address();
htcleo_audio_init();
msm_device_i2c_init();
/* set the gpu power rail to manual mode so clk en/dis will not
* turn off gpu power, and hang it on resume */
htcleo_kgsl_power_rail_mode(0);
htcleo_kgsl_power(false);
mdelay(100);
htcleo_kgsl_power(true);
platform_add_devices(devices, ARRAY_SIZE(devices));
htcleo_init_panel();
i2c_register_board_info(0, base_i2c_devices, ARRAY_SIZE(base_i2c_devices));
#ifdef CONFIG_USB_ANDROID
htcleo_add_usb_devices();
#endif
htcleo_init_mmc(0);
platform_device_register(&htcleo_timed_gpios);
/* Blink the camera LED shortly to show that we're alive! */
#ifdef CONFIG_HTCLEO_BLINK_AT_BOOT
bank6_in = (unsigned int*)(MSM_GPIO1_BASE + 0x0864);
bank6_out = (unsigned int*)(MSM_GPIO1_BASE + 0x0814);
*bank6_out = *bank6_in ^ 0x200000;
mdelay(50);
*bank6_out = *bank6_in | 0x200000;
mdelay(200);
#endif
}
static int __init arch_setup(void)
{
struct clk *clk;
/* register board specific self-refresh code */
sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
SUSP_SH_RSTANDBY,
&ecovec24_sdram_enter_start,
&ecovec24_sdram_enter_end,
&ecovec24_sdram_leave_start,
&ecovec24_sdram_leave_end);
/* enable STATUS0, STATUS2 and PDSTATUS */
gpio_request(GPIO_FN_STATUS0, NULL);
gpio_request(GPIO_FN_STATUS2, NULL);
gpio_request(GPIO_FN_PDSTATUS, NULL);
/* enable SCIFA0 */
gpio_request(GPIO_FN_SCIF0_TXD, NULL);
gpio_request(GPIO_FN_SCIF0_RXD, NULL);
/* enable debug LED */
gpio_request(GPIO_PTG0, NULL);
gpio_request(GPIO_PTG1, NULL);
gpio_request(GPIO_PTG2, NULL);
gpio_request(GPIO_PTG3, NULL);
gpio_direction_output(GPIO_PTG0, 0);
gpio_direction_output(GPIO_PTG1, 0);
gpio_direction_output(GPIO_PTG2, 0);
gpio_direction_output(GPIO_PTG3, 0);
__raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
/* enable SH-Eth */
gpio_request(GPIO_PTA1, NULL);
gpio_direction_output(GPIO_PTA1, 1);
mdelay(20);
gpio_request(GPIO_FN_RMII_RXD0, NULL);
gpio_request(GPIO_FN_RMII_RXD1, NULL);
gpio_request(GPIO_FN_RMII_TXD0, NULL);
gpio_request(GPIO_FN_RMII_TXD1, NULL);
gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
gpio_request(GPIO_FN_RMII_TX_EN, NULL);
gpio_request(GPIO_FN_RMII_RX_ER, NULL);
gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
gpio_request(GPIO_FN_MDIO, NULL);
gpio_request(GPIO_FN_MDC, NULL);
gpio_request(GPIO_FN_LNKSTA, NULL);
/* enable USB */
__raw_writew(0x0000, 0xA4D80000);
__raw_writew(0x0000, 0xA4D90000);
gpio_request(GPIO_PTB3, NULL);
gpio_request(GPIO_PTB4, NULL);
gpio_request(GPIO_PTB5, NULL);
gpio_direction_input(GPIO_PTB3);
gpio_direction_output(GPIO_PTB4, 0);
gpio_direction_output(GPIO_PTB5, 0);
__raw_writew(0x0600, 0xa40501d4);
__raw_writew(0x0600, 0xa4050192);
if (gpio_get_value(GPIO_PTB3)) {
printk(KERN_INFO "USB1 function is selected\n");
usb1_common_device.name = "r8a66597_udc";
} else {
printk(KERN_INFO "USB1 host is selected\n");
usb1_common_device.name = "r8a66597_hcd";
}
/* enable LCDC */
gpio_request(GPIO_FN_LCDD23, NULL);
gpio_request(GPIO_FN_LCDD22, NULL);
gpio_request(GPIO_FN_LCDD21, NULL);
gpio_request(GPIO_FN_LCDD20, NULL);
gpio_request(GPIO_FN_LCDD19, NULL);
gpio_request(GPIO_FN_LCDD18, NULL);
gpio_request(GPIO_FN_LCDD17, NULL);
gpio_request(GPIO_FN_LCDD16, NULL);
gpio_request(GPIO_FN_LCDD15, NULL);
gpio_request(GPIO_FN_LCDD14, NULL);
gpio_request(GPIO_FN_LCDD13, NULL);
gpio_request(GPIO_FN_LCDD12, NULL);
gpio_request(GPIO_FN_LCDD11, NULL);
gpio_request(GPIO_FN_LCDD10, NULL);
gpio_request(GPIO_FN_LCDD9, NULL);
gpio_request(GPIO_FN_LCDD8, NULL);
gpio_request(GPIO_FN_LCDD7, NULL);
gpio_request(GPIO_FN_LCDD6, NULL);
gpio_request(GPIO_FN_LCDD5, NULL);
gpio_request(GPIO_FN_LCDD4, NULL);
gpio_request(GPIO_FN_LCDD3, NULL);
gpio_request(GPIO_FN_LCDD2, NULL);
gpio_request(GPIO_FN_LCDD1, NULL);
gpio_request(GPIO_FN_LCDD0, NULL);
gpio_request(GPIO_FN_LCDDISP, NULL);
gpio_request(GPIO_FN_LCDHSYN, NULL);
gpio_request(GPIO_FN_LCDDCK, NULL);
gpio_request(GPIO_FN_LCDVSYN, NULL);
gpio_request(GPIO_FN_LCDDON, NULL);
gpio_request(GPIO_FN_LCDLCLK, NULL);
__raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
gpio_request(GPIO_PTE6, NULL);
gpio_request(GPIO_PTU1, NULL);
gpio_request(GPIO_PTR1, NULL);
gpio_request(GPIO_PTA2, NULL);
gpio_direction_input(GPIO_PTE6);
gpio_direction_output(GPIO_PTU1, 0);
gpio_direction_output(GPIO_PTR1, 0);
gpio_direction_output(GPIO_PTA2, 0);
/* I/O buffer drive ability is high */
__raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
if (gpio_get_value(GPIO_PTE6)) {
/* DVI */
lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
lcdc_info.ch[0].clock_divider = 1,
lcdc_info.ch[0].lcd_cfg.name = "DVI";
lcdc_info.ch[0].lcd_cfg.xres = 1280;
lcdc_info.ch[0].lcd_cfg.yres = 720;
lcdc_info.ch[0].lcd_cfg.left_margin = 220;
lcdc_info.ch[0].lcd_cfg.right_margin = 110;
lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
gpio_set_value(GPIO_PTA2, 1);
gpio_set_value(GPIO_PTU1, 1);
} else {
/* Panel */
lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
lcdc_info.ch[0].clock_divider = 2,
lcdc_info.ch[0].lcd_cfg.name = "Panel";
lcdc_info.ch[0].lcd_cfg.xres = 800;
lcdc_info.ch[0].lcd_cfg.yres = 480;
lcdc_info.ch[0].lcd_cfg.left_margin = 220;
lcdc_info.ch[0].lcd_cfg.right_margin = 110;
lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
gpio_set_value(GPIO_PTR1, 1);
/* FIXME
*
* LCDDON control is needed for Panel,
* but current sh_mobile_lcdc driver doesn't control it.
* It is temporary correspondence
*/
gpio_request(GPIO_PTF4, NULL);
gpio_direction_output(GPIO_PTF4, 1);
/* enable TouchScreen */
i2c_register_board_info(0, &ts_i2c_clients, 1);
set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
}
/* enable CEU0 */
gpio_request(GPIO_FN_VIO0_D15, NULL);
gpio_request(GPIO_FN_VIO0_D14, NULL);
gpio_request(GPIO_FN_VIO0_D13, NULL);
gpio_request(GPIO_FN_VIO0_D12, NULL);
gpio_request(GPIO_FN_VIO0_D11, NULL);
gpio_request(GPIO_FN_VIO0_D10, NULL);
gpio_request(GPIO_FN_VIO0_D9, NULL);
gpio_request(GPIO_FN_VIO0_D8, NULL);
gpio_request(GPIO_FN_VIO0_D7, NULL);
gpio_request(GPIO_FN_VIO0_D6, NULL);
gpio_request(GPIO_FN_VIO0_D5, NULL);
gpio_request(GPIO_FN_VIO0_D4, NULL);
gpio_request(GPIO_FN_VIO0_D3, NULL);
gpio_request(GPIO_FN_VIO0_D2, NULL);
gpio_request(GPIO_FN_VIO0_D1, NULL);
gpio_request(GPIO_FN_VIO0_D0, NULL);
gpio_request(GPIO_FN_VIO0_VD, NULL);
gpio_request(GPIO_FN_VIO0_CLK, NULL);
gpio_request(GPIO_FN_VIO0_FLD, NULL);
gpio_request(GPIO_FN_VIO0_HD, NULL);
platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
/* enable CEU1 */
gpio_request(GPIO_FN_VIO1_D7, NULL);
gpio_request(GPIO_FN_VIO1_D6, NULL);
gpio_request(GPIO_FN_VIO1_D5, NULL);
gpio_request(GPIO_FN_VIO1_D4, NULL);
gpio_request(GPIO_FN_VIO1_D3, NULL);
gpio_request(GPIO_FN_VIO1_D2, NULL);
gpio_request(GPIO_FN_VIO1_D1, NULL);
gpio_request(GPIO_FN_VIO1_D0, NULL);
gpio_request(GPIO_FN_VIO1_FLD, NULL);
gpio_request(GPIO_FN_VIO1_HD, NULL);
gpio_request(GPIO_FN_VIO1_VD, NULL);
gpio_request(GPIO_FN_VIO1_CLK, NULL);
platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
/* enable KEYSC */
gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
gpio_request(GPIO_FN_KEYOUT3, NULL);
gpio_request(GPIO_FN_KEYOUT2, NULL);
gpio_request(GPIO_FN_KEYOUT1, NULL);
gpio_request(GPIO_FN_KEYOUT0, NULL);
gpio_request(GPIO_FN_KEYIN0, NULL);
/* enable user debug switch */
gpio_request(GPIO_PTR0, NULL);
gpio_request(GPIO_PTR4, NULL);
gpio_request(GPIO_PTR5, NULL);
gpio_request(GPIO_PTR6, NULL);
gpio_direction_input(GPIO_PTR0);
gpio_direction_input(GPIO_PTR4);
gpio_direction_input(GPIO_PTR5);
gpio_direction_input(GPIO_PTR6);
#ifdef CONFIG_MFD_SH_MOBILE_SDHI
/* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
gpio_request(GPIO_FN_SDHI0CD, NULL);
gpio_request(GPIO_FN_SDHI0WP, NULL);
gpio_request(GPIO_FN_SDHI0CMD, NULL);
gpio_request(GPIO_FN_SDHI0CLK, NULL);
gpio_request(GPIO_FN_SDHI0D3, NULL);
gpio_request(GPIO_FN_SDHI0D2, NULL);
gpio_request(GPIO_FN_SDHI0D1, NULL);
gpio_request(GPIO_FN_SDHI0D0, NULL);
gpio_request(GPIO_PTB6, NULL);
gpio_direction_output(GPIO_PTB6, 0);
/* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
gpio_request(GPIO_FN_SDHI1CD, NULL);
gpio_request(GPIO_FN_SDHI1WP, NULL);
gpio_request(GPIO_FN_SDHI1CMD, NULL);
gpio_request(GPIO_FN_SDHI1CLK, NULL);
gpio_request(GPIO_FN_SDHI1D3, NULL);
gpio_request(GPIO_FN_SDHI1D2, NULL);
gpio_request(GPIO_FN_SDHI1D1, NULL);
gpio_request(GPIO_FN_SDHI1D0, NULL);
gpio_request(GPIO_PTB7, NULL);
gpio_direction_output(GPIO_PTB7, 0);
/* I/O buffer drive ability is high for SDHI1 */
__raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
#else
/* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
gpio_request(GPIO_PTY6, NULL); /* write protect */
gpio_direction_input(GPIO_PTY6);
gpio_request(GPIO_PTY7, NULL); /* card detect */
gpio_direction_input(GPIO_PTY7);
spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
#endif
/* enable Video */
gpio_request(GPIO_PTU2, NULL);
gpio_direction_output(GPIO_PTU2, 1);
/* enable Camera */
gpio_request(GPIO_PTA3, NULL);
gpio_request(GPIO_PTA4, NULL);
gpio_direction_output(GPIO_PTA3, 0);
gpio_direction_output(GPIO_PTA4, 0);
/* enable FSI */
gpio_request(GPIO_FN_FSIMCKB, NULL);
gpio_request(GPIO_FN_FSIIBSD, NULL);
gpio_request(GPIO_FN_FSIOBSD, NULL);
gpio_request(GPIO_FN_FSIIBBCK, NULL);
gpio_request(GPIO_FN_FSIIBLRCK, NULL);
gpio_request(GPIO_FN_FSIOBBCK, NULL);
gpio_request(GPIO_FN_FSIOBLRCK, NULL);
gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
/* set SPU2 clock to 83.4 MHz */
clk = clk_get(NULL, "spu_clk");
clk_set_rate(clk, clk_round_rate(clk, 83333333));
clk_put(clk);
/* change parent of FSI B */
clk = clk_get(NULL, "fsib_clk");
clk_register(&fsimckb_clk);
clk_set_parent(clk, &fsimckb_clk);
clk_set_rate(clk, 11000);
clk_set_rate(&fsimckb_clk, 11000);
clk_put(clk);
gpio_request(GPIO_PTU0, NULL);
gpio_direction_output(GPIO_PTU0, 0);
mdelay(20);
/* enable motion sensor */
gpio_request(GPIO_FN_INTC_IRQ1, NULL);
gpio_direction_input(GPIO_FN_INTC_IRQ1);
/* set VPU clock to 166 MHz */
clk = clk_get(NULL, "vpu_clk");
clk_set_rate(clk, clk_round_rate(clk, 166000000));
clk_put(clk);
/* enable IrDA */
gpio_request(GPIO_FN_IRDA_OUT, NULL);
gpio_request(GPIO_FN_IRDA_IN, NULL);
gpio_request(GPIO_PTU5, NULL);
gpio_direction_output(GPIO_PTU5, 0);
/* enable I2C device */
i2c_register_board_info(0, i2c0_devices,
ARRAY_SIZE(i2c0_devices));
i2c_register_board_info(1, i2c1_devices,
ARRAY_SIZE(i2c1_devices));
return platform_add_devices(ecovec_devices,
ARRAY_SIZE(ecovec_devices));
}
/*
* Board specific initialization.
*/
static void __init pcm037_init(void)
{
int ret;
imx31_soc_init();
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
mxc_iomux_set_gpr(MUX_PGP_UH2, 1);
mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
"pcm037");
#define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS \
| PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, H2_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, H2_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, H2_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_STP, H2_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, H2_PAD_CFG); /* USBH2_DATA0 */
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, H2_PAD_CFG); /* USBH2_DATA1 */
mxc_iomux_set_pad(MX31_PIN_SRXD6, H2_PAD_CFG); /* USBH2_DATA2 */
mxc_iomux_set_pad(MX31_PIN_STXD6, H2_PAD_CFG); /* USBH2_DATA3 */
mxc_iomux_set_pad(MX31_PIN_SFS3, H2_PAD_CFG); /* USBH2_DATA4 */
mxc_iomux_set_pad(MX31_PIN_SCK3, H2_PAD_CFG); /* USBH2_DATA5 */
mxc_iomux_set_pad(MX31_PIN_SRXD3, H2_PAD_CFG); /* USBH2_DATA6 */
mxc_iomux_set_pad(MX31_PIN_STXD3, H2_PAD_CFG); /* USBH2_DATA7 */
if (pcm037_variant() == PCM037_EET)
mxc_iomux_setup_multiple_pins(pcm037_uart1_pins,
ARRAY_SIZE(pcm037_uart1_pins), "pcm037_uart1");
else
mxc_iomux_setup_multiple_pins(pcm037_uart1_handshake_pins,
ARRAY_SIZE(pcm037_uart1_handshake_pins),
"pcm037_uart1");
platform_add_devices(devices, ARRAY_SIZE(devices));
imx31_add_imx2_wdt();
imx31_add_imx_uart0(&uart_pdata);
/* XXX: should't this have .flags = 0 (i.e. no RTSCTS) on PCM037_EET? */
imx31_add_imx_uart1(&uart_pdata);
imx31_add_imx_uart2(&uart_pdata);
imx31_add_mxc_w1();
/* LAN9217 IRQ pin */
ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq");
if (ret)
pr_warning("could not get LAN irq gpio\n");
else {
gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
smsc911x_resources[1].start =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
smsc911x_resources[1].end =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
platform_device_register(&pcm037_eth);
}
/* I2C adapters and devices */
i2c_register_board_info(1, pcm037_i2c_devices,
ARRAY_SIZE(pcm037_i2c_devices));
imx31_add_imx_i2c1(&pcm037_i2c1_data);
imx31_add_imx_i2c2(&pcm037_i2c2_data);
imx31_add_mxc_nand(&pcm037_nand_board_info);
imx31_add_mxc_mmc(0, &sdhc_pdata);
imx31_add_ipu_core();
imx31_add_mx3_sdc_fb(&mx3fb_pdata);
/* CSI */
/* Camera power: default - off */
ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), "mt9t031-power");
if (!ret)
gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1);
else
iclink_mt9t031.power = NULL;
pcm037_init_camera();
pcm970_sja1000_resources[1].start =
gpio_to_irq(IOMUX_TO_GPIO(IOMUX_PIN(48, 105)));
pcm970_sja1000_resources[1].end =
gpio_to_irq(IOMUX_TO_GPIO(IOMUX_PIN(48, 105)));
platform_device_register(&pcm970_sja1000);
if (otg_mode_host) {
otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
ULPI_OTG_DRVVBUS_EXT);
if (otg_pdata.otg)
imx31_add_mxc_ehci_otg(&otg_pdata);
}
usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
ULPI_OTG_DRVVBUS_EXT);
if (usbh2_pdata.otg)
imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
if (!otg_mode_host)
imx31_add_fsl_usb2_udc(&otg_device_pdata);
}
static void __init icong_init(void)
{
int rc;
char *cid = NULL;
struct kobject *properties_kobj;
printk(KERN_INFO "icong_init() revision = 0x%X, engineerid = 0x%X\n", system_rev, engineerid);
msm_clock_init();
board_get_cid_tag(&cid);
/* for bcm */
bt_export_bd_address();
/*
* Setup common MSM GPIOS
*/
config_gpios();
/* We need to set this pin to 0 only once on power-up; we will
* not actually enable the chip until we apply power to it via
* vreg.
*/
gpio_request(ICONG_GPIO_LS_EN, "ls_en");
gpio_direction_output(ICONG_GPIO_LS_EN, 0);
msm_hw_reset_hook = icong_reset;
if (socinfo_init() < 0)
BUG();
if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) > 1)
|| ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 1)
&& (SOCINFO_VERSION_MINOR(socinfo_get_version()) >= 3)))
{
msm_acpu_clock_init(&icong_turbo_clock_data);
perflock_init(&icong_turbo_perflock_data);
}else{
msm_acpu_clock_init(&icong_clock_data);
perflock_init(&icong_perflock_data);
}
#if defined(CONFIG_MSM_SERIAL_DEBUGGER)
if (!opt_disable_uart3)
msm_serial_debug_init(MSM_UART3_PHYS, INT_UART3,
&msm_device_uart3.dev, 1,
MSM_GPIO_TO_INT(ICONG_GPIO_UART3_RX));
#endif
msm_add_devices();
#ifdef CONFIG_SERIAL_MSM_HS
msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
msm_device_uart_dm1.name = "msm_serial_hs_bcm"; /* for bcm */
msm_add_serial_devices(3);
#else
msm_add_serial_devices(0);
#endif
msm_add_serial_devices(2);
/*
msm_change_usb_id(0x0bb4, 0x0c10);
*/
#ifdef CONFIG_USB_FUNCTION
msm_add_usb_id_pin_gpio(ICONG_GPIO_USB_ID_PIN);
msm_add_usb_devices(icong_phy_reset, NULL);
#endif
#ifdef CONFIG_USB_ANDROID
android_usb_pdata.products[0].product_id =
android_usb_pdata.product_id;
android_usb_pdata.serial_number = board_serialno();
msm_hsusb_pdata.serial_number = board_serialno();
msm_device_hsusb.dev.platform_data = &msm_hsusb_pdata;
config_icong_usb_id_gpios(0);
platform_device_register(&msm_device_hsusb);
platform_device_register(&usb_mass_storage_device);
platform_device_register(&android_usb_device);
#endif
msm_add_mem_devices(&pmem_setting);
#ifdef CONFIG_MICROP_COMMON
icong_microp_init();
#endif
rc = icong_init_mmc(system_rev);
if (rc)
printk(KERN_CRIT "%s: MMC init failure (%d)\n", __func__, rc);
properties_kobj = kobject_create_and_add("board_properties", NULL);
if (properties_kobj)
rc = sysfs_create_group(properties_kobj,
&icong_properties_attr_group);
if (!properties_kobj || rc)
pr_err("failed to create board_properties\n");
/* probe camera driver */
i2c_register_board_info(0, i2c_camera_devices, ARRAY_SIZE(i2c_camera_devices));
printk(KERN_INFO "[HS_BOARD] (%s) system_rev = %d, engineerid = %d\n",
__func__, system_rev, engineerid);
if ((system_rev == 1 && engineerid == 0x0E) || system_rev > 1) {
htc_headset_mgr_data.headset_devices_num =
ARRAY_SIZE(headset_devices_xb03);
htc_headset_mgr_data.headset_devices = headset_devices_xb03;
htc_headset_mgr_data.headset_config_num =
ARRAY_SIZE(htc_headset_mgr_config);
htc_headset_mgr_data.headset_config = htc_headset_mgr_config;
printk(KERN_INFO "[HS_BOARD] (%s) Set MEMS config\n", __func__);
}
msm_device_i2c_init();
platform_add_devices(devices, ARRAY_SIZE(devices));
i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
icong_init_panel();
icong_init_keypad();
icong_wifi_init();
msm_init_pmic_vibrator(2950);
}
/*------------------------------------------------------------------------------
* register cpu platform devices
*/
void __init cpu_device(void)
{
#if defined(CONFIG_SERIAL_NEXELL_UART)
printk("plat: add device serial (array:%d)\n", ARRAY_SIZE(uart_plat_devices));
platform_add_devices(uart_plat_devices, ARRAY_SIZE(uart_plat_devices));
#endif
#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE)
printk("plat: add device usb ehci\n");
platform_device_register(&ehci_plat_device);
#endif
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
printk("plat: add device usb ohci\n");
platform_device_register(&ohci_plat_device);
#endif
#if defined(CONFIG_USB_GADGET_NEXELL)
printk("plat: add device usb gadget\n");
platform_device_register(&gadget_plat_device);
#endif
#if defined(CONFIG_USB_ANDROID)
printk("plat: add device usb android\n");
platform_device_register(&androidusb_device);
#endif
#if defined(CONFIG_USB_ANDROID_MASS_STORAGE)
printk("plat: add device usb mass storage\n");
platform_device_register(&usb_mass_storage_device);
#endif
#if defined(CONFIG_I2C_NEXELL)
printk("plat: add device i2c bus (array:%d) \n", ARRAY_SIZE(i2c_plat_devices));
platform_add_devices(i2c_plat_devices, ARRAY_SIZE(i2c_plat_devices));
#endif
#if defined(CONFIG_RTC_DRV_NEXELL)
printk("plat: add device Real Time Clock \n");
platform_device_register(&rtc_plat_device);
#endif
#if defined(CONFIG_NEXELL_WATCHDOG)
printk("plat: add device watchdog\n");
platform_device_register(&wdt_plat_device);
#endif
/* Graphic */
#if defined(CONFIG_GRP_NEXELL_VMEM)
printk("plat: add device graphic memory allocator\n");
platform_device_register(&vmem_plat_device);
#endif
#if defined(CONFIG_GRP_NEXELL_DPC)
printk("plat: add device display control\n");
platform_device_register(&dpc_plat_device);
#endif
#if defined(CONFIG_NEXELL_FINESCALER)
printk("plat: add device finescaler\n");
platform_device_register(&finescaler_plat_device);
#endif
#if defined(CONFIG_SND_NEXELL_SOC_I2S) || defined(CONFIG_SND_NEXELL_SOC_I2S_MODULE)
printk("plat: add device asoc-i2s \n");
platform_device_register(&i2s_plat_device);
#endif
#if defined(CONFIG_SND_NEXELL_SOC_SPDIF) || defined(CONFIG_SND_NEXELL_SOC_SPDIF_MODULE)
printk("plat: add device asoc-spdif \n");
platform_device_register(&spdif_plat_device);
#endif
/* MISC */
#if defined(CONFIG_MISC_NEXELL_ADC)
printk("plat: add device misc adc\n");
platform_device_register(&adc_plat_device);
#endif
#if defined(CONFIG_HAVE_PWM)
printk("plat: add device generic pwm\n");
platform_device_register(&pwm_plat_device);
#endif
#if defined(CONFIG_MISC_NEXELL_SPI)
printk("plat: add device misc spi\n");
platform_device_register(&spi_plat_misc_dev);
#endif
#if defined(CONFIG_MISC_NEXELL_GPIO)
printk("plat: add device misc gpio\n");
platform_device_register(&gpio_plat_device);
#endif
#if defined(CONFIG_MISC_NEXELL_MPEGTS)
printk("plat: add device misc mpegts\n");
platform_device_register(&mpegts_plat_device);
#endif
}
static void __init smdk6440_machine_init(void)
{
s3c24xx_ts_set_platdata(&s3c_ts_platform);
platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
}
void __init exynos5_xyref5260_camera_init(void)
{
#if defined(CONFIG_VIDEO_EXYNOS_FIMC_IS)
dev_set_name(&exynos5_device_fimc_is.dev, "s5p-mipi-csis.0");
clk_add_alias("gscl_wrap0", FIMC_IS_DEV_NAME,
"gscl_wrap0", &exynos5_device_fimc_is.dev);
dev_set_name(&exynos5_device_fimc_is.dev, "s5p-mipi-csis.1");
clk_add_alias("gscl_wrap1", FIMC_IS_DEV_NAME,
"gscl_wrap1", &exynos5_device_fimc_is.dev);
dev_set_name(&exynos5_device_fimc_is.dev, FIMC_IS_DEV_NAME);
exynos_fimc_is_data.subip_info = &subip_info;
/* DVFS sceanrio setting */
SET_QOS(exynos_fimc_is_data.dvfs_data, FIMC_IS_SN_DEFAULT,
400000, 667000, 75000000, 0, 333000, 2666);
SET_QOS(exynos_fimc_is_data.dvfs_data, FIMC_IS_SN_FRONT_PREVIEW,
400000, 667000, 75000000, 0, 333000, 2666);
SET_QOS(exynos_fimc_is_data.dvfs_data, FIMC_IS_SN_FRONT_CAPTURE,
400000, 667000, 75000000, 0, 333000, 2666);
SET_QOS(exynos_fimc_is_data.dvfs_data, FIMC_IS_SN_FRONT_CAMCORDING,
400000, 667000, 75000000, 0, 333000, 2666);
SET_QOS(exynos_fimc_is_data.dvfs_data, FIMC_IS_SN_FRONT_VT1,
400000, 667000, 75000000, 0, 333000, 2666);
SET_QOS(exynos_fimc_is_data.dvfs_data, FIMC_IS_SN_FRONT_VT2,
400000, 667000, 75000000, 0, 333000, 2666);
SET_QOS(exynos_fimc_is_data.dvfs_data, FIMC_IS_SN_REAR_PREVIEW_FHD,
400000, 667000, 75000000, 0, 333000, 2666);
SET_QOS(exynos_fimc_is_data.dvfs_data, FIMC_IS_SN_REAR_PREVIEW_WHD,
400000, 667000, 75000000, 0, 333000, 2666);
SET_QOS(exynos_fimc_is_data.dvfs_data, FIMC_IS_SN_REAR_PREVIEW_UHD,
400000, 667000, 75000000, 0, 333000, 2666);
SET_QOS(exynos_fimc_is_data.dvfs_data, FIMC_IS_SN_REAR_CAPTURE,
533000, 667000, 100000000, 0, 333000, 2000);
SET_QOS(exynos_fimc_is_data.dvfs_data, FIMC_IS_SN_REAR_CAMCORDING,
400000, 667000, 75000000, 0, 333000, 2666);
SET_QOS(exynos_fimc_is_data.dvfs_data, FIMC_IS_SN_DUAL_PREVIEW,
400000, 667000, 75000000, 0, 333000, 2666);
SET_QOS(exynos_fimc_is_data.dvfs_data, FIMC_IS_SN_DUAL_CAPTURE,
400000, 667000, 75000000, 0, 333000, 2666);
SET_QOS(exynos_fimc_is_data.dvfs_data, FIMC_IS_SN_DUAL_CAMCORDING,
400000, 667000, 75000000, 0, 333000, 2666);
SET_QOS(exynos_fimc_is_data.dvfs_data, FIMC_IS_SN_HIGH_SPEED_FPS,
400000, 667000, 75000000, 0, 333000, 2666);
SET_QOS(exynos_fimc_is_data.dvfs_data, FIMC_IS_SN_DIS_ENABLE,
400000, 667000, 75000000, 0, 333000, 2666);
SET_QOS(exynos_fimc_is_data.dvfs_data, FIMC_IS_SN_MAX,
400000, 667000, 75000000, 0, 333000, 2666);
exynos_fimc_is_data.gate_info = &gate_info;
exynos_fimc_is_set_platdata(&exynos_fimc_is_data);
/* s5k3h7: normal: on */
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 0,
EXYNOS5260_GPE1(2), (2 << 8), "GPE1.2 (CAM_MCLK)", PIN_FUNCTION);
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 1,
EXYNOS5260_GPE0(5), (2 << 20), "GPE0.5 (CAM_FLASH_EN)", PIN_FUNCTION);
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 2,
EXYNOS5260_GPF0(1), (2 << 4), "GPF0.1 (CAM_I2C0_SCL)", PIN_FUNCTION);
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 3,
EXYNOS5260_GPF0(0), (2 << 0), "GPE0.0 (CAM_I2C0_SDA)", PIN_FUNCTION);
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 5,
0, 0, "main_cam_io_1v8", PIN_REGULATOR_ON);
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 6,
0, 0, "main_cam_sensor_a2v8", PIN_REGULATOR_ON);
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 7,
0, 0, "main_cam_af_2v8", PIN_REGULATOR_ON);
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 8,
EXYNOS5260_GPE0(6), 1, "GPE0.6 (CAMCORE_EN)", PIN_OUTPUT_HIGH);
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 9,
EXYNOS5260_GPE0(1), 1, "GPE0.1 (MAIN_CAM_RST)", PIN_RESET);
#if defined(CONFIG_EXYNOS5260_XYREF_REV1)
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 10,
EXYNOS5260_GPE1(0), (2 << 0), "GPE1.0 (CAM_FLASH_TORCH)",
PIN_FUNCTION);
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 11,
0, 0, "", PIN_END);
#else
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 10,
0, 0, "", PIN_END);
#endif
/* s5k3h7: normal: off */
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_OFF, 0,
EXYNOS5260_GPE0(1), 1, "GPE0.1 (MAIN_CAM_RST)", PIN_RESET);
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_OFF, 1,
EXYNOS5260_GPE0(1), 1, "GPE0.1 (MAIN_CAM_RST)", PIN_INPUT);
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_OFF, 2,
EXYNOS5260_GPE0(6), 1, "GPE0.6 (CAMCORE_EN)", PIN_OUTPUT_LOW);
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_OFF, 3,
0, 0, "main_cam_io_1v8", PIN_REGULATOR_OFF);
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_OFF, 4,
0, 0, "main_cam_sensor_a2v8", PIN_REGULATOR_OFF);
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_OFF, 5,
0, 0, "main_cam_af_2v8", PIN_REGULATOR_OFF);
#if defined(CONFIG_EXYNOS5260_XYREF_REV1)
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_OFF, 6,
EXYNOS5260_GPE1(0), 1, "GPE1.0 (CAM_FLASH_TORCH)", PIN_INPUT);
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_OFF, 7,
0, 0, "", PIN_END);
#else
SET_PIN(&s5k3h7, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_OFF, 6,
0, 0, "", PIN_END);
#endif
/* s5k6b2: normal: on */
SET_PIN(&s5k6b2, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 0,
EXYNOS5260_GPE0(4), 1, "GPE0.4 (CAM_VT_nRST)", PIN_RESET);
SET_PIN(&s5k6b2, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 1,
EXYNOS5260_GPE1(3), (2 << 12), "GPE1.3 (CAM_MCLK)", PIN_FUNCTION);
SET_PIN(&s5k6b2, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 2,
EXYNOS5260_GPF0(3), (2 << 12), "GPE0.3 (CAM_I2C1_SCL)", PIN_FUNCTION);
SET_PIN(&s5k6b2, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 3,
EXYNOS5260_GPF0(2), (2 << 8), "GPE0.2 (CAM_I2C1_SDA)", PIN_FUNCTION);
SET_PIN(&s5k6b2, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 4,
0, 0, "vt_cam_core_1v8", PIN_REGULATOR_ON);
SET_PIN(&s5k6b2, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 5,
0, 0, "vt_cam_sensor_a2v8", PIN_REGULATOR_ON);
SET_PIN(&s5k6b2, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_ON, 6,
0, 0, "", PIN_END);
/* s5k6b2: normal: off */
SET_PIN(&s5k6b2, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_OFF, 0,
EXYNOS5260_GPE0(4), 1, "GPE0.4 (CAM_VT_nRST)", PIN_RESET);
SET_PIN(&s5k6b2, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_OFF, 1,
EXYNOS5260_GPE0(4), 1, "GPE0.4 (CAM_VT_nRST)", PIN_INPUT);
SET_PIN(&s5k6b2, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_OFF, 2,
0, 0, "vt_cam_core_1v8", PIN_REGULATOR_OFF);
SET_PIN(&s5k6b2, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_OFF, 3,
0, 0, "vt_cam_sensor_a2v8", PIN_REGULATOR_OFF);
SET_PIN(&s5k6b2, SENSOR_SCENARIO_NORMAL, GPIO_SCENARIO_OFF, 4,
0, 0, "", PIN_END);
exynos_fimc_is_sensor_set_platdata(&s5k3h7, &exynos_device_fimc_is_sensor0);
exynos_fimc_is_sensor_set_platdata(&s5k6b2, &exynos_device_fimc_is_sensor1);
#endif
platform_add_devices(camera_devices, ARRAY_SIZE(camera_devices));
}
static void __init kota2_init(void)
{
sh73a0_pinmux_init();
/* SCIFA2 (UART2) */
gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
gpio_request(GPIO_FN_SCIFA2_RTS1_, NULL);
gpio_request(GPIO_FN_SCIFA2_CTS1_, NULL);
/* SCIFA4 (UART1) */
gpio_request(GPIO_FN_SCIFA4_TXD, NULL);
gpio_request(GPIO_FN_SCIFA4_RXD, NULL);
gpio_request(GPIO_FN_SCIFA4_RTS_, NULL);
gpio_request(GPIO_FN_SCIFA4_CTS_, NULL);
/* SMSC911X */
gpio_request(GPIO_FN_D0_NAF0, NULL);
gpio_request(GPIO_FN_D1_NAF1, NULL);
gpio_request(GPIO_FN_D2_NAF2, NULL);
gpio_request(GPIO_FN_D3_NAF3, NULL);
gpio_request(GPIO_FN_D4_NAF4, NULL);
gpio_request(GPIO_FN_D5_NAF5, NULL);
gpio_request(GPIO_FN_D6_NAF6, NULL);
gpio_request(GPIO_FN_D7_NAF7, NULL);
gpio_request(GPIO_FN_D8_NAF8, NULL);
gpio_request(GPIO_FN_D9_NAF9, NULL);
gpio_request(GPIO_FN_D10_NAF10, NULL);
gpio_request(GPIO_FN_D11_NAF11, NULL);
gpio_request(GPIO_FN_D12_NAF12, NULL);
gpio_request(GPIO_FN_D13_NAF13, NULL);
gpio_request(GPIO_FN_D14_NAF14, NULL);
gpio_request(GPIO_FN_D15_NAF15, NULL);
gpio_request(GPIO_FN_CS5A_, NULL);
gpio_request(GPIO_FN_WE0__FWE, NULL);
gpio_request(GPIO_PORT144, NULL); /* PINTA2 */
gpio_direction_input(GPIO_PORT144);
gpio_request(GPIO_PORT145, NULL); /* RESET */
gpio_direction_output(GPIO_PORT145, 1);
/* KEYSC */
gpio_request(GPIO_FN_KEYIN0_PU, NULL);
gpio_request(GPIO_FN_KEYIN1_PU, NULL);
gpio_request(GPIO_FN_KEYIN2_PU, NULL);
gpio_request(GPIO_FN_KEYIN3_PU, NULL);
gpio_request(GPIO_FN_KEYIN4_PU, NULL);
gpio_request(GPIO_FN_KEYIN5_PU, NULL);
gpio_request(GPIO_FN_KEYIN6_PU, NULL);
gpio_request(GPIO_FN_KEYIN7_PU, NULL);
gpio_request(GPIO_FN_KEYOUT0, NULL);
gpio_request(GPIO_FN_KEYOUT1, NULL);
gpio_request(GPIO_FN_KEYOUT2, NULL);
gpio_request(GPIO_FN_KEYOUT3, NULL);
gpio_request(GPIO_FN_KEYOUT4, NULL);
gpio_request(GPIO_FN_KEYOUT5, NULL);
gpio_request(GPIO_FN_PORT59_KEYOUT6, NULL);
gpio_request(GPIO_FN_PORT58_KEYOUT7, NULL);
gpio_request(GPIO_FN_KEYOUT8, NULL);
/* MMCIF */
gpio_request(GPIO_FN_MMCCLK0, NULL);
gpio_request(GPIO_FN_MMCD0_0, NULL);
gpio_request(GPIO_FN_MMCD0_1, NULL);
gpio_request(GPIO_FN_MMCD0_2, NULL);
gpio_request(GPIO_FN_MMCD0_3, NULL);
gpio_request(GPIO_FN_MMCD0_4, NULL);
gpio_request(GPIO_FN_MMCD0_5, NULL);
gpio_request(GPIO_FN_MMCD0_6, NULL);
gpio_request(GPIO_FN_MMCD0_7, NULL);
gpio_request(GPIO_FN_MMCCMD0, NULL);
gpio_request(GPIO_PORT208, NULL); /* Reset */
gpio_direction_output(GPIO_PORT208, 1);
/* SDHI0 (microSD) */
gpio_request(GPIO_FN_SDHICD0_PU, NULL);
gpio_request(GPIO_FN_SDHICMD0_PU, NULL);
gpio_request(GPIO_FN_SDHICLK0, NULL);
gpio_request(GPIO_FN_SDHID0_3_PU, NULL);
gpio_request(GPIO_FN_SDHID0_2_PU, NULL);
gpio_request(GPIO_FN_SDHID0_1_PU, NULL);
gpio_request(GPIO_FN_SDHID0_0_PU, NULL);
/* SCIFB (BT) */
gpio_request(GPIO_FN_PORT159_SCIFB_SCK, NULL);
gpio_request(GPIO_FN_PORT160_SCIFB_TXD, NULL);
gpio_request(GPIO_FN_PORT161_SCIFB_CTS_, NULL);
gpio_request(GPIO_FN_PORT162_SCIFB_RXD, NULL);
gpio_request(GPIO_FN_PORT163_SCIFB_RTS_, NULL);
/* SDHI1 (BCM4330) */
gpio_request(GPIO_FN_SDHICLK1, NULL);
gpio_request(GPIO_FN_SDHICMD1_PU, NULL);
gpio_request(GPIO_FN_SDHID1_3_PU, NULL);
gpio_request(GPIO_FN_SDHID1_2_PU, NULL);
gpio_request(GPIO_FN_SDHID1_1_PU, NULL);
gpio_request(GPIO_FN_SDHID1_0_PU, NULL);
#ifdef CONFIG_CACHE_L2X0
/* Early BRESP enable, Shared attribute override enable, 64K*8way */
l2x0_init(__io(0xf0100000), 0x40460000, 0x82000fff);
#endif
sh73a0_add_standard_devices();
platform_add_devices(kota2_devices, ARRAY_SIZE(kota2_devices));
}
int __init smba_gpu_register_devices(void)
{
struct resource *res;
int err;
#if defined(DYNAMIC_GPU_MEM)
/* Plug in framebuffer 1 memory area and size */
if (tegra_fb_start > 0 && tegra_fb_size > 0) {
res = nvhost_get_resource_byname(&smba_disp1_device,
IORESOURCE_MEM, "fbmem");
res->start = tegra_fb_start;
res->end = tegra_fb_start + tegra_fb_size - 1;
}
/* Plug in framebuffer 2 memory area and size */
if (tegra_fb2_start > 0 && tegra_fb2_size > 0) {
res = nvhost_get_resource_byname(&smba_disp2_device,
IORESOURCE_MEM, "fbmem");
res->start = tegra_fb2_start;
res->end = tegra_fb2_start + tegra_fb2_size - 1;
}
/* Plug in carveout memory area and size */
if (tegra_carveout_start > 0 && tegra_carveout_size > 0) {
smba_carveouts[1].base = tegra_carveout_start;
smba_carveouts[1].size = tegra_carveout_size;
}
#endif
gpio_request(SMBA1002_EN_VDD_PANEL, "en_vdd_pnl");
gpio_direction_output(SMBA1002_EN_VDD_PANEL, 1);
gpio_request(SMBA1002_BL_VDD, "bl_vdd");
gpio_direction_output(SMBA1002_BL_VDD, 1);
// gpio_request(SMBA1002_HDMI_ENB, "hdmi_5v_en");
// gpio_direction_output(SMBA1002_HDMI_ENB, 1);
gpio_request(SMBA1002_LVDS_SHUTDOWN, "lvds_shdn");
gpio_direction_output(SMBA1002_LVDS_SHUTDOWN, 1);
#ifdef CONFIG_HAS_EARLYSUSPEND
smba_panel_early_suspender.suspend = smba_panel_early_suspend;
smba_panel_early_suspender.resume = smba_panel_late_resume;
smba_panel_early_suspender.level = EARLY_SUSPEND_LEVEL_DISABLE_FB;
register_early_suspend(&smba_panel_early_suspender);
#endif
err = platform_add_devices(smba_gfx_devices,
ARRAY_SIZE(smba_gfx_devices));
#if defined(DYNAMIC_GPU_MEM)
/* Move the bootloader framebuffer to our framebuffer */
if (tegra_bootloader_fb_start > 0 && tegra_fb_start > 0 &&
tegra_fb_size > 0 && tegra_bootloader_fb_size > 0) {
tegra_move_framebuffer(tegra_fb_start, tegra_bootloader_fb_start,
min(tegra_fb_size, tegra_bootloader_fb_size));
}
#endif
/* Register the framebuffers */
if (!err)
err = nvhost_device_register(&smba_disp1_device);
if (!err)
err = nvhost_device_register(&smba_disp2_device);
return err;
}
static void __init g3evm_init(void)
{
sh7367_pinmux_init();
/* Lit DS4 LED */
gpio_request(GPIO_PORT22, NULL);
gpio_direction_output(GPIO_PORT22, 1);
gpio_export(GPIO_PORT22, 0);
/* Lit DS8 LED */
gpio_request(GPIO_PORT23, NULL);
gpio_direction_output(GPIO_PORT23, 1);
gpio_export(GPIO_PORT23, 0);
/* Lit DS3 LED */
gpio_request(GPIO_PORT24, NULL);
gpio_direction_output(GPIO_PORT24, 1);
gpio_export(GPIO_PORT24, 0);
/* SCIFA1 */
gpio_request(GPIO_FN_SCIFA1_TXD, NULL);
gpio_request(GPIO_FN_SCIFA1_RXD, NULL);
gpio_request(GPIO_FN_SCIFA1_CTS, NULL);
gpio_request(GPIO_FN_SCIFA1_RTS, NULL);
/* USBHS */
gpio_request(GPIO_FN_VBUS0, NULL);
gpio_request(GPIO_FN_PWEN, NULL);
gpio_request(GPIO_FN_OVCN, NULL);
gpio_request(GPIO_FN_OVCN2, NULL);
gpio_request(GPIO_FN_EXTLP, NULL);
gpio_request(GPIO_FN_IDIN, NULL);
/* setup USB phy */
__raw_writew(0x0300, 0xe605810a); /* USBCR1 */
__raw_writew(0x00e0, 0xe60581c0); /* CPFCH */
__raw_writew(0x6010, 0xe60581c6); /* CGPOSR */
__raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */
/* KEYSC @ CN7 */
gpio_request(GPIO_FN_PORT42_KEYOUT0, NULL);
gpio_request(GPIO_FN_PORT43_KEYOUT1, NULL);
gpio_request(GPIO_FN_PORT44_KEYOUT2, NULL);
gpio_request(GPIO_FN_PORT45_KEYOUT3, NULL);
gpio_request(GPIO_FN_PORT46_KEYOUT4, NULL);
gpio_request(GPIO_FN_PORT47_KEYOUT5, NULL);
gpio_request(GPIO_FN_PORT48_KEYIN0_PU, NULL);
gpio_request(GPIO_FN_PORT49_KEYIN1_PU, NULL);
gpio_request(GPIO_FN_PORT50_KEYIN2_PU, NULL);
gpio_request(GPIO_FN_PORT55_KEYIN3_PU, NULL);
gpio_request(GPIO_FN_PORT56_KEYIN4_PU, NULL);
gpio_request(GPIO_FN_PORT57_KEYIN5_PU, NULL);
gpio_request(GPIO_FN_PORT58_KEYIN6_PU, NULL);
/* FLCTL */
gpio_request(GPIO_FN_FCE0, NULL);
gpio_request(GPIO_FN_D0_ED0_NAF0, NULL);
gpio_request(GPIO_FN_D1_ED1_NAF1, NULL);
gpio_request(GPIO_FN_D2_ED2_NAF2, NULL);
gpio_request(GPIO_FN_D3_ED3_NAF3, NULL);
gpio_request(GPIO_FN_D4_ED4_NAF4, NULL);
gpio_request(GPIO_FN_D5_ED5_NAF5, NULL);
gpio_request(GPIO_FN_D6_ED6_NAF6, NULL);
gpio_request(GPIO_FN_D7_ED7_NAF7, NULL);
gpio_request(GPIO_FN_D8_ED8_NAF8, NULL);
gpio_request(GPIO_FN_D9_ED9_NAF9, NULL);
gpio_request(GPIO_FN_D10_ED10_NAF10, NULL);
gpio_request(GPIO_FN_D11_ED11_NAF11, NULL);
gpio_request(GPIO_FN_D12_ED12_NAF12, NULL);
gpio_request(GPIO_FN_D13_ED13_NAF13, NULL);
gpio_request(GPIO_FN_D14_ED14_NAF14, NULL);
gpio_request(GPIO_FN_D15_ED15_NAF15, NULL);
gpio_request(GPIO_FN_WE0_XWR0_FWE, NULL);
gpio_request(GPIO_FN_FRB, NULL);
/* FOE, FCDE, FSC on dedicated pins */
__raw_writel(__raw_readl(0xe6158048) & ~(1 << 15), 0xe6158048);
/* IrDA */
gpio_request(GPIO_FN_IRDA_OUT, NULL);
gpio_request(GPIO_FN_IRDA_IN, NULL);
gpio_request(GPIO_FN_IRDA_FIRSEL, NULL);
sh7367_add_standard_devices();
platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices));
}
static int __init rdc_board_setup(void)
{
rdc321x_gpio_setup();
return platform_add_devices(rdc321x_devs, ARRAY_SIZE(rdc321x_devs));
}
static int __init generic_board_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
return platform_add_devices(generic_board_devices, ARRAY_SIZE(generic_board_devices));
}
static int __init sh7750_devices_setup(void)
{
return platform_add_devices(sh7750_devices,
ARRAY_SIZE(sh7750_devices));
}
static void __init fsg_init(void)
{
uint8_t __iomem *f;
ixp4xx_sys_init();
fsg_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
fsg_flash_resource.end =
IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
*IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
/* Configure CS2 for operation, 8bit and writable */
*IXP4XX_EXP_CS2 = 0xbfff0002;
i2c_register_board_info(0, fsg_i2c_board_info,
ARRAY_SIZE(fsg_i2c_board_info));
/* This is only useful on a modified machine, but it is valuable
* to have it first in order to see debug messages, and so that
* it does *not* get removed if platform_add_devices fails!
*/
(void)platform_device_register(&fsg_uart);
platform_add_devices(fsg_devices, ARRAY_SIZE(fsg_devices));
if (request_irq(gpio_to_irq(FSG_RB_GPIO), &fsg_reset_handler,
IRQF_DISABLED | IRQF_TRIGGER_LOW,
"FSG reset button", NULL) < 0) {
printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
gpio_to_irq(FSG_RB_GPIO));
}
if (request_irq(gpio_to_irq(FSG_SB_GPIO), &fsg_power_handler,
IRQF_DISABLED | IRQF_TRIGGER_LOW,
"FSG power button", NULL) < 0) {
printk(KERN_DEBUG "Power Button IRQ %d not available\n",
gpio_to_irq(FSG_SB_GPIO));
}
/*
* Map in a portion of the flash and read the MAC addresses.
* Since it is stored in BE in the flash itself, we need to
* byteswap it if we're in LE mode.
*/
f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x400000);
if (f) {
#ifdef __ARMEB__
int i;
for (i = 0; i < 6; i++) {
fsg_plat_eth[0].hwaddr[i] = readb(f + 0x3C0422 + i);
fsg_plat_eth[1].hwaddr[i] = readb(f + 0x3C043B + i);
}
#else
/*
Endian-swapped reads from unaligned addresses are
required to extract the two MACs from the big-endian
Redboot config area in flash.
*/
fsg_plat_eth[0].hwaddr[0] = readb(f + 0x3C0421);
fsg_plat_eth[0].hwaddr[1] = readb(f + 0x3C0420);
fsg_plat_eth[0].hwaddr[2] = readb(f + 0x3C0427);
fsg_plat_eth[0].hwaddr[3] = readb(f + 0x3C0426);
fsg_plat_eth[0].hwaddr[4] = readb(f + 0x3C0425);
fsg_plat_eth[0].hwaddr[5] = readb(f + 0x3C0424);
fsg_plat_eth[1].hwaddr[0] = readb(f + 0x3C0439);
fsg_plat_eth[1].hwaddr[1] = readb(f + 0x3C043F);
fsg_plat_eth[1].hwaddr[2] = readb(f + 0x3C043E);
fsg_plat_eth[1].hwaddr[3] = readb(f + 0x3C043D);
fsg_plat_eth[1].hwaddr[4] = readb(f + 0x3C043C);
fsg_plat_eth[1].hwaddr[5] = readb(f + 0x3C0443);
#endif
iounmap(f);
}
printk(KERN_INFO "FSG: Using MAC address %pM for port 0\n",
fsg_plat_eth[0].hwaddr);
printk(KERN_INFO "FSG: Using MAC address %pM for port 1\n",
fsg_plat_eth[1].hwaddr);
}
static void __init sc8830_init_late(void)
{
platform_add_devices(late_devices, ARRAY_SIZE(late_devices));
}
static void __init ag5evm_init(void)
{
sh73a0_pinmux_init();
/* enable SCIFA2 */
gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
gpio_request(GPIO_FN_SCIFA2_RTS1_, NULL);
gpio_request(GPIO_FN_SCIFA2_CTS1_, NULL);
/* enable KEYSC */
gpio_request(GPIO_FN_KEYIN0_PU, NULL);
gpio_request(GPIO_FN_KEYIN1_PU, NULL);
gpio_request(GPIO_FN_KEYIN2_PU, NULL);
gpio_request(GPIO_FN_KEYIN3_PU, NULL);
gpio_request(GPIO_FN_KEYIN4_PU, NULL);
gpio_request(GPIO_FN_KEYIN5_PU, NULL);
gpio_request(GPIO_FN_KEYIN6_PU, NULL);
gpio_request(GPIO_FN_KEYIN7_PU, NULL);
gpio_request(GPIO_FN_KEYOUT0, NULL);
gpio_request(GPIO_FN_KEYOUT1, NULL);
gpio_request(GPIO_FN_KEYOUT2, NULL);
gpio_request(GPIO_FN_KEYOUT3, NULL);
gpio_request(GPIO_FN_KEYOUT4, NULL);
gpio_request(GPIO_FN_KEYOUT5, NULL);
gpio_request(GPIO_FN_PORT59_KEYOUT6, NULL);
gpio_request(GPIO_FN_PORT58_KEYOUT7, NULL);
gpio_request(GPIO_FN_KEYOUT8, NULL);
gpio_request(GPIO_FN_PORT149_KEYOUT9, NULL);
/* enable I2C channel 2 and 3 */
gpio_request(GPIO_FN_PORT236_I2C_SDA2, NULL);
gpio_request(GPIO_FN_PORT237_I2C_SCL2, NULL);
gpio_request(GPIO_FN_PORT248_I2C_SCL3, NULL);
gpio_request(GPIO_FN_PORT249_I2C_SDA3, NULL);
/* enable MMCIF */
gpio_request(GPIO_FN_MMCCLK0, NULL);
gpio_request(GPIO_FN_MMCCMD0_PU, NULL);
gpio_request(GPIO_FN_MMCD0_0, NULL);
gpio_request(GPIO_FN_MMCD0_1, NULL);
gpio_request(GPIO_FN_MMCD0_2, NULL);
gpio_request(GPIO_FN_MMCD0_3, NULL);
gpio_request(GPIO_FN_MMCD0_4, NULL);
gpio_request(GPIO_FN_MMCD0_5, NULL);
gpio_request(GPIO_FN_MMCD0_6, NULL);
gpio_request(GPIO_FN_MMCD0_7, NULL);
gpio_request(GPIO_PORT208, NULL); /* Reset */
gpio_direction_output(GPIO_PORT208, 1);
/* enable SMSC911X */
gpio_request(GPIO_PORT144, NULL); /* PINTA2 */
gpio_direction_input(GPIO_PORT144);
gpio_request(GPIO_PORT145, NULL); /* RESET */
gpio_direction_output(GPIO_PORT145, 1);
/* FSI A */
gpio_request(GPIO_FN_FSIACK, NULL);
gpio_request(GPIO_FN_FSIAILR, NULL);
gpio_request(GPIO_FN_FSIAIBT, NULL);
gpio_request(GPIO_FN_FSIAISLD, NULL);
gpio_request(GPIO_FN_FSIAOSLD, NULL);
/* IrDA */
gpio_request(GPIO_FN_PORT241_IRDA_OUT, NULL);
gpio_request(GPIO_FN_PORT242_IRDA_IN, NULL);
gpio_request(GPIO_FN_PORT243_IRDA_FIRSEL, NULL);
/* LCD panel */
gpio_request(GPIO_PORT217, NULL); /* RESET */
gpio_direction_output(GPIO_PORT217, 0);
mdelay(1);
gpio_set_value(GPIO_PORT217, 1);
mdelay(100);
/* LCD backlight controller */
gpio_request(GPIO_PORT235, NULL); /* RESET */
gpio_direction_output(GPIO_PORT235, 0);
lcd_backlight_reset();
/* MIPI-DSI clock setup */
__raw_writel(0x2a809010, DSI0PHYCR);
/* enable SDHI0 on CN15 [SD I/F] */
gpio_request(GPIO_FN_SDHICD0, NULL);
gpio_request(GPIO_FN_SDHIWP0, NULL);
gpio_request(GPIO_FN_SDHICMD0, NULL);
gpio_request(GPIO_FN_SDHICLK0, NULL);
gpio_request(GPIO_FN_SDHID0_3, NULL);
gpio_request(GPIO_FN_SDHID0_2, NULL);
gpio_request(GPIO_FN_SDHID0_1, NULL);
gpio_request(GPIO_FN_SDHID0_0, NULL);
/* enable SDHI1 on CN4 [WLAN I/F] */
gpio_request(GPIO_FN_SDHICLK1, NULL);
gpio_request(GPIO_FN_SDHICMD1_PU, NULL);
gpio_request(GPIO_FN_SDHID1_3_PU, NULL);
gpio_request(GPIO_FN_SDHID1_2_PU, NULL);
gpio_request(GPIO_FN_SDHID1_1_PU, NULL);
gpio_request(GPIO_FN_SDHID1_0_PU, NULL);
gpio_request(GPIO_PORT114, "sdhi1_power");
gpio_direction_output(GPIO_PORT114, 0);
#ifdef CONFIG_CACHE_L2X0
/* Shared attribute override enable, 64K*8way */
l2x0_init(__io(0xf0100000), 0x00460000, 0xc2000fff);
#endif
sh73a0_add_standard_devices();
platform_add_devices(ag5evm_devices, ARRAY_SIZE(ag5evm_devices));
}
