/** * \brief Application entry point for TWIHS Slave example. * * \return Unused (ANSI-C compatibility). */ int main(void) { uint32_t i; /* Initialize the SAM system */ sysclk_init(); /* Initialize the board */ board_init(); /* Initialize the console UART */ configure_console(); /* Output example information */ puts(STRING_HEADER); /* Enable the peripheral clock for TWIHS */ pmc_enable_periph_clk(BOARD_ID_TWIHS_SLAVE); for (i = 0; i < MEMORY_SIZE; i++) { emulate_driver.uc_memory[i] = 0; } emulate_driver.us_offset_memory = 0; emulate_driver.uc_acquire_address = 0; emulate_driver.us_page_address = 0; /* Configure TWIHS as slave */ puts("-I- Configuring the TWIHS in slave mode\n\r"); twihs_slave_init(BOARD_BASE_TWIHS_SLAVE, SLAVE_ADDRESS); /* Clear receipt buffer */ twihs_read_byte(BOARD_BASE_TWIHS_SLAVE); /* Configure TWIHS interrupts */ NVIC_DisableIRQ(BOARD_TWIHS_IRQn); NVIC_ClearPendingIRQ(BOARD_TWIHS_IRQn); NVIC_SetPriority(BOARD_TWIHS_IRQn, 0); NVIC_EnableIRQ(BOARD_TWIHS_IRQn); twihs_enable_interrupt(BOARD_BASE_TWIHS_SLAVE, TWIHS_SR_SVACC); while (1) { } }
void timer_init() { // assign a clock signal pmc_enable_periph_clk(ID_TC0); // divide master clock by 32 and enable waveform mode in the channel mode register TC_CMR0_CH0 = CMR_DIV_32 + CMR_WAVE_EN + CMR_WAVE_SEL; // load the RC register with the value to interrupt every 1 ms TC_RC0_CH0 = 3125; // enable the RC compare interrupt in the Interrupt Enable Register TC_IER0_CH0 = INT_CPCS; // enable interrupts for timer 0 NVIC_EnableIRQ(TC0_IRQn); // enable timer 0 in the channel control register TC_CCR0_CH0 = CCR_CLKEN + CCR_SWTRG; }
void pwm_init() { // assign a clock signal to this peripheral pmc_enable_periph_clk(ID_PWM); // divide the master clock by 32 and then again by 3 in the mode register PWM_MR = (0x05*0x100) + 0x03; // set up the pwm module to use CLKA and set the polarity in the channel mode register PWM_CMR0 = (0x02*0x100) + 0x0B; // set the period to 511 in the period register to match the speed value from the potentiometer PWM_CPRD0 = 0x1FF; // initialize the duty cycle to 0 in the Duty Register PWM_CDTY0 = 0x00; // enable pwm 0 in enable register PWM_ENA = CHID0; }
/** * \brief Application entry point for sdramc_example. * * \return Unused (ANSI-C compatibility). */ int main(void) { /* Initialize the system */ sysclk_init(); board_init(); sleepmgr_init(); /* Configure the console uart */ configure_console(); /* Output example information */ puts(STRING_HEADER); /* Systick configuration */ if (SysTick_Config(SystemCoreClock / (1000))) { puts("-F- Systick configuration error.\r"); } /* Enable SMC peripheral clock */ pmc_enable_periph_clk(ID_SDRAMC); /* Complete SDRAM configuration */ sdramc_init((sdramc_memory_dev_t *)&SDRAM_ISSI_IS42S16100E, sysclk_get_cpu_hz()); sdram_enable_unaligned_support(); /* Test external SDRAM access */ puts("Test external SDRAM access. \r"); if (sdram_access_test() == SDRAMC_OK) { puts("SDRAM access is successful.\n\r"); } else { puts("SDRAM access is failed.\r"); } if (sdram_benchmarks() == SDRAMC_OK) { puts("SDRAM test: pass.\r"); } for (;;) { sleepmgr_enter_sleep(); } }
/** * \brief Test TRNG setting. * * This test sets the TRNG to generate interrupt when new random value is completed. * * \param test Current test case. */ static void run_trng_test(const struct test_case *test) { /* Configure PMC */ pmc_enable_periph_clk(ID_TRNG); /* Enable TRNG */ trng_enable(TRNG); /* Enable TRNG interrupt */ NVIC_DisableIRQ(TRNG_IRQn); NVIC_ClearPendingIRQ(TRNG_IRQn); NVIC_SetPriority(TRNG_IRQn, 0); NVIC_EnableIRQ(TRNG_IRQn); trng_enable_interrupt(TRNG); while(trng_int_flag == 0); test_assert_true(test, trng_int_flag == 1, "No random value is generated"); }
/** * \brief Configure the Push buttons * * Configure the PIO as inputs and generate corresponding interrupt when * pressed or released. */ static void configure_buttons(void) { /* Enable the peripheral clock for PCK and push button */ pmc_enable_periph_clk(PIN_PUSHBUTTON_1_ID); /* Adjust PIO debounce filter parameters, using 10 Hz filter. */ pio_set_debounce_filter(PIN_PUSHBUTTON_1_PIO, PIN_PUSHBUTTON_1_MASK, 10); /* Initialize PIOs interrupt handlers, see PIO definition in board.h. */ /* Interrupt on rising edge */ pio_handler_set(PIN_PUSHBUTTON_1_PIO, PIN_PUSHBUTTON_1_ID, PIN_PUSHBUTTON_1_MASK, PIN_PUSHBUTTON_1_ATTR, button1_handler); /* Enable PIO controller IRQs. */ NVIC_EnableIRQ((IRQn_Type) PIN_PUSHBUTTON_1_ID); /* Enable PIO line interrupts. */ pio_enable_interrupt(PIN_PUSHBUTTON_1_PIO, PIN_PUSHBUTTON_1_MASK); }
/** * \brief DACC configuration. */ static void dsp_configure_dacc(void) { pmc_enable_periph_clk(ID_DACC); /* * DACC setting * -Refresh Period = 1024*REFRESH/DACC Clock * -No max Speed Mode * -Startup time of 0 periods of DACClock */ dacc_set_timing(DACC, DACC_REFRESH, 0, DACC_MR_STARTUP_0); /* Set TIO Output of TC Channel 1 as trigger */ dacc_set_trigger(DACC,2); /* Set to half word transfer */ dacc_set_transfer_mode(DACC, DACC_MR_WORD_HALF); #if (SAM3S) || (SAM3XA) /* Set to No Sleep Mode and No Fast Wake Up Mode*/ dacc_set_power_save(DACC, 0, 0); #endif /* Select both left/right speaker channels. */ dacc_set_channel_selection(DACC, SPEAKER_CHANNEL_R); dacc_set_channel_selection(DACC, SPEAKER_CHANNEL_L); /* Enable DACC channels. */ dacc_enable_channel(DACC, SPEAKER_CHANNEL_R); dacc_enable_channel(DACC, SPEAKER_CHANNEL_L); /* Tag selection mode enabled. */ dacc_enable_flexible_selection(DACC); /* Get board DACC PDC base address. */ dacc_pdc = dacc_get_pdc_base(DACC); /* Enable DACC interrupt. */ dacc_enable_interrupt(DACC,DACC_IER_ENDTX); NVIC_SetPriority(DACC_IRQn, INT_PRIORITY_DACC); NVIC_EnableIRQ(DACC_IRQn); }
/** * \brief Configures SAMG55 for low power demo. */ void init_specific_board(void) { /* For the lowest power consumption all pins should have defined state * e.g. no floating pins. * Set all pins as input with pull-up enabled with the exception: * - CDC UART RX (PA27) should not be pulled up because this pin is * driven by the EDBG in this application * - CDC UART TX (PA28) This is actively driven by the SAMG55 in this * application * - PB04 should set as output * - PB8 PB9 PB10 PB11 should set as output */ pio_set_input(PIOA, 0xE7FFFFFF, PIO_PULLUP); pio_set_input(PIOA, 0x18000000, PIO_DEFAULT); pio_set_input(PIOB, 0xFFFF0EF, PIO_PULLUP); pio_set_output(PIOB, 0xF10, HIGH, DISABLE, DISABLE); /* Enable the PMC clocks of push button for wakeup */ pmc_enable_periph_clk(ID_PIOA); pio_handler_set_priority(PIOA, PIOA_IRQn, IRQ_PRIORITY_PIO); }
/*------------------------------------------------------------------------------ Name: startTimer parameters: tc - timer counter channel - timer channel irq - isr request frequency - frequency of inetrrupts description: initializes timer for periodic interrupt generation ------------------------------------------------------------------------------*/ void BldcControl::configureTimerInterrupt(Tc *tc, uint32_t channel, IRQn_Type irq, uint32_t frequency) { pmc_set_writeprotect(false); pmc_enable_periph_clk((uint32_t)irq); TC_Configure(tc, channel, TC_CMR_WAVE | TC_CMR_WAVSEL_UP_RC | TC_CMR_TCCLKS_TIMER_CLOCK4); uint32_t rc = VARIANT_MCK/128/frequency; //128 because we selected //TIMER_CLOCK4 above TC_SetRA(tc, channel, rc/2); //50% high, 50% low TC_SetRC(tc, channel, rc); TC_Start(tc, channel); tc->TC_CHANNEL[channel].TC_IER=TC_IER_CPCS; tc->TC_CHANNEL[channel].TC_IDR=~TC_IER_CPCS; NVIC_EnableIRQ(irq); }
//------------------------------------------------------------------------------ void SdSpiAltDriver::begin(uint8_t csPin) { m_csPin = csPin; pinMode(m_csPin, OUTPUT); digitalWrite(m_csPin, HIGH); SPI.begin(); #if USE_SAM3X_DMAC pmc_enable_periph_clk(ID_DMAC); dmac_disable(); DMAC->DMAC_GCFG = DMAC_GCFG_ARB_CFG_FIXED; dmac_enable(); #if USE_SAM3X_BUS_MATRIX_FIX MATRIX->MATRIX_WPMR = 0x4d415400; MATRIX->MATRIX_MCFG[1] = 1; MATRIX->MATRIX_MCFG[2] = 1; MATRIX->MATRIX_SCFG[0] = 0x01000010; MATRIX->MATRIX_SCFG[1] = 0x01000010; MATRIX->MATRIX_SCFG[7] = 0x01000010; #endif // USE_SAM3X_BUS_MATRIX_FIX #endif // USE_SAM3X_DMAC }
/** * \brief Configure the ADC for the light sensor. */ static void configure_adc(void) { struct adc_config adc_cfg; /* Configure ADC pin for light sensor. */ gpio_configure_pin(LIGHT_SENSOR_GPIO, LIGHT_SENSOR_FLAGS); /* Enable ADC clock. */ pmc_enable_periph_clk(ID_ADC); /* Configure ADC. */ adc_enable(); #if SAMG55 adc_select_clock_source_mck(ADC); #endif adc_get_config_defaults(&adc_cfg); adc_init(ADC, &adc_cfg); adc_channel_enable(ADC, ADC_CHANNEL_0); adc_set_trigger(ADC, ADC_TRIG_SW); }
/** * \brief GMAC link test function. * * \param test Current test case. */ static void run_gmac_link_test(const struct test_case *test) { gmac_options_t gmac_option; uint8_t uc_rc = 1; /* Enable GMAC clock */ pmc_enable_periph_clk(ID_GMAC); /* Fill in GMAC options */ gmac_option.uc_copy_all_frame = 1; gmac_option.uc_no_boardcast = 1; memcpy(gmac_option.uc_mac_addr, gs_uc_mac_address, sizeof(gs_uc_mac_address)); gs_gmac_dev.p_hw = GMAC; /* Init GMAC driver structure */ gmac_dev_init(GMAC, &gs_gmac_dev, &gmac_option); /* Enable Interrupt */ NVIC_EnableIRQ(GMAC_IRQn); /* Init MAC PHY driver */ if (ethernet_phy_init(GMAC, BOARD_GMAC_PHY_ADDR, sysclk_get_cpu_hz()) != GMAC_OK) { uc_rc = 0; } /* Auto Negotiate, work in RMII mode */ if (ethernet_phy_auto_negotiate(GMAC, BOARD_GMAC_PHY_ADDR) != GMAC_OK) { uc_rc = 0; } /* Establish ethernet link */ while (ethernet_phy_set_link(GMAC, BOARD_GMAC_PHY_ADDR, 1) != GMAC_OK) { uc_rc = 0; } test_assert_true(test, uc_rc == 1, "Test GMAC: GMAC link test error!"); }
/************************************************************************* Initialization of the I2C bus interface. Need to be called only once *************************************************************************/ void HAL::i2cInit(unsigned long clockSpeedHz) { // enable TWI pmc_enable_periph_clk(TWI_ID); // Configure pins PIO_Configure(g_APinDescription[SDA_PIN].pPort, g_APinDescription[SDA_PIN].ulPinType, g_APinDescription[SDA_PIN].ulPin, g_APinDescription[SDA_PIN].ulPinConfiguration); PIO_Configure(g_APinDescription[SCL_PIN].pPort, g_APinDescription[SCL_PIN].ulPinType, g_APinDescription[SCL_PIN].ulPin, g_APinDescription[SCL_PIN].ulPinConfiguration); // Set to Master mode with known state TWI_INTERFACE->TWI_CR = TWI_CR_SVEN; TWI_INTERFACE->TWI_CR = TWI_CR_SWRST; //TWI_INTERFACE->TWI_RHR; // no action??? TWI_INTERFACE->TWI_IMR = 0; TWI_INTERFACE->TWI_CR = TWI_CR_SVDIS; TWI_INTERFACE->TWI_CR = TWI_CR_MSDIS; TWI_INTERFACE->TWI_CR = TWI_CR_MSEN; // Set i2c clock rate uint32_t dwCkDiv = 0; uint32_t dwClDiv; while ( dwClDiv == 0 ) { dwClDiv = ((F_CPU_TRUE / (2 * clockSpeedHz)) - 4) / (1<<dwCkDiv); if ( dwClDiv > 255 ) { dwCkDiv++; dwClDiv = 0; } } TWI_INTERFACE->TWI_CWGR = 0; TWI_INTERFACE->TWI_CWGR = (dwCkDiv << 16) | (dwClDiv << 8) | dwClDiv; }
uint8_t twi_init(void){ /*TWI0: - Clock: PA4 (Laranja) - Data: PA3 (Cinza) - Terra: GND (Preta) - VCC: 3V3 (Branco)*/ gpio_configure_pin(TWI0_DATA_GPIO, TWI0_DATA_FLAGS); gpio_configure_pin(TWI0_CLK_GPIO, TWI0_CLK_FLAGS); twi_options_t opt_twi; pmc_enable_periph_clk(ID_TWI0); opt_twi.master_clk = sysclk_get_cpu_hz(); opt_twi.speed = TWI_SPEED; opt_twi.smbus = 0; uint8_t twi_status = twi_master_init(TWI0, &opt_twi); return twi_status; }
/** * \brief Initialize SAM3N_EK board for low power test. */ void init_specific_board(void) { /* Configure all PIOs as inputs to save power */ pio_set_input(PIOA, 0xFFFFFFFF, PIO_PULLUP); pio_set_input(PIOB, 0xFFFFFFFF, PIO_PULLUP); pio_set_input(PIOC, 0xFFFFFFFF, PIO_PULLUP); /* Disable USB Clock */ pmc_disable_upll_clock(); /* Disable PIO pull-up for PA0 (VBUS_USB) */ pio_pull_up(PIOA, (0x1 << 0), 0); /* Initialize ADC pin as ADC input mode to save power */ adc_enable_channel(ADC, ADC_CHANNEL_0); adc12b_enable_channel(ADC12B, ADC_CHANNEL_3); /* Enable the PMC clocks of push button for wakeup */ pmc_enable_periph_clk(ID_PIOA); pio_handler_set_priority(PIOA, PIOA_IRQn, IRQ_PRIOR_PIO); }
/** * \brief Configure Timer Counter 0 (TC0) to generate an interrupt every 200ms. * This interrupt will be used to flush USART input and echo back. */ static void configure_tc(void) { uint32_t ul_div; uint32_t ul_tcclks; static uint32_t ul_sysclk; /* Get system clock. */ ul_sysclk = sysclk_get_cpu_hz(); /* Configure PMC. */ pmc_enable_periph_clk(ID_TC0); /* Configure TC for a 50Hz frequency and trigger on RC compare. */ tc_find_mck_divisor(TC_FREQ, ul_sysclk, &ul_div, &ul_tcclks, ul_sysclk); tc_init(TC0, 0, ul_tcclks | TC_CMR_CPCTRG); tc_write_rc(TC0, 0, (ul_sysclk / ul_div) / TC_FREQ); /* Configure and enable interrupt on RC compare. */ NVIC_EnableIRQ((IRQn_Type)ID_TC0); tc_enable_interrupt(TC0, 0, TC_IER_CPCS); }
/* * Initializing A/D conversion. */ void adc_setup(void) { /* Enable the specified peripheral clock (ADC clock). If function returns 0, then we can proceed... */ pmc_enable_periph_clk(ID_ADC); /* init A/D conversion */ adc_init(ADC, sysclk_get_main_hz(), ADC_CLOCK, 8); /* configure timing for A/D conversion */ adc_configure_timing(ADC, 0, ADC_SETTLING_TIME_3, 1); /* set 12 bit resolution */ adc_set_resolution(ADC, ADC_MR_LOWRES_BITS_12); /* enable ADC channel - specified in 'adc.h' */ /*adc_enable_channel(ADC, ADC_CHANNEL_LCDButtons); adc_enable_channel(ADC, ADC_CHANNEL_Tank1); adc_enable_channel(ADC, ADC_CHANNEL_Tank2);*/ ADC->ADC_CHER = 3200; /* configure conversion to be triggered by software */ adc_configure_trigger(ADC, ADC_TRIG_SW, 0); /* indicate everything's OK! */ }
//initialize the i2c bus int i2c_rtc_init(void){ twi_options_t opt; uint32_t r; //enable peripherial mode on TWI lines gpio_configure_pin(PIO_PA3_IDX,(PIO_PERIPH_A | PIO_DEFAULT)); gpio_configure_pin(PIO_PA4_IDX,(PIO_PERIPH_A | PIO_DEFAULT)); //enable TWI clock pmc_enable_periph_clk(RTC_ID_TWI); //setup up TWI options opt.master_clk = sysclk_get_cpu_hz(); opt.speed = 400000; //400kHz opt.smbus = 0x0; opt.chip = 0x0; if((r=twi_master_init(RTC_BASE_TWI, &opt)) != TWI_SUCCESS){ printf("error setting up I2C for RTC: %d\n",(int)r); return -1; } return 0; }
static void ext_sram_init(void) { pmc_enable_periph_clk(ID_SMC); smc_set_setup_timing(SMC, 0, SMC_SETUP_NWE_SETUP(1) | SMC_SETUP_NCS_WR_SETUP(1) | SMC_SETUP_NRD_SETUP(1) | SMC_SETUP_NCS_RD_SETUP(1)); smc_set_pulse_timing(SMC, 0, SMC_PULSE_NWE_PULSE(6) | SMC_PULSE_NCS_WR_PULSE(6) | SMC_PULSE_NRD_PULSE(6) | SMC_PULSE_NCS_RD_PULSE(6)); smc_set_cycle_timing(SMC, 0, SMC_CYCLE_NWE_CYCLE(7) | SMC_CYCLE_NRD_CYCLE(7)); smc_set_mode(SMC, 0, SMC_MODE_READ_MODE | SMC_MODE_WRITE_MODE | SMC_MODE_DBW_8_BIT); /* Configure LB, enable SRAM access */ pio_configure_pin(PIN_EBI_NLB, PIN_EBI_NLB_FLAGS); /* Pull down LB, enable sram access */ pio_set_pin_low(PIN_EBI_NLB); }
//Setup the hardware for the PWM with a specific frequency and period bool customPWMinit(unsigned long freq, unsigned long per){ if(!isEnabled) { globFrequency = freq; globPeriod = per; //Turn on the PWM peripheral pmc_enable_periph_clk(PWM_INTERFACE_ID); //Configure the clocks PWMC_ConfigureClocks(freq*per, 0, VARIANT_MCK); //VARIANT_MCK is the master clock frequency isEnabled = true; return 0; } else { //The hardware is already set, and you are trying to set it again return 1; } }
platform_result_t platform_spi_init( const platform_spi_t* spi, const platform_spi_config_t* config ) { UNUSED_PARAMETER(spi); UNUSED_PARAMETER(config); platform_mcu_powersave_disable( ); Pdc* spi_pdc = spi_get_pdc_base( spi->peripheral ); /* Setup chip select pin */ platform_gpio_init( config->chip_select, OUTPUT_PUSH_PULL ); platform_gpio_output_high( config->chip_select ); /* Setup other pins */ platform_gpio_peripheral_pin_init( spi->mosi_pin, ( IOPORT_MODE_MUX_A | IOPORT_MODE_PULLUP ) ); platform_gpio_peripheral_pin_init( spi->miso_pin, ( IOPORT_MODE_MUX_A | IOPORT_MODE_PULLUP ) ); platform_gpio_peripheral_pin_init( spi->clk_pin, ( IOPORT_MODE_MUX_A | IOPORT_MODE_PULLUP ) ); /* Configure an SPI peripheral. */ pmc_enable_periph_clk( spi->peripheral_id ); spi_disable( spi->peripheral ); spi_reset( spi->peripheral ); spi_set_lastxfer( spi->peripheral ); spi_set_master_mode( spi->peripheral ); spi_disable_mode_fault_detect( spi->peripheral ); spi_set_peripheral_chip_select_value( spi->peripheral, 0 ); spi_set_clock_polarity( spi->peripheral, 0, ( ( config->mode && SPI_CLOCK_IDLE_HIGH ) ? (1) : (0) ) ); spi_set_clock_phase( spi->peripheral, 0, ( ( config->mode && SPI_CLOCK_RISING_EDGE ) ? (1) : (0) ) ); spi_set_bits_per_transfer( spi->peripheral, 0, SPI_CSR_BITS_8_BIT ); spi_set_baudrate_div( spi->peripheral, 0, (uint8_t)( CPU_CLOCK_HZ / config->speed ) ); spi_set_transfer_delay( spi->peripheral, 0, 0, 0 ); spi_enable( spi->peripheral ); pdc_disable_transfer( spi_pdc, PERIPH_PTCR_RXTDIS | PERIPH_PTCR_TXTDIS ); platform_mcu_powersave_enable( ); return PLATFORM_SUCCESS; }
DueTimer& DueTimer::setFrequency(double frequency){ /* Set the timer frequency (in Hz) */ // Prevent negative frequencies if(frequency <= 0) { frequency = 1; } // Remember the frequency _frequency[timer] = frequency; // Get current timer configuration Timer t = Timers[timer]; uint32_t rc = 0; uint8_t clock; // Tell the Power Management Controller to disable // the write protection of the (Timer/Counter) registers: pmc_set_writeprotect(false); // Enable clock for the timer pmc_enable_periph_clk((uint32_t)t.irq); // Find the best clock for the wanted frequency clock = bestClock(frequency, rc); // Set up the Timer in waveform mode which creates a PWM // in UP mode with automatic trigger on RC Compare // and sets it up with the determined internal clock as clock input. TC_Configure(t.tc, t.channel, TC_CMR_WAVE | TC_CMR_WAVSEL_UP_RC | clock); // Reset counter and fire interrupt when RC value is matched: TC_SetRC(t.tc, t.channel, rc); // Enable the RC Compare Interrupt... t.tc->TC_CHANNEL[t.channel].TC_IER=TC_IER_CPCS; // ... and disable all others. t.tc->TC_CHANNEL[t.channel].TC_IDR=~TC_IER_CPCS; return *this; }
static void _uart_init (void) { tUartControl *pControl; sam_uart_opt_t config; int result; pControl = uart_control[0]; // pmc_enable_periph_clk (ID_UART); // pio_configure (PIOA, PIO_PERIPH_A | PIO_PULLUP, PIO_PA8A_URXD, PIO_DEFAULT); pio_configure (PIOA, PIO_PERIPH_A, PIO_PA9A_UTXD, PIO_DEFAULT); // config.ul_mck = sysclk_get_cpu_hz(); //config.ul_baudrate = BAUD; config.ul_baudrate = 115200; config.ul_mode = UART_MR_PAR_NO; config.ul_chmode = 0; str_buf_init_std (&pControl->rx_buffer); str_buf_init_std (&pControl->tx_buffer); result = uart_init (UART, &config); uart_reset_tx(UART); uart_reset_rx(UART); UART->UART_CR = UART_CR_RSTSTA; uart_enable_rx(UART); uart_enable_tx(UART); uart_enable_interrupt (UART, US_IER_RXRDY); NVIC_EnableIRQ(UART_IRQn); }
/** * \brief Initialize SPI as master. */ static void spi_master_initialize(void) { uint32_t i; puts("-I- Initialize SPI as master\r"); for (i = 0; i < COMM_BUFFER_SIZE; i++) { gs_uc_spi_m_tbuffer[i] = i; } /* Get pointer to SPI master PDC register base */ g_p_spim_pdc = spi_get_pdc_base(SPI_MASTER_BASE); #if (SAMG55) /* Enable the peripheral and set SPI mode. */ flexcom_enable(BOARD_FLEXCOM_SPI); flexcom_set_opmode(BOARD_FLEXCOM_SPI, FLEXCOM_SPI); #else /* Configure an SPI peripheral. */ pmc_enable_periph_clk(SPI_ID); #endif spi_disable(SPI_MASTER_BASE); spi_reset(SPI_MASTER_BASE); spi_set_lastxfer(SPI_MASTER_BASE); spi_set_master_mode(SPI_MASTER_BASE); spi_disable_mode_fault_detect(SPI_MASTER_BASE); spi_set_peripheral_chip_select_value(SPI_MASTER_BASE, SPI_CHIP_SEL); spi_set_clock_polarity(SPI_MASTER_BASE, SPI_CHIP_SEL, SPI_CLK_POLARITY); spi_set_clock_phase(SPI_MASTER_BASE, SPI_CHIP_SEL, SPI_CLK_PHASE); spi_set_bits_per_transfer(SPI_MASTER_BASE, SPI_CHIP_SEL, SPI_CSR_BITS_8_BIT); spi_set_baudrate_div(SPI_MASTER_BASE, SPI_CHIP_SEL, (sysclk_get_cpu_hz() / gs_ul_spi_clock)); spi_set_transfer_delay(SPI_MASTER_BASE, SPI_CHIP_SEL, SPI_DLYBS, SPI_DLYBCT); spi_enable(SPI_MASTER_BASE); pdc_disable_transfer(g_p_spim_pdc, PERIPH_PTCR_RXTDIS | PERIPH_PTCR_TXTDIS); }
/** * \brief Initial the ssc interface. */ static void init_ssc(void) { clock_opt_t tx_clk_option; data_frame_opt_t tx_data_frame_option; /* Initialize clock */ pmc_enable_periph_clk(ID_SSC); /* Reset SSC */ ssc_reset(SSC); /* Configure SSC */ ssc_set_clock_divider(SSC, SAMPLE_RATE * (BITS_BY_SLOT + 1) * 2, sysclk_get_peripheral_hz()); /* Transmitter clock mode configuration. */ tx_clk_option.ul_cks = SSC_TCMR_CKS_MCK; tx_clk_option.ul_cko = SSC_TCMR_CKO_CONTINUOUS; tx_clk_option.ul_cki = 0; tx_clk_option.ul_ckg = SSC_TCMR_CKG_NONE; tx_clk_option.ul_start_sel = SSC_TCMR_START_RF_EDGE; tx_clk_option.ul_sttdly = 1; tx_clk_option.ul_period = BITS_BY_SLOT - 1; /* Transmitter frame mode configuration. */ tx_data_frame_option.ul_datlen = BITS_BY_SLOT - 1; tx_data_frame_option.ul_msbf = SSC_TFMR_MSBF; tx_data_frame_option.ul_datnb = 0; tx_data_frame_option.ul_fslen = BITS_BY_SLOT - 1; tx_data_frame_option.ul_fslen_ext = 0; tx_data_frame_option.ul_fsos = SSC_TFMR_FSOS_NEGATIVE; tx_data_frame_option.ul_fsedge = SSC_TFMR_FSEDGE_POSITIVE; /* Configure the SSC transmitter to I2S mode. */ ssc_set_transmitter(SSC, &tx_clk_option, &tx_data_frame_option); /* Disable transmitter first */ ssc_disable_tx(SSC); /* Disable All Interrupt */ ssc_disable_interrupt(SSC, 0xFFFFFFFF); }
static void configure_tc(void) { /* * Aqui atualizamos o clock da cpu que foi configurado em sysclk init * * O valor atual est'a em : 120_000_000 Hz (120Mhz) */ uint32_t ul_sysclk = TC_CMR_TCCLKS_TIMER_CLOCK5; /* * Ativa o clock do periférico TC 0 * */ pmc_enable_periph_clk(ID_TC0); /* * Configura TC para operar no modo de comparação e trigger RC * devemos nos preocupar com o clock em que o TC irá operar ! * * Cada TC possui 3 canais, escolher um para utilizar. * * Uma opção para achar o valor do divisor é utilizar a funcao * tc_find_mck_divisor() */ tc_init(TC0, 0, TC_CMR_CPCTRG | TC_CMR_TCCLKS_TIMER_CLOCK5); tc_write_rc(TC0, 0, 534); /* * Devemos configurar o NVIC para receber interrupções do TC */ NVIC_EnableIRQ(ID_TC0); tc_enable_interrupt(TC0, 0, TC_IER_CPCS); tc_start(TC0,0); }
/** * \brief Initialize SAM3N_EK board for low power test. */ void init_specific_board(void) { /* Configure all PIOs as inputs to save power */ pio_set_input(PIOA, 0xFFFFFFFF, PIO_PULLUP); pio_set_input(PIOB, 0xFFFFFFFF, PIO_PULLUP); pio_set_input(PIOC, 0xFFFFFFFF, PIO_PULLUP); /* Disable USB Clock */ pmc_disable_udpck(); /* Disable PIO pull-up for PB10(USB_DDM), PB11(USB_DDP) */ pio_pull_up(PIOB, (0x3 << 10), 0); /* Disable PIO pull-up for PC21(USB_CNX) */ pio_pull_up(PIOC, (0x1 << 21), 0); /* Initialize ADC pin as ADC input mode to save power */ adc_enable_channel(ADC, ADC_CHANNEL_4); /* Enable the PMC clocks of push button for wakeup */ pmc_enable_periph_clk(ID_PIOB); pio_handler_set_priority(PIOB, PIOB_IRQn, IRQ_PRIOR_PIO); }
/** * \brief Configure the INTN interrupt. */ void configure_intn(void (*p_handler) (uint32_t, uint32_t)) { // gpio_configure_pin(KSZ8851SNL_INTN_GPIO, PIO_INPUT); // pio_set_input(PIOA, PIO_PA11_IDX, PIO_PULLUP); /* Configure PIO clock. */ pmc_enable_periph_clk(INTN_ID); /* Adjust PIO debounce filter parameters, uses 10 Hz filter. */ pio_set_debounce_filter(INTN_PIO, INTN_PIN_MSK, 10); /* Initialize PIO interrupt handlers, see PIO definition in board.h. */ pio_handler_set(INTN_PIO, INTN_ID, INTN_PIN_MSK, INTN_ATTR, p_handler); /* Enable NVIC interrupts. */ NVIC_SetPriority(INTN_IRQn, INT_PRIORITY_PIO); NVIC_EnableIRQ((IRQn_Type)INTN_ID); /* Enable PIO interrupts. */ pio_enable_interrupt(INTN_PIO, INTN_PIN_MSK); }
/** * \brief Configure to trigger AFEC by TIOA output of timer. */ static void configure_tc_trigger(void) { uint32_t ul_div = 0; uint32_t ul_tc_clks = 0; uint32_t ul_sysclk = sysclk_get_cpu_hz(); /* Enable peripheral clock. */ pmc_enable_periph_clk(ID_TC0); /* Configure TC for a 1Hz frequency and trigger on RC compare. */ tc_find_mck_divisor(1, ul_sysclk, &ul_div, &ul_tc_clks, ul_sysclk); tc_init(TC0, 0, ul_tc_clks | TC_CMR_CPCTRG | TC_CMR_WAVE | TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_SET); TC0->TC_CHANNEL[0].TC_RA = (ul_sysclk / ul_div) / 2; TC0->TC_CHANNEL[0].TC_RC = (ul_sysclk / ul_div) / 1; /* Start the Timer. */ tc_start(TC0, 0); afec_set_trigger(AFEC1, AFEC_TRIG_TIO_CH_0); }
/** * Configure the MCI_CFG to enable the HS mode * \param pMci Pointer to the low level MCI driver. * \param hsEnable 1 to enable, 0 to disable HS mode. */ uint8_t MCI_EnableHsMode(Mcid* pMci, uint8_t hsEnable) { Hsmci *pMciHw = pMci->pMciHw; uint32_t cfgr; uint32_t mciDis; uint8_t rc = 0; assert(pMci); assert(pMci->pMciHw); pmc_enable_periph_clk(pMci->mciId); mciDis = pmc_is_periph_clk_enabled(pMci->mciId); cfgr = pMciHw->HSMCI_CFG; if (hsEnable == 1) { cfgr |= HSMCI_CFG_HSMODE; } else { if (hsEnable == 0) { cfgr &= ~(uint32_t)HSMCI_CFG_HSMODE; } else { rc = ((cfgr & HSMCI_CFG_HSMODE) != 0); } } pMciHw->HSMCI_CFG = cfgr; if (mciDis) { // pmc_disable_periph_clk(pMci->mciId); } return rc; }