/* This is called during init_IRQ. We used to do it above, but this * was too early since init_IRQ was not yet called. */ void cpm_interrupt_init(void) { /* Initialize the CPM interrupt controller. */ ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr = (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) | ((CPM_INTERRUPT/2) << 13) | CICR_HP_MASK; ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr = 0; /* Set our interrupt handler with the core CPU. */ if (request_8xxirq(CPM_INTERRUPT, cpm_interrupt, 0, "cpm", NULL) != 0) panic("Could not allocate CPM IRQ!"); /* Install our own error handler. */ cpm_install_handler(CPMVEC_ERROR, cpm_error_interrupt, NULL); ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN; }
int Can_RequestIrq(int minor, int irq, irqservice_t handler) { int err=0; DBGin("Can_RequestIrq"); /* int request_irq(unsigned int irq, // interrupt number void (*handler)(int, void *, struct pt_regs *), // pointer to ISR irq, dev_id, registers on stack unsigned long irqflags, const char *devname, void *dev_id); dev_id - The device ID of this handler (see below). This parameter is usually set to NULL, but should be non-null if you wish to do IRQ sharing. This doesn't matter when hooking the interrupt, but is required so that, when free_irq() is called, the correct driver is unhooked. Since this is a void *, it can point to anything (such as a device-spe cific structure, or even empty space), but make sure you pass the same pointer to free_irq(). */ #if defined(CONFIG_PPC) /* LINUX_PPC */ err = request_8xxirq( irq, handler, 0, "Can", NULL ); #elif defined(MCF5282) { int i; /* 19 Int vectors are used on Interrupt Controller 1 */ for( i = 136; i < 155; i++) { err = request_irq( i, handler, SA_SHIRQ, "Can", &Can_minors[minor]); if(err) { DBGout();return err; } } } #else err = request_irq( irq, handler, SA_SHIRQ, "Can", &Can_minors[minor]); #endif if( !err ){ /* printk("Requested IRQ[%d]: %d @ 0x%x", minor, irq, handler); */ /* Now the kernel has assigned a service to the Interruptvector, time to enable the hardware to genearte an ISR. here should be used a generic function e.g. can_irqsetup(minor) and do whatever needed for the app. hardware to reduce #ifdef clutter */ #if defined(CCPC104) pc104_irqsetup(); #endif #if defined(MCF5282) mcf_irqsetup(); #endif irq2minormap[irq] = minor; irq2pidmap[irq] = current->pid; DBGprint(DBG_BRANCH,("Requested IRQ: %d @ 0x%lx", irq, (unsigned long)handler)); IRQ_requested[minor] = 1; } DBGout();return err; }
int __init avia_gt_init(void) { struct dbox_info_struct *dbox_info = (struct dbox_info_struct *)NULL; int result = (int)0; printk("avia_gt_core: $Id: avia_gt_core.c,v 1.23 2002/10/05 15:01:12 Jolt Exp $\n"); if (chip_type == -1) { printk("avia_gt_core: autodetecting chip type... "); dbox_get_info_ptr(&dbox_info); if (dbox_info->enxID != -1) { chip_type = AVIA_GT_CHIP_TYPE_ENX; printk("AViA eNX found\n"); } else if (dbox_info->gtxID != -1) { chip_type = AVIA_GT_CHIP_TYPE_GTX; printk("AViA GTX found\n"); } else { printk("no supported chip type found\n"); } } if ((chip_type != AVIA_GT_CHIP_TYPE_ENX) && (chip_type != AVIA_GT_CHIP_TYPE_GTX)) { printk("avia_gt_core: Unsupported chip type (gt_info->chip_type = %d)\n", gt_info->chip_type); return -EIO; } memset(gt_isr_proc_list, 0, sizeof(gt_isr_proc_list)); gt_info = kmalloc(sizeof(gt_info), GFP_KERNEL); if (!gt_info) { printk(KERN_ERR "avia_gt_core: Could not allocate info memory!\n"); avia_gt_exit(); return -1; } gt_info->chip_type = chip_type; init_state = 1; if (avia_gt_chip(ENX)) gt_info->reg_addr = (unsigned char *)ioremap(ENX_REG_BASE, ENX_REG_SIZE); else if (avia_gt_chip(GTX)) gt_info->reg_addr = (unsigned char *)ioremap(GTX_REG_BASE, GTX_REG_SIZE); if (!gt_info->reg_addr) { printk(KERN_ERR "avia_gt_core: Failed to remap register space.\n"); return -1; } init_state = 2; if (avia_gt_chip(ENX)) gt_info->mem_addr = (unsigned char*)ioremap(ENX_MEM_BASE, ENX_MEM_SIZE); else if (avia_gt_chip(GTX)) gt_info->mem_addr = (unsigned char*)ioremap(GTX_MEM_BASE, GTX_MEM_SIZE); if (!gt_info->mem_addr) { printk(KERN_ERR "avia_gt_core: Failed to remap memory space.\n"); avia_gt_exit(); return -1; } init_state = 3; if (avia_gt_chip(ENX)) result = request_8xxirq(ENX_INTERRUPT, avia_gt_irq_handler, 0, "avia_gt", 0); else if (avia_gt_chip(GTX)) result = request_8xxirq(GTX_INTERRUPT, avia_gt_irq_handler, 0, "avia_gt", 0); if (result) { printk(KERN_ERR "avia_gt_core: Could not allocate IRQ!\n"); avia_gt_exit(); return -1; } init_state = 4; if (avia_gt_chip(ENX)) avia_gt_enx_init(); else if (avia_gt_chip(GTX)) avia_gt_gtx_init(); init_state = 5; #if (!defined(MODULE)) || (defined(MODULE) && !defined(STANDALONE)) if (avia_gt_accel_init()) { avia_gt_exit(); return -1; } init_state = 6; if (avia_gt_dmx_init()) { avia_gt_exit(); return -1; } init_state = 7; if (avia_gt_gv_init()) { avia_gt_exit(); return -1; } init_state = 8; if (avia_gt_pcm_init()) { avia_gt_exit(); return -1; } init_state = 9; if (avia_gt_capture_init()) { avia_gt_exit(); return -1; } init_state = 10; if (avia_gt_pig_init()) { avia_gt_exit(); return -1; } init_state = 11; if (avia_gt_ir_init()) { avia_gt_exit(); return -1; } init_state = 12; if (avia_gt_vbi_init()) { avia_gt_exit(); return -1; } avia_gt_vbi_start(); init_state = 13; #endif printk(KERN_NOTICE "avia_gt_core: Loaded AViA eNX/GTX driver\n"); return 0; }
/* * Register a VMEBus or On-Board interrupt handler */ int request_ip860_irq (unsigned int irq, void (*handler)(int, void *, struct pt_regs *), void *argument) { volatile immap_t *immr = (volatile immap_t *)IMAP_ADDR; unsigned int real_irq; debugk ("Install IP860 handler for IRQ %d\n", irq); real_irq = irq; if (real_irq < NR_VME_INTERRUPTS) { /* VME Bus interrupt */ intr_hdlr_t *ih = &vme_intr_hdlr[real_irq]; if (ih->handler) { printk ("Nested VMEBus interrupts not supported (yet)" " [IRQ: VME=%d SIU=%d]\n", real_irq, IP860_IRQ_VME_INTR); return (-EBUSY); } ih->handler = handler; ih->arg = argument; debugk ("VMEBus IRQ %d installed\n", real_irq); /* * Enable VME Bus interrupt when the first handler gets installed */ if (intr_cnt[IP860_IRQ_VME_INTR] == 0) { debugk ("Enabling IP860 VME interrupt handler\n"); if (request_8xxirq( IP860_IRQ_VME_INTR, vme_interrupt_handler, 0, "IP860 VMEBus", argument ) != 0) { panic ("Can't allocate IP860 VME IRQ"); } } ++intr_cnt[IP860_IRQ_VME_INTR]; /* increment reference count */ return (0); } real_irq -= NR_VME_INTERRUPTS; if (real_irq < NR_ONBOARD_INTERRUPTS) { /* Onboard interrupt */ onbd_intr_hdlr_t *ih = &onbd_intr_hdlr[real_irq]; int siu_irq = ih->irq; if (ih->int_hand.handler) { printk ("Nested %s interrupts not supported (yet)" " [IRQ: OnBD=%d, SIU=%d]\n", ih->name, real_irq, siu_irq); return (-EBUSY); } ih->int_hand.handler = handler; ih->int_hand.arg = argument; debugk ("Enabling IP860 %s interrupt handler\n", ih->name); /* * Enable interrupt when the first handler gets installed * * For the onboard interrupts this is not really required * since these don't share the IRQ, but it's easier * to use identical code. */ if (intr_cnt[siu_irq] == 0) { int rc; /* * IP Module interrupts need special handling since * several interrupts may share the same SIU IRQ */ switch (irq) { case IP860_ONBOARD_IRQ_IP_B_1: case IP860_ONBOARD_IRQ_IP_B_0: case IP860_ONBOARD_IRQ_IP_A_1: case IP860_ONBOARD_IRQ_IP_A_0: rc = request_8xxirq(siu_irq, ip_interrupt_handler, 0, ih->name, (void *)ih); break; default: rc = request_8xxirq(siu_irq, obd_interrupt_handler, 0, ih->name, (void *)ih); break; } if (rc != 0) panic ("Can't allocate IP860_INTR IRQ"); /* Make interrupt edge-triggered */ immr->im_siu_conf.sc_siel |= (0x80000000 >> siu_irq); }