void zg_init() { uint8_t clr; spiBegin(SS_PB2); spiSetClockDivider(SPI_CLOCK_DIV2); clr = SPSR; clr = SPDR; intr_occured = 0; intr_valid = 0; lastRssi = 0; zg_drv_state = DRV_STATE_INIT; zg_conn_status = 0; tx_ready = 0; rx_ready = 0; cnf_pending = 0; zg_buf = uip_buf; zg_buf_len = UIP_BUFSIZE; zg_chip_reset(); zg_interrupt2_reg(); zg_interrupt_reg(0xff, 0); zg_interrupt_reg(0x80|0x40, 1); ssid_len = (uint8_t)strlen((char *)ssid); security_passphrase_len = (uint8_t)strlen_P((PGM_P)security_passphrase); /* Create the semaphore used by the ISR to indicate that a Rx frame is ready for processing. */ vSemaphoreCreateBinary( xZGIntrSemaphore ); }
void zg_init() { U8 clr; ZG2100_SpiInit(); clr = SPSR; clr = SPDR; intr_occured = 0; intr_valid = 0; zg_drv_state = DRV_STATE_INIT; zg_conn_status = 0; tx_ready = 0; rx_ready = 0; cnf_pending = 0; zg_buf = uip_buf; zg_buf_len = UIP_BUFSIZE; zg_chip_reset(); zg_interrupt2_reg(); zg_interrupt_reg(0xff, 0); zg_interrupt_reg(0x80|0x40, 1); ssid_len = (U8)strlen_P(ssid); security_passphrase_len = (U8)strlen_P(security_passphrase); }
void zg_init() { unsigned char clr; spiInit(); clr = SPSR; clr = SPDR; intr_occured = 0; intr_valid = 0; zg_drv_state = DRV_STATE_INIT; zg_conn_status = 0; tx_ready = 0; rx_ready = 0; cnf_pending = 0; // zg_buf = MyNetworkBuffer; // zg_buf_len = NETWORK_BUFSIZE; zg_buf = mmalloc(150); zg_buf_len = 150; zg_chip_reset(); zg_interrupt2_reg(); zg_interrupt_reg(0xff, 0); zg_interrupt_reg(0x80|0x40, 1); ssid_len = (unsigned char)strlen(ssid); security_passphrase_len = (unsigned char)strlen(security_passphrase); }
void zg_init() { intr_occured = 0; intr_valid = 0; lastRssi = 0; zg_drv_state = DRV_STATE_INIT; zg_conn_status = 0; tx_ready = 0; rx_ready = 0; cnf_pending = 0; zg_buf = uip_buf; zg_buf_len = UIP_BUFSIZE; zg_chip_reset(); zg_interrupt2_reg(); zg_interrupt_reg(0xff, 0); zg_interrupt_reg(0x80|0x40, 1); ssid_len = (U8)strlen(ssid); }
void macReset(void) { zg_chip_reset(); }