/**
* @brief Wait for injected group conversion to be completed.
* @param hadc: ADC handle
* @param Timeout: Timeout value in millisecond.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
{
uint32_t tickstart;
/* Variables for polling in case of scan mode enabled and polling for each */
/* conversion. */
__IO uint32_t Conversion_Timeout_CPU_cycles = 0;
uint32_t Conversion_Timeout_CPU_cycles_max = 0;
/* Check the parameters */
assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
/* Get timeout */
tickstart = HAL_GetTick();
/* Polling for end of conversion: differentiation if single/sequence */
/* conversion. */
/* For injected group, flag JEOC is set only at the end of the sequence, */
/* not for each conversion within the sequence. */
/* - If single conversion for injected group (scan mode disabled or */
/* InjectedNbrOfConversion ==1), flag jEOC is used to determine the */
/* conversion completion. */
/* - If sequence conversion for injected group (scan mode enabled and */
/* InjectedNbrOfConversion >=2), flag JEOC is set only at the end of the */
/* sequence. */
/* To poll for each conversion, the maximum conversion time is computed */
/* from ADC conversion time (selected sampling time + conversion time of */
/* 12.5 ADC clock cycles) and APB2/ADC clock prescalers (depending on */
/* settings, conversion time range can be from 28 to 32256 CPU cycles). */
if ((hadc->Instance->JSQR & ADC_JSQR_JL) == RESET)
{
/* Wait until End of Conversion flag is raised */
while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
{
/* Check if timeout is disabled (set to infinite wait) */
if(Timeout != HAL_MAX_DELAY)
{
if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
{
/* Update ADC state machine to timeout */
hadc->State = HAL_ADC_STATE_TIMEOUT;
/* Process unlocked */
__HAL_UNLOCK(hadc);
return HAL_ERROR;
}
}
}
}
else
{
/* Poll with maximum conversion time */
/* - Computation of CPU clock cycles corresponding to ADC clock cycles */
/* and ADC maximum conversion cycles on all channels. */
/* - Wait for the expected ADC clock cycles delay */
Conversion_Timeout_CPU_cycles_max = ((SystemCoreClock
/ HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC))
* ADC_CONVCYCLES_MAX_RANGE(hadc) );
while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max)
{
/* Check if timeout is disabled (set to infinite wait) */
if(Timeout != HAL_MAX_DELAY)
{
if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
{
/* Update ADC state machine to timeout */
hadc->State = HAL_ADC_STATE_TIMEOUT;
/* Process unlocked */
__HAL_UNLOCK(hadc);
return HAL_ERROR;
}
}
Conversion_Timeout_CPU_cycles ++;
}
}
/* Clear injected group conversion flag (and regular conversion flag raised */
/* simultaneously) */
__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC | ADC_FLAG_EOC);
/* Update state machine on conversion status if not in error state */
if(hadc->State != HAL_ADC_STATE_ERROR)
{
/* Update ADC state machine */
if(hadc->State != HAL_ADC_STATE_EOC_INJ_REG)
{
if(hadc->State == HAL_ADC_STATE_EOC_REG)
{
/* Change ADC state */
hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
}
else
{
/* Change ADC state */
hadc->State = HAL_ADC_STATE_EOC_INJ;
}
}
}
/* Return ADC state */
return HAL_OK;
}
/**
* @brief Wait for injected group conversion to be completed.
* @param hadc: ADC handle
* @param Timeout: Timeout value in millisecond.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
{
uint32_t tickstart;
/* Variables for polling in case of scan mode enabled and polling for each */
/* conversion. */
/* Note: Variable "conversion_timeout_cpu_cycles" set to offset 28 CPU */
/* cycles to compensate number of CPU cycles for processing of variable */
/* "conversion_timeout_cpu_cycles_max" */
uint32_t conversion_timeout_cpu_cycles = 28;
uint32_t conversion_timeout_cpu_cycles_max = 0;
/* Check the parameters */
assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
/* Get timeout */
tickstart = HAL_GetTick();
/* Polling for end of conversion: differentiation if single/sequence */
/* conversion. */
/* For injected group, flag JEOC is set only at the end of the sequence, */
/* not for each conversion within the sequence. */
/* If setting "EOCSelection" is set to poll for each single conversion, */
/* management of polling depends on setting of injected group sequencer: */
/* - If single conversion for injected group (scan mode disabled or */
/* InjectedNbrOfConversion ==1), flag JEOC is used to determine the */
/* conversion completion. */
/* - If sequence conversion for injected group (scan mode enabled and */
/* InjectedNbrOfConversion >=2), flag JEOC is set only at the end of the */
/* sequence. */
/* To poll for each conversion, the maximum conversion time is computed */
/* from ADC conversion time (selected sampling time + conversion time of */
/* 12 ADC clock cycles) and APB2/ADC clock prescalers (depending on */
/* settings, conversion time range can vary from 8 to several thousands */
/* of CPU cycles). */
/* Note: On STM32L1, setting "EOCSelection" is related to regular group */
/* only, by hardware. For compatibility with other STM32 devices, */
/* this setting is related also to injected group by software. */
if (((hadc->Instance->JSQR & ADC_JSQR_JL) == RESET) ||
(hadc->Init.EOCSelection != ADC_EOC_SINGLE_CONV) )
{
/* Wait until End of Conversion flag is raised */
while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
{
/* Check if timeout is disabled (set to infinite wait) */
if(Timeout != HAL_MAX_DELAY)
{
if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
{
/* Update ADC state machine to timeout */
hadc->State = HAL_ADC_STATE_TIMEOUT;
/* Process unlocked */
__HAL_UNLOCK(hadc);
return HAL_TIMEOUT;
}
}
}
}
else
{
/* Computation of CPU cycles corresponding to ADC conversion cycles. */
/* Retrieve ADC clock prescaler and ADC maximum conversion cycles on all */
/* channels. */
conversion_timeout_cpu_cycles_max = ADC_GET_CLOCK_PRESCALER_DECIMAL(hadc);
conversion_timeout_cpu_cycles_max *= ADC_CONVCYCLES_MAX_RANGE(hadc);
/* Poll with maximum conversion time */
while(conversion_timeout_cpu_cycles < conversion_timeout_cpu_cycles_max)
{
/* Check if timeout is disabled (set to infinite wait) */
if(Timeout != HAL_MAX_DELAY)
{
if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
{
/* Update ADC state machine to timeout */
hadc->State = HAL_ADC_STATE_TIMEOUT;
/* Process unlocked */
__HAL_UNLOCK(hadc);
return HAL_TIMEOUT;
}
}
conversion_timeout_cpu_cycles ++;
}
}
/* Clear end of conversion flag of injected group if low power feature */
/* "Auto Wait" is disabled, to not interfere with this feature until data */
/* register is read using function HAL_ADCEx_InjectedGetValue(). */
if (hadc->Init.LowPowerAutoWait == DISABLE)
{
/* Clear injected group conversion flag */
__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC);
}
/* Update state machine on conversion status if not in error state */
if(hadc->State != HAL_ADC_STATE_ERROR)
{
/* Update ADC state machine */
if(hadc->State != HAL_ADC_STATE_EOC_INJ_REG)
{
if(hadc->State == HAL_ADC_STATE_EOC_REG)
{
/* Change ADC state */
hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
}
else
{
/* Change ADC state */
hadc->State = HAL_ADC_STATE_EOC_INJ;
}
}
}
/* Return ADC state */
return HAL_OK;
}