void adc_set_sample_time_on_all_channels(uint32_t adc, uint8_t time)
{
uint8_t channel;
uint32_t reg32 = 0;
for (channel = 0; channel <= 9; channel++)
reg32 |= ((time & 0xf) << (channel * 3));
ADC_SMPR3(adc) = reg32;
ADC_SMPR2(adc) = reg32;
ADC_SMPR1(adc) = reg32;
ADC_SMPR0(adc) = ((time & 0xf) << 3) | (time & 0xf);
}
/** @brief ADC Set the Sample Time for a Single Channel
The sampling time can be selected in ADC clock cycles from 4 to 384.
@param[in] adc Unsigned int32. ADC block base address @ref adc_reg_base.
@param[in] channel uint8. ADC Channel integer 0..18 or from @ref adc_channel.
@param[in] time Unsigned int8. Sampling time selection from @ref adc_sample_rg.
*/
void adc_set_sample_time(uint32_t adc, uint8_t channel, uint8_t time)
{
uint32_t reg32;
if (channel < 10) {
reg32 = ADC_SMPR3(adc);
reg32 &= ~(0x7 << (channel * 3));
reg32 |= (time << (channel * 3));
ADC_SMPR3(adc) = reg32;
} else if (channel < 20) {
reg32 = ADC_SMPR2(adc);
reg32 &= ~(0x7 << ((channel - 10) * 3));
reg32 |= (time << ((channel - 10) * 3));
ADC_SMPR2(adc) = reg32;
} else {
reg32 = ADC_SMPR1(adc);
reg32 &= ~(0x7 << ((channel - 20) * 3));
reg32 |= (time << ((channel - 20) * 3));
ADC_SMPR1(adc) = reg32;
}
}
void adc_set_sample_time_on_all_channels(uint32_t adc, uint8_t time)
{
uint8_t i;
uint32_t reg32 = 0;
for (i = 0; i <= 9; i++) {
reg32 |= (time << (i * 3));
}
ADC_SMPR0(adc) = reg32;
ADC_SMPR1(adc) = reg32;
ADC_SMPR2(adc) = reg32;
ADC_SMPR3(adc) = reg32;
}
/**
* @brief Configures the ADC injected group and the selected channel to be
* linked to the injected group.
* @note Possibility to update parameters on the fly:
* This function initializes injected group, following calls to this
* function can be used to reconfigure some parameters of structure
* "ADC_InjectionConfTypeDef" on the fly, without reseting the ADC.
* The setting of these parameters is conditioned to ADC state:
* this function must be called when ADC is not under conversion.
* @param hadc: ADC handle
* @param sConfigInjected: Structure of ADC injected group and ADC channel for
* injected group.
* @retval None
*/
HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
{
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
__IO uint32_t wait_loop_index = 0;
/* Check the parameters */
assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv));
assert_param(IS_ADC_RANGE(sConfigInjected->InjectedOffset));
if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
{
assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
}
if(sConfigInjected->ExternalTrigInjecConvEdge != ADC_INJECTED_SOFTWARE_START)
{
assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
}
/* Process locked */
__HAL_LOCK(hadc);
/* Configuration of injected group sequencer: */
/* - if scan mode is disabled, injected channels sequence length is set to */
/* 0x00: 1 channel converted (channel on regular rank 1) */
/* Parameter "InjectedNbrOfConversion" is discarded. */
/* Note: Scan mode is present by hardware on this device and, if */
/* disabled, discards automatically nb of conversions. Anyway, nb of */
/* conversions is forced to 0x00 for alignment over all STM32 devices. */
/* - if scan mode is enabled, injected channels sequence length is set to */
/* parameter ""InjectedNbrOfConversion". */
if (hadc->Init.ScanConvMode == ADC_SCAN_DISABLE)
{
if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
{
/* Clear the old SQx bits for all injected ranks */
MODIFY_REG(hadc->Instance->JSQR ,
ADC_JSQR_JL |
ADC_JSQR_JSQ4 |
ADC_JSQR_JSQ3 |
ADC_JSQR_JSQ2 |
ADC_JSQR_JSQ1 ,
ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,
ADC_INJECTED_RANK_1,
0x01) );
}
/* If another injected rank than rank1 was intended to be set, and could */
/* not due to ScanConvMode disabled, error is reported. */
else
{
/* Update ADC state machine to error */
hadc->State = HAL_ADC_STATE_ERROR;
tmp_hal_status = HAL_ERROR;
}
}
else
{
/* Since injected channels rank conv. order depends on total number of */
/* injected conversions, selected rank must be below or equal to total */
/* number of injected conversions to be updated. */
if (sConfigInjected->InjectedRank <= sConfigInjected->InjectedNbrOfConversion)
{
/* Clear the old SQx bits for the selected rank */
/* Set the SQx bits for the selected rank */
MODIFY_REG(hadc->Instance->JSQR ,
ADC_JSQR_JL |
ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,
sConfigInjected->InjectedRank,
sConfigInjected->InjectedNbrOfConversion) ,
ADC_JSQR_JL_SHIFT(sConfigInjected->InjectedNbrOfConversion) |
ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,
sConfigInjected->InjectedRank,
sConfigInjected->InjectedNbrOfConversion) );
}
else
{
/* Clear the old SQx bits for the selected rank */
MODIFY_REG(hadc->Instance->JSQR ,
ADC_JSQR_JL |
ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,
sConfigInjected->InjectedRank,
sConfigInjected->InjectedNbrOfConversion) ,
0x00000000 );
}
}
/* Enable external trigger if trigger selection is different of software */
/* start. */
/* Note: This configuration keeps the hardware feature of parameter */
/* ExternalTrigConvEdge "trigger edge none" equivalent to */
/* software start. */
if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
{
MODIFY_REG(hadc->Instance->CR2 ,
ADC_CR2_JEXTEN |
ADC_CR2_JEXTSEL ,
sConfigInjected->ExternalTrigInjecConv |
sConfigInjected->ExternalTrigInjecConvEdge );
}
else
{
MODIFY_REG(hadc->Instance->CR2,
ADC_CR2_JEXTEN |
ADC_CR2_JEXTSEL ,
0x00000000 );
}
/* Configuration of injected group */
/* Parameters update conditioned to ADC state: */
/* Parameters that can be updated only when ADC is disabled: */
/* - Automatic injected conversion */
/* - Injected discontinuous mode */
if ((ADC_IS_ENABLE(hadc) == RESET))
{
hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO |
ADC_CR1_JDISCEN );
/* Automatic injected conversion can be enabled if injected group */
/* external triggers are disabled. */
if (sConfigInjected->AutoInjectedConv == ENABLE)
{
if (sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
{
SET_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO);
}
else
{
/* Update ADC state machine to error */
hadc->State = HAL_ADC_STATE_ERROR;
tmp_hal_status = HAL_ERROR;
}
}
/* Injected discontinuous can be enabled only if auto-injected mode is */
/* disabled. */
if (sConfigInjected->InjectedDiscontinuousConvMode == ENABLE)
{
if (sConfigInjected->AutoInjectedConv == DISABLE)
{
SET_BIT(hadc->Instance->CR1, ADC_CR1_JDISCEN);
}
else
{
/* Update ADC state machine to error */
hadc->State = HAL_ADC_STATE_ERROR;
tmp_hal_status = HAL_ERROR;
}
}
}
/* Channel sampling time configuration */
/* For InjectedChannels 0 to 9 */
if (sConfigInjected->InjectedChannel < ADC_CHANNEL_10)
{
MODIFY_REG(hadc->Instance->SMPR3,
ADC_SMPR3(ADC_SMPR3_SMP0, sConfigInjected->InjectedChannel),
ADC_SMPR3(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
}
/* For InjectedChannels 10 to 19 */
else if (sConfigInjected->InjectedChannel < ADC_CHANNEL_20)
{
MODIFY_REG(hadc->Instance->SMPR2,
ADC_SMPR2(ADC_SMPR2_SMP10, sConfigInjected->InjectedChannel),
ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
}
/* For InjectedChannels 20 to 26 for devices Cat.1, Cat.2, Cat.3 */
/* For InjectedChannels 20 to 29 for devices Cat4, Cat.5 */
else if (sConfigInjected->InjectedChannel <= ADC_SMPR1_CHANNEL_MAX)
{
MODIFY_REG(hadc->Instance->SMPR1,
ADC_SMPR1(ADC_SMPR1_SMP20, sConfigInjected->InjectedChannel),
ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
}
/* For InjectedChannels 30 to 31 for devices Cat4, Cat.5 */
else
{
ADC_SMPR0_CHANNEL_SET(hadc, sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
}
/* Configure the offset: offset enable/disable, InjectedChannel, offset value */
switch(sConfigInjected->InjectedRank)
{
case 1:
/* Set injected channel 1 offset */
MODIFY_REG(hadc->Instance->JOFR1,
ADC_JOFR1_JOFFSET1,
sConfigInjected->InjectedOffset);
break;
case 2:
/* Set injected channel 2 offset */
MODIFY_REG(hadc->Instance->JOFR2,
ADC_JOFR2_JOFFSET2,
sConfigInjected->InjectedOffset);
break;
case 3:
/* Set injected channel 3 offset */
MODIFY_REG(hadc->Instance->JOFR3,
ADC_JOFR3_JOFFSET3,
sConfigInjected->InjectedOffset);
break;
case 4:
default:
MODIFY_REG(hadc->Instance->JOFR4,
ADC_JOFR4_JOFFSET4,
sConfigInjected->InjectedOffset);
break;
}
/* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
/* and VREFINT measurement path. */
if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) ||
(sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT) )
{
SET_BIT(ADC->CCR, ADC_CCR_TSVREFE);
if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR))
{
/* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));
while(wait_loop_index != 0)
{
wait_loop_index--;
}
}
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
/* Return function status */
return tmp_hal_status;
}
