Beispiel #1
0
MV_VOID mvAhbToMbusCpuWinCopy(MV_VOID)
{
    MV_U32 winNum;

    for( winNum = 0; winNum < MAX_AHB_TO_MBUS_WINS; winNum++ ) 
    {
	    if (winNum != MV_AHB_TO_MBUS_INTREG_WIN)
	    {
		MV_REG_WRITE(AHB_TO_MBUS_WIN_CTRL_REG(1, winNum),
		    MV_REG_READ(AHB_TO_MBUS_WIN_CTRL_REG(0, winNum)));
		MV_REG_WRITE(AHB_TO_MBUS_WIN_BASE_REG(1, winNum),
		    MV_REG_READ(AHB_TO_MBUS_WIN_BASE_REG(0, winNum)));
		/* We have remap register only for win [7..0] */
		if (winNum != MAX_AHB_TO_MBUS_REMAP_WINS)
		{
		    MV_REG_WRITE(AHB_TO_MBUS_WIN_REMAP_LOW_REG(1, winNum), 
			MV_REG_READ(AHB_TO_MBUS_WIN_REMAP_LOW_REG(0, winNum)));
		    MV_REG_WRITE(AHB_TO_MBUS_WIN_REMAP_HIGH_REG(1, winNum),
			MV_REG_READ(AHB_TO_MBUS_WIN_REMAP_HIGH_REG(0, winNum)));
		}
	    }
	    else
	    {
		MV_REG_WRITE(AHB_TO_MBUS_WIN_INTEREG_REG(1),
		    MV_REG_READ(AHB_TO_MBUS_WIN_INTEREG_REG(0)));
	    }
    }
}
/*******************************************************************************
* ahbToMbusRemapRegOffsGet - Get CPU address remap register offsets
*
* DESCRIPTION:
* 		CPU to PCI address remap registers offsets are inconsecutive.
*		This function returns PCI address remap registers offsets.
*
* INPUT:
*       winNum - Address decode window number. See MV_U32 enumerator.
*
* OUTPUT:
*       None.
*
* RETURN:
*		MV_ERROR if winNum is not a PCI one.
*
*******************************************************************************/
static MV_STATUS ahbToMbusRemapRegOffsGet(MV_U32 winNum, AHB_TO_MBUS_REMAP_REG_OFFS *pRemapRegs)
{
	switch (winNum) {
	case 0:
	case 1:
	case 2:
	case 3:
	case 4:
	case 5:
	case 6:
	case 7:
	case 13:
		pRemapRegs->lowRegOffs = AHB_TO_MBUS_WIN_REMAP_LOW_REG(winNum);
		pRemapRegs->highRegOffs = AHB_TO_MBUS_WIN_REMAP_HIGH_REG(winNum);
		break;
	default:
		pRemapRegs->lowRegOffs = 0;
		pRemapRegs->highRegOffs = 0;

		DB(mvOsPrintf("ahbToMbusRemapRegOffsGet: ERR. Invalid winNum %d\n", winNum));
		return MV_NO_SUCH;
	}

	return MV_OK;
}
Beispiel #3
0
/*******************************************************************************
* ahbToMbusRemapRegOffsGet - Get CPU address remap register offsets
*
* DESCRIPTION:
* 		CPU to PCI address remap registers offsets are inconsecutive.
*		This function returns PCI address remap registers offsets.
*
* INPUT:
*       winNum - Address decode window number. See MV_U32 enumerator.
*
* OUTPUT:
*       None.
*
* RETURN:
*		MV_ERROR if winNum is not a PCI one.
*
*******************************************************************************/
static MV_STATUS ahbToMbusRemapRegOffsGet(MV_U32 winNum,
									AHB_TO_MBUS_REMAP_REG_OFFS *pRemapRegs)
{
	switch (winNum)
	{
		case 0:
        case 1:
			pRemapRegs->lowRegOffs  = AHB_TO_MBUS_WIN_REMAP_LOW_REG(winNum);
			pRemapRegs->highRegOffs = AHB_TO_MBUS_WIN_REMAP_HIGH_REG(winNum);
			break;
		case 2:
		case 3:
			if((mvCtrlModelGet() == MV_5281_DEV_ID) ||
				(mvCtrlModelGet() == MV_1281_DEV_ID) ||
				(mvCtrlModelGet() == MV_6183_DEV_ID) ||
               (mvCtrlModelGet() == MV_6183L_DEV_ID))
			{
				pRemapRegs->lowRegOffs  = AHB_TO_MBUS_WIN_REMAP_LOW_REG(winNum);
				pRemapRegs->highRegOffs = AHB_TO_MBUS_WIN_REMAP_HIGH_REG(winNum);
				break;
			}
			else
			{
				pRemapRegs->lowRegOffs  = 0;
				pRemapRegs->highRegOffs = 0;

				DB(mvOsPrintf("ahbToMbusRemapRegOffsGet: ERR. Invalid winNum %d\n",
							winNum));
				return MV_NO_SUCH;
			}
		default:
		{
			pRemapRegs->lowRegOffs  = 0;
			pRemapRegs->highRegOffs = 0;

			DB(mvOsPrintf("ahbToMbusRemapRegOffsGet: ERR. Invalid winNum %d\n",
						winNum));
		   	return MV_NO_SUCH;
		}
	}

	return MV_OK;
}
Beispiel #4
0
/*******************************************************************************
* ahbToMbusRemapRegOffsGet - Get CPU address remap register offsets
*
* DESCRIPTION:
* 		CPU to PCI address remap registers offsets are inconsecutive. 
*		This function returns PCI address remap registers offsets.
*
* INPUT:
*       cpu      	- CPU id
*       winNum - Address decode window number. See MV_U32 enumerator.
*
* OUTPUT:
*       None.
*
* RETURN:
*		MV_ERROR if winNum is not a PCI one.
*
*******************************************************************************/
static MV_STATUS ahbToMbusRemapRegOffsGet(MV_U32 cpu, MV_U32 winNum, 
					    AHB_TO_MBUS_REMAP_REG_OFFS *pRemapRegs)
{
	pRemapRegs->lowRegOffs  = AHB_TO_MBUS_WIN_REMAP_LOW_REG(cpu, winNum);
	pRemapRegs->highRegOffs = AHB_TO_MBUS_WIN_REMAP_HIGH_REG(cpu, winNum);

	if ((pRemapRegs->lowRegOffs == 0) || (pRemapRegs->highRegOffs == 0))
	{
			DB(mvOsPrintf("ahbToMbusRemapRegOffsGet: ERR. Invalid winNum %d\n", 
						winNum));
		   	return MV_NO_SUCH;
	}

	return MV_OK;
}
Beispiel #5
0
MV_U32 mvPexHwConfigRead (MV_U32 pexIf, MV_U32 bus, MV_U32 dev, MV_U32 func,
                        MV_U32 regOff)
{
#endif
	MV_U32 pexData = 0;
	MV_U32	localDev,localBus;

	/* Parameter checking   */
	if (PEX_DEFAULT_IF != pexIf)
	{
		if (pexIf >= mvCtrlPexMaxIfGet())
		{
			mvOsPrintf("mvPexConfigRead: ERR. Invalid PEX interface %d\n",pexIf);
			return 0xFFFFFFFF;
		}
	}

	if (dev >= MAX_PEX_DEVICES)
	{
		DB(mvOsPrintf("mvPexConfigRead: ERR. device number illigal %d\n", dev));
		return 0xFFFFFFFF;
	}
	
	if (func >= MAX_PEX_FUNCS)
	{
		DB(mvOsPrintf("mvPexConfigRead: ERR. function num illigal %d\n", func));
		return 0xFFFFFFFF;
	}
	
	if (bus >= MAX_PEX_BUSSES)
	{
		DB(mvOsPrintf("mvPexConfigRead: ERR. bus number illigal %d\n", bus));
		return MV_ERROR;
	}
    	     
    DB(mvOsPrintf("mvPexConfigRead: pexIf %d, bus %d, dev %d, func %d, regOff 0x%x\n",
                   pexIf, bus, dev, func, regOff));
	
	localDev = mvPexLocalDevNumGet(pexIf);
	localBus = mvPexLocalBusNumGet(pexIf);
                                     
    /* Speed up the process. In case on no link, return MV_ERROR */
    if ((dev != localDev) || (bus != localBus))
    {
        pexData = MV_REG_READ(PEX_STATUS_REG(pexIf));

        if ((pexData & PXSR_DL_DOWN))
        {
            return MV_ERROR;
        }
    }

    /* in PCI Express we have only one device number */
	/* and this number is the first number we encounter 
	else that the localDev*/
	/* spec pex define return on config read/write on any device */
	if (bus == localBus)
	{
		if (localDev == 0)
		{
			/* if local dev is 0 then the first number we encounter 
			after 0 is 1 */
			if ((dev != 1)&&(dev != localDev))
			{
				return MV_ERROR;
			}	
		}
		else
		{
			/* if local dev is not 0 then the first number we encounter 
			is 0 */
	
			if ((dev != 0)&&(dev != localDev))
			{
				return MV_ERROR;
			}
		}
		if(func != 0 ) /* i.e bridge */
		{
			return MV_ERROR;
		}
	}
    
    
	/* Creating PEX address to be passed */
	pexData = (bus << PXCAR_BUS_NUM_OFFS);
	pexData |= (dev << PXCAR_DEVICE_NUM_OFFS);
	pexData |= (func << PXCAR_FUNC_NUM_OFFS);
	pexData |= (regOff & PXCAR_REG_NUM_MASK); /* lgacy register space */
	/* extended register space */
	pexData |=(((regOff & PXCAR_REAL_EXT_REG_NUM_MASK) >> 
				PXCAR_REAL_EXT_REG_NUM_OFFS) << PXCAR_EXT_REG_NUM_OFFS);

	pexData |= PXCAR_CONFIG_EN; 
	
	/* Write the address to the PEX configuration address register */
	MV_REG_WRITE(PEX_CFG_ADDR_REG(pexIf), pexData);

	DB(mvOsPrintf("mvPexConfigRead:address pexData=%x ",pexData));
    
	
	/* In order to let the PEX controller absorbed the address of the read 	*/
	/* transaction we perform a validity check that the address was written */
	if(pexData != MV_REG_READ(PEX_CFG_ADDR_REG(pexIf)))
	{
		return MV_ERROR;
	}

	/* cleaning Master Abort */
	MV_REG_BIT_SET(PEX_CFG_DIRECT_ACCESS(pexIf,PEX_STATUS_AND_COMMAND), 
				   PXSAC_MABORT);
#if 0
	/* Guideline (GL# PCI Express-1) Erroneous Read Data on Configuration   */
	/* This guideline is relevant for all devices except of the following devices:
	   88F5281-BO and above, 88F5181L-A0 and above, 88F1281 A0 and above
	   88F6183 A0 and above, 88F6183L  */
	if ( ( (dev != localDev) || (bus != localBus) ) && 
		(
		!(MV_5281_DEV_ID == mvCtrlModelGet())&&
		!((MV_5181_DEV_ID == mvCtrlModelGet())&& (mvCtrlRevGet() >= MV_5181L_A0_REV))&&
		!(MV_1281_DEV_ID == mvCtrlModelGet())&&
		!(MV_6183_DEV_ID == mvCtrlModelGet())&&
		!(MV_6183L_DEV_ID == mvCtrlModelGet())&&
		!(MV_6281_DEV_ID == mvCtrlModelGet())&&
		!(MV_6192_DEV_ID == mvCtrlModelGet())&&
		!(MV_6190_DEV_ID == mvCtrlModelGet())&&
        !(MV_6180_DEV_ID == mvCtrlModelGet())&& 
		!(MV_78XX0_DEV_ID == mvCtrlModelGet()) 
		))
	{

		/* PCI-Express configuration read work-around */

		/* we will use one of the Punit (AHBToMbus) windows to access the xbar 
		and read the data from there */
		/*
		Need to configure the 2 free Punit (AHB to MBus bridge) 
		address decoding windows:
		Configure the flash Window to handle Configuration space requests 
		for PEX0/1:
		1.    write 0x7931/0x7941 to the flash window and the size, 
		      79-xbar attr (pci cfg), 3/4-xbar target (pex0/1), 1-WinEn
		2.    write base to flash window 
		
		Configuration transactions from the CPU should write/read the data 
		to/from address of the form:
		addr[31:28] = 0x5 (for PEX0) or 0x6 (for PEX1)
		addr[27:24] = extended register number
		addr[23:16] = bus number
		addr[15:11] = device number
		addr[10:8]   = function number
		addr[7:0]     = register number
		*/

		#include "ctrlEnv/sys/mvAhbToMbus.h"
		{
			MV_U32 winNum;
			MV_AHB_TO_MBUS_DEC_WIN originWin;
			MV_U32 pciAddr=0;
			MV_U32 remapLow=0,remapHigh=0;

			/* 
			We will use DEV_CS2\Flash window for this workarround 
			*/
            
			winNum = mvAhbToMbusWinTargetGet(PEX_CONFIG_RW_WA_TARGET);

			/* save remap values if exist */
			if ((1 == winNum)||(0 == winNum))
			{
				remapLow = MV_REG_READ(AHB_TO_MBUS_WIN_REMAP_LOW_REG(winNum));
				remapHigh = MV_REG_READ(AHB_TO_MBUS_WIN_REMAP_HIGH_REG(winNum));

			}
			

			/* save the original window values */
			mvAhbToMbusWinGet(winNum,&originWin);

			if (PEX_CONFIG_RW_WA_USE_ORIGINAL_WIN_VALUES)
			{
				/* set the window as xbar window */
				if (pexIf)
				{
					MV_REG_WRITE(AHB_TO_MBUS_WIN_CTRL_REG(winNum), 
					(0x7931 | (((originWin.addrWin.size >> 16)-1) ) << 16));
				}
				else
				{
					MV_REG_WRITE(AHB_TO_MBUS_WIN_CTRL_REG(winNum), 
					(0x7941 | (((originWin.addrWin.size >> 16)-1) ) << 16));
				}

				MV_REG_WRITE(AHB_TO_MBUS_WIN_BASE_REG(winNum),
							 originWin.addrWin.baseLow);

				/*pciAddr = originWin.addrWin.baseLow;*/
				pciAddr = (MV_U32)CPU_MEMIO_UNCACHED_ADDR(
					(MV_U32)originWin.addrWin.baseLow);
			
			}