void vec4_vs_visitor::emit_prolog() { dst_reg sign_recovery_shift; dst_reg normalize_factor; dst_reg es3_normalize_factor; for (int i = 0; i < VERT_ATTRIB_MAX; i++) { if (vs_prog_data->inputs_read & BITFIELD64_BIT(i)) { uint8_t wa_flags = key->gl_attrib_wa_flags[i]; dst_reg reg(ATTR, i); dst_reg reg_d = reg; reg_d.type = BRW_REGISTER_TYPE_D; dst_reg reg_ud = reg; reg_ud.type = BRW_REGISTER_TYPE_UD; /* Do GL_FIXED rescaling for GLES2.0. Our GL_FIXED attributes * come in as floating point conversions of the integer values. */ if (wa_flags & BRW_ATTRIB_WA_COMPONENT_MASK) { dst_reg dst = reg; dst.type = brw_type_for_base_type(glsl_type::vec4_type); dst.writemask = (1 << (wa_flags & BRW_ATTRIB_WA_COMPONENT_MASK)) - 1; emit(MUL(dst, src_reg(dst), src_reg(1.0f / 65536.0f))); } /* Do sign recovery for 2101010 formats if required. */ if (wa_flags & BRW_ATTRIB_WA_SIGN) { if (sign_recovery_shift.file == BAD_FILE) { /* shift constant: <22,22,22,30> */ sign_recovery_shift = dst_reg(this, glsl_type::uvec4_type); emit(MOV(writemask(sign_recovery_shift, WRITEMASK_XYZ), src_reg(22u))); emit(MOV(writemask(sign_recovery_shift, WRITEMASK_W), src_reg(30u))); } emit(SHL(reg_ud, src_reg(reg_ud), src_reg(sign_recovery_shift))); emit(ASR(reg_d, src_reg(reg_d), src_reg(sign_recovery_shift))); } /* Apply BGRA swizzle if required. */ if (wa_flags & BRW_ATTRIB_WA_BGRA) { src_reg temp = src_reg(reg); temp.swizzle = BRW_SWIZZLE4(2,1,0,3); emit(MOV(reg, temp)); } if (wa_flags & BRW_ATTRIB_WA_NORMALIZE) { /* ES 3.0 has different rules for converting signed normalized * fixed-point numbers than desktop GL. */ if ((wa_flags & BRW_ATTRIB_WA_SIGN) && !use_legacy_snorm_formula) { /* According to equation 2.2 of the ES 3.0 specification, * signed normalization conversion is done by: * * f = c / (2^(b-1)-1) */ if (es3_normalize_factor.file == BAD_FILE) { /* mul constant: 1 / (2^(b-1) - 1) */ es3_normalize_factor = dst_reg(this, glsl_type::vec4_type); emit(MOV(writemask(es3_normalize_factor, WRITEMASK_XYZ), src_reg(1.0f / ((1<<9) - 1)))); emit(MOV(writemask(es3_normalize_factor, WRITEMASK_W), src_reg(1.0f / ((1<<1) - 1)))); } dst_reg dst = reg; dst.type = brw_type_for_base_type(glsl_type::vec4_type); emit(MOV(dst, src_reg(reg_d))); emit(MUL(dst, src_reg(dst), src_reg(es3_normalize_factor))); emit_minmax(BRW_CONDITIONAL_GE, dst, src_reg(dst), src_reg(-1.0f)); } else { /* The following equations are from the OpenGL 3.2 specification: * * 2.1 unsigned normalization * f = c/(2^n-1) * * 2.2 signed normalization * f = (2c+1)/(2^n-1) * * Both of these share a common divisor, which is represented by * "normalize_factor" in the code below. */ if (normalize_factor.file == BAD_FILE) { /* 1 / (2^b - 1) for b=<10,10,10,2> */ normalize_factor = dst_reg(this, glsl_type::vec4_type); emit(MOV(writemask(normalize_factor, WRITEMASK_XYZ), src_reg(1.0f / ((1<<10) - 1)))); emit(MOV(writemask(normalize_factor, WRITEMASK_W), src_reg(1.0f / ((1<<2) - 1)))); } dst_reg dst = reg; dst.type = brw_type_for_base_type(glsl_type::vec4_type); emit(MOV(dst, src_reg((wa_flags & BRW_ATTRIB_WA_SIGN) ? reg_d : reg_ud))); /* For signed normalization, we want the numerator to be 2c+1. */ if (wa_flags & BRW_ATTRIB_WA_SIGN) { emit(MUL(dst, src_reg(dst), src_reg(2.0f))); emit(ADD(dst, src_reg(dst), src_reg(1.0f))); } emit(MUL(dst, src_reg(dst), src_reg(normalize_factor))); } } if (wa_flags & BRW_ATTRIB_WA_SCALE) { dst_reg dst = reg; dst.type = brw_type_for_base_type(glsl_type::vec4_type); emit(MOV(dst, src_reg((wa_flags & BRW_ATTRIB_WA_SIGN) ? reg_d : reg_ud))); } } } }
int main() { int op; uint32_t registro[16]={0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}; char banderas[4]; do{ system("cls"); printf("seleccione la opcion 1 para mostrar los valores de los registros\n"); printf("seleccione la opcion 2 para sumar registros \n"); printf("seleccione la opcion 3 para multiplicacion logica (AND) de registros \n"); printf("seleccione la opcion 4 para Eor a nivel de bits \n"); printf("seleccione la opcion 5 para desplazar de un registro a otro \n"); printf("seleccione la opcion 6 para suma logica (OR) de registro\n"); printf("seleccione la opcion 7 para ADN sin almacenar, solo modifica banderas \n"); printf("seleccione la opcion 8 para comparar (SUB sin almacenar), solo modifica banderas\n"); printf("seleccione la opcion 9 Multiplicacion de registros, solo se alacenan 32 bits menos significativos\n"); printf("seleccione la opcion 10 AND sin almacenacmiento, solo modifica banderas\n"); printf("seleccione la opcion 11 para LSL desplazamiento logico a la izquierda \n"); printf("seleccione la opcion 12 para LSR desplazamiento logico a la derecha \n"); printf("seleccione la opcion 13 para ROR rotacion a la derecha \n"); printf("seleccione la opcion 14 para ASR desplazamiento aritmetico a la derecha \n"); printf("seleccione la opcion 15 para BIC Realiza una AND de un registro con otro negado \n"); printf("seleccione la opcion 16 para MUN guarda en un registro la negacion de otro\n"); printf("seleccione la opcion 17 para RSB niega un valor de registro\n"); printf("seleccione la opcion 18 para NOP da un retardo de un ciclo de reloj (no hace nada) \n"); printf("seleccione la opcion 19 para REV toma grupos de 8 bits y los desplaza \n"); printf("seleccione la opcion 20 para REVIG toma grupos de 16 bits y los agrupa en grupos de dos bytes\n"); printf("seleccione la opcion 21 para REVSH extencion con signo\n\n"); scanf("%d",&op); system("cls"); switch(op){ case 1: //mostrar_valores(registro); break; case 2: printf("ingrese el valor del primer registro:\n"); scanf("%d",®istro[1]); printf("ingrese el valor del segundo registro:\n"); scanf("%d",®istro[2]); ADD(registro,®istro[0],registro[1],registro[2],&banderas[0]); printf("%d valor del resultado \n",registro[0]); printf("%d valor del resultado bandera n \n",banderas[N]); printf("%d valor del resultado bandera z \n",banderas[Z]); printf("%d valor del resultado bandera c \n",banderas[C]); printf("%d valor del resultado bandera v \n",banderas[V]); break; case 3: printf("ingrese el valor del primer registro:\n"); scanf("%d",®istro[1]); printf("ingrese el valor del segundo registro:\n"); scanf("%d",®istro[2]); AND(registro,®istro[0],registro[1],registro[2],&banderas[0]); printf("%d valor del resultado \n",registro[0]); printf("%d valor del resultado bandera n \n",banderas[N]); printf("%d valor del resultado bandera z \n",banderas[Z]); printf("%d valor del resultado bandera c \n",banderas[C]); printf("%d valor del resultado bandera v \n",banderas[V]); break; case 4: printf("ingrese el valor del primer registro:\n"); scanf("%d",®istro[1]); printf("ingrese el valor del segundo registro:\n"); scanf("%d",®istro[2]); EOR(registro,®istro[0],registro[1],registro[2],&banderas[0]); printf("%d valor del resultado \n",registro[0]); printf("%d valor del resultado bandera n \n",banderas[N]); printf("%d valor del resultado bandera z \n",banderas[Z]); printf("%d valor del resultado bandera c \n",banderas[C]); printf("%d valor del resultado bandera v \n",banderas[V]); break; case 5: printf("ingrese el valor del registro origen:\n"); scanf("%d",®istro[1]); MOV(registro,®istro[0],registro[1],banderas); printf("%d valor del resultado \n",registro[0]); break; case 7: printf("ingrese el valor del primer registro:\n"); scanf("%d",®istro[1]); printf("ingrese el valor del segundo registro:\n"); scanf("%d",®istro[2]); CMN(registro,registro[1],registro[2],&banderas[0]); printf("%d valor del resultado \n",registro[0]); printf("%d valor del resultado bandera n \n",banderas[N]); printf("%d valor del resultado bandera z \n",banderas[Z]); printf("%d valor del resultado bandera c \n",banderas[C]); printf("%d valor del resultado bandera v \n",banderas[V]); break; case 8: printf("ingrese el valor del primer registro:\n"); scanf("%d",®istro[1]); printf("ingrese el valor del segundo registro:\n"); scanf("%d",®istro[2]); CMP(registro,registro[1],registro[2],&banderas[0]); printf("%d valor del resultado \n",registro[0]); printf("%d valor del resultado bandera n \n",banderas[N]); printf("%d valor del resultado bandera z \n",banderas[Z]); printf("%d valor del resultado bandera c \n",banderas[C]); printf("%d valor del resultado bandera v \n",banderas[V]); break; case 9: printf("ingrese el valor del primer registro:\n"); scanf("%d",®istro[1]); printf("ingrese el valor del segundo registro:\n"); scanf("%d",®istro[2]); MUL(registro,®istro[0],registro[1],registro[2],&banderas[0]); printf("%d valor del resultado \n",registro[0]); printf("%d valor del resultado bandera n \n",banderas[N]); printf("%d valor del resultado bandera z \n",banderas[Z]); printf("%d valor del resultado bandera c \n",banderas[C]); printf("%d valor del resultado bandera v \n",banderas[V]); break; case 10: printf("ingrese el valor del primer registro:\n"); scanf("%d",®istro[1]); printf("ingrese el valor del segundo registro:\n"); scanf("%d",®istro[2]); TST(registro,registro[1],registro[2],&banderas[0]); printf("%d valor del resultado \n",registro[0]); printf("%d valor del resultado bandera n \n",banderas[N]); printf("%d valor del resultado bandera z \n",banderas[Z]); printf("%d valor del resultado bandera c \n",banderas[C]); printf("%d valor del resultado bandera v \n",banderas[V]); break; case 11: printf("ingrese el valor del registro:\n"); scanf("%d",®istro[1]); printf("ingrese el numero de desplazamientos:\n"); scanf("%d",®istro[2]); LSL(registro,®istro[0],registro[1],registro[2],banderas); printf("%d valor del resultado \n",registro[0]); break; case 12: printf("ingrese el valor del primer registro:\n"); scanf("%d",®istro[1]); printf("ingrese elnumero de desplazamientos:\n"); scanf("%d",®istro[2]); LSR(registro,®istro[0],registro[1],registro[2],banderas); printf("%d valor del resultado \n",registro[0]); break; case 13: printf("ingrese el valor del primer registro:\n"); scanf("%d",®istro[1]); printf("ingrese elnumero de desplazamientos:\n"); scanf("%d",®istro[2]); ROR(registro,®istro[0],registro[1],registro[2],banderas); printf("%d valor del resultado \n",registro[0]); break; case 14: printf("ingrese el valor del primer registro:\n"); scanf("%d",®istro[1]); printf("ingrese elnumero de desplazamientos:\n"); scanf("%d",®istro[2]); ASR(registro,®istro[0],registro[1],registro[2],banderas); printf("%d valor del resultado \n",registro[0]); break; case 15: printf("ingrese el valor del primer registro:\n"); scanf("%d",®istro[0]); printf("ingrese el valor del segundo registro:\n"); scanf("%d",®istro[1]); BIC(registro,®istro[0],registro[1],banderas); printf("%d valor del resultado \n",registro[0]); break; case 16: printf("ingrese un valor del registro origen\n"); scanf("%d",®istro[1]); MVN(registro,®istro[0],registro[1],banderas); printf("%d valor del resultado \n",registro[0]); break; case 17: printf("ingrese un valor de registro\n"); scanf("%d",®istro[1]); RSB(registro,®istro[0],registro[1],0,banderas); printf("%d valor del resultado \n",registro[0]); break; case 18: NOP(registro); break; case 19: printf("ingrese un valor de registro \n"); scanf("%d",®istro[0]); REV(registro,®istro[0]); printf("%d valor del resultado \n",registro[0]); break; case 20: printf("ingrese un valor de registro \n"); scanf("%d",®istro[0]); REVIG(registro,®istro[0]); printf("%d valor del resultado \n",registro[0]); break; case 21: printf("ingrese un valor de registro \n"); scanf("%d",®istro[0]); REVSH(registro,®istro[0]); printf("%d valor del resultado \n",registro[0]); break; default: printf("Opcion invalida\n\n"); break; } printf("\nDesea realizar otra operacion?\n<1>-si\n<0>-no\n"); scanf("%d",&op); system("cls"); }while(op); return 0; }
static int sbc_calc_scalefactors_j( int32_t sb_sample_f[16][2][8], uint32_t scale_factor[2][8], int blocks, int subbands) { int blk, joint = 0; int32_t tmp0, tmp1; uint32_t x, y; /* last subband does not use joint stereo */ int sb = subbands - 1; x = 1 << SCALE_OUT_BITS; y = 1 << SCALE_OUT_BITS; for (blk = 0; blk < blocks; blk++) { tmp0 = fabs(sb_sample_f[blk][0][sb]); tmp1 = fabs(sb_sample_f[blk][1][sb]); if (tmp0 != 0) x |= tmp0 - 1; if (tmp1 != 0) y |= tmp1 - 1; } scale_factor[0][sb] = (31 - SCALE_OUT_BITS) - sbc_clz(x); scale_factor[1][sb] = (31 - SCALE_OUT_BITS) - sbc_clz(y); /* the rest of subbands can use joint stereo */ while (--sb >= 0) { int32_t sb_sample_j[16][2]; x = 1 << SCALE_OUT_BITS; y = 1 << SCALE_OUT_BITS; for (blk = 0; blk < blocks; blk++) { tmp0 = sb_sample_f[blk][0][sb]; tmp1 = sb_sample_f[blk][1][sb]; sb_sample_j[blk][0] = ASR(tmp0, 1) + ASR(tmp1, 1); sb_sample_j[blk][1] = ASR(tmp0, 1) - ASR(tmp1, 1); tmp0 = fabs(tmp0); tmp1 = fabs(tmp1); if (tmp0 != 0) x |= tmp0 - 1; if (tmp1 != 0) y |= tmp1 - 1; } scale_factor[0][sb] = (31 - SCALE_OUT_BITS) - sbc_clz(x); scale_factor[1][sb] = (31 - SCALE_OUT_BITS) - sbc_clz(y); x = 1 << SCALE_OUT_BITS; y = 1 << SCALE_OUT_BITS; for (blk = 0; blk < blocks; blk++) { tmp0 = fabs(sb_sample_j[blk][0]); tmp1 = fabs(sb_sample_j[blk][1]); if (tmp0 != 0) x |= tmp0 - 1; if (tmp1 != 0) y |= tmp1 - 1; } x = (31 - SCALE_OUT_BITS) - sbc_clz(x); y = (31 - SCALE_OUT_BITS) - sbc_clz(y); /* decide whether to use joint stereo for this subband */ if ((scale_factor[0][sb] + scale_factor[1][sb]) > x + y) { joint |= 1 << (subbands - 1 - sb); scale_factor[0][sb] = x; scale_factor[1][sb] = y; for (blk = 0; blk < blocks; blk++) { sb_sample_f[blk][0][sb] = sb_sample_j[blk][0]; sb_sample_f[blk][1][sb] = sb_sample_j[blk][1]; } } } /* bitmask with the information about subbands using joint stereo */ return joint; }
/* Model output function */ static void fi_mdl_radix2fft_withscaling_output(int_T tid) { /* local block i/o variables */ cint16_T rtb_FFT[64]; int16_T rtb_FromWorkspace[64]; /* FromWorkspace: '<Root>/From Workspace' */ { real_T t = fi_mdl_radix2fft_withscaling_M->Timing.t[0]; real_T *pTimeValues = (real_T *) fi_mdl_radix2fft_withscaling_DWork.FromWorkspace_PWORK.TimePtr; int16_T *pDataValues = (int16_T *) fi_mdl_radix2fft_withscaling_DWork.FromWorkspace_PWORK.DataPtr; if (t < pTimeValues[0]) { { int_T i1; int16_T *y0 = rtb_FromWorkspace; for (i1=0; i1 < 64; i1++) { y0[i1] = 0; } } } else if (t == pTimeValues[0]) { { int_T i1; int16_T *y0 = rtb_FromWorkspace; for (i1=0; i1 < 64; i1++) { y0[i1] = pDataValues[0]; pDataValues += 1; } } } else if (t > pTimeValues[0]) { { int_T i1; int16_T *y0 = rtb_FromWorkspace; for (i1=0; i1 < 64; i1++) { y0[i1] = 0; } } } else { int_T currTimeIndex = fi_mdl_radix2fft_withscaling_DWork.FromWorkspace_IWORK.PrevIndex; if (t < pTimeValues[currTimeIndex]) { while (t < pTimeValues[currTimeIndex]) { currTimeIndex--; } } else { while (t >= pTimeValues[currTimeIndex + 1]) { currTimeIndex++; } } { int_T i1; int16_T *y0 = rtb_FromWorkspace; for (i1=0; i1 < 64; i1++) { y0[i1] = pDataValues[currTimeIndex]; pDataValues += 1; } } fi_mdl_radix2fft_withscaling_DWork.FromWorkspace_IWORK.PrevIndex = currTimeIndex; } } /* DSP Blockset FFT (sdspfft2) - '<Root>/FFT' */ /* Real input, 1 channels, 64 rows, linear output order */ { /* Bit reverse scramble and copy from input buffer to output */ int_T j=0, i=0; for (;i<63; i++) { rtb_FFT[j].re = rtb_FromWorkspace[i]; rtb_FFT[j].im = 0; { int_T bit = 64; do { bit>>=1; j^=bit; } while (!(j & bit)); } } rtb_FFT[j].re = rtb_FromWorkspace[i]; rtb_FFT[j].im = 0; } { /* Decimation in time FFT */ int32_T accum; int32_T prod; cint16_T ctemp, ctemp2; int_T i; /* Remove trivial multiplies for first stage */ for (i=0; i<63; i+=2) { /* CTEMP = y[i] - y[i+1]; */ accum = LSL_S32(15,((int32_T)rtb_FFT[i].re)); accum -= LSL_S32(15,((int32_T)rtb_FFT[i+1].re)); accum = ASR(1,accum); ctemp.re = ((int16_T)ASR(15,accum)); accum = LSL_S32(15,((int32_T)rtb_FFT[i].im)); accum -= LSL_S32(15,((int32_T)rtb_FFT[i+1].im)); accum = ASR(1,accum); ctemp.im = ((int16_T)ASR(15,accum)); /* y[i] = y[i] + y[i+1]; */ accum = LSL_S32(15,((int32_T)rtb_FFT[i].re)); accum += LSL_S32(15,((int32_T)rtb_FFT[i+1].re)); accum = ASR(1,accum); rtb_FFT[i].re = ((int16_T)ASR(15,accum)); accum = LSL_S32(15,((int32_T)rtb_FFT[i].im)); accum += LSL_S32(15,((int32_T)rtb_FFT[i+1].im)); accum = ASR(1,accum); rtb_FFT[i].im = ((int16_T)ASR(15,accum)); /* y[i+1] = CTEMP; */ rtb_FFT[i+1].re = ctemp.re; rtb_FFT[i+1].im = ctemp.im; } { int_T idelta=2; int_T k = 16; int_T kratio = 16; while (k > 0) { int_T istart = 0; int_T i2; int_T j=kratio; int_T i1=istart; /* Remove trivial multiplies for first butterfly in remaining stages */ for (i=0; i<k; i++) { i2 = i1 + idelta; /* CTEMP = y[0] - y[idelta]; */ accum = LSL_S32(15,((int32_T)rtb_FFT[i1].re)); accum -= LSL_S32(15,((int32_T)rtb_FFT[i2].re)); accum = ASR(1,accum); ctemp.re = ((int16_T)ASR(15,accum)); accum = LSL_S32(15,((int32_T)rtb_FFT[i1].im)); accum -= LSL_S32(15,((int32_T)rtb_FFT[i2].im)); accum = ASR(1,accum); ctemp.im = ((int16_T)ASR(15,accum)); /* y[0] = y[0] + y[idelta]; */ accum = LSL_S32(15,((int32_T)rtb_FFT[i1].re)); accum += LSL_S32(15,((int32_T)rtb_FFT[i2].re)); accum = ASR(1,accum); rtb_FFT[i1].re = ((int16_T)ASR(15,accum)); accum = LSL_S32(15,((int32_T)rtb_FFT[i1].im)); accum += LSL_S32(15,((int32_T)rtb_FFT[i2].im)); accum = ASR(1,accum); rtb_FFT[i1].im = ((int16_T)ASR(15,accum)); /* y[idelta] = CTEMP */ rtb_FFT[i2].re = ctemp.re; rtb_FFT[i2].im = ctemp.im; i1 += (idelta<<1); } istart++; for (; j<32; j+= kratio) { int_T i1=istart; for (i=0; i<k; i++) { i2 = i1 + idelta; /* Compute ctemp = W * y[i2] */ MUL_S32_S16_S16(prod,rtb_FFT[i2].re,(fi_mdl_radix2fft_withscaling_P.FFT_TwiddleTable[j+16])); accum = prod; MUL_S32_S16_S16(prod,rtb_FFT[i2].im,(fi_mdl_radix2fft_withscaling_P.FFT_TwiddleTable[j+32])); accum -= prod; ctemp.re = ((int16_T)ASR(15,accum)); MUL_S32_S16_S16(prod,rtb_FFT[i2].re,(fi_mdl_radix2fft_withscaling_P.FFT_TwiddleTable[j+32])); accum = prod; MUL_S32_S16_S16(prod,rtb_FFT[i2].im,(fi_mdl_radix2fft_withscaling_P.FFT_TwiddleTable[j+16])); accum += prod; ctemp.im = ((int16_T)ASR(15,accum)); /* Compute ctemp2 = y[i1] + ctemp */ accum = LSL_S32(15,((int32_T)rtb_FFT[i1].re)); accum += LSL_S32(15,((int32_T)ctemp.re)); accum = ASR(1,accum); ctemp2.re = ((int16_T)ASR(15,accum)); accum = LSL_S32(15,((int32_T)rtb_FFT[i1].im)); accum += LSL_S32(15,((int32_T)ctemp.im)); accum = ASR(1,accum); ctemp2.im = ((int16_T)ASR(15,accum)); /* Compute y[i2] = y[i1] - ctemp */ accum = LSL_S32(15,((int32_T)rtb_FFT[i1].re)); accum -= LSL_S32(15,((int32_T)ctemp.re)); accum = ASR(1,accum); rtb_FFT[i2].re = ((int16_T)ASR(15,accum)); accum = LSL_S32(15,((int32_T)rtb_FFT[i1].im)); accum -= LSL_S32(15,((int32_T)ctemp.im)); accum = ASR(1,accum); rtb_FFT[i2].im = ((int16_T)ASR(15,accum)); /* y[i1] = ctemp2 */ rtb_FFT[i1].re = ctemp2.re; rtb_FFT[i1].im = ctemp2.im; i1 += (idelta<<1); } istart++; } idelta <<= 1; k >>= 1; kratio>>=1; } } } /* ToWorkspace: '<Root>/To Workspace' */ { creal_T u[64]; { int_T i1; const cint16_T *u0 = rtb_FFT; for (i1=0; i1 < 64; i1++) { u[i1].re = ldexp((double)u0[i1].re, -14); u[i1].im = ldexp((double)u0[i1].im, -14); } } rt_UpdateLogVar((LogVar*)fi_mdl_radix2fft_withscaling_DWork.ToWorkspace_PWORK.LoggedData, u); } }
void decodeInstruction(instruction_t instruction, uint32_t *dir_reg, char *dir_flags, uint8_t *SRAM, uint16_t *dec) { uint8_t *R_activos=instruction.registers_list; /* Comparacion de mnemonic y Llamado de las funciones */ if( strcmp(instruction.mnemonic,"ADC") == 0 || strcmp(instruction.mnemonic,"ADCS") == 0){ dir_reg[PC]++; *dec=16704; *dec=*dec|instruction.op3_value<<3|instruction.op1_value; dir_reg[instruction.op1_value]=ADC(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags); } if( strcmp(instruction.mnemonic,"ADDS") == 0 || strcmp(instruction.mnemonic,"ADD") == 0){ dir_reg[PC]++; if(instruction.op2_type=='S'){ *dec=45056; dir_reg[SP]=ADD(dir_reg[SP],instruction.op3_value,dir_flags); *dec=*dec|instruction.op3_value;} else if(instruction.op3_type=='#'){ *dec=7168; *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value; dir_reg[instruction.op1_value]=ADD(dir_reg[instruction.op2_value], instruction.op3_value,dir_flags); mvprintw(4,20,"%X",*dec);} else{ *dec=6144; *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value; dir_reg[instruction.op1_value]=ADD(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);} } if( strcmp(instruction.mnemonic,"AND") == 0 || strcmp(instruction.mnemonic,"ANDS") == 0){ dir_reg[PC]++; *dec=16384; if(instruction.op3_type=='#'){ dir_reg[instruction.op1_value]=AND(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);} else dir_reg[instruction.op1_value]=AND(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags); } if( strcmp(instruction.mnemonic,"ASR") == 0 || strcmp(instruction.mnemonic,"ASRS") == 0){ dir_reg[PC]++; if(instruction.op3_type=='#'){ *dec=4096; *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value; dir_reg[instruction.op1_value]=ASR(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);} else{ *dec=16640; *dec=*dec|instruction.op3_value<<3|instruction.op1_value; dir_reg[instruction.op1_value]=ASR(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);} } if( strcmp(instruction.mnemonic,"BICS") == 0 || strcmp(instruction.mnemonic,"BICS") == 0){ dir_reg[PC]++; if(instruction.op3_type=='#') dir_reg[instruction.op1_value]=BIC(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags); else{ *dec=17280; dir_reg[instruction.op1_value]=BIC(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags); *dec=*dec|instruction.op3_value<<3|instruction.op1_value;} } if( strcmp(instruction.mnemonic,"CMN" ) == 0 || strcmp(instruction.mnemonic,"CMNS") == 0){ dir_reg[PC]++; CMN(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value],dir_flags); *dec=17088; *dec=*dec|instruction.op2_value<<3|instruction.op1_value; mvprintw(4,20,"%X",*dec); } if( strcmp(instruction.mnemonic,"CMP") == 0 || strcmp(instruction.mnemonic,"CMPS") == 0){ dir_reg[PC]++; CMP(dir_reg[instruction.op1_value],dir_reg[instruction.op2_value],dir_flags); *dec=17024; *dec=*dec|instruction.op2_value<<3|instruction.op1_value; mvprintw(4,20,"%X",*dec); } if( strcmp(instruction.mnemonic,"EOR") == 0 || strcmp(instruction.mnemonic,"EORS") == 0){ dir_reg[PC]++; *dec=16448; if(instruction.op3_type=='#') dir_reg[instruction.op1_value]=EOR(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags); else dir_reg[instruction.op1_value]=EOR(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags); } if( strcmp(instruction.mnemonic,"LSLS") == 0 || strcmp(instruction.mnemonic,"LSL") == 0){ dir_reg[PC]++; if(instruction.op3_type=='#'){ *dec=0; dir_reg[instruction.op1_value]=LSL(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags); *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;} else{ *dec=16512; dir_reg[instruction.op1_value]=LSL(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags); *dec=*dec|instruction.op3_value<<3|instruction.op1_value;} } if( strcmp(instruction.mnemonic,"LSRS") == 0 || strcmp(instruction.mnemonic,"LSR") == 0){ dir_reg[PC]++; if(instruction.op3_type=='#'){ *dec=2048; dir_reg[instruction.op1_value]=LSR(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags); *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;} else{ *dec=16576; dir_reg[instruction.op1_value]=LSR(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags); *dec=*dec|instruction.op3_value<<3|instruction.op1_value;} } if( strcmp(instruction.mnemonic,"MOV") == 0 || strcmp(instruction.mnemonic,"MOVS") == 0){ dir_reg[PC]++; if(instruction.op2_type=='#'){ *dec=8192; dir_reg[instruction.op1_value]=MOV(instruction.op2_value,dir_flags); *dec=*dec|instruction.op1_value<<8|instruction.op2_value;} else{ *dec=0; dir_reg[instruction.op1_value]=MOV(dir_reg[instruction.op2_value],dir_flags); *dec=*dec|instruction.op2_value<<3|instruction.op1_value;} } if( strcmp(instruction.mnemonic,"MUL") == 0 || strcmp(instruction.mnemonic,"MULS") == 0){ dir_reg[PC]++; *dec=17216; if(instruction.op3_type=='#'){ dir_reg[instruction.op1_value]=MUL(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);} else{ dir_reg[instruction.op1_value]=MUL(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags); *dec=*dec|instruction.op2_value<<3|instruction.op1_value;} } if( strcmp(instruction.mnemonic,"MVN") == 0 || strcmp(instruction.mnemonic,"MVNS") == 0){ dir_reg[PC]++; *dec=17344; dir_reg[instruction.op1_value]=MVN(dir_reg[instruction.op2_value], dir_flags); *dec=*dec|instruction.op2_value<<3|instruction.op1_value; } if( strcmp(instruction.mnemonic,"ORR") == 0 || strcmp(instruction.mnemonic,"ORRS") == 0){ dir_reg[PC]++; *dec=17152; if(instruction.op3_type=='#'){ dir_reg[instruction.op1_value]=ORR(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);} else{ dir_reg[instruction.op1_value]=ORR(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags); *dec=*dec|instruction.op3_value<<3|instruction.op1_value;} } if( strcmp(instruction.mnemonic,"REV") == 0 || strcmp(instruction.mnemonic,"REVS") == 0){ dir_reg[PC]++; *dec=47616; dir_reg[instruction.op1_value]=REV(dir_reg[instruction.op2_value]); *dec=*dec|instruction.op2_value<<3|instruction.op1_value; } if( strcmp(instruction.mnemonic,"REVG") == 0 || strcmp(instruction.mnemonic,"REVGS") == 0){ dir_reg[PC]++; *dec=47680; dir_reg[instruction.op1_value]=REVG(dir_reg[instruction.op2_value]); *dec=*dec|instruction.op2_value<<3|instruction.op1_value; } if( strcmp(instruction.mnemonic,"REVSH") == 0 || strcmp(instruction.mnemonic,"REVSHS") == 0){ dir_reg[PC]++; *dec=47808; dir_reg[instruction.op1_value]=REVSH(dir_reg[instruction.op2_value]); *dec=*dec|instruction.op2_value<<3|instruction.op1_value; } if( strcmp(instruction.mnemonic,"ROR") == 0 || strcmp(instruction.mnemonic,"RORS") == 0){ dir_reg[PC]++; *dec=16832; if(instruction.op3_type=='#'){ dir_reg[instruction.op1_value]=ROR(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);} else{ dir_reg[instruction.op1_value]=ROR(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags); *dec=*dec|instruction.op3_value<<3|instruction.op1_value;} } if( strcmp(instruction.mnemonic,"RSB") == 0 || strcmp(instruction.mnemonic,"RSBS") == 0){ dir_reg[PC]++; *dec=16690; dir_reg[instruction.op1_value]=RSB(dir_reg[instruction.op2_value], dir_flags); *dec=*dec|instruction.op2_value<<3|instruction.op1_value; } if( strcmp(instruction.mnemonic,"SBC") == 0 || strcmp(instruction.mnemonic,"SBCS") == 0){ dir_reg[PC]++; *dec=16768; SBC(dir_reg[instruction.op1_value],dir_reg[instruction.op2_value], dir_flags); *dec=*dec|instruction.op2_value<<3|instruction.op1_value; } if( strcmp(instruction.mnemonic,"SUBS") == 0 || strcmp(instruction.mnemonic,"SUB") == 0){ dir_reg[PC]++; if(instruction.op2_type=='S'){ *dec=45184; dir_reg[SP]=SUB(dir_reg[SP],instruction.op3_value,dir_flags); *dec=*dec|instruction.op3_value;} else if(instruction.op3_type=='#'){ *dec=7680; dir_reg[instruction.op1_value]=SUB(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags); *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;} else{ *dec=6656; dir_reg[instruction.op1_value]=SUB(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags); *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;} } if( strcmp(instruction.mnemonic,"TST") == 0 || strcmp(instruction.mnemonic,"TSTS") == 0){ dir_reg[PC]++; *dec=16896; TST(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value], dir_flags); *dec=*dec|instruction.op2_value<<3|instruction.op1_value; } if( strcmp(instruction.mnemonic,"NOP") == 0 ){ NOP(dir_reg); *dec=48896; } if( strcmp(instruction.mnemonic,"B") == 0 ){ *dec=57344; *dec=*dec|instruction.op1_value; B(instruction.op1_value, dir_reg); } if( strcmp(instruction.mnemonic,"BL") == 0 ){ *dec=0; BL(instruction.op1_value, dir_reg); } if( strcmp(instruction.mnemonic,"BX") == 0 ){ *dec=18176; BX(dir_reg); } if( strcmp(instruction.mnemonic,"BEQ") == 0 ){ *dec=0; BEQ(instruction.op1_value, dir_reg, dir_flags); } if( strcmp(instruction.mnemonic,"BNE") == 0 ){ *dec=0; BNE(instruction.op1_value, dir_reg, dir_flags); } if( strcmp(instruction.mnemonic,"BCS") == 0 ){ *dec=0; BCS(instruction.op1_value, dir_reg, dir_flags); } if( strcmp(instruction.mnemonic,"BCC") == 0 ){ *dec=0; BCC(instruction.op1_value, dir_reg, dir_flags); } if( strcmp(instruction.mnemonic,"BMI") == 0 ){ *dec=0; BMI(instruction.op1_value, dir_reg, dir_flags); } if( strcmp(instruction.mnemonic,"BPL") == 0 ){ *dec=0; BPL(instruction.op1_value, dir_reg, dir_flags); } if( strcmp(instruction.mnemonic,"BVS") == 0 ){ *dec=0; BVS(instruction.op1_value, dir_reg, dir_flags); } if( strcmp(instruction.mnemonic,"BVC") == 0 ){ *dec=0; BVC(instruction.op1_value, dir_reg, dir_flags); } if( strcmp(instruction.mnemonic,"BHI") == 0 ){ *dec=0; BHI(instruction.op1_value, dir_reg, dir_flags); } if( strcmp(instruction.mnemonic,"BLS") == 0 ){ *dec=0; BLS(instruction.op1_value, dir_reg, dir_flags); } if( strcmp(instruction.mnemonic,"BGE") == 0 ){ *dec=0; BGE(instruction.op1_value, dir_reg, dir_flags); } if( strcmp(instruction.mnemonic,"BLT") == 0 ){ *dec=0; BLT(instruction.op1_value, dir_reg, dir_flags); } if( strcmp(instruction.mnemonic,"BGT") == 0 ){ *dec=0; BGT(instruction.op1_value, dir_reg, dir_flags); } if( strcmp(instruction.mnemonic,"BLE") == 0 ){ *dec=0; BLE(instruction.op1_value, dir_reg, dir_flags); } if( strcmp(instruction.mnemonic,"BAL") == 0 ){ *dec=0; BAL(instruction.op1_value, dir_reg); } if(strcmp(instruction.mnemonic,"PUSH")==0){ dir_reg[PC]++; *dec=46080; PUSH(SRAM, dir_reg,R_activos); } if(strcmp(instruction.mnemonic,"POP")==0){ dir_reg[PC]++; *dec=48128; POP(SRAM,dir_reg,R_activos); } data=(uint8_t)dir_reg[instruction.op1_value]; if(strcmp(instruction.mnemonic,"LDR")==0){ dir_reg[PC]++; if(instruction.op2_type=='=' && instruction.op3_type=='N'){ *dec=0; dir_reg[instruction.op1_value]=instruction.op2_value;} else if(instruction.op2_type=='S'){ *dec=38912; dir_reg[instruction.op1_value]=LDR(dir_reg[SP], instruction.op3_value<<2, SRAM); *dec=*dec|instruction.op3_value|instruction.op1_value<<8;} else if(instruction.op3_type=='#' || instruction.op3_type=='N'){ *dec=26624; if((dir_reg[instruction.op2_value]+(instruction.op3_value<<2))>=0x40000000) IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(instruction.op3_value<<2)), &data,Read); else dir_reg[instruction.op1_value]=LDR(dir_reg[instruction.op2_value], instruction.op3_value<<2, SRAM); *dec=*dec|instruction.op3_value<<6|instruction.op2_value|instruction.op1_value;} else{ *dec=22528; if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000) IOAccess((uint8_t)(dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value]), &data,Read); else dir_reg[instruction.op1_value]=LDR(dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM); *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;} } if(strcmp(instruction.mnemonic,"LDRB")==0){ dir_reg[PC]++; if(instruction.op3_type=='#' || instruction.op3_type=='N'){ *dec=30720; if((dir_reg[instruction.op2_value]+instruction.op3_value)>=0x40000000) IOAccess((uint8_t)(dir_reg[instruction.op2_value]+instruction.op3_value), &data,Read); else dir_reg[instruction.op1_value]=LDRB(dir_reg[instruction.op2_value], instruction.op3_value, SRAM); *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;} else{ *dec=23552; if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000) IOAccess((uint8_t)(dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value]), &data,Read); else dir_reg[instruction.op1_value]=LDRB(dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM); *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;} } if(strcmp(instruction.mnemonic,"LDRH")==0){ dir_reg[PC]++; if(instruction.op3_type=='#' || instruction.op3_type=='N'){ *dec=34816; if((dir_reg[instruction.op2_value]+(instruction.op3_value<<1))>=0x40000000) IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(instruction.op3_value<<1)), &data,Read); else dir_reg[instruction.op1_value]=LDRH(dir_reg[instruction.op2_value], instruction.op3_value<<1, SRAM); *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;} else{ *dec=23040; if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000) IOAccess((uint8_t)(dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value]), &data,Read); else dir_reg[instruction.op1_value]=LDRH(dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM); *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;} } if(strcmp(instruction.mnemonic,"LDRSB")==0){ dir_reg[PC]++; *dec=22016; *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value; if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000) IOAccess((uint8_t)(dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value]), &data,Read); else dir_reg[instruction.op1_value]=LDRSB(dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM); } if(strcmp(instruction.mnemonic,"LDRSH")==0){ dir_reg[PC]++; *dec=24064; *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value; if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000) IOAccess((uint8_t)(dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value]), &data,Read); else dir_reg[instruction.op1_value]=LDRSH(dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM); } if(strcmp(instruction.mnemonic,"STR")==0){ dir_reg[PC]++; if(instruction.op2_type=='S'){ *dec=38912; STR(dir_reg[instruction.op1_value],dir_reg[SP], instruction.op3_value<<2, SRAM); *dec=*dec|instruction.op3_value|instruction.op1_value<<8;} else if(instruction.op3_type=='#' || instruction.op3_type=='N'){ *dec=24576; if((dir_reg[instruction.op2_value]+(instruction.op3_value<<2))>=0x40000000){ IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(instruction.op3_value<<2)), &data,Write);} else{ STR(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value], instruction.op3_value<<2, SRAM);} *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value; mvprintw(1,3,"Hola");} else{ *dec=20480; if((dir_reg[instruction.op2_value]+dir_reg[instruction.op2_value])>=0x40000000) IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(dir_reg[instruction.op3_value])), &data,Write); else{ STR(dir_reg[instruction.op1_value], instruction.op2_value, instruction.op3_value, SRAM);} *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;} } if(strcmp(instruction.mnemonic,"STRB")==0){ dir_reg[PC]++; if(instruction.op3_type=='#' || instruction.op3_type=='N'){ *dec=28672; if(dir_reg[instruction.op2_value]+instruction.op3_value>=0x40000000){ IOAccess((uint8_t)(dir_reg[instruction.op2_value]+instruction.op3_value), &data,Write);} else{ STRB(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value], instruction.op3_value, SRAM);} *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;} else{ *dec=21504; if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000){ IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(dir_reg[instruction.op3_value])), &data,Write);} else{ STRB(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM);} *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;} } if(strcmp(instruction.mnemonic,"STRH")==0){ dir_reg[PC]++; if(instruction.op3_type=='#' || instruction.op3_type=='N'){ *dec=32768; if(((dir_reg[instruction.op2_value])+(instruction.op3_value<<1))>=0x40000000) IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(instruction.op3_value<<1)),&data,Write); else STRH(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value], instruction.op3_value<<1, SRAM); *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;} else{ *dec=20992; if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000) IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(dir_reg[instruction.op3_value])), &data,Write); else STRH(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM); *dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;} } }
void gen8_vec4_generator::generate_vec4_instruction(vec4_instruction *instruction, struct brw_reg dst, struct brw_reg *src) { vec4_instruction *ir = (vec4_instruction *) instruction; if (dst.width == BRW_WIDTH_4) { /* This happens in attribute fixups for "dual instanced" geometry * shaders, since they use attributes that are vec4's. Since the exec * width is only 4, it's essential that the caller set * force_writemask_all in order to make sure the instruction is executed * regardless of which channels are enabled. */ assert(ir->force_writemask_all); /* Fix up any <8;8,1> or <0;4,1> source registers to <4;4,1> to satisfy * the following register region restrictions (from Graphics BSpec: * 3D-Media-GPGPU Engine > EU Overview > Registers and Register Regions * > Register Region Restrictions) * * 1. ExecSize must be greater than or equal to Width. * * 2. If ExecSize = Width and HorzStride != 0, VertStride must be set * to Width * HorzStride." */ for (int i = 0; i < 3; i++) { if (src[i].file == BRW_GENERAL_REGISTER_FILE) src[i] = stride(src[i], 4, 4, 1); } } switch (ir->opcode) { case BRW_OPCODE_MOV: MOV(dst, src[0]); break; case BRW_OPCODE_ADD: ADD(dst, src[0], src[1]); break; case BRW_OPCODE_MUL: MUL(dst, src[0], src[1]); break; case BRW_OPCODE_MACH: MACH(dst, src[0], src[1]); break; case BRW_OPCODE_MAD: MAD(dst, src[0], src[1], src[2]); break; case BRW_OPCODE_FRC: FRC(dst, src[0]); break; case BRW_OPCODE_RNDD: RNDD(dst, src[0]); break; case BRW_OPCODE_RNDE: RNDE(dst, src[0]); break; case BRW_OPCODE_RNDZ: RNDZ(dst, src[0]); break; case BRW_OPCODE_AND: AND(dst, src[0], src[1]); break; case BRW_OPCODE_OR: OR(dst, src[0], src[1]); break; case BRW_OPCODE_XOR: XOR(dst, src[0], src[1]); break; case BRW_OPCODE_NOT: NOT(dst, src[0]); break; case BRW_OPCODE_ASR: ASR(dst, src[0], src[1]); break; case BRW_OPCODE_SHR: SHR(dst, src[0], src[1]); break; case BRW_OPCODE_SHL: SHL(dst, src[0], src[1]); break; case BRW_OPCODE_CMP: CMP(dst, ir->conditional_mod, src[0], src[1]); break; case BRW_OPCODE_SEL: SEL(dst, src[0], src[1]); break; case BRW_OPCODE_DPH: DPH(dst, src[0], src[1]); break; case BRW_OPCODE_DP4: DP4(dst, src[0], src[1]); break; case BRW_OPCODE_DP3: DP3(dst, src[0], src[1]); break; case BRW_OPCODE_DP2: DP2(dst, src[0], src[1]); break; case BRW_OPCODE_F32TO16: F32TO16(dst, src[0]); break; case BRW_OPCODE_F16TO32: F16TO32(dst, src[0]); break; case BRW_OPCODE_LRP: LRP(dst, src[0], src[1], src[2]); break; case BRW_OPCODE_BFREV: /* BFREV only supports UD type for src and dst. */ BFREV(retype(dst, BRW_REGISTER_TYPE_UD), retype(src[0], BRW_REGISTER_TYPE_UD)); break; case BRW_OPCODE_FBH: /* FBH only supports UD type for dst. */ FBH(retype(dst, BRW_REGISTER_TYPE_UD), src[0]); break; case BRW_OPCODE_FBL: /* FBL only supports UD type for dst. */ FBL(retype(dst, BRW_REGISTER_TYPE_UD), src[0]); break; case BRW_OPCODE_CBIT: /* CBIT only supports UD type for dst. */ CBIT(retype(dst, BRW_REGISTER_TYPE_UD), src[0]); break; case BRW_OPCODE_ADDC: ADDC(dst, src[0], src[1]); break; case BRW_OPCODE_SUBB: SUBB(dst, src[0], src[1]); break; case BRW_OPCODE_BFE: BFE(dst, src[0], src[1], src[2]); break; case BRW_OPCODE_BFI1: BFI1(dst, src[0], src[1]); break; case BRW_OPCODE_BFI2: BFI2(dst, src[0], src[1], src[2]); break; case BRW_OPCODE_IF: IF(ir->predicate); break; case BRW_OPCODE_ELSE: ELSE(); break; case BRW_OPCODE_ENDIF: ENDIF(); break; case BRW_OPCODE_DO: DO(); break; case BRW_OPCODE_BREAK: BREAK(); break; case BRW_OPCODE_CONTINUE: CONTINUE(); break; case BRW_OPCODE_WHILE: WHILE(); break; case SHADER_OPCODE_RCP: MATH(BRW_MATH_FUNCTION_INV, dst, src[0]); break; case SHADER_OPCODE_RSQ: MATH(BRW_MATH_FUNCTION_RSQ, dst, src[0]); break; case SHADER_OPCODE_SQRT: MATH(BRW_MATH_FUNCTION_SQRT, dst, src[0]); break; case SHADER_OPCODE_EXP2: MATH(BRW_MATH_FUNCTION_EXP, dst, src[0]); break; case SHADER_OPCODE_LOG2: MATH(BRW_MATH_FUNCTION_LOG, dst, src[0]); break; case SHADER_OPCODE_SIN: MATH(BRW_MATH_FUNCTION_SIN, dst, src[0]); break; case SHADER_OPCODE_COS: MATH(BRW_MATH_FUNCTION_COS, dst, src[0]); break; case SHADER_OPCODE_POW: MATH(BRW_MATH_FUNCTION_POW, dst, src[0], src[1]); break; case SHADER_OPCODE_INT_QUOTIENT: MATH(BRW_MATH_FUNCTION_INT_DIV_QUOTIENT, dst, src[0], src[1]); break; case SHADER_OPCODE_INT_REMAINDER: MATH(BRW_MATH_FUNCTION_INT_DIV_REMAINDER, dst, src[0], src[1]); break; case SHADER_OPCODE_TEX: case SHADER_OPCODE_TXD: case SHADER_OPCODE_TXF: case SHADER_OPCODE_TXF_CMS: case SHADER_OPCODE_TXF_MCS: case SHADER_OPCODE_TXL: case SHADER_OPCODE_TXS: case SHADER_OPCODE_TG4: case SHADER_OPCODE_TG4_OFFSET: generate_tex(ir, dst); break; case VS_OPCODE_URB_WRITE: generate_urb_write(ir, true); break; case SHADER_OPCODE_GEN4_SCRATCH_READ: generate_scratch_read(ir, dst, src[0]); break; case SHADER_OPCODE_GEN4_SCRATCH_WRITE: generate_scratch_write(ir, dst, src[0], src[1]); break; case VS_OPCODE_PULL_CONSTANT_LOAD: case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7: generate_pull_constant_load(ir, dst, src[0], src[1]); break; case GS_OPCODE_URB_WRITE: generate_urb_write(ir, false); break; case GS_OPCODE_THREAD_END: generate_gs_thread_end(ir); break; case GS_OPCODE_SET_WRITE_OFFSET: generate_gs_set_write_offset(dst, src[0], src[1]); break; case GS_OPCODE_SET_VERTEX_COUNT: generate_gs_set_vertex_count(dst, src[0]); break; case GS_OPCODE_SET_DWORD_2_IMMED: generate_gs_set_dword_2_immed(dst, src[0]); break; case GS_OPCODE_PREPARE_CHANNEL_MASKS: generate_gs_prepare_channel_masks(dst); break; case GS_OPCODE_SET_CHANNEL_MASKS: generate_gs_set_channel_masks(dst, src[0]); break; case SHADER_OPCODE_SHADER_TIME_ADD: assert(!"XXX: Missing Gen8 vec4 support for INTEL_DEBUG=shader_time"); break; case SHADER_OPCODE_UNTYPED_ATOMIC: assert(!"XXX: Missing Gen8 vec4 support for UNTYPED_ATOMIC"); break; case SHADER_OPCODE_UNTYPED_SURFACE_READ: assert(!"XXX: Missing Gen8 vec4 support for UNTYPED_SURFACE_READ"); break; case VS_OPCODE_UNPACK_FLAGS_SIMD4X2: assert(!"VS_OPCODE_UNPACK_FLAGS_SIMD4X2 should not be used on Gen8+."); break; default: if (ir->opcode < (int) ARRAY_SIZE(opcode_descs)) { _mesa_problem(ctx, "Unsupported opcode in `%s' in VS\n", opcode_descs[ir->opcode].name); } else { _mesa_problem(ctx, "Unsupported opcode %d in VS", ir->opcode); } abort(); } }
// // 柦椷幚峴 // INT CPU::EXEC( INT request_cycles ) { BYTE opcode; // 僆儁僐乕僪 INT OLD_cycles = TOTAL_cycles; INT exec_cycles; BYTE nmi_request, irq_request; BOOL bClockProcess = m_bClockProcess; // TEMP register WORD EA; register WORD ET; register WORD WT; register BYTE DT; while( request_cycles > 0 ) { exec_cycles = 0; if( DMA_cycles ) { if( request_cycles <= DMA_cycles ) { DMA_cycles -= request_cycles; TOTAL_cycles += request_cycles; // 僋儘僢僋摨婜張棟 mapper->Clock( request_cycles ); #if DPCM_SYNCCLOCK apu->SyncDPCM( request_cycles ); #endif if( bClockProcess ) { nes->Clock( request_cycles ); } // nes->Clock( request_cycles ); goto _execute_exit; } else { exec_cycles += DMA_cycles; // request_cycles -= DMA_cycles; DMA_cycles = 0; } } nmi_request = irq_request = 0; opcode = OP6502( R.PC++ ); if( R.INT_pending ) { if( R.INT_pending & NMI_FLAG ) { nmi_request = 0xFF; R.INT_pending &= ~NMI_FLAG; } else if( R.INT_pending & IRQ_MASK ) { R.INT_pending &= ~IRQ_TRIGGER2; if( !(R.P & I_FLAG) && opcode != 0x40 ) { irq_request = 0xFF; R.INT_pending &= ~IRQ_TRIGGER; } } } //增加指令预测忽略功能 //opcode BYTE iInstructionLen =1; switch (TraceAddrMode[opcode]) { case IND: case ADR: case ABS: case ABX: case ABY: iInstructionLen = 3; break; case IMM: case ZPG: case ZPX: case ZPY: case INX: case INY: iInstructionLen = 2; break; case IMP:case ACC:case ERR: break; case REL:iInstructionLen = 2;break; } if( ((TraceArr[opcode][0]=='*') || (TraceArr[opcode][1]=='?'))&& (!Config.emulator.bIllegalOp) ) { //这里可以优化输出信息 //char str[111]; //DecodeInstruction (R.PC-1, str); //DEBUGOUT( "Bad Instruction:%s\n",str); R.PC=(R.PC-1)+iInstructionLen; ADD_CYCLE(iInstructionLen*2); goto end_is; } // switch( opcode ) { case 0x69: // ADC #$?? MR_IM(); ADC(); ADD_CYCLE(2); break; case 0x65: // ADC $?? MR_ZP(); ADC(); ADD_CYCLE(3); break; case 0x75: // ADC $??,X MR_ZX(); ADC(); ADD_CYCLE(4); break; case 0x6D: // ADC $???? MR_AB(); ADC(); ADD_CYCLE(4); break; case 0x7D: // ADC $????,X MR_AX(); ADC(); CHECK_EA(); ADD_CYCLE(4); break; case 0x79: // ADC $????,Y MR_AY(); ADC(); CHECK_EA(); ADD_CYCLE(4); break; case 0x61: // ADC ($??,X) MR_IX(); ADC(); ADD_CYCLE(6); break; case 0x71: // ADC ($??),Y MR_IY(); ADC(); CHECK_EA(); ADD_CYCLE(4); break; case 0xE9: // SBC #$?? MR_IM(); SBC(); ADD_CYCLE(2); break; case 0xE5: // SBC $?? MR_ZP(); SBC(); ADD_CYCLE(3); break; case 0xF5: // SBC $??,X MR_ZX(); SBC(); ADD_CYCLE(4); break; case 0xED: // SBC $???? MR_AB(); SBC(); ADD_CYCLE(4); break; case 0xFD: // SBC $????,X MR_AX(); SBC(); CHECK_EA(); ADD_CYCLE(4); break; case 0xF9: // SBC $????,Y MR_AY(); SBC(); CHECK_EA(); ADD_CYCLE(4); break; case 0xE1: // SBC ($??,X) MR_IX(); SBC(); ADD_CYCLE(6); break; case 0xF1: // SBC ($??),Y MR_IY(); SBC(); CHECK_EA(); ADD_CYCLE(5); break; case 0xC6: // DEC $?? MR_ZP(); DEC(); MW_ZP(); ADD_CYCLE(5); break; case 0xD6: // DEC $??,X MR_ZX(); DEC(); MW_ZP(); ADD_CYCLE(6); break; case 0xCE: // DEC $???? MR_AB(); DEC(); MW_EA(); ADD_CYCLE(6); break; case 0xDE: // DEC $????,X MR_AX(); DEC(); MW_EA(); ADD_CYCLE(7); break; case 0xCA: // DEX DEX(); ADD_CYCLE(2); break; case 0x88: // DEY DEY(); ADD_CYCLE(2); break; case 0xE6: // INC $?? MR_ZP(); INC(); MW_ZP(); ADD_CYCLE(5); break; case 0xF6: // INC $??,X MR_ZX(); INC(); MW_ZP(); ADD_CYCLE(6); break; case 0xEE: // INC $???? MR_AB(); INC(); MW_EA(); ADD_CYCLE(6); break; case 0xFE: // INC $????,X MR_AX(); INC(); MW_EA(); ADD_CYCLE(7); break; case 0xE8: // INX INX(); ADD_CYCLE(2); break; case 0xC8: // INY INY(); ADD_CYCLE(2); break; case 0x29: // AND #$?? MR_IM(); AND(); ADD_CYCLE(2); break; case 0x25: // AND $?? MR_ZP(); AND(); ADD_CYCLE(3); break; case 0x35: // AND $??,X MR_ZX(); AND(); ADD_CYCLE(4); break; case 0x2D: // AND $???? MR_AB(); AND(); ADD_CYCLE(4); break; case 0x3D: // AND $????,X MR_AX(); AND(); CHECK_EA(); ADD_CYCLE(4); break; case 0x39: // AND $????,Y MR_AY(); AND(); CHECK_EA(); ADD_CYCLE(4); break; case 0x21: // AND ($??,X) MR_IX(); AND(); ADD_CYCLE(6); break; case 0x31: // AND ($??),Y MR_IY(); AND(); CHECK_EA(); ADD_CYCLE(5); break; case 0x0A: // ASL A ASL_A(); ADD_CYCLE(2); break; case 0x06: // ASL $?? MR_ZP(); ASL(); MW_ZP(); ADD_CYCLE(5); break; case 0x16: // ASL $??,X MR_ZX(); ASL(); MW_ZP(); ADD_CYCLE(6); break; case 0x0E: // ASL $???? MR_AB(); ASL(); MW_EA(); ADD_CYCLE(6); break; case 0x1E: // ASL $????,X MR_AX(); ASL(); MW_EA(); ADD_CYCLE(7); break; case 0x24: // BIT $?? MR_ZP(); BIT(); ADD_CYCLE(3); break; case 0x2C: // BIT $???? MR_AB(); BIT(); ADD_CYCLE(4); break; case 0x49: // EOR #$?? MR_IM(); EOR(); ADD_CYCLE(2); break; case 0x45: // EOR $?? MR_ZP(); EOR(); ADD_CYCLE(3); break; case 0x55: // EOR $??,X MR_ZX(); EOR(); ADD_CYCLE(4); break; case 0x4D: // EOR $???? MR_AB(); EOR(); ADD_CYCLE(4); break; case 0x5D: // EOR $????,X MR_AX(); EOR(); CHECK_EA(); ADD_CYCLE(4); break; case 0x59: // EOR $????,Y MR_AY(); EOR(); CHECK_EA(); ADD_CYCLE(4); break; case 0x41: // EOR ($??,X) MR_IX(); EOR(); ADD_CYCLE(6); break; case 0x51: // EOR ($??),Y MR_IY(); EOR(); CHECK_EA(); ADD_CYCLE(5); break; case 0x4A: // LSR A LSR_A(); ADD_CYCLE(2); break; case 0x46: // LSR $?? MR_ZP(); LSR(); MW_ZP(); ADD_CYCLE(5); break; case 0x56: // LSR $??,X MR_ZX(); LSR(); MW_ZP(); ADD_CYCLE(6); break; case 0x4E: // LSR $???? MR_AB(); LSR(); MW_EA(); ADD_CYCLE(6); break; case 0x5E: // LSR $????,X MR_AX(); LSR(); MW_EA(); ADD_CYCLE(7); break; case 0x09: // ORA #$?? MR_IM(); ORA(); ADD_CYCLE(2); break; case 0x05: // ORA $?? MR_ZP(); ORA(); ADD_CYCLE(3); break; case 0x15: // ORA $??,X MR_ZX(); ORA(); ADD_CYCLE(4); break; case 0x0D: // ORA $???? MR_AB(); ORA(); ADD_CYCLE(4); break; case 0x1D: // ORA $????,X MR_AX(); ORA(); CHECK_EA(); ADD_CYCLE(4); break; case 0x19: // ORA $????,Y MR_AY(); ORA(); CHECK_EA(); ADD_CYCLE(4); break; case 0x01: // ORA ($??,X) MR_IX(); ORA(); ADD_CYCLE(6); break; case 0x11: // ORA ($??),Y MR_IY(); ORA(); CHECK_EA(); ADD_CYCLE(5); break; case 0x2A: // ROL A ROL_A(); ADD_CYCLE(2); break; case 0x26: // ROL $?? MR_ZP(); ROL(); MW_ZP(); ADD_CYCLE(5); break; case 0x36: // ROL $??,X MR_ZX(); ROL(); MW_ZP(); ADD_CYCLE(6); break; case 0x2E: // ROL $???? MR_AB(); ROL(); MW_EA(); ADD_CYCLE(6); break; case 0x3E: // ROL $????,X MR_AX(); ROL(); MW_EA(); ADD_CYCLE(7); break; case 0x6A: // ROR A ROR_A(); ADD_CYCLE(2); break; case 0x66: // ROR $?? MR_ZP(); ROR(); MW_ZP(); ADD_CYCLE(5); break; case 0x76: // ROR $??,X MR_ZX(); ROR(); MW_ZP(); ADD_CYCLE(6); break; case 0x6E: // ROR $???? MR_AB(); ROR(); MW_EA(); ADD_CYCLE(6); break; case 0x7E: // ROR $????,X MR_AX(); ROR(); MW_EA(); ADD_CYCLE(7); break; case 0xA9: // LDA #$?? MR_IM(); LDA(); ADD_CYCLE(2); break; case 0xA5: // LDA $?? MR_ZP(); LDA(); ADD_CYCLE(3); break; case 0xB5: // LDA $??,X MR_ZX(); LDA(); ADD_CYCLE(4); break; case 0xAD: // LDA $???? MR_AB(); LDA(); ADD_CYCLE(4); break; case 0xBD: // LDA $????,X MR_AX(); LDA(); CHECK_EA(); ADD_CYCLE(4); break; case 0xB9: // LDA $????,Y MR_AY(); LDA(); CHECK_EA(); ADD_CYCLE(4); break; case 0xA1: // LDA ($??,X) MR_IX(); LDA(); ADD_CYCLE(6); break; case 0xB1: // LDA ($??),Y MR_IY(); LDA(); CHECK_EA(); ADD_CYCLE(5); break; case 0xA2: // LDX #$?? MR_IM(); LDX(); ADD_CYCLE(2); break; case 0xA6: // LDX $?? MR_ZP(); LDX(); ADD_CYCLE(3); break; case 0xB6: // LDX $??,Y MR_ZY(); LDX(); ADD_CYCLE(4); break; case 0xAE: // LDX $???? MR_AB(); LDX(); ADD_CYCLE(4); break; case 0xBE: // LDX $????,Y MR_AY(); LDX(); CHECK_EA(); ADD_CYCLE(4); break; case 0xA0: // LDY #$?? MR_IM(); LDY(); ADD_CYCLE(2); break; case 0xA4: // LDY $?? MR_ZP(); LDY(); ADD_CYCLE(3); break; case 0xB4: // LDY $??,X MR_ZX(); LDY(); ADD_CYCLE(4); break; case 0xAC: // LDY $???? MR_AB(); LDY(); ADD_CYCLE(4); break; case 0xBC: // LDY $????,X MR_AX(); LDY(); CHECK_EA(); ADD_CYCLE(4); break; case 0x85: // STA $?? EA_ZP(); STA(); MW_ZP(); ADD_CYCLE(3); break; case 0x95: // STA $??,X EA_ZX(); STA(); MW_ZP(); ADD_CYCLE(4); break; case 0x8D: // STA $???? EA_AB(); STA(); MW_EA(); ADD_CYCLE(4); break; case 0x9D: // STA $????,X EA_AX(); STA(); MW_EA(); ADD_CYCLE(5); break; case 0x99: // STA $????,Y EA_AY(); STA(); MW_EA(); ADD_CYCLE(5); break; case 0x81: // STA ($??,X) EA_IX(); STA(); MW_EA(); ADD_CYCLE(6); break; case 0x91: // STA ($??),Y EA_IY(); STA(); MW_EA(); ADD_CYCLE(6); break; case 0x86: // STX $?? EA_ZP(); STX(); MW_ZP(); ADD_CYCLE(3); break; case 0x96: // STX $??,Y EA_ZY(); STX(); MW_ZP(); ADD_CYCLE(4); break; case 0x8E: // STX $???? EA_AB(); STX(); MW_EA(); ADD_CYCLE(4); break; case 0x84: // STY $?? EA_ZP(); STY(); MW_ZP(); ADD_CYCLE(3); break; case 0x94: // STY $??,X EA_ZX(); STY(); MW_ZP(); ADD_CYCLE(4); break; case 0x8C: // STY $???? EA_AB(); STY(); MW_EA(); ADD_CYCLE(4); break; case 0xAA: // TAX TAX(); ADD_CYCLE(2); break; case 0x8A: // TXA TXA(); ADD_CYCLE(2); break; case 0xA8: // TAY TAY(); ADD_CYCLE(2); break; case 0x98: // TYA TYA(); ADD_CYCLE(2); break; case 0xBA: // TSX TSX(); ADD_CYCLE(2); break; case 0x9A: // TXS TXS(); ADD_CYCLE(2); break; case 0xC9: // CMP #$?? MR_IM(); CMP_(); ADD_CYCLE(2); break; case 0xC5: // CMP $?? MR_ZP(); CMP_(); ADD_CYCLE(3); break; case 0xD5: // CMP $??,X MR_ZX(); CMP_(); ADD_CYCLE(4); break; case 0xCD: // CMP $???? MR_AB(); CMP_(); ADD_CYCLE(4); break; case 0xDD: // CMP $????,X MR_AX(); CMP_(); CHECK_EA(); ADD_CYCLE(4); break; case 0xD9: // CMP $????,Y MR_AY(); CMP_(); CHECK_EA(); ADD_CYCLE(4); break; case 0xC1: // CMP ($??,X) MR_IX(); CMP_(); ADD_CYCLE(6); break; case 0xD1: // CMP ($??),Y MR_IY(); CMP_(); CHECK_EA(); ADD_CYCLE(5); break; case 0xE0: // CPX #$?? MR_IM(); CPX(); ADD_CYCLE(2); break; case 0xE4: // CPX $?? MR_ZP(); CPX(); ADD_CYCLE(3); break; case 0xEC: // CPX $???? MR_AB(); CPX(); ADD_CYCLE(4); break; case 0xC0: // CPY #$?? MR_IM(); CPY(); ADD_CYCLE(2); break; case 0xC4: // CPY $?? MR_ZP(); CPY(); ADD_CYCLE(3); break; case 0xCC: // CPY $???? MR_AB(); CPY(); ADD_CYCLE(4); break; case 0x90: // BCC MR_IM(); BCC(); ADD_CYCLE(2); break; case 0xB0: // BCS MR_IM(); BCS(); ADD_CYCLE(2); break; case 0xF0: // BEQ MR_IM(); BEQ(); ADD_CYCLE(2); break; case 0x30: // BMI MR_IM(); BMI(); ADD_CYCLE(2); break; case 0xD0: // BNE MR_IM(); BNE(); ADD_CYCLE(2); break; case 0x10: // BPL MR_IM(); BPL(); ADD_CYCLE(2); break; case 0x50: // BVC MR_IM(); BVC(); ADD_CYCLE(2); break; case 0x70: // BVS MR_IM(); BVS(); ADD_CYCLE(2); break; case 0x4C: // JMP $???? JMP(); ADD_CYCLE(3); break; case 0x6C: // JMP ($????) JMP_ID(); ADD_CYCLE(5); break; case 0x20: // JSR JSR(); ADD_CYCLE(6); break; case 0x40: // RTI RTI(); ADD_CYCLE(6); break; case 0x60: // RTS RTS(); ADD_CYCLE(6); break; // 僼儔僌惂屼宯 case 0x18: // CLC CLC(); ADD_CYCLE(2); break; case 0xD8: // CLD CLD(); ADD_CYCLE(2); break; case 0x58: // CLI CLI(); ADD_CYCLE(2); break; case 0xB8: // CLV CLV(); ADD_CYCLE(2); break; case 0x38: // SEC SEC(); ADD_CYCLE(2); break; case 0xF8: // SED SED(); ADD_CYCLE(2); break; case 0x78: // SEI SEI(); ADD_CYCLE(2); break; // 僗僞僢僋宯 case 0x48: // PHA PUSH( R.A ); ADD_CYCLE(3); break; case 0x08: // PHP PUSH( R.P | B_FLAG ); ADD_CYCLE(3); break; case 0x68: // PLA (N-----Z-) R.A = POP(); SET_ZN_FLAG(R.A); ADD_CYCLE(4); break; case 0x28: // PLP R.P = POP() | R_FLAG; ADD_CYCLE(4); break; // 偦偺懠 case 0x00: // BRK BRK(); ADD_CYCLE(7); break; case 0xEA: // NOP ADD_CYCLE(2); break; // 枹岞奐柦椷孮 case 0x0B: // ANC #$?? case 0x2B: // ANC #$?? MR_IM(); ANC(); ADD_CYCLE(2); break; case 0x8B: // ANE #$?? MR_IM(); ANE(); ADD_CYCLE(2); break; case 0x6B: // ARR #$?? MR_IM(); ARR(); ADD_CYCLE(2); break; case 0x4B: // ASR #$?? MR_IM(); ASR(); ADD_CYCLE(2); break; case 0xC7: // DCP $?? MR_ZP(); DCP(); MW_ZP(); ADD_CYCLE(5); break; case 0xD7: // DCP $??,X MR_ZX(); DCP(); MW_ZP(); ADD_CYCLE(6); break; case 0xCF: // DCP $???? MR_AB(); DCP(); MW_EA(); ADD_CYCLE(6); break; case 0xDF: // DCP $????,X MR_AX(); DCP(); MW_EA(); ADD_CYCLE(7); break; case 0xDB: // DCP $????,Y MR_AY(); DCP(); MW_EA(); ADD_CYCLE(7); break; case 0xC3: // DCP ($??,X) MR_IX(); DCP(); MW_EA(); ADD_CYCLE(8); break; case 0xD3: // DCP ($??),Y MR_IY(); DCP(); MW_EA(); ADD_CYCLE(8); break; case 0xE7: // ISB $?? MR_ZP(); ISB(); MW_ZP(); ADD_CYCLE(5); break; case 0xF7: // ISB $??,X MR_ZX(); ISB(); MW_ZP(); ADD_CYCLE(5); break; case 0xEF: // ISB $???? MR_AB(); ISB(); MW_EA(); ADD_CYCLE(5); break; case 0xFF: // ISB $????,X MR_AX(); ISB(); MW_EA(); ADD_CYCLE(5); break; case 0xFB: // ISB $????,Y MR_AY(); ISB(); MW_EA(); ADD_CYCLE(5); break; case 0xE3: // ISB ($??,X) MR_IX(); ISB(); MW_EA(); ADD_CYCLE(5); break; case 0xF3: // ISB ($??),Y MR_IY(); ISB(); MW_EA(); ADD_CYCLE(5); break; case 0xBB: // LAS $????,Y MR_AY(); LAS(); CHECK_EA(); ADD_CYCLE(4); break; case 0xA7: // LAX $?? MR_ZP(); LAX(); ADD_CYCLE(3); break; case 0xB7: // LAX $??,Y MR_ZY(); LAX(); ADD_CYCLE(4); break; case 0xAF: // LAX $???? MR_AB(); LAX(); ADD_CYCLE(4); break; case 0xBF: // LAX $????,Y MR_AY(); LAX(); CHECK_EA(); ADD_CYCLE(4); break; case 0xA3: // LAX ($??,X) MR_IX(); LAX(); ADD_CYCLE(6); break; case 0xB3: // LAX ($??),Y MR_IY(); LAX(); CHECK_EA(); ADD_CYCLE(5); break; case 0xAB: // LXA #$?? MR_IM(); LXA(); ADD_CYCLE(2); break; case 0x27: // RLA $?? MR_ZP(); RLA(); MW_ZP(); ADD_CYCLE(5); break; case 0x37: // RLA $??,X MR_ZX(); RLA(); MW_ZP(); ADD_CYCLE(6); break; case 0x2F: // RLA $???? MR_AB(); RLA(); MW_EA(); ADD_CYCLE(6); break; case 0x3F: // RLA $????,X MR_AX(); RLA(); MW_EA(); ADD_CYCLE(7); break; case 0x3B: // RLA $????,Y MR_AY(); RLA(); MW_EA(); ADD_CYCLE(7); break; case 0x23: // RLA ($??,X) MR_IX(); RLA(); MW_EA(); ADD_CYCLE(8); break; case 0x33: // RLA ($??),Y MR_IY(); RLA(); MW_EA(); ADD_CYCLE(8); break; case 0x67: // RRA $?? MR_ZP(); RRA(); MW_ZP(); ADD_CYCLE(5); break; case 0x77: // RRA $??,X MR_ZX(); RRA(); MW_ZP(); ADD_CYCLE(6); break; case 0x6F: // RRA $???? MR_AB(); RRA(); MW_EA(); ADD_CYCLE(6); break; case 0x7F: // RRA $????,X MR_AX(); RRA(); MW_EA(); ADD_CYCLE(7); break; case 0x7B: // RRA $????,Y MR_AY(); RRA(); MW_EA(); ADD_CYCLE(7); break; case 0x63: // RRA ($??,X) MR_IX(); RRA(); MW_EA(); ADD_CYCLE(8); break; case 0x73: // RRA ($??),Y MR_IY(); RRA(); MW_EA(); ADD_CYCLE(8); break; case 0x87: // SAX $?? MR_ZP(); SAX(); MW_ZP(); ADD_CYCLE(3); break; case 0x97: // SAX $??,Y MR_ZY(); SAX(); MW_ZP(); ADD_CYCLE(4); break; case 0x8F: // SAX $???? MR_AB(); SAX(); MW_EA(); ADD_CYCLE(4); break; case 0x83: // SAX ($??,X) MR_IX(); SAX(); MW_EA(); ADD_CYCLE(6); break; case 0xCB: // SBX #$?? MR_IM(); SBX(); ADD_CYCLE(2); break; case 0x9F: // SHA $????,Y MR_AY(); SHA(); MW_EA(); ADD_CYCLE(5); break; case 0x93: // SHA ($??),Y MR_IY(); SHA(); MW_EA(); ADD_CYCLE(6); break; case 0x9B: // SHS $????,Y MR_AY(); SHS(); MW_EA(); ADD_CYCLE(5); break; case 0x9E: // SHX $????,Y MR_AY(); SHX(); MW_EA(); ADD_CYCLE(5); break; case 0x9C: // SHY $????,X MR_AX(); SHY(); MW_EA(); ADD_CYCLE(5); break; case 0x07: // SLO $?? MR_ZP(); SLO(); MW_ZP(); ADD_CYCLE(5); break; case 0x17: // SLO $??,X MR_ZX(); SLO(); MW_ZP(); ADD_CYCLE(6); break; case 0x0F: // SLO $???? MR_AB(); SLO(); MW_EA(); ADD_CYCLE(6); break; case 0x1F: // SLO $????,X MR_AX(); SLO(); MW_EA(); ADD_CYCLE(7); break; case 0x1B: // SLO $????,Y MR_AY(); SLO(); MW_EA(); ADD_CYCLE(7); break; case 0x03: // SLO ($??,X) MR_IX(); SLO(); MW_EA(); ADD_CYCLE(8); break; case 0x13: // SLO ($??),Y MR_IY(); SLO(); MW_EA(); ADD_CYCLE(8); break; case 0x47: // SRE $?? MR_ZP(); SRE(); MW_ZP(); ADD_CYCLE(5); break; case 0x57: // SRE $??,X MR_ZX(); SRE(); MW_ZP(); ADD_CYCLE(6); break; case 0x4F: // SRE $???? MR_AB(); SRE(); MW_EA(); ADD_CYCLE(6); break; case 0x5F: // SRE $????,X MR_AX(); SRE(); MW_EA(); ADD_CYCLE(7); break; case 0x5B: // SRE $????,Y MR_AY(); SRE(); MW_EA(); ADD_CYCLE(7); break; case 0x43: // SRE ($??,X) MR_IX(); SRE(); MW_EA(); ADD_CYCLE(8); break; case 0x53: // SRE ($??),Y MR_IY(); SRE(); MW_EA(); ADD_CYCLE(8); break; case 0xEB: // SBC #$?? (Unofficial) MR_IM(); SBC(); ADD_CYCLE(2); break; case 0x1A: // NOP (Unofficial) case 0x3A: // NOP (Unofficial) case 0x5A: // NOP (Unofficial) case 0x7A: // NOP (Unofficial) case 0xDA: // NOP (Unofficial) case 0xFA: // NOP (Unofficial) ADD_CYCLE(2); break; case 0x80: // DOP (CYCLES 2) case 0x82: // DOP (CYCLES 2) case 0x89: // DOP (CYCLES 2) case 0xC2: // DOP (CYCLES 2) case 0xE2: // DOP (CYCLES 2) R.PC++; ADD_CYCLE(2); break; case 0x04: // DOP (CYCLES 3) case 0x44: // DOP (CYCLES 3) case 0x64: // DOP (CYCLES 3) R.PC++; ADD_CYCLE(3); break; case 0x14: // DOP (CYCLES 4) case 0x34: // DOP (CYCLES 4) case 0x54: // DOP (CYCLES 4) case 0x74: // DOP (CYCLES 4) case 0xD4: // DOP (CYCLES 4) case 0xF4: // DOP (CYCLES 4) R.PC++; ADD_CYCLE(4); break; case 0x0C: // TOP case 0x1C: // TOP case 0x3C: // TOP case 0x5C: // TOP case 0x7C: // TOP case 0xDC: // TOP case 0xFC: // TOP R.PC+=2; ADD_CYCLE(4); break; case 0x02: /* JAM */ case 0x12: /* JAM */ case 0x22: /* JAM */ case 0x32: /* JAM */ case 0x42: /* JAM */ case 0x52: /* JAM */ case 0x62: /* JAM */ case 0x72: /* JAM */ case 0x92: /* JAM */ case 0xB2: /* JAM */ case 0xD2: /* JAM */ case 0xF2: /* JAM */ default: if( !Config.emulator.bIllegalOp ) { throw CApp::GetErrorString( IDS_ERROR_ILLEGALOPCODE ); goto _execute_exit; } else { R.PC--; ADD_CYCLE(4); } break; // default: // __assume(0); } end_is: __asm nop; if( nmi_request ) { _NMI(); } else if( irq_request ) { _IRQ(); } request_cycles -= exec_cycles; TOTAL_cycles += exec_cycles; // 僋儘僢僋摨婜張棟 mapper->Clock( exec_cycles ); #if DPCM_SYNCCLOCK apu->SyncDPCM( exec_cycles ); #endif if( bClockProcess ) { nes->Clock( exec_cycles ); } // nes->Clock( exec_cycles ); } _execute_exit: #if !DPCM_SYNCCLOCK apu->SyncDPCM( TOTAL_cycles - OLD_cycles ); #endif return TOTAL_cycles - OLD_cycles; }