/**Function*************************************************************
Synopsis [Performs ternary simulation for one design.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Saig_ManSimDataInit( Aig_Man_t * p, Abc_Cex_t * pCex, Vec_Ptr_t * vSimInfo, Vec_Int_t * vRes )
{
Aig_Obj_t * pObj, * pObjLi, * pObjLo;
int i, f, Entry, iBit = 0;
Saig_ManForEachLo( p, pObj, i )
Saig_ManSimInfoSet( vSimInfo, pObj, 0, Abc_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE:SAIG_ZER );
for ( f = 0; f <= pCex->iFrame; f++ )
{
Saig_ManSimInfoSet( vSimInfo, Aig_ManConst1(p), f, SAIG_ONE );
Saig_ManForEachPi( p, pObj, i )
Saig_ManSimInfoSet( vSimInfo, pObj, f, Abc_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE:SAIG_ZER );
if ( vRes )
Vec_IntForEachEntry( vRes, Entry, i )
Saig_ManSimInfoSet( vSimInfo, Aig_ManCi(p, Entry), f, SAIG_UND );
Aig_ManForEachNode( p, pObj, i )
Saig_ManExtendOneEval( vSimInfo, pObj, f );
Aig_ManForEachCo( p, pObj, i )
Saig_ManExtendOneEval( vSimInfo, pObj, f );
if ( f == pCex->iFrame )
break;
Saig_ManForEachLiLo( p, pObjLi, pObjLo, i )
Saig_ManSimInfoSet( vSimInfo, pObjLo, f+1, Saig_ManSimInfoGet(vSimInfo, pObjLi, f) );
}
// make sure the output of the property failed
pObj = Aig_ManCo( p, pCex->iPo );
return Saig_ManSimInfoGet( vSimInfo, pObj, pCex->iFrame );
}
Aig_Obj_t *readLiveSignal_k( Aig_Man_t *pAig, int liveIndex_k )
{
Aig_Obj_t *pObj;
pObj = Aig_ManCo( pAig, liveIndex_k );
return Aig_NotCond((Aig_Obj_t *)Aig_ObjFanin0(pObj), Aig_ObjFaninC0(pObj));
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Unroll the circuit the given number of timeframes.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Inter_ManFramesBmc( Aig_Man_t * pAig, int nFrames )
{
Aig_Man_t * pFrames;
Aig_Obj_t * pObj, * pObjLi, * pObjLo;
int i, f;
assert( Saig_ManRegNum(pAig) > 0 );
assert( Saig_ManPoNum(pAig) == 1 );
pFrames = Aig_ManStart( Aig_ManNodeNum(pAig) * nFrames );
// map the constant node
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pFrames );
// create variables for register outputs
Saig_ManForEachLo( pAig, pObj, i )
pObj->pData = Aig_ManConst0( pFrames );
// add timeframes
for ( f = 0; f < nFrames; f++ )
{
// create PI nodes for this frame
Saig_ManForEachPi( pAig, pObj, i )
pObj->pData = Aig_ObjCreateCi( pFrames );
// add internal nodes of this frame
Aig_ManForEachNode( pAig, pObj, i )
pObj->pData = Aig_And( pFrames, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
if ( f == nFrames - 1 )
break;
// transfer to register outputs
Saig_ManForEachLiLo( pAig, pObjLi, pObjLo, i )
pObjLi->pData = Aig_ObjChild0Copy(pObjLi);
// transfer to register outputs
Saig_ManForEachLiLo( pAig, pObjLi, pObjLo, i )
pObjLo->pData = pObjLi->pData;
}
// create POs for the output of the last frame
pObj = Aig_ManCo( pAig, 0 );
Aig_ObjCreateCo( pFrames, Aig_ObjChild0Copy(pObj) );
Aig_ManCleanup( pFrames );
return pFrames;
}
// solve incremental SAT problems
Aig_ManForEachCo( pManOn, pObj, i )
{
pObj2 = Aig_ManCo( pManOff, i );
Lits[0] = toLitCond( pCnfOn->pVarNums[pObj->Id], 0 );
Lits[1] = toLitCond( pCnfOff->pVarNums[pObj2->Id], 0 );
status = sat_solver_solve( pSat, Lits, Lits+2, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
if ( status != l_False )
printf( "The incremental SAT problem is not UNSAT.\n" );
}
/**Function*************************************************************
Synopsis [Duplicate the AIG w/o POs and transforms to transit into init state.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Inter_ManStartOneOutput( Aig_Man_t * p, int fAddFirstPo )
{
Aig_Man_t * pNew;
Aig_Obj_t * pObj, * pObjLi, * pObjLo;
Aig_Obj_t * pCtrl = NULL; // Suppress "might be used uninitialized"
int i;
assert( Aig_ManRegNum(p) > 0 );
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
pNew->pName = Abc_UtilStrsav( p->pName );
pNew->pSpec = Abc_UtilStrsav( p->pSpec );
// create the PIs
Aig_ManCleanData( p );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
Aig_ManForEachCi( p, pObj, i )
{
if ( i == Saig_ManPiNum(p) )
pCtrl = Aig_ObjCreateCi( pNew );
pObj->pData = Aig_ObjCreateCi( pNew );
}
// set registers
pNew->nRegs = fAddFirstPo? 0 : p->nRegs;
pNew->nTruePis = fAddFirstPo? Aig_ManCiNum(p) + 1 : p->nTruePis + 1;
pNew->nTruePos = fAddFirstPo + Saig_ManConstrNum(p);
// duplicate internal nodes
Aig_ManForEachNode( p, pObj, i )
pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
// create constraint outputs
Saig_ManForEachPo( p, pObj, i )
{
if ( i < Saig_ManPoNum(p)-Saig_ManConstrNum(p) )
continue;
Aig_ObjCreateCo( pNew, Aig_Not( Aig_ObjChild0Copy(pObj) ) );
}
// add the PO
if ( fAddFirstPo )
{
pObj = Aig_ManCo( p, 0 );
Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
}
else
{
// create register inputs with MUXes
Saig_ManForEachLiLo( p, pObjLi, pObjLo, i )
{
pObj = Aig_Mux( pNew, pCtrl, (Aig_Obj_t *)pObjLo->pData, Aig_ObjChild0Copy(pObjLi) );
// pObj = Aig_Mux( pNew, pCtrl, Aig_ManConst0(pNew), Aig_ObjChild0Copy(pObjLi) );
Aig_ObjCreateCo( pNew, pObj );
}
}
/**Function*************************************************************
Synopsis [Duplicates AIG while mapping PIs into the given array.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Aig_ManAppend( Aig_Man_t * pBase, Aig_Man_t * pNew )
{
Aig_Obj_t * pObj;
int i;
assert( Aig_ManCoNum(pNew) == 1 );
assert( Aig_ManCiNum(pNew) == Aig_ManCiNum(pBase) );
// create the PIs
Aig_ManCleanData( pNew );
Aig_ManConst1(pNew)->pData = Aig_ManConst1(pBase);
Aig_ManForEachCi( pNew, pObj, i )
pObj->pData = Aig_IthVar(pBase, i);
// duplicate internal nodes
Aig_ManForEachNode( pNew, pObj, i )
pObj->pData = Aig_And( pBase, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
// add one PO to base
pObj = Aig_ManCo( pNew, 0 );
Aig_ObjCreateCo( pBase, Aig_ObjChild0Copy(pObj) );
}
int Saig_ManFilterUsingIndOne2( Aig_Man_t * p, Aig_Man_t * pFrame, sat_solver * pSat, Cnf_Dat_t * pCnf, int nConfs, int nProps, int Counter
, int type_ /* jlong -- */
)
{
Aig_Obj_t * pObj;
int Lit, status;
pObj = Aig_ManCo( pFrame, Counter*3+type_ ); /* which co */
Lit = toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], 0 );
status = sat_solver_solve( pSat, &Lit, &Lit + 1, (ABC_INT64_T)nConfs, 0, 0, 0 );
if ( status == l_False ) /* unsat */
return status;
if ( status == l_Undef )
{
printf( "Solver returned undecided.\n" );
return status;
}
assert( status == l_True );
return status;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Aig_ManInterTest( Aig_Man_t * pMan, int fVerbose )
{
sat_solver2 * pSat;
// Aig_Man_t * pInter;
word * pInter;
Vec_Int_t * vVars;
Cnf_Dat_t * pCnf;
Aig_Obj_t * pObj;
int Lit, Cid, Var, status, i;
clock_t clk = clock();
assert( Aig_ManRegNum(pMan) == 0 );
assert( Aig_ManCoNum(pMan) == 1 );
// derive CNFs
pCnf = Cnf_Derive( pMan, 1 );
// start the solver
pSat = sat_solver2_new();
sat_solver2_setnvars( pSat, 2*pCnf->nVars+1 );
// set A-variables (all used except PI/PO)
Aig_ManForEachObj( pMan, pObj, i )
{
if ( pCnf->pVarNums[pObj->Id] < 0 )
continue;
if ( !Aig_ObjIsCi(pObj) && !Aig_ObjIsCo(pObj) )
var_set_partA( pSat, pCnf->pVarNums[pObj->Id], 1 );
}
// add clauses of A
for ( i = 0; i < pCnf->nClauses; i++ )
{
Cid = sat_solver2_addclause( pSat, pCnf->pClauses[i], pCnf->pClauses[i+1], 0 );
clause2_set_partA( pSat, Cid, 1 );
}
// add clauses of B
Cnf_DataLift( pCnf, pCnf->nVars );
for ( i = 0; i < pCnf->nClauses; i++ )
sat_solver2_addclause( pSat, pCnf->pClauses[i], pCnf->pClauses[i+1], 0 );
Cnf_DataLift( pCnf, -pCnf->nVars );
// add PI equality clauses
vVars = Vec_IntAlloc( Aig_ManCoNum(pMan)+1 );
Aig_ManForEachCi( pMan, pObj, i )
{
if ( Aig_ObjRefs(pObj) == 0 )
continue;
Var = pCnf->pVarNums[pObj->Id];
Aig_ManInterAddBuffer( pSat, Var, pCnf->nVars + Var, 0, 0 );
Vec_IntPush( vVars, Var );
}
// add an XOR clause in the end
Var = pCnf->pVarNums[Aig_ManCo(pMan,0)->Id];
Aig_ManInterAddXor( pSat, Var, pCnf->nVars + Var, 2*pCnf->nVars, 0, 0 );
Vec_IntPush( vVars, Var );
// solve the problem
Lit = toLitCond( 2*pCnf->nVars, 0 );
status = sat_solver2_solve( pSat, &Lit, &Lit + 1, 0, 0, 0, 0 );
assert( status == l_False );
Sat_Solver2PrintStats( stdout, pSat );
// derive interpolant
// pInter = Sat_ProofInterpolant( pSat, vVars );
// Aig_ManPrintStats( pInter );
// Aig_ManDumpBlif( pInter, "int.blif", NULL, NULL );
//pInter = Sat_ProofInterpolantTruth( pSat, vVars );
pInter = NULL;
// Extra_PrintHex( stdout, pInter, Vec_IntSize(vVars) ); printf( "\n" );
// clean up
// Aig_ManStop( pInter );
ABC_FREE( pInter );
Vec_IntFree( vVars );
Cnf_DataFree( pCnf );
sat_solver2_delete( pSat );
ABC_PRT( "Total interpolation time", clock() - clk );
}
/**Function*************************************************************
Synopsis [Takes the AIG with the single output to be checked.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Cla_Man_t * Fra_ClauStart( Aig_Man_t * pMan )
{
Cla_Man_t * p;
Cnf_Dat_t * pCnfMain;
Cnf_Dat_t * pCnfTest;
Cnf_Dat_t * pCnfBmc;
Aig_Man_t * pFramesMain;
Aig_Man_t * pFramesTest;
Aig_Man_t * pFramesBmc;
assert( Aig_ManCoNum(pMan) - Aig_ManRegNum(pMan) == 1 );
// start the manager
p = ABC_ALLOC( Cla_Man_t, 1 );
memset( p, 0, sizeof(Cla_Man_t) );
p->vCexMain0 = Vec_IntAlloc( Aig_ManRegNum(pMan) );
p->vCexMain = Vec_IntAlloc( Aig_ManRegNum(pMan) );
p->vCexTest = Vec_IntAlloc( Aig_ManRegNum(pMan) );
p->vCexBase = Vec_IntAlloc( Aig_ManRegNum(pMan) );
p->vCexAssm = Vec_IntAlloc( Aig_ManRegNum(pMan) );
p->vCexBmc = Vec_IntAlloc( Aig_ManRegNum(pMan) );
// derive two timeframes to be checked
pFramesMain = Aig_ManFrames( pMan, 2, 0, 1, 0, 0, NULL ); // nFrames, fInit, fOuts, fRegs
//Aig_ManShow( pFramesMain, 0, NULL );
assert( Aig_ManCoNum(pFramesMain) == 2 );
Aig_ObjChild0Flip( Aig_ManCo(pFramesMain, 0) ); // complement the first output
pCnfMain = Cnf_DeriveSimple( pFramesMain, 0 );
//Cnf_DataWriteIntoFile( pCnfMain, "temp.cnf", 1 );
p->pSatMain = (sat_solver *)Cnf_DataWriteIntoSolver( pCnfMain, 1, 0 );
/*
{
int i;
Aig_Obj_t * pObj;
Aig_ManForEachObj( pFramesMain, pObj, i )
printf( "%d -> %d \n", pObj->Id, pCnfMain->pVarNums[pObj->Id] );
printf( "\n" );
}
*/
// derive one timeframe to be checked
pFramesTest = Aig_ManFrames( pMan, 1, 0, 0, 1, 0, NULL );
assert( Aig_ManCoNum(pFramesTest) == Aig_ManRegNum(pMan) );
pCnfTest = Cnf_DeriveSimple( pFramesTest, Aig_ManRegNum(pMan) );
p->pSatTest = (sat_solver *)Cnf_DataWriteIntoSolver( pCnfTest, 1, 0 );
p->nSatVarsTestBeg = p->nSatVarsTestCur = sat_solver_nvars( p->pSatTest );
// derive one timeframe to be checked for BMC
pFramesBmc = Aig_ManFrames( pMan, 1, 1, 0, 1, 0, NULL );
//Aig_ManShow( pFramesBmc, 0, NULL );
assert( Aig_ManCoNum(pFramesBmc) == Aig_ManRegNum(pMan) );
pCnfBmc = Cnf_DeriveSimple( pFramesBmc, Aig_ManRegNum(pMan) );
p->pSatBmc = (sat_solver *)Cnf_DataWriteIntoSolver( pCnfBmc, 1, 0 );
// create variable sets
p->vSatVarsMainCs = Fra_ClauSaveInputVars( pFramesMain, pCnfMain, 2 * (Aig_ManCiNum(pMan)-Aig_ManRegNum(pMan)) );
p->vSatVarsTestCs = Fra_ClauSaveLatchVars( pFramesTest, pCnfTest, 1 );
p->vSatVarsTestNs = Fra_ClauSaveLatchVars( pFramesTest, pCnfTest, 0 );
p->vSatVarsBmcNs = Fra_ClauSaveOutputVars( pFramesBmc, pCnfBmc );
assert( Vec_IntSize(p->vSatVarsTestCs) == Vec_IntSize(p->vSatVarsMainCs) );
assert( Vec_IntSize(p->vSatVarsTestCs) == Vec_IntSize(p->vSatVarsBmcNs) );
// create mapping of CS into NS vars
p->pMapCsMainToCsTest = Fra_ClauCreateMapping( p->vSatVarsMainCs, p->vSatVarsTestCs, Aig_ManObjNumMax(pFramesMain) );
p->pMapCsTestToCsMain = Fra_ClauCreateMapping( p->vSatVarsTestCs, p->vSatVarsMainCs, Aig_ManObjNumMax(pFramesTest) );
p->pMapCsTestToNsTest = Fra_ClauCreateMapping( p->vSatVarsTestCs, p->vSatVarsTestNs, Aig_ManObjNumMax(pFramesTest) );
p->pMapCsTestToNsBmc = Fra_ClauCreateMapping( p->vSatVarsTestCs, p->vSatVarsBmcNs, Aig_ManObjNumMax(pFramesTest) );
// cleanup
Cnf_DataFree( pCnfMain );
Cnf_DataFree( pCnfTest );
Cnf_DataFree( pCnfBmc );
Aig_ManStop( pFramesMain );
Aig_ManStop( pFramesTest );
Aig_ManStop( pFramesBmc );
if ( p->pSatMain == NULL || p->pSatTest == NULL || p->pSatBmc == NULL )
{
Fra_ClauStop( p );
return NULL;
}
return p;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Saig_ManTemporDecompose( Aig_Man_t * pAig, int nFrames )
{
Aig_Man_t * pAigNew, * pFrames;
Aig_Obj_t * pObj, * pReset;
int i;
if ( pAig->nConstrs > 0 )
{
printf( "The AIG manager should have no constraints.\n" );
return NULL;
}
// create initialized timeframes
pFrames = Saig_ManTemporFrames( pAig, nFrames );
assert( Aig_ManCoNum(pFrames) == Aig_ManRegNum(pAig) );
// start the new manager
Aig_ManCleanData( pAig );
pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
pAigNew->pName = Abc_UtilStrsav( pAig->pName );
// map the constant node and primary inputs
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
Saig_ManForEachPi( pAig, pObj, i )
pObj->pData = Aig_ObjCreateCi( pAigNew );
// insert initialization logic
Aig_ManConst1(pFrames)->pData = Aig_ManConst1( pAigNew );
Aig_ManForEachCi( pFrames, pObj, i )
pObj->pData = Aig_ObjCreateCi( pAigNew );
Aig_ManForEachNode( pFrames, pObj, i )
pObj->pData = Aig_And( pAigNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
Aig_ManForEachCo( pFrames, pObj, i )
pObj->pData = Aig_ObjChild0Copy(pObj);
// create reset latch (the first one among the latches)
pReset = Aig_ObjCreateCi( pAigNew );
// create flop output values
Saig_ManForEachLo( pAig, pObj, i )
pObj->pData = Aig_Mux( pAigNew, pReset, Aig_ObjCreateCi(pAigNew), (Aig_Obj_t *)Aig_ManCo(pFrames, i)->pData );
Aig_ManStop( pFrames );
// add internal nodes of this frame
Aig_ManForEachNode( pAig, pObj, i )
pObj->pData = Aig_And( pAigNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
// create primary outputs
Saig_ManForEachPo( pAig, pObj, i )
Aig_ObjCreateCo( pAigNew, Aig_ObjChild0Copy(pObj) );
// create reset latch (the first one among the latches)
Aig_ObjCreateCo( pAigNew, Aig_ManConst1(pAigNew) );
// create latch inputs
Saig_ManForEachLi( pAig, pObj, i )
Aig_ObjCreateCo( pAigNew, Aig_ObjChild0Copy(pObj) );
// finalize
Aig_ManCleanup( pAigNew );
Aig_ManSetRegNum( pAigNew, Aig_ManRegNum(pAig)+1 ); // + reset latch (011111...)
return pAigNew;
}
/**Function*************************************************************
Synopsis [Interplates while the number of conflicts is not exceeded.]
Description [Returns 1 if proven. 0 if failed. -1 if undecided.]
SideEffects [Does not check the property in 0-th frame.]
SeeAlso []
***********************************************************************/
int Inter_ManPerformInterpolation( Aig_Man_t * pAig, Inter_ManParams_t * pPars, int * piFrame )
{
extern int Inter_ManCheckInductiveContainment( Aig_Man_t * pTrans, Aig_Man_t * pInter, int nSteps, int fBackward );
Inter_Man_t * p;
Inter_Check_t * pCheck = NULL;
Aig_Man_t * pAigTemp;
int s, i, RetValue, Status;
abctime clk, clk2, clkTotal = Abc_Clock(), timeTemp = 0;
abctime nTimeNewOut = pPars->nSecLimit ? pPars->nSecLimit * CLOCKS_PER_SEC + Abc_Clock() : 0;
// enable ORing of the interpolants, if containment check is performed inductively with K > 1
if ( pPars->nFramesK > 1 )
pPars->fTransLoop = 1;
// sanity checks
assert( Saig_ManRegNum(pAig) > 0 );
assert( Saig_ManPiNum(pAig) > 0 );
assert( Saig_ManPoNum(pAig)-Saig_ManConstrNum(pAig) == 1 );
if ( pPars->fVerbose && Saig_ManConstrNum(pAig) )
printf( "Performing interpolation with %d constraints...\n", Saig_ManConstrNum(pAig) );
if ( Inter_ManCheckInitialState(pAig) )
{
*piFrame = -1;
printf( "Property trivially fails in the initial state.\n" );
return 0;
}
/*
if ( Inter_ManCheckAllStates(pAig) )
{
printf( "Property trivially holds in all states.\n" );
return 1;
}
*/
// create interpolation manager
// can perform SAT sweeping and/or rewriting of this AIG...
p = Inter_ManCreate( pAig, pPars );
if ( pPars->fTransLoop )
p->pAigTrans = Inter_ManStartOneOutput( pAig, 0 );
else
p->pAigTrans = Inter_ManStartDuplicated( pAig );
// derive CNF for the transformed AIG
clk = Abc_Clock();
p->pCnfAig = Cnf_Derive( p->pAigTrans, Aig_ManRegNum(p->pAigTrans) );
p->timeCnf += Abc_Clock() - clk;
if ( pPars->fVerbose )
{
printf( "AIG: PI/PO/Reg = %d/%d/%d. And = %d. Lev = %d. CNF: Var/Cla = %d/%d.\n",
Saig_ManPiNum(pAig), Saig_ManPoNum(pAig), Saig_ManRegNum(pAig),
Aig_ManAndNum(pAig), Aig_ManLevelNum(pAig),
p->pCnfAig->nVars, p->pCnfAig->nClauses );
}
// derive interpolant
*piFrame = -1;
p->nFrames = 1;
for ( s = 0; ; s++ )
{
Cnf_Dat_t * pCnfInter2;
clk2 = Abc_Clock();
// initial state
if ( pPars->fUseBackward )
p->pInter = Inter_ManStartOneOutput( pAig, 1 );
else
p->pInter = Inter_ManStartInitState( Aig_ManRegNum(pAig) );
assert( Aig_ManCoNum(p->pInter) == 1 );
clk = Abc_Clock();
p->pCnfInter = Cnf_Derive( p->pInter, 0 );
p->timeCnf += Abc_Clock() - clk;
// timeframes
p->pFrames = Inter_ManFramesInter( pAig, p->nFrames, pPars->fUseBackward, pPars->fUseTwoFrames );
clk = Abc_Clock();
if ( pPars->fRewrite )
{
p->pFrames = Dar_ManRwsat( pAigTemp = p->pFrames, 1, 0 );
Aig_ManStop( pAigTemp );
// p->pFrames = Fra_FraigEquivence( pAigTemp = p->pFrames, 100, 0 );
// Aig_ManStop( pAigTemp );
}
p->timeRwr += Abc_Clock() - clk;
// can also do SAT sweeping on the timeframes...
clk = Abc_Clock();
if ( pPars->fUseBackward )
p->pCnfFrames = Cnf_Derive( p->pFrames, Aig_ManCoNum(p->pFrames) );
else
// p->pCnfFrames = Cnf_Derive( p->pFrames, 0 );
p->pCnfFrames = Cnf_DeriveSimple( p->pFrames, 0 );
p->timeCnf += Abc_Clock() - clk;
// report statistics
if ( pPars->fVerbose )
{
printf( "Step = %2d. Frames = 1 + %d. And = %5d. Lev = %5d. ",
s+1, p->nFrames, Aig_ManNodeNum(p->pFrames), Aig_ManLevelNum(p->pFrames) );
ABC_PRT( "Time", Abc_Clock() - clk2 );
}
//////////////////////////////////////////
// start containment checking
if ( !(pPars->fTransLoop || pPars->fUseBackward || pPars->nFramesK > 1) )
{
pCheck = Inter_CheckStart( p->pAigTrans, pPars->nFramesK );
// try new containment check for the initial state
clk = Abc_Clock();
pCnfInter2 = Cnf_Derive( p->pInter, 1 );
p->timeCnf += Abc_Clock() - clk;
clk = Abc_Clock();
RetValue = Inter_CheckPerform( pCheck, pCnfInter2, nTimeNewOut );
p->timeEqu += Abc_Clock() - clk;
// assert( RetValue == 0 );
Cnf_DataFree( pCnfInter2 );
if ( p->vInters )
Vec_PtrPush( p->vInters, Aig_ManDupSimple(p->pInter) );
}
//////////////////////////////////////////
// iterate the interpolation procedure
for ( i = 0; ; i++ )
{
if ( pPars->nFramesMax && p->nFrames + i >= pPars->nFramesMax )
{
if ( pPars->fVerbose )
printf( "Reached limit (%d) on the number of timeframes.\n", pPars->nFramesMax );
p->timeTotal = Abc_Clock() - clkTotal;
Inter_ManStop( p, 0 );
Inter_CheckStop( pCheck );
return -1;
}
// perform interpolation
clk = Abc_Clock();
#ifdef ABC_USE_LIBRARIES
if ( pPars->fUseMiniSat )
{
assert( !pPars->fUseBackward );
RetValue = Inter_ManPerformOneStepM114p( p, pPars->fUsePudlak, pPars->fUseOther );
}
else
#endif
RetValue = Inter_ManPerformOneStep( p, pPars->fUseBias, pPars->fUseBackward, nTimeNewOut );
if ( pPars->fVerbose )
{
printf( " I = %2d. Bmc =%3d. IntAnd =%6d. IntLev =%5d. Conf =%6d. ",
i+1, i + 1 + p->nFrames, Aig_ManNodeNum(p->pInter), Aig_ManLevelNum(p->pInter), p->nConfCur );
ABC_PRT( "Time", Abc_Clock() - clk );
}
// remember the number of timeframes completed
pPars->iFrameMax = i - 1 + p->nFrames;
if ( RetValue == 0 ) // found a (spurious?) counter-example
{
if ( i == 0 ) // real counterexample
{
if ( pPars->fVerbose )
printf( "Found a real counterexample in frame %d.\n", p->nFrames );
p->timeTotal = Abc_Clock() - clkTotal;
*piFrame = p->nFrames;
// pAig->pSeqModel = (Abc_Cex_t *)Inter_ManGetCounterExample( pAig, p->nFrames+1, pPars->fVerbose );
{
int RetValue;
Saig_ParBmc_t ParsBmc, * pParsBmc = &ParsBmc;
Saig_ParBmcSetDefaultParams( pParsBmc );
pParsBmc->nConfLimit = 100000000;
pParsBmc->nStart = p->nFrames;
pParsBmc->fVerbose = pPars->fVerbose;
RetValue = Saig_ManBmcScalable( pAig, pParsBmc );
if ( RetValue == 1 )
printf( "Error: The problem should be SAT but it is UNSAT.\n" );
else if ( RetValue == -1 )
printf( "Error: The problem timed out.\n" );
}
Inter_ManStop( p, 0 );
Inter_CheckStop( pCheck );
return 0;
}
// likely spurious counter-example
p->nFrames += i;
Inter_ManClean( p );
break;
}
else if ( RetValue == -1 )
{
if ( pPars->nSecLimit && Abc_Clock() > nTimeNewOut ) // timed out
{
if ( pPars->fVerbose )
printf( "Reached timeout (%d seconds).\n", pPars->nSecLimit );
}
else
{
assert( p->nConfCur >= p->nConfLimit );
if ( pPars->fVerbose )
printf( "Reached limit (%d) on the number of conflicts.\n", p->nConfLimit );
}
p->timeTotal = Abc_Clock() - clkTotal;
Inter_ManStop( p, 0 );
Inter_CheckStop( pCheck );
return -1;
}
assert( RetValue == 1 ); // found new interpolant
// compress the interpolant
clk = Abc_Clock();
if ( p->pInterNew )
{
// save the timeout value
p->pInterNew->Time2Quit = nTimeNewOut;
// Ioa_WriteAiger( p->pInterNew, "interpol.aig", 0, 0 );
p->pInterNew = Dar_ManRwsat( pAigTemp = p->pInterNew, 1, 0 );
// p->pInterNew = Dar_ManRwsat( pAigTemp = p->pInterNew, 0, 0 );
Aig_ManStop( pAigTemp );
if ( p->pInterNew == NULL )
{
printf( "Reached timeout (%d seconds) during rewriting.\n", pPars->nSecLimit );
p->timeTotal = Abc_Clock() - clkTotal;
Inter_ManStop( p, 1 );
Inter_CheckStop( pCheck );
return -1;
}
}
p->timeRwr += Abc_Clock() - clk;
// check if interpolant is trivial
if ( p->pInterNew == NULL || Aig_ObjChild0(Aig_ManCo(p->pInterNew,0)) == Aig_ManConst0(p->pInterNew) )
{
// printf( "interpolant is constant 0\n" );
if ( pPars->fVerbose )
printf( "The problem is trivially true for all states.\n" );
p->timeTotal = Abc_Clock() - clkTotal;
Inter_ManStop( p, 1 );
Inter_CheckStop( pCheck );
return 1;
}
// check containment of interpolants
clk = Abc_Clock();
if ( pPars->fCheckKstep ) // k-step unique-state induction
{
if ( Aig_ManCiNum(p->pInterNew) == Aig_ManCiNum(p->pInter) )
{
if ( pPars->fTransLoop || pPars->fUseBackward || pPars->nFramesK > 1 )
{
clk2 = Abc_Clock();
Status = Inter_ManCheckInductiveContainment( p->pAigTrans, p->pInterNew, Abc_MinInt(i + 1, pPars->nFramesK), pPars->fUseBackward );
timeTemp = Abc_Clock() - clk2;
}
else
{ // new containment check
clk2 = Abc_Clock();
pCnfInter2 = Cnf_Derive( p->pInterNew, 1 );
p->timeCnf += Abc_Clock() - clk2;
timeTemp = Abc_Clock() - clk2;
Status = Inter_CheckPerform( pCheck, pCnfInter2, nTimeNewOut );
Cnf_DataFree( pCnfInter2 );
if ( p->vInters )
Vec_PtrPush( p->vInters, Aig_ManDupSimple(p->pInterNew) );
}
}
else
Status = 0;
}
else // combinational containment
{
if ( Aig_ManCiNum(p->pInterNew) == Aig_ManCiNum(p->pInter) )
Status = Inter_ManCheckContainment( p->pInterNew, p->pInter );
else
Status = 0;
}
p->timeEqu += Abc_Clock() - clk - timeTemp;
if ( Status ) // contained
{
if ( pPars->fVerbose )
printf( "Proved containment of interpolants.\n" );
p->timeTotal = Abc_Clock() - clkTotal;
Inter_ManStop( p, 1 );
Inter_CheckStop( pCheck );
return 1;
}
if ( pPars->nSecLimit && Abc_Clock() > nTimeNewOut )
{
printf( "Reached timeout (%d seconds).\n", pPars->nSecLimit );
p->timeTotal = Abc_Clock() - clkTotal;
Inter_ManStop( p, 1 );
Inter_CheckStop( pCheck );
return -1;
}
// save interpolant and convert it into CNF
if ( pPars->fTransLoop )
{
Aig_ManStop( p->pInter );
p->pInter = p->pInterNew;
}
else
{
if ( pPars->fUseBackward )
{
p->pInter = Aig_ManCreateMiter( pAigTemp = p->pInter, p->pInterNew, 2 );
Aig_ManStop( pAigTemp );
Aig_ManStop( p->pInterNew );
// compress the interpolant
clk = Abc_Clock();
p->pInter = Dar_ManRwsat( pAigTemp = p->pInter, 1, 0 );
Aig_ManStop( pAigTemp );
p->timeRwr += Abc_Clock() - clk;
}
else // forward with the new containment checking (using only the frontier)
{
Aig_ManStop( p->pInter );
p->pInter = p->pInterNew;
}
}
p->pInterNew = NULL;
Cnf_DataFree( p->pCnfInter );
clk = Abc_Clock();
p->pCnfInter = Cnf_Derive( p->pInter, 0 );
p->timeCnf += Abc_Clock() - clk;
}
// start containment checking
Inter_CheckStop( pCheck );
}
assert( 0 );
return RetValue;
}
/**Function*************************************************************
Synopsis [Detects constraints using structural methods.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Saig_ManDetectConstr( Aig_Man_t * p, int iOut, Vec_Ptr_t ** pvOuts, Vec_Ptr_t ** pvCons )
{
Vec_Ptr_t * vSuper, * vSuper2 = NULL, * vUnique;
Aig_Obj_t * pObj, * pObj2, * pFlop;
int i, nFlops, RetValue;
assert( iOut >= 0 && iOut < Saig_ManPoNum(p) );
*pvOuts = NULL;
*pvCons = NULL;
pObj = Aig_ObjChild0( Aig_ManCo(p, iOut) );
if ( Aig_IsComplement(pObj) || !Aig_ObjIsNode(pObj) )
{
printf( "The output is not an AND.\n" );
return 0;
}
vSuper = Saig_DetectConstrCollectSuper( pObj );
assert( Vec_PtrSize(vSuper) >= 2 );
nFlops = 0;
Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pObj, i )
nFlops += Saig_ObjIsLo( p, Aig_Regular(pObj) );
if ( nFlops == 0 )
{
printf( "There is no flop outputs.\n" );
Vec_PtrFree( vSuper );
return 0;
}
// try flops
vUnique = NULL;
Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pObj, i )
{
pFlop = Aig_Regular( pObj );
if ( !Saig_ObjIsLo(p, pFlop) )
continue;
pFlop = Saig_ObjLoToLi( p, pFlop );
pObj2 = Aig_ObjChild0( pFlop );
if ( !Aig_IsComplement(pObj2) || !Aig_ObjIsNode(Aig_Regular(pObj2)) )
continue;
vSuper2 = Saig_DetectConstrCollectSuper( Aig_Regular(pObj2) );
// every node in vSuper2 should appear in vSuper
vUnique = Saig_ManDetectConstrCheckCont( vSuper, vSuper2 );
if ( vUnique != NULL )
{
/// assert( !Aig_IsComplement(pObj) );
// assert( Vec_PtrFind( vSuper2, pObj ) >= 0 );
if ( Aig_IsComplement(pObj) )
{
printf( "Special flop input is complemented.\n" );
Vec_PtrFreeP( &vUnique );
Vec_PtrFree( vSuper2 );
break;
}
if ( Vec_PtrFind( vSuper2, pObj ) == -1 )
{
printf( "Cannot find special flop about the inputs of OR gate.\n" );
Vec_PtrFreeP( &vUnique );
Vec_PtrFree( vSuper2 );
break;
}
// remove the flop output
Vec_PtrRemove( vSuper2, pObj );
break;
}
Vec_PtrFree( vSuper2 );
}
/**Function*************************************************************
Synopsis [Performs induction by unrolling timeframes backward.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Saig_ManInduction( Aig_Man_t * p, int nFramesMax, int nConfMax, int fUnique, int fUniqueAll, int fGetCex, int fVerbose, int fVeryVerbose )
{
sat_solver * pSat;
Aig_Man_t * pAigPart;
Cnf_Dat_t * pCnfPart;
Vec_Int_t * vTopVarNums, * vState, * vTopVarIds = NULL;
Vec_Ptr_t * vTop, * vBot;
Aig_Obj_t * pObjPi, * pObjPiCopy, * pObjPo;
int i, k, f, Lits[2], status = -1, RetValue, nSatVarNum, nConfPrev;
int nOldSize, iReg, iLast, fAdded, nConstrs = 0, nClauses = 0;
abctime clk;
assert( fUnique == 0 || fUniqueAll == 0 );
assert( Saig_ManPoNum(p) == 1 );
Aig_ManSetCioIds( p );
// start the top by including the PO
vBot = Vec_PtrAlloc( 100 );
vTop = Vec_PtrAlloc( 100 );
vState = Vec_IntAlloc( 1000 );
Vec_PtrPush( vTop, Aig_ManCo(p, 0) );
// start the array of CNF variables
vTopVarNums = Vec_IntAlloc( 100 );
// start the solver
pSat = sat_solver_new();
sat_solver_setnvars( pSat, 1000 );
// iterate backward unrolling
RetValue = -1;
nSatVarNum = 0;
if ( fVerbose )
printf( "Induction parameters: FramesMax = %5d. ConflictMax = %6d.\n", nFramesMax, nConfMax );
for ( f = 0; ; f++ )
{
if ( f > 0 )
{
Aig_ManStop( pAigPart );
Cnf_DataFree( pCnfPart );
}
clk = Abc_Clock();
// get the bottom
Aig_SupportNodes( p, (Aig_Obj_t **)Vec_PtrArray(vTop), Vec_PtrSize(vTop), vBot );
// derive AIG for the part between top and bottom
pAigPart = Aig_ManDupSimpleDfsPart( p, vBot, vTop );
// convert it into CNF
pCnfPart = Cnf_Derive( pAigPart, Aig_ManCoNum(pAigPart) );
Cnf_DataLift( pCnfPart, nSatVarNum );
nSatVarNum += pCnfPart->nVars;
nClauses += pCnfPart->nClauses;
// remember top frame var IDs
if ( fGetCex && vTopVarIds == NULL )
{
vTopVarIds = Vec_IntStartFull( Aig_ManCiNum(p) );
Aig_ManForEachCi( p, pObjPi, i )
{
if ( pObjPi->pData == NULL )
continue;
pObjPiCopy = (Aig_Obj_t *)pObjPi->pData;
assert( Aig_ObjIsCi(pObjPiCopy) );
if ( Saig_ObjIsPi(p, pObjPi) )
Vec_IntWriteEntry( vTopVarIds, Aig_ObjCioId(pObjPi) + Saig_ManRegNum(p), pCnfPart->pVarNums[Aig_ObjId(pObjPiCopy)] );
else if ( Saig_ObjIsLo(p, pObjPi) )
Vec_IntWriteEntry( vTopVarIds, Aig_ObjCioId(pObjPi) - Saig_ManPiNum(p), pCnfPart->pVarNums[Aig_ObjId(pObjPiCopy)] );
else assert( 0 );
}
}
// stitch variables of top and bot
assert( Aig_ManCoNum(pAigPart)-1 == Vec_IntSize(vTopVarNums) );
Aig_ManForEachCo( pAigPart, pObjPo, i )
{
if ( i == 0 )
{
// do not perform inductive strengthening
// if ( f > 0 )
// continue;
// add topmost literal
Lits[0] = toLitCond( pCnfPart->pVarNums[pObjPo->Id], f>0 );
if ( !sat_solver_addclause( pSat, Lits, Lits+1 ) )
assert( 0 );
nClauses++;
continue;
}
Lits[0] = toLitCond( Vec_IntEntry(vTopVarNums, i-1), 0 );
Lits[1] = toLitCond( pCnfPart->pVarNums[pObjPo->Id], 1 );
if ( !sat_solver_addclause( pSat, Lits, Lits+2 ) )
assert( 0 );
Lits[0] = toLitCond( Vec_IntEntry(vTopVarNums, i-1), 1 );
Lits[1] = toLitCond( pCnfPart->pVarNums[pObjPo->Id], 0 );
if ( !sat_solver_addclause( pSat, Lits, Lits+2 ) )
assert( 0 );
nClauses += 2;
}
// add CNF to the SAT solver
for ( i = 0; i < pCnfPart->nClauses; i++ )
if ( !sat_solver_addclause( pSat, pCnfPart->pClauses[i], pCnfPart->pClauses[i+1] ) )
break;
if ( i < pCnfPart->nClauses )
{
// printf( "SAT solver became UNSAT after adding clauses.\n" );
RetValue = 1;
break;
}
// create new set of POs to derive new top
Vec_PtrClear( vTop );
Vec_PtrPush( vTop, Aig_ManCo(p, 0) );
Vec_IntClear( vTopVarNums );
nOldSize = Vec_IntSize(vState);
Vec_IntFillExtra( vState, nOldSize + Aig_ManRegNum(p), -1 );
Vec_PtrForEachEntry( Aig_Obj_t *, vBot, pObjPi, i )
{
assert( Aig_ObjIsCi(pObjPi) );
if ( Saig_ObjIsLo(p, pObjPi) )
{
pObjPiCopy = (Aig_Obj_t *)pObjPi->pData;
assert( pObjPiCopy != NULL );
Vec_PtrPush( vTop, Saig_ObjLoToLi(p, pObjPi) );
Vec_IntPush( vTopVarNums, pCnfPart->pVarNums[pObjPiCopy->Id] );
iReg = pObjPi->CioId - Saig_ManPiNum(p);
assert( iReg >= 0 && iReg < Aig_ManRegNum(p) );
Vec_IntWriteEntry( vState, nOldSize+iReg, pCnfPart->pVarNums[pObjPiCopy->Id] );
}
}