Beispiel #1
0
VOID
CacheRangeOperation (
  IN  VOID            *Start,
  IN  UINTN           Length,
  IN  CACHE_OPERATION CacheOperation,
  IN  LINE_OPERATION  LineOperation
  )
{
  UINTN ArmCacheLineLength         = ArmDataCacheLineLength();
  UINTN ArmCacheLineAlignmentMask  = ArmCacheLineLength - 1;
  UINTN ArmCacheOperationThreshold = PcdGet32(PcdArmCacheOperationThreshold);
  
  if ((CacheOperation != NULL) && (Length >= ArmCacheOperationThreshold)) {
    CacheOperation ();
  } else {
    // Align address (rounding down)
    UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);
    UINTN EndAddress     = (UINTN)Start + Length;

    // Perform the line operation on an address in each cache line
    while (AlignedAddress < EndAddress) {
      LineOperation(AlignedAddress);
      AlignedAddress += ArmCacheLineLength;
    }
  }
}
VOID *
UncachedInternalAllocatePool (
  IN EFI_MEMORY_TYPE  MemoryType,  
  IN UINTN            AllocationSize
  )
{
  UINTN CacheLineLength = ArmDataCacheLineLength ();
  return UncachedInternalAllocateAlignedPool (MemoryType, AllocationSize, CacheLineLength);
}
Beispiel #3
0
EFI_STATUS
EFIAPI
ArmDmaLibConstructor (
  IN EFI_HANDLE       ImageHandle,
  IN EFI_SYSTEM_TABLE *SystemTable
  )
{
  EFI_STATUS              Status;

  // Get the Cpu protocol for later use
  Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&gCpu);
  ASSERT_EFI_ERROR(Status);

  gCacheAlignment = ArmDataCacheLineLength ();
  
  return Status;
}
Beispiel #4
0
VOID
EFIAPI
ArmCacheInformation (
  OUT ARM_CACHE_INFO  *CacheInfo
  )
{
  if (CacheInfo != NULL) {
    CacheInfo->Type                           = ArmCacheType();
    CacheInfo->Architecture                   = ArmCacheArchitecture();
    CacheInfo->DataCachePresent               = ArmDataCachePresent();
    CacheInfo->DataCacheSize                  = ArmDataCacheSize();
    CacheInfo->DataCacheAssociativity         = ArmDataCacheAssociativity();
    CacheInfo->DataCacheLineLength            = ArmDataCacheLineLength();
    CacheInfo->InstructionCachePresent        = ArmInstructionCachePresent();
    CacheInfo->InstructionCacheSize           = ArmInstructionCacheSize();
    CacheInfo->InstructionCacheAssociativity  = ArmInstructionCacheAssociativity();
    CacheInfo->InstructionCacheLineLength     = ArmInstructionCacheLineLength();
  }
}
VOID
CacheRangeOperation (
  IN  VOID            *Start,
  IN  UINTN           Length,
  IN  LINE_OPERATION  LineOperation
  )
{
  UINTN ArmCacheLineLength         = ArmDataCacheLineLength();
  UINTN ArmCacheLineAlignmentMask  = ArmCacheLineLength - 1;

  // Align address (rounding down)
  UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);
  UINTN EndAddress     = (UINTN)Start + Length;

  // Perform the line operation on an address in each cache line
  while (AlignedAddress < EndAddress) {
    LineOperation(AlignedAddress);
    AlignedAddress += ArmCacheLineLength;
  }
  ArmDataSynchronizationBarrier ();
}