static int __init mon_kernel_init(void)
{
int emi_dcm_disable;
BM_Init();
disable_infra_dcm();
emi_dcm_disable = BM_GetEmiDcm();
//printk("[MT_MEM_BW]emi_dcm_disable = %d\n", emi_dcm_disable);
BM_SetEmiDcm(0xff); //disable EMI dcm
BM_SetReadWriteType(BM_BOTH_READ_WRITE);
BM_SetMonitorCounter(1, BM_MASTER_MM1 | BM_MASTER_MM1, BM_TRANS_TYPE_4BEAT | BM_TRANS_TYPE_8Byte | BM_TRANS_TYPE_BURST_WRAP);
BM_SetMonitorCounter(2, BM_MASTER_AP_MCU1 | BM_MASTER_AP_MCU2, BM_TRANS_TYPE_4BEAT | BM_TRANS_TYPE_8Byte | BM_TRANS_TYPE_BURST_WRAP);
BM_SetMonitorCounter(3, BM_MASTER_MD_MCU | BM_MASTER_2G_3G_MDDMA, BM_TRANS_TYPE_4BEAT | BM_TRANS_TYPE_8Byte | BM_TRANS_TYPE_BURST_WRAP);
BM_SetMonitorCounter(4, BM_MASTER_GPU1 | BM_MASTER_GPU1, BM_TRANS_TYPE_4BEAT | BM_TRANS_TYPE_8Byte | BM_TRANS_TYPE_BURST_WRAP);
BM_SetLatencyCounter();
// stopping EMI monitors will reset all counters
BM_Enable(0);
// start EMI monitor counting
BM_Enable(1);
last_time_ns = sched_clock();
restore_infra_dcm();
BM_SetEmiDcm(emi_dcm_disable); //enable EMI dcm
return 0;
}
void mt65xx_mon_set_bm_rw(int type)
{
if(type > BM_WRITE_ONLY) {
printk("invalid event\n");
} else {
BM_SetReadWriteType(type);
}
}
/*
* mt6575_mon_mod_init: module init function
*/
static int __init mt6575_mon_mod_init(void)
{
int ret;
/* register driver and create sysfs files */
ret = driver_register(&mt6575_mon_drv);
if (ret) {
printk("fail to register mt6575_mon_drv\n");
return ret;
}
ret = driver_create_file(&mt6575_mon_drv, &driver_attr_cpu_cnt0_evt);
ret |= driver_create_file(&mt6575_mon_drv, &driver_attr_cpu_cnt1_evt);
ret |= driver_create_file(&mt6575_mon_drv, &driver_attr_cpu_cnt2_evt);
ret |= driver_create_file(&mt6575_mon_drv, &driver_attr_cpu_cnt3_evt);
ret |= driver_create_file(&mt6575_mon_drv, &driver_attr_cpu_cnt4_evt);
ret |= driver_create_file(&mt6575_mon_drv, &driver_attr_cpu_cnt5_evt);
ret |= driver_create_file(&mt6575_mon_drv, &driver_attr_l2c_cnt0_evt);
ret |= driver_create_file(&mt6575_mon_drv, &driver_attr_l2c_cnt1_evt);
ret |= driver_create_file(&mt6575_mon_drv, &driver_attr_bm_master_evt);
ret |= driver_create_file(&mt6575_mon_drv, &driver_attr_bm_rw_type_evt);
ret |= driver_create_file(&mt6575_mon_drv, &driver_attr_mon_mode_evt);
ret |= driver_create_file(&mt6575_mon_drv, &driver_attr_mon_period_evt);
ret |= driver_create_file(&mt6575_mon_drv, &driver_attr_mon_manual_evt);
if (ret) {
printk("fail to create mt6575_mon sysfs files\n");
return ret;
}
/* SPNIDEN[12] must be 1 for using ARM11 performance monitor unit */
// *(volatile unsigned int *)0xF702A000 |= 0x1000;
// set default ARMv7 performance monitor events types
armV7_perf_mon_select_event(0, DEF_CPU_CNT0_EVT);
armV7_perf_mon_select_event(1, DEF_CPU_CNT1_EVT);
armV7_perf_mon_select_event(2, DEF_CPU_CNT2_EVT);
armV7_perf_mon_select_event(3, DEF_CPU_CNT3_EVT);
armV7_perf_mon_select_event(4, DEF_CPU_CNT4_EVT);
armV7_perf_mon_select_event(5, DEF_CPU_CNT5_EVT);
/* set default L2C counter's events */
mt65xx_reg_sync_writel(DEF_L2C_CNT0_EVT << 2, PL310_BASE + L2X0_EVENT_CNT0_CFG);
mt65xx_reg_sync_writel(DEF_L2C_CNT1_EVT << 2, PL310_BASE + L2X0_EVENT_CNT1_CFG);
/* init EMI bus monitor */
BM_SetReadWriteType(DEF_BM_RW_TYPE);
BM_SetMonitorCounter(1, BM_MASTER_MULTIMEDIA, BM_TRANS_TYPE_4BEAT | BM_TRANS_TYPE_8Byte | BM_TRANS_TYPE_BURST_WRAP);
BM_SetMonitorCounter(2, BM_MASTER_AP_MCU, BM_TRANS_TYPE_4BEAT | BM_TRANS_TYPE_8Byte | BM_TRANS_TYPE_BURST_WRAP);
BM_SetMonitorCounter(3, BM_MASTER_MD_DSP | BM_MASTER_MD_MCU | BM_MASTER_2G_3G_MDDMA, BM_TRANS_TYPE_4BEAT | BM_TRANS_TYPE_8Byte | BM_TRANS_TYPE_BURST_WRAP);
BM_SetMonitorCounter(4, BM_MASTER_PERI, BM_TRANS_TYPE_4BEAT | BM_TRANS_TYPE_8Byte | BM_TRANS_TYPE_BURST_WRAP);
return 0;
}
ssize_t bm_rw_type_evt_store(struct device_driver *driver, const char *buf, size_t count)
{
if (!strncmp(buf, "RW", strlen("RW"))) {
bm_rw_type_evt = BM_BOTH_READ_WRITE;
} else if (!strncmp(buf, "RO", strlen("RO"))) {
bm_rw_type_evt = BM_READ_ONLY;
} else if (!strncmp(buf, "WO", strlen("WO"))) {
bm_rw_type_evt = BM_WRITE_ONLY;
} else {
printk("invalid event\n");
return count;
}
BM_SetReadWriteType(bm_rw_type_evt);
return count;
}
static void emi_init(void)
{
/* Init. EMI bus monitor */
BM_Init();
/* Set R/W Type */
BM_SetReadWriteType(rwtype);
/* Set Bandwidth Monitor */
BM_SetMonitorCounter(1,
BM_MASTER_AP_MCU,
BM_TRANS_TYPE_4BEAT |
BM_TRANS_TYPE_8Byte |
BM_TRANS_TYPE_BURST_WRAP);
BM_SetMonitorCounter(2,
BM_MASTER_CONN_SYS,
BM_TRANS_TYPE_4BEAT |
BM_TRANS_TYPE_8Byte |
BM_TRANS_TYPE_BURST_WRAP);
BM_SetMonitorCounter(3,
BM_MASTER_MMSYS,
BM_TRANS_TYPE_4BEAT |
BM_TRANS_TYPE_8Byte |
BM_TRANS_TYPE_BURST_WRAP);
BM_SetMonitorCounter(4,
BM_MASTER_MD_MCU,
BM_TRANS_TYPE_4BEAT |
BM_TRANS_TYPE_8Byte |
BM_TRANS_TYPE_BURST_WRAP);
BM_SetMonitorCounter(5,
BM_MASTER_MD_HW,
BM_TRANS_TYPE_4BEAT |
BM_TRANS_TYPE_8Byte |
BM_TRANS_TYPE_BURST_WRAP);
/* Set Latency Monitor */
LM_SetMaster(latency_master);
}
