/**
* \brief usb_massstorage Application entry point.
*
* Configures UART,
* Configures TC0, USB MSD Driver and run it.
*
* \return Unused (ANSI-C compatibility).
*/
int main( void )
{
sSdCard *pSd = 0;
/* Disable watchdog */
WDT_Disable( WDT ) ;
SCB_EnableICache();
SCB_EnableDCache();
#if defined LUN_RAMDISK
/* Enable SDRAM */
BOARD_ConfigureSdram();
#endif
TRACE_INFO("-- USB Device Mass Storage Example %s --\n\r", SOFTPACK_VERSION);
TRACE_INFO("-- %s\n\r", BOARD_NAME);
TRACE_INFO("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
/* If they are present, configure Vbus & Wake-up pins */
PIO_InitializeInterrupts(0);
/* Initialize all USB power (off) */
_ConfigureUotghs();
/* Initialize PIO pins */
_ConfigurePIOs();
/* Initialize drivers */
_ConfigureDrivers();
_MemoriesInitialize(pSd);
/* BOT driver initialization */
MSDDriver_Initialize(&msdDriverDescriptors, luns, MAX_LUNS);
/* connect if needed */
USBD_Connect();
while (1) {
/* Mass storage state machine */
if (USBD_GetState() < USBD_STATE_CONFIGURED){}
else
{
MSDDriver_StateMachine();
if (msdRefresh)
{
msdRefresh = 0;
if (msdWriteTotal < 50 * 1000)
{
/* Flush Disk Media */
}
msdWriteTotal = 0;
}
}
}
}
/**
* Initialize DDRAM to assign RamDisk block
*/
static void RamDiskInit(void)
{
BOARD_ConfigureSdram();
printf("RamDisk @ %x, size %d\n\r", (unsigned int)RAMDISK_BASE_ADDR, RAMDISK_SIZE);
MEDRamDisk_Initialize(&(medias[DRV_RAMDISK]),
BLOCK_SIZE,
(RAMDISK_BASE_ADDR) / BLOCK_SIZE,
RAMDISK_SIZE / BLOCK_SIZE,
1);
LUN_Init(&(luns[DRV_RAMDISK]),
&(medias[DRV_RAMDISK]),
msdBuffer, MSD_BUFFER_SIZE,
0, 0, 0, 0,
MSDCallbacks_Data);
gNbMedias = 1;
}
//------------------------------------------------------------------------------
/// Bootstrap main application.
/// Transfer data from media to main memory and return the next application entry
/// point address.
//------------------------------------------------------------------------------
int main()
{
#if defined(BOOT_RECOVERY)
unsigned char shallEraseBootstrap = 0; // Flag used to activate the boot recovery procedure
#endif
#if defined(at91cap9) && defined (FPGAINIT)
unsigned int ret = 0;
#endif
// Enable User Reset
AT91C_BASE_RSTC->RSTC_RMR |= AT91C_RSTC_URSTEN | (0xA5<<24);
//-------------------------------------------------------------------------
// ROM Code Fixes
//-------------------------------------------------------------------------
// at91sam9261 with ROM code 1.4 fix : Disable USB pull-up
#ifdef at91sam9261
AT91C_BASE_MATRIX->MATRIX_USBPCR = ~AT91C_MATRIX_USBPCR_PUON;
#endif
//-------------------------------------------------------------------------
// Test if at91bootstrap shall be erased (button pressed by user)
//-------------------------------------------------------------------------
#if defined(BOOT_RECOVERY)
shallEraseBootstrap = ShallEraseBootstrap();
#endif
//-------------------------------------------------------------------------
// Configure traces
//-------------------------------------------------------------------------
TRACE_CONFIGURE_ISP(DBGU_STANDARD, 115200, BOARD_MCK);
TRACE_INFO_WP("\n\r");
TRACE_INFO_WP("-- AT91bootstrap Project %s --\n\r", BOOTSTRAP_VERSION);
TRACE_INFO_WP("-- %s\n\r", BOARD_NAME);
TRACE_INFO_WP("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
TRACE_INFO("Setting: MCK = %dMHz\n\r", (int)(BOARD_MCK/1000000));
//-------------------------------------------------------------------------
// Enable I-Cache
//-------------------------------------------------------------------------
CP15_Enable_I_Cache();
//-------------------------------------------------------------------------
// Configure MPBLOCK
//-------------------------------------------------------------------------
#if defined(at91cap9) && defined(FPGAINIT)
ret = BOARD_FPGA_InitMPBlock();
TRACE_INFO("return value BOARD_InitMPBlock() = 0x%x\n\r", ret);
#endif
//-------------------------------------------------------------------------
// Configure External memories supply
//-------------------------------------------------------------------------
#if defined (at91cap9)
// EBI 1V8
//-------------------------------------------------------------------------
#if defined(VDDMEMSEL_EBI1V8)
BOARD_ConfigureVddMemSel(VDDMEMSEL_1V8);
#endif
// EBI 3V3
//-------------------------------------------------------------------------
#if defined(VDDMEMSEL_EBI3V3)
BOARD_ConfigureVddMemSel(VDDMEMSEL_3V3);
#endif
#if !defined(VDDMEMSEL_EBI1V8) && !defined(VDDMEMSEL_EBI3V3)
#error No external memories power supply selected
#endif // VDDMEMSEL
#endif // at91cap9
//-------------------------------------------------------------------------
// Configure external RAM where the application will be transfered
//-------------------------------------------------------------------------
// SDRAM
//-------------------------------------------------------------------------
#if defined(DESTINATION_sdram)
TRACE_INFO("Init SDRAM\n\r");
BOARD_ConfigureSdram(BOARD_SDRAM_BUSWIDTH);
#endif
// DDRAM
//-------------------------------------------------------------------------
#if defined(DESTINATION_ddram)
TRACE_INFO("Init DDRAM\n\r");
BOARD_ConfigureDdram(0, BOARD_DDRAM_BUSWIDTH);
#endif
// BCRAM
//-------------------------------------------------------------------------
#if defined(DESTINATION_bcram)
TRACE_INFO("Init BCRAM\n\r");
BOARD_ConfigureBcram(BOARD_BCRAM_BUSWIDTH);
#endif
// Check that a destination memory has be selected
#if !defined(DESTINATION_sdram) && \
!defined(DESTINATION_ddram) && \
!defined(DESTINATION_bcram)
#error No destination memory selected
#endif
//-------------------------------------------------------------------------
// Configure access to memory and transfer data from memory to external RAM
//-------------------------------------------------------------------------
// DataFlash
//-------------------------------------------------------------------------
#if defined(ORIGIN_dataflash)
#if defined(BOOT_RECOVERY)
if (shallEraseBootstrap)
BOOT_AT45_EraseBoot();
else
#endif //BOOT_RECOVERY
BOOT_AT45_CopyBin(tabDesc, TDESC_LISTSIZE(tabDesc));
#endif
// SerialFlash
//-------------------------------------------------------------------------
#if defined(ORIGIN_serialflash)
BOOT_AT26_CopyBin(tabDesc, TDESC_LISTSIZE(tabDesc));
#endif
// NandFlash
//-------------------------------------------------------------------------
#if defined(ORIGIN_nandflash)
#if defined(BOOT_RECOVERY)
if (shallEraseBootstrap)
BOOT_NAND_EraseBoot();
else
#endif //BOOT_RECOVERY
BOOT_NAND_CopyBin(tabDesc, TDESC_LISTSIZE(tabDesc));
#endif
// SDcard
//-------------------------------------------------------------------------
#if defined(ORIGIN_sdcard)
BOOT_SDcard_CopyFile(tabDesc, TDESC_LISTSIZE(tabDesc));
#endif
// NorFlash
//-------------------------------------------------------------------------
#if defined(ORIGIN_norflash)
BOOT_NOR_CopyBin(tabDesc, TDESC_LISTSIZE(tabDesc));
#endif
// Eeprom
//-------------------------------------------------------------------------
#if defined(ORIGIN_eeprom)
BOOT_EEPROM_CopyBin(tabDesc, TDESC_LISTSIZE(tabDesc));
#endif
// Check that an origin memory has be selected
#if !defined(ORIGIN_dataflash) && \
!defined(ORIGIN_serialflash) && \
!defined(ORIGIN_nandflash) && \
!defined(ORIGIN_sdcard) && \
!defined(ORIGIN_norflash) && \
!defined(ORIGIN_eeprom)
#error No origin memory selected
#endif
//-------------------------------------------------------------------------
// Jump to external RAM
//-------------------------------------------------------------------------
#ifdef DEBUG_DUMP_MEMORY
UTIL_DbguDumpMemory(tabDesc[0].dest, 0x200);
#endif
TRACE_INFO("Jump to 0x%08x\n\r", tabDesc[0].dest);
GoToJumpAddress(tabDesc[0].dest, MACH_TYPE);
return 0;//never reach
}
//------------------------------------------------------------------------------
/// Applet code for initializing the external RAM.
//------------------------------------------------------------------------------
int main(int argc, char **argv)
{
struct _Mailbox *pMailbox = (struct _Mailbox *) argv;
unsigned int ramType = 0;
unsigned int bufferSize, bufferAddr, memoryOffset;
unsigned int bytesToWrite;
unsigned int tempBufferAddr;
unsigned int dataBusWidth = 0;
unsigned int ddrModel = 0;
LowLevelInit();
TRACE_CONFIGURE_ISP(DBGU_STANDARD, 115200, BOARD_MCK);
/* *AT91C_PMC_PCER = AT91C_ID_PIOA;
*AT91C_PIOA_PDR = (1<<31);
*AT91C_PIOA_OER = (1<<31);
*AT91C_PIOA_BSR = (1<<31);
*AT91C_PIOA_PER = (1<<0);
*AT91C_PIOA_OER = (1<<0);
*AT91C_PMC_PCKR = (1<<8); // select master clock
*AT91C_PMC_SCER = (1<<8); // ENABLE PCK0*/
TRACE_INFO("Statup: PMC_MCKR %x MCK = %d command = %d\n\r", *AT91C_PMC_MCKR, BOARD_MCK, pMailbox->command);
// ----------------------------------------------------------
// INIT:
// ----------------------------------------------------------
if (pMailbox->command == APPLET_CMD_INIT) {
// Initialize PMC
// BOARD_RemapRam();
// Enable User Reset
AT91C_BASE_RSTC->RSTC_RMR |= AT91C_RSTC_URSTEN | (0xA5<<24);
ramType = pMailbox->argument.inputInit.ramType;
dataBusWidth = pMailbox->argument.inputInit.dataBusWidth;
ddrModel = pMailbox->argument.inputInit.ddrModel;
//#if (DYN_TRACES == 1)
// traceLevel = pMailbox->argument.inputInit.traceLevel;
//#endif
TRACE_INFO("-- EXTRAM ISP Applet %s --\n\r", SAM_BA_APPLETS_VERSION);
TRACE_INFO("-- %s\n\r", BOARD_NAME);
TRACE_INFO("-- Compiled: %s %s %s --\n\r", __DATE__, __TIME__, __GIT__);
TRACE_INFO("INIT command:\n\r");
TRACE_INFO("\tCommunication link type : %d\n\r", pMailbox->argument.inputInit.comType);
TRACE_INFO("\tData bus width : %d bits\n\r", dataBusWidth);
if (ramType == TYPE_SDRAM) {
TRACE_INFO("\tExternal RAM type : %s\n\r", "SDRAM");
}
else {
if (ramType == TYPE_DDRAM) {
TRACE_INFO("\tExternal RAM type : %s\n\r", "DDRAM");
}
else {
TRACE_INFO("\tExternal RAM type : %s\n\r", "PSRAM");
}
}
#if defined(at91cap9) || defined(at91sam9m10) || defined(at91sam9g45)
TRACE_INFO("\tInit EBI Vdd : %s\n\r", (pMailbox->argument.inputInit.VddMemSel)?"3.3V":"1.8V");
BOARD_ConfigureVddMemSel(pMailbox->argument.inputInit.VddMemSel);
#endif //defined(at91cap9)
if (pMailbox->argument.inputInit.ramType == TYPE_SDRAM) {
// Configure SDRAM controller
TRACE_INFO("\tInit SDRAM...\n\r");
#if defined(PINS_SDRAM)
BOARD_ConfigureSdram(dataBusWidth);
#endif
}
else if (pMailbox->argument.inputInit.ramType == TYPE_PSRAM) {
TRACE_INFO("\tInit PSRAM...\n\r");
#if defined(at91sam3u4)
BOARD_ConfigurePsram();
#endif
}
else {
// Configure DDRAM controller
#if defined(at91cap9dk) || defined(at91sam9m10) || defined(at91sam9g45)
TRACE_INFO("\tInit DDRAM ... (model : %d)\n\r", ddrModel);
BOARD_ConfigureVddMemSel(VDDMEMSEL_1V8);
BOARD_ConfigureDdram(0, dataBusWidth);
// ddramc_hw_init();
#endif
}
TRACE_INFO("\tInit successful.\n\r");
}
// ----------------------------------------------------------
// LIST_BAD_BLOCK: (Check DDR)
// ----------------------------------------------------------
else if (pMailbox->command == APPLET_CMD_LIST_BAD_BLOCKS)
{
// Test external RAM access
if (ExtRAM_TestOk()) {
pMailbox->status = APPLET_SUCCESS;
}
else {
pMailbox->status = APPLET_FAIL;
}
pMailbox->argument.outputInit.bufferAddress = ((unsigned int) &end);
pMailbox->argument.outputInit.bufferSize = 0;
pMailbox->argument.outputInit.memorySize = EXTRAM_SIZE;
}
// ----------------------------------------------------------
// WRITE:
// ----------------------------------------------------------
else if (pMailbox->command == APPLET_CMD_WRITE)
{
memoryOffset = pMailbox->argument.inputWrite.memoryOffset;
bufferAddr = pMailbox->argument.inputWrite.bufferAddr;
bytesToWrite = pMailbox->argument.inputWrite.bufferSize;
tempBufferAddr = bufferAddr+memoryOffset;
TRACE_INFO("WRITE arguments : offset 0x%x, run 0x%x, of 0x%x Bytes\n\r",
memoryOffset, tempBufferAddr, bytesToWrite);
pMailbox->argument.outputWrite.bytesWritten = 0;
/*
* We must define the following
* - MACH_TYPE_xxx
* - Setup the kernel tagged list (http://www.arm.linux.org.uk/developer/booting.php#4)
* first 16KiB of RAM.
*
* we recommend to load at 32KiB into RAM
*/
//Fake the end of the applet because we will not be able to do anything after this step
if (bytesToWrite < EXTRAM_SIZE)
{
pMailbox->status = APPLET_SUCCESS;
}
else
{
pMailbox->status = APPLET_FAIL;
}
pMailbox->command = ~(pMailbox->command);
//Going to
((VFptr *)(EXTRAM_ADDR+memoryOffset))();
}
exit :
// Acknowledge the end of command
TRACE_INFO("\tEnd of applet (command : %x --- status : %x)\n\r", pMailbox->command, pMailbox->status);
// Notify the host application of the end of the command processing
pMailbox->command = ~(pMailbox->command);
return 0;
}
//------------------------------------------------------------------------------
/// Applet code for initializing the external RAM.
//------------------------------------------------------------------------------
int main(int argc, char **argv)
{
struct _Mailbox *pMailbox = (struct _Mailbox *) argv;
unsigned int ramType = 0;
unsigned int dataBusWidth = 0;
unsigned int ddrModel = 0;
unsigned int baseAddress = 0;
unsigned int *ramAddr = (unsigned int *) EXTRAM_ADDR;
unsigned int comType = 0;
TRACE_CONFIGURE_ISP(DBGU_STANDARD, 115200, BOARD_MCK);
// ----------------------------------------------------------
// INIT:
// ----------------------------------------------------------
if (pMailbox->command == APPLET_CMD_INIT) {
// Save info of communication link
comType = pMailbox->argument.inputInit.comType;
#if (TRACE_LEVEL==0) && (DYN_TRACES==0)
if (comType == DBGU_COM_TYPE){
// Function TRACE_CONFIGURE_ISP wiil be bypass due to the 0 TRACE_LEVEL. We shall reconfigure the baut rate.
DBGU_Configure(DBGU_STANDARD, 115200, BOARD_MCK);
}
#endif
// Enable User Reset
AT91C_BASE_RSTC->RSTC_RMR |= AT91C_RSTC_URSTEN | (0xA5<<24);
ramType = pMailbox->argument.inputInit.ramType;
dataBusWidth = pMailbox->argument.inputInit.dataBusWidth;
ddrModel = pMailbox->argument.inputInit.ddrModel;
baseAddress = pMailbox->argument.inputInit.baseAddress;
#if (DYN_TRACES == 1)
traceLevel = pMailbox->argument.inputInit.traceLevel;
#endif
TRACE_INFO("-- EXTRAM Applet %s --\n\r", SAM_BA_APPLETS_VERSION);
TRACE_INFO("-- %s\n\r", BOARD_NAME);
TRACE_INFO("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
TRACE_INFO("INIT command:\n\r");
TRACE_INFO("\tCommunication link type : %d\n\r", pMailbox->argument.inputInit.comType);
TRACE_INFO("\tData bus width : %d bits\n\r", dataBusWidth);
if (ramType == TYPE_SDRAM) {
TRACE_INFO("\tExternal RAM type : %s\n\r", "SDRAM");
}
else {
if (ramType == TYPE_DDRAM) {
TRACE_INFO("\tExternal RAM type : %s\n\r", "DDRAM");
}
else {
TRACE_INFO("\tExternal RAM type : %s\n\r", "PSRAM");
}
}
#if defined(at91cap7) || defined(at91cap9) || defined(at91sam9m10) || defined(at91sam9g45)
TRACE_INFO("\tInit EBI Vdd : %s\n\r", (pMailbox->argument.inputInit.VddMemSel)?"3.3V":"1.8V");
BOARD_ConfigureVddMemSel(pMailbox->argument.inputInit.VddMemSel);
#endif //defined(at91cap9)
if (pMailbox->argument.inputInit.ramType == TYPE_SDRAM) {
// Configure SDRAM controller
TRACE_INFO("\tInit SDRAM...\n\r");
#if defined(PINS_SDRAM)
BOARD_ConfigureSdram(dataBusWidth);
#endif
}
else if (pMailbox->argument.inputInit.ramType == TYPE_PSRAM) {
TRACE_INFO("\tInit PSRAM...\n\r");
#if defined(at91sam3u)
BOARD_ConfigurePsram();
#endif
}
else {
// Configure DDRAM controller
#if defined(at91sam9m10) || defined(at91sam9g45)
TRACE_INFO("\tInit DDRAM ... (model : %d)\n\r", ddrModel);
BOARD_ConfigureDdram(baseAddress, ddrModel, dataBusWidth);
if (baseAddress != (unsigned int)AT91C_BASE_DDR2C) {
ramAddr = (unsigned int *)EXTRAM_ADDR_2;
}
#elif defined(at91cap9dk)
TRACE_INFO("\tInit DDRAM ... (model : %d)\n\r", ddrModel);
BOARD_ConfigureDdram(ddrModel, dataBusWidth);
#endif
}
// Test external RAM access
if (ExtRAM_TestOk(ramAddr)) {
pMailbox->status = APPLET_SUCCESS;
}
else {
pMailbox->status = APPLET_FAIL;
}
pMailbox->argument.outputInit.bufferAddress = ((unsigned int) &end);
pMailbox->argument.outputInit.bufferSize = 0;
pMailbox->argument.outputInit.memorySize = EXTRAM_SIZE;
TRACE_INFO("\tInit successful.\n\r");
}
// Acknowledge the end of command
TRACE_INFO("\tEnd of applet (command : %x --- status : %x)\n\r", pMailbox->command, pMailbox->status);
// Notify the host application of the end of the command processing
pMailbox->command = ~(pMailbox->command);
// Send ACK character
if (comType == DBGU_COM_TYPE) {
DBGU_PutChar(0x6);
}
return 0;
}
/**
* \brief Applet code for initializing the external RAM.
*/
int main(int argc, char **argv)
{
struct _Mailbox *pMailbox = (struct _Mailbox *) argv;
uint32_t ramType = 0;
uint32_t dataBusWidth = 0;
uint32_t ddrModel = 0;
uint32_t comType = 0;
/* ---------------------------------------------------------- */
/* INIT: */
/* ---------------------------------------------------------- */
if (pMailbox->command == APPLET_CMD_INIT) {
/* Save info of communication link */
comType = pMailbox->argument.inputInit.comType;
/* Re-configurate UART (MCK maybe change in LowLevelInit()) */
UART_Configure(115200, BOARD_MCK);
ramType = pMailbox->argument.inputInit.ramType;
dataBusWidth = pMailbox->argument.inputInit.dataBusWidth;
ddrModel = pMailbox->argument.inputInit.ddrModel;
#if (DYN_TRACES == 1)
dwTraceLevel = pMailbox->argument.inputInit.traceLevel;
#endif
TRACE_INFO("-- EXTRAM Applet %s --\n\r", SAM_BA_APPLETS_VERSION);
TRACE_INFO("-- %s\n\r", BOARD_NAME);
TRACE_INFO("INIT command:\n\r");
TRACE_INFO("\tCommunication link type : %d\n\r",(unsigned int)( pMailbox->argument.inputInit.comType));
TRACE_INFO("\tData bus width : %d bits\n\r", (unsigned int)dataBusWidth);
if (ramType == TYPE_SDRAM) {
TRACE_INFO("\tExternal RAM type : %s\n\r", "SDRAM");
}
else {
TRACE_INFO("\tUnknow External RAM type\n\r");
}
if (pMailbox->argument.inputInit.ramType == TYPE_SDRAM) {
/* Configure SDRAM controller */
TRACE_INFO("\tInit SDRAM...\n\r");
BOARD_ConfigureSdram();
}
/* Test external RAM access */
if (ExtRAM_TestOk()) {
pMailbox->status = APPLET_SUCCESS;
TRACE_INFO("\tInit successful.\n\r");
}
else {
pMailbox->status = APPLET_FAIL;
TRACE_INFO("\tInit failure.\n\r");
}
pMailbox->argument.outputInit.bufferAddress = ((uint32_t) &end);
pMailbox->argument.outputInit.bufferSize = 0;
pMailbox->argument.outputInit.memorySize = EXTRAM_SIZE;
}
/* Acknowledge the end of command */
TRACE_INFO("\tEnd of applet (command : %x --- status : %x)\n\r", (unsigned int)(pMailbox->command), (unsigned int)(pMailbox->status));
/* Notify the host application of the end of the command processing */
pMailbox->command = ~(pMailbox->command);
if (comType == DBGU_COM_TYPE) {
UART_PutChar(0x6);
}
return 0;
}
//------------------------------------------------------------------------------
/// Bootstrap main application.
/// Transfer data from media to main memory and return the next application entry
/// point address.
//------------------------------------------------------------------------------
int main()
{
int i=0;
//, j=0;
// int Dc=0, Dp=0;
// Enable User Reset
AT91C_BASE_RSTC->RSTC_RMR |= AT91C_RSTC_URSTEN | (0xA5<<24);
//-------------------------------------------------------------------------
// Configure traces
//-------------------------------------------------------------------------
TRACE_CONFIGURE_ISP(DBGU_STANDARD, 115200, MASTERCLK);
printf("\n\r");
printf("-- Acme Test version %s --\n\r", ACME_TEST_VERSION);
printf("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
printf("Setting: masterclk = %d Hz\n\r",MASTERCLK);
printf(" CPU Clock = %d Hz\n\r", MASTERCLK*3);
printf("AT91C_BASE_DBGU->DBGU_BRGR = %d\n\r", (int)AT91C_BASE_DBGU->DBGU_BRGR);
printf("BOARD_MULA = 0x%0x\n\r", (int)BOARD_MULA>>16);
printf("BOARD_DIVA = 0x%0x\n\r", (int)BOARD_DIVA);
printf("AT91C_BASE_PMC->PMC_PLLAR = %0x\n\r", (int)AT91C_BASE_PMC->PMC_PLLAR);
printf("MULA = 0x%0x OUTA = 0x%0x PLLACOUNT = 0x%0x DIVA = 0x%0x \n\r", (AT91C_BASE_PMC->PMC_PLLAR&0x00ff0000)>>16,
(AT91C_BASE_PMC->PMC_PLLAR&0x0000c000)>>14,
(AT91C_BASE_PMC->PMC_PLLAR&0x00003f00)>>8,
(AT91C_BASE_PMC->PMC_PLLAR&0x000000ff));
printf("BOARD_OSCOUNT = %0x; AT91C_CKGR_MOSCEN = %0x \n\r",BOARD_OSCOUNT,AT91C_CKGR_MOSCEN);
// Configure FoxG20 LED
PIO_Configure(&FoxLED, 1); // configure it as an output with level = logical 1. It should start with red led ON.
/* init_Daisy1();
init_Daisy2();
init_Daisy3();
init_Daisy4();
init_Daisy5();
init_Daisy6();
init_Daisy7();
init_Daisy8();
*/
//-------------------------------------------------------------------------
// Enable I-Cache
//-------------------------------------------------------------------------
CP15_EnableIcache();
//-------------------------------------------------------------------------
// Configure external RAM where the application will be transfered
//-------------------------------------------------------------------------
// SDRAM
#if defined(DESTINATION_sdram)
printf("Init SDRAM\n\r");
BOARD_ConfigureSdram(BOARD_SDRAM_BUSWIDTH);
#endif
printf("1");
printf("2");
printf("3");
printf("4");
printf("5");
printf("6");
printf("8\n");
printf("LED toggles every 300000 cycles\n\r");
#if 0
while(1) {
for (Dc=1; Dc<9; Dc++) {
for (Dp=2; Dp<9; Dp++) {
DaisyClear(Dc, Dp);
DaisySet(Dc, Dp);
}
}
}
#endif
while(1) {
i++;
if (i%300000 == 0) {
if (stateFoxLED == 1) {
PIO_Clear(&FoxLED);
stateFoxLED = 0;
} else {
PIO_Set(&FoxLED);
stateFoxLED = 1;
}
}
/*
j++;
switch(j) {
case 1:
for (Dc=1; Dc<9; Dc++) {
DaisyClear(Dc, 3);
DaisySet(Dc, 2);
}
break;
case 2:
for (Dc=1; Dc<9; Dc++) {
DaisyClear(Dc, 2);
DaisySet(Dc, 3);
}
break;
case 3:
for (Dc=1; Dc<9; Dc++) {
DaisyClear(Dc, 3);
DaisySet(Dc, 4);
}
break;
case 4:
for (Dc=1; Dc<9; Dc++) {
DaisyClear(Dc, 4);
DaisySet(Dc, 5);
}
break;
case 5:
for (Dc=1; Dc<9; Dc++) {
DaisyClear(Dc, 5);
DaisySet(Dc, 6);
}
break;
case 6:
for (Dc=1; Dc<9; Dc++) {
DaisyClear(Dc, 6);
DaisySet(Dc, 7);
}
break;
case 7:
for (Dc=1; Dc<9; Dc++) {
DaisyClear(Dc, 7);
DaisySet(Dc, 8);
}
break;
case 8:
for (Dc=1; Dc<9; Dc++) {
DaisyClear(Dc, 8);
DaisySet(Dc, 9);
}
break;
case 9:
for (Dc=1; Dc<9; Dc++) {
DaisyClear(Dc, 9);
DaisySet(Dc, 8);
}
break;
case 10:
for (Dc=1; Dc<9; Dc++) {
DaisyClear(Dc, 8);
DaisySet(Dc, 7);
}
break;
case 11:
for (Dc=1; Dc<9; Dc++) {
DaisyClear(Dc, 7);
DaisySet(Dc, 6);
}
break;
case 12:
for (Dc=1; Dc<9; Dc++) {
DaisyClear(Dc, 6);
DaisySet(Dc, 5);
}
break;
case 13:
for (Dc=1; Dc<9; Dc++) {
DaisyClear(Dc, 5);
DaisySet(Dc, 4);
}
break;
case 14:
for (Dc=1; Dc<9; Dc++) {
DaisyClear(Dc, 4);
DaisySet(Dc, 3);
}
j=0;
}
}
*/
}
// printf("Jump to the Kernel image at %x\n\r",entry_point);
// GoToJumpAddress(entry_point, MACH_TYPE);
return 0;
}
