/*---------------------------------------------------------------------------*/
int
cc2420_init(void)
{
uint16_t reg;
{
int s = splhigh();
cc2420_arch_init(); /* Initalize ports and SPI. */
CC2420_DISABLE_FIFOP_INT();
CC2420_FIFOP_INT_INIT();
splx(s);
}
/* Turn on voltage regulator and reset. */
SET_VREG_ACTIVE();
BUSYWAIT_UNTIL(0, RTIMER_SECOND / 100);
SET_RESET_ACTIVE();
BUSYWAIT_UNTIL(0, RTIMER_SECOND / 100);
SET_RESET_INACTIVE();
BUSYWAIT_UNTIL(0, RTIMER_SECOND / 100);
pan = 0xffff;
addr = 0x0000;
BUSYWAIT_UNTIL(0, RTIMER_SECOND / 100);
powerup();
configure();
flushrx();
process_start(&cc2420_process, NULL);
return 1;
}
static void
off(void)
{
/* PRINTF("off\n");*/
receive_on = 0;
/* Wait for transmission to end before turning radio off. */
BUSYWAIT_UNTIL(!(status() & BV(CC2420_TX_ACTIVE)), RTIMER_SECOND / 10);
ENERGEST_OFF(ENERGEST_TYPE_LISTEN);
strobe(CC2420_SRFOFF);
CC2420_DISABLE_FIFOP_INT();
if(!CC2420_FIFOP_IS_1) {
flushrx();
}
}
/*---------------------------------------------------------------------------*/
int
cc2420_init(void)
{
uint16_t reg;
{
int s = splhigh();
cc2420_arch_init(); /* Initalize ports and SPI. */
CC2420_DISABLE_FIFOP_INT();
CC2420_FIFOP_INT_INIT();
splx(s);
}
/* Turn on voltage regulator and reset. */
SET_VREG_ACTIVE();
//clock_delay(250); OK
SET_RESET_ACTIVE();
clock_delay(127);
SET_RESET_INACTIVE();
//clock_delay(125); OK
/* Turn on the crystal oscillator. */
strobe(CC2420_SXOSCON);
/* Turn on/off automatic packet acknowledgment and address decoding. */
reg = getreg(CC2420_MDMCTRL0);
#if CC2420_CONF_AUTOACK
reg |= AUTOACK | ADR_DECODE;
#else
reg &= ~(AUTOACK | ADR_DECODE);
#endif /* CC2420_CONF_AUTOACK */
setreg(CC2420_MDMCTRL0, reg);
/* Set transmission turnaround time to the lower setting (8 symbols
= 0.128 ms) instead of the default (12 symbols = 0.192 ms). */
/* reg = getreg(CC2420_TXCTRL);
reg &= ~(1 << 13);
setreg(CC2420_TXCTRL, reg);*/
/* Change default values as recomended in the data sheet, */
/* correlation threshold = 20, RX bandpass filter = 1.3uA. */
setreg(CC2420_MDMCTRL1, CORR_THR(20));
reg = getreg(CC2420_RXCTRL1);
reg |= RXBPF_LOCUR;
setreg(CC2420_RXCTRL1, reg);
/* Set the FIFOP threshold to maximum. */
setreg(CC2420_IOCFG0, FIFOP_THR(127));
/* Turn off "Security enable" (page 32). */
reg = getreg(CC2420_SECCTRL0);
reg &= ~RXFIFO_PROTECTION;
setreg(CC2420_SECCTRL0, reg);
cc2420_set_pan_addr(0xffff, 0x0000, NULL);
cc2420_set_channel(26);
flushrx();
process_start(&cc2420_process, NULL);
return 1;
}
