TCgReturnCode CgxDriverConstruct(void *pDriver, TCgxDriverState *pState)
{
//DBG_FUNC_NAME("CgxDriverConstruct")
TCgReturnCode rc = ECgOk;
rc = CgCpuAllocateVa();
memset(gChunksList,0,sizeof(TCgCpuDmaTask)*MAX_DMA_TRANSFER_TASKS);
gps_gpio_request();
#if 0
if (OK(rc)) rc = CgCpuDmaCreate(CG_DRIVER_DMA_CHANNEL_READ, CGCORE_BASE_ADDR + 0x00000070);
// set up DMA interrupt handler
if (OK(rc)) rc = CgxDriverDmaInterruptPrepare();
#endif
if (OK(rc)) rc = CgxDriverDataReadyInterruptHandlerStart(pDriver);
// set up internal synchronization mechanism
if (OK(rc)) rc = CgxDriverTransferEndCreate(pDriver);
// set up GPS interrupt handler
if (OK(rc)) rc = CgxDriverGpsInterruptPrepare();
if (OK(rc)) rc = CgxDriverGpsInterruptHandlerStart(pDriver);
#if 0
// enable IP (not-reset)
if (OK(rc)) rc = CgCpuGpioModeSet(CG_DRIVER_GPIO_GPS_MRSTN, ECG_CPU_GPIO_OUTPUT);
if (OK(rc)) rc = CgCpuIPMasterResetOn();
if (OK(rc)) rc = CgCpuDelay(CGCORE_RESET_DELAY);
if (OK(rc)) rc = CgCpuIPMasterResetClear();
// set up Sclk register
if (OK(rc)) rc = CGCoreSclkEnable(1);
DBGMSG1("CGCORE_CORE_SCLK_ENABLE = 0x%08X", CGCORE_ENABLE_SCLK);
// set up core-resets register
if (OK(rc)) rc = CGCORE_WRITE_REG( CGCORE_REG_OFFSET_CORE_RESETS, CGCORE_CORE_RESETS_ENABLE);
DBGMSG1("CGCORE_CORE_RESETS_ENABLE = 0x%08X", CGCORE_CORE_RESETS_ENABLE);
// Setup GPIO for RF-Power, and power up RF chip
//if (OK(rc)) rc = CgCpuGpioModeSet(CG_DRIVER_GPIO_RF_PD, ECG_CPU_GPIO_OUTPUT);
//if (OK(rc)) rc = CgxDriverRFPowerUp();
if (OK(rc)) rc = CgCpuGpioModeSet(CG_DRIVER_GPIO_TCXO_EN, ECG_CPU_GPIO_OUTPUT);
if (OK(rc)) rc = CgxDriverTcxoControl(TRUE);
#endif
pState->constructionRc = rc; // For later reference (if needed by application)
pState->flags.resume = FALSE;
#ifdef CGCORE_ACCESS_VIA_SPI
gps_chip_power_off();
#endif
return rc;
}
void gps_chip_power_on(void)
{
printk("%s\n",__func__);
//enable gps sysclk
CGCoreSclkEnable(1);
//gps core reset
CgxCpuWriteMemory((U32)CG_DRIVER_CGCORE_BASE_VA, 0xfc,0xf);
CgxDriverRFPowerUp();
}
void gps_chip_power_off(void)
{
int value;
printk("%s\n",__func__);
CgxDriverRFPowerDown();
//gps core reset
CgxCpuWriteMemory((U32)CG_DRIVER_CGCORE_BASE_VA, 0xfc,0x0);
CGCoreSclkEnable(0);
}
