/* Return ADC clock rate */
uint32_t Chip_Clock_GetADCClockRate(void)
{
uint32_t div, clkRate = 0;
div = Chip_Clock_GetADCClockDiv();
/* ADC clock only enabled if div>0 */
if (div > 0) {
switch (Chip_Clock_GetADCClockSource()) {
case SYSCON_ADCCLKSELSRC_MAINCLK:
clkRate = Chip_Clock_GetMainClockRate();
break;
case SYSCON_ADCCLKSELSRC_SYSPLLOUT:
clkRate = Chip_Clock_GetSystemPLLOutClockRate(false);
break;
case SYSCON_ADCCLKSELSRC_FROHF:
clkRate = Chip_Clock_GetFROHFRate();
break;
}
clkRate = clkRate / div;
}
return clkRate;
}
void CAN_baudrate_calculate(uint32_t baud_rate, uint32_t *can_api_timing_cfg)
{
uint32_t pClk, div, quanta, segs, seg1, seg2, clk_per_bit, can_sjw;
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_CAN);
pClk = Chip_Clock_GetMainClockRate();
clk_per_bit = pClk / baud_rate;
for (div = 0; div <= 15; div++) {
for (quanta = 1; quanta <= 32; quanta++) {
for (segs = 3; segs <= 17; segs++) {
if (clk_per_bit == (segs * quanta * (div + 1))) {
segs -= 3;
seg1 = segs / 2;
seg2 = segs - seg1;
can_sjw = seg1 > 3 ? 3 : seg1;
can_api_timing_cfg[0] = div;
can_api_timing_cfg[1] =
((quanta - 1) & 0x3F) | (can_sjw & 0x03) << 6 | (seg1 & 0x0F) << 8 | (seg2 & 0x07) << 12;
return;
}
}
}
}
}
//cpu
static int _F2_Handler (void)
{
uint32_t tempVal[4];
uint8_t resp;
if (NumberOfArguments() == 0)
{
//Output some useful info
printf("Main Clk: %u Hz\r\n", Chip_Clock_GetMainClockRate());
printf("SSP0 Clk div: %u\r\n", Chip_Clock_GetSSP0ClockDiv());
printf("Main Clk: %u Hz\r\n", SystemCoreClock);
resp = ReadUID(tempVal);
if(resp == IAP_CMD_SUCCESS)
{
printf("UID: 0x%08lX %08lX %08lX %08lX\r\n", tempVal[0], tempVal[1], tempVal[2], tempVal[3]);
}
resp = ReadPartID(tempVal);
if(resp == IAP_CMD_SUCCESS)
{
printf("Part ID: 0x%08lX\r\n", tempVal[0]);
}
resp = ReadBootVersion(tempVal);
if(resp == IAP_CMD_SUCCESS)
{
printf("Boot Code Version: %u.%u\r\n", (uint8_t)((tempVal[0]>>8)&0xFF), (uint8_t)(tempVal[0]&0xFF));
}
void platform_early_init(void)
{
/* set up clocking for a board with an external oscillator */
Chip_SetupXtalClocking();
/* Set USB PLL input to main oscillator */
Chip_Clock_SetUSBPLLSource(SYSCTL_PLLCLKSRC_MAINOSC);
/* Setup USB PLL (FCLKIN = 12MHz) * 4 = 48MHz
MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2)
FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz
FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */
Chip_Clock_SetupUSBPLL(3, 1);
/* Powerup USB PLL */
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPLL_PD);
/* Wait for PLL to lock */
while (!Chip_Clock_IsUSBPLLLocked()) {}
/* Set default system tick divder to 1 */
Chip_Clock_SetSysTickClockDiv(1);
/* start the generic systick driver */
arm_cm_systick_init(Chip_Clock_GetMainClockRate());
lpc_debug_early_init();
}
/**
* [InitTask description]
*/
__task void InitTask(void)
{
int msg_len = 0;
int clockRate = Chip_Clock_GetMainClockRate();
/* Enabled Clock To GPPIO */
Chip_GPIO_Init(LPC_GPIO);
// Set the pin direction, set high for an output LED2
Chip_GPIO_SetPinDIR(LPC_GPIO, 0, 2, 1);
/* Serial Driver Enable */
SER_Init();
msg_len = snprintf(message, sizeof(message), "Main clock is: %d\r\n", clockRate);
Chip_UART0_SendRB(LPC_USART0, &txring, message, msg_len);
for(;;)
{
os_dly_wait(50);
Chip_UART0_SendRB(LPC_USART0, &txring, "Sveiki\r\n", strlen("Sveiki\r\n"));
Chip_GPIO_WriteDirBit(LPC_GPIO, 0, 2, 0);
os_dly_wait(100);
Chip_GPIO_WriteDirBit(LPC_GPIO, 0, 2, 1);
}
}
/* UART port init routine */
void UCOM_UartInit(void)
{
/* Board specific muxing */
Init_UART_PinMux();
/* Before setting up the UART, the global UART clock for USARTS 1-4
must first be setup. This requires setting the UART divider and
the UART base clock rate to 16x the maximum UART rate for all
UARTs. */
#if defined(USE_INTEGER_CLOCK)
/* Use main clock rate as base for UART baud rate divider */
Chip_Clock_SetUARTBaseClockRate(Chip_Clock_GetMainClockRate(), false);
#else
/* Use 128x expected UART baud rate for fractional baud mode. */
Chip_Clock_SetUARTBaseClockRate((115200 * 128), true);
#endif
/* Setup UART */
Chip_UART_Init(LPC_USART);
Chip_UART_ConfigData(LPC_USART, UART_CFG_DATALEN_8 | UART_CFG_PARITY_NONE | UART_CFG_STOPLEN_1);
Chip_UART_SetBaud(LPC_USART, UART_TEST_DEFAULT_BAUDRATE);
/* Optional for low clock rates only: Chip_UART_SetBaudWithRTC32K(LPC_USART, 300); */
Chip_UART_Enable(LPC_USART);
Chip_UART_TXEnable(LPC_USART);
/* Enable receive data and line status interrupt */
Chip_UART_IntEnable(LPC_USART, UART_INTEN_RXRDY);
/* Enable Interrupt for UART channel */
/* Priority = 1 */
NVIC_SetPriority(LPC_IRQNUM, 1);
/* Enable Interrupt for UART channel */
NVIC_EnableIRQ(LPC_IRQNUM);
}
/* Determines and sets best dividers to get a target baud rate */
uint32_t Chip_UART_SetBaudFDR(LPC_USART_T *pUART, uint32_t baudrate)
{
uint32_t uClk;
uint32_t dval, mval;
uint32_t dl;
uint32_t rate16 = 16 * baudrate;
uint32_t actualRate = 0;
/* Get Clock rate */
uClk = Chip_Clock_GetMainClockRate();
/* The fractional is calculated as (PCLK % (16 * Baudrate)) / (16 * Baudrate)
* Let's make it to be the ratio DivVal / MulVal
*/
dval = uClk % rate16;
// NOTE: added initialization. Otherwise value may be used without initialization.
mval = 0;
/* The PCLK / (16 * Baudrate) is fractional
* => dval = pclk % rate16
* mval = rate16;
* now mormalize the ratio
* dval / mval = 1 / new_mval
* new_mval = mval / dval
* new_dval = 1
*/
if (dval > 0) {
mval = rate16 / dval;
dval = 1;
/* In case mval still bigger then 4 bits
* no adjustment require
*/
if (mval > 12) {
dval = 0;
}
}
dval &= 0xf;
// TODO: mval may be non initialized.
mval &= 0xf;
dl = uClk / (rate16 + rate16 * dval / mval);
/* Update UART registers */
Chip_UART_EnableDivisorAccess(pUART);
Chip_UART_SetDivisorLatches(pUART, UART_LOAD_DLL(dl), UART_LOAD_DLM(dl));
Chip_UART_DisableDivisorAccess(pUART);
/* Set best fractional divider */
pUART->FDR = (UART_FDR_MULVAL(mval) | UART_FDR_DIVADDVAL(dval));
/* Return actual baud rate */
actualRate = uClk / (16 * dl + 16 * dl * dval / mval);
return actualRate;
}
/* Set baud rate for UART */
void Chip_UART_SetBaudRate(LPC_USART_T *pUART, uint32_t baudrate)
{
uint32_t err, uart_fra_multiplier, baudRateGenerator;
uint32_t systemCoreClock = Chip_Clock_GetMainClockRate();
/* Calculate baudrate generator value */
baudRateGenerator = systemCoreClock / (16 * baudrate);
err = systemCoreClock - baudRateGenerator * 16 * baudrate;
uart_fra_multiplier = (err * 0xFF) / (baudRateGenerator * 16 * baudrate);
IP_UART_SetBaudRate(pUART, baudRateGenerator - 1); /*baud rate */
Chip_SYSCTL_SetUSARTFRGDivider(0xFF); /* value 0xFF is always used */
Chip_SYSCTL_SetUSARTFRGMultiplier(uart_fra_multiplier);
}
/* Determines and sets best dividers to get a target bit rate */
uint32_t Chip_UART_SetBaud(LPC_USART_T *pUART, uint32_t baudrate)
{
uint32_t div, divh, divl, clkin;
/* Determine UART clock in rate without FDR */
clkin = Chip_Clock_GetMainClockRate();
div = clkin / (baudrate * 16);
/* High and low halves of the divider */
divh = div / 256;
divl = div - (divh * 256);
Chip_UART_EnableDivisorAccess(pUART);
Chip_UART_SetDivisorLatches(pUART, divl, divh);
Chip_UART_DisableDivisorAccess(pUART);
/* Fractional FDR alreadt setup for 1 in UART init */
return clkin / div;
}
/* Return asynchronous APB clock rate (no regard for divider) */
static uint32_t Chip_Clock_GetAsyncSyscon_ClockRate_NoDiv(void)
{
CHIP_ASYNC_SYSCON_SRC_T src;
uint32_t clkRate;
src = Chip_Clock_GetAsyncSysconClockSource();
switch (src) {
case SYSCON_ASYNC_FRO12MHZ:
clkRate = SYSCON_FRO12MHZ_FREQ;
break;
case SYSCON_ASYNC_MAINCLK:
clkRate = Chip_Clock_GetMainClockRate();
break;
default:
clkRate = 0;
break;
}
return clkRate;
}
/**
* @brief Main UART/DMA program body
* @return Does not exit
*/
int main(void)
{
int bytes = 0, idx;
uint8_t buff[UARTRXBUFFSIZE];
SystemCoreClockUpdate();
Board_Init();
Init_UART_PinMux();
Board_LED_Set(0, false);
#if defined(USE_INTEGER_CLOCK)
/* Use main clock rate as base for UART baud rate divider */
Chip_Clock_SetUARTBaseClockRate(Chip_Clock_GetMainClockRate(), false);
#else
/* Use 128x expected UART baud rate for fractional baud mode. */
Chip_Clock_SetUARTBaseClockRate((115200 * 128), true);
#endif
/* Setup UART */
Chip_UART_Init(LPC_USART0);
Chip_UART_ConfigData(LPC_USART0, UART_CFG_DATALEN_8 | UART_CFG_PARITY_NONE | UART_CFG_STOPLEN_1);
Chip_UART_SetBaud(LPC_USART0, 115200);
/* Optional for low clock rates only: Chip_UART_SetBaudWithRTC32K(LPC_USART, 300); */
Chip_UART_Enable(LPC_USART0);
Chip_UART_TXEnable(LPC_USART0);
/* DMA initialization - enable DMA clocking and reset DMA if needed */
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_DMA);
Chip_SYSCTL_PeriphReset(RESET_DMA);
/* Initialize ROM API pointer */
pDMAApi = LPC_DMAD_API;
size_in_bytes = pDMAApi->dma_get_mem_size();
if (size_in_bytes > RAMBLOCK) {
/* Adjust RAMBLOCK size in this case */
return 1;
}
/* Setup DMA ROM driver, provided RAM blocks for DMA Handle */
dma_handle = pDMAApi->dma_setup(LPC_DMA_BASE, dma_ram_block);
/* Init UART 0 TX descriptor */
countTXDescUsed = 0;
/* Enable the DMA IRQ */
NVIC_EnableIRQ(DMA_IRQn);
/* Enqueue a bunch of strings in DMA transmit descriptors and start
transmit. In this use of DMA, the descriptors aren't chained, so
the DMA restarts the next queued descriptor in the DMA interrupt
handler. */
for (idx = 0; idx < DMASENDSTRCNT; idx++) {
sprintf(dmaSendStr[idx], "DMA send string (unlinked) #%d\r\n", idx);
dmaTXSend((uint8_t *) dmaSendStr[idx], strlen(dmaSendStr[idx]));
}
/* Wait for UART TX DMA channel to go inactive */
while (1) {
__WFI();
if (countTXDescUsed == 0) {
break;
}
}
/* Receive buffers are queued. The DMA interrupt will only trigger on a
full DMA buffer receive, so if the UART is idle, but the DMA is only
partially complete, the DMA interrupt won't fire. For UART data
receive where data is not continuous, a timeout method will be
required to flush the DMA when the DMA has pending data and no
data has been received on the UART in a specified timeout */
dmaRXQueue();
/* Get RX data via DMA and send it out on TX via DMA */
while (1) {
/* Sleep until something happens */
__WFI();
/* Did any data come in? */
bytes = checkRxData(buff);
if (bytes > 0) {
/* RX data received, send it via TX DMA */
dmaTXSend(buff, bytes);
}
}
return 1;
}
/**
* @brief Main program body
* @return Does not return
*/
int main(void)
{
/* Generic Initialization */
SystemCoreClockUpdate();
/* Board_Init calls Chip_GPIO_Init and enables GPIO clock if needed,
Chip_GPIO_Init is not called again */
Board_Init();
Board_LED_Set(0, false);
Chip_PININT_Init(LPC_PININT);
/* Configure GPIO pin as input */
Chip_GPIO_SetPinDIRInput(LPC_GPIO, GPIO_PININT_PORT, GPIO_PININT_PIN);
/* Configure pin as GPIO */
Chip_IOCON_PinMuxSet(LPC_IOCON, GPIO_PININT_PORT, GPIO_PININT_PIN,
(IOCON_FUNC0 | IOCON_DIGITAL_EN | IOCON_GPIO_MODE));
/* Configure pin interrupt selection for the GPIO pin in Input Mux Block */
Chip_INMUX_PinIntSel(GPIO_PININT_INDEX, GPIO_PININT_PORT, GPIO_PININT_PIN);
/* Configure channel interrupt as edge sensitive and falling edge interrupt */
Chip_PININT_ClearIntStatus(LPC_PININT, PININTCH(GPIO_PININT_INDEX));
Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(GPIO_PININT_INDEX));
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(GPIO_PININT_INDEX));
/* Enable interrupt in the NVIC */
NVIC_EnableIRQ(PININT_NVIC_NAME);
/* Enable wakeup for PININT0 */
Chip_SYSCON_EnableWakeup(SYSCON_STARTER_PINT0);
/* save the clock source, power down the PLL */
saved_clksrc = Chip_Clock_GetMainClockSource();
/* Go to sleep mode - LED will toggle on each wakeup event */
while (1) {
/* Go to sleep state - will wake up automatically on interrupt */
/* Disable PLL, if previously enabled, prior to sleep */
if (saved_clksrc == SYSCON_MAINCLKSRC_PLLOUT) {
Chip_Clock_SetMainClockSource(SYSCON_MAINCLKSRC_IRC);
Chip_SYSCON_PowerDown(SYSCON_PDRUNCFG_PD_SYS_PLL);
}
/* Lower system voltages to current lock (likely IRC) */
Chip_POWER_SetVoltage(POWER_LOW_POWER_MODE, Chip_Clock_GetMainClockRate());
/* Go to sleep leaving SRAM powered during sleep. Use lower
voltage during sleep. */
Chip_POWER_EnterPowerMode(PDOWNMODE,
(SYSCON_PDRUNCFG_PD_SRAM0A | SYSCON_PDRUNCFG_PD_SRAM0B));
/* On wakeup, restore PLL power if needed */
if (saved_clksrc == SYSCON_MAINCLKSRC_PLLOUT) {
Chip_SYSCON_PowerUp(SYSCON_PDRUNCFG_PD_SYS_PLL);
/* Wait for PLL lock */
while (!Chip_Clock_IsSystemPLLLocked()) {}
Chip_POWER_SetVoltage(POWER_LOW_POWER_MODE, Chip_Clock_GetSystemPLLOutClockRate(false));
/* Use PLL for system clock */
Chip_Clock_SetMainClockSource(SYSCON_MAINCLKSRC_PLLOUT);
}
}
return 0;
}
/* Get current clock rate for LPC_I2C peripheral */
uint32_t Chip_I2C_GetClockRate(I2C_ID_T id)
{
return Chip_Clock_GetMainClockRate() / IP_I2C_GetClockDiv(i2c[id].ip);
}
/* Set up clock rate for LPC_I2C peripheral */
void Chip_I2C_SetClockRate(I2C_ID_T id, uint32_t clockrate)
{
IP_I2C_SetClockRate(i2c[id].ip, (Chip_Clock_GetMainClockRate() / clockrate));
}
/* Return system clock rate */
uint32_t Chip_Clock_GetSystemClockRate(void)
{
/* No point in checking for divide by 0 */
return Chip_Clock_GetMainClockRate() / ((LPC_SYSCON->AHBCLKDIV & 0xFF) + 1);
}
/**
* @brief Main UART program body
* @return Always returns 1
*/
int main(void)
{
uint8_t key;
int bytes;
SystemCoreClockUpdate();
Board_Init();
Init_UART_PinMux();
Board_LED_Set(0, false);
/* Before setting up the UART, the global UART clock for USARTS 1-4
must first be setup. This requires setting the UART divider and
the UART base clock rate to 16x the maximum UART rate for all
UARTs. */
#if defined(USE_INTEGER_CLOCK)
/* Use main clock rate as base for UART baud rate divider */
Chip_Clock_SetUARTBaseClockRate(Chip_Clock_GetMainClockRate(), false);
#else
/* Use 128x expected UART baud rate for fractional baud mode. */
Chip_Clock_SetUARTBaseClockRate((115200 * 128), true);
#endif
/* Setup UART */
Chip_UART_Init(LPC_USART);
Chip_UART_ConfigData(LPC_USART, UART_CFG_DATALEN_8 | UART_CFG_PARITY_NONE | UART_CFG_STOPLEN_1);
Chip_UART_SetBaud(LPC_USART, UART_TEST_DEFAULT_BAUDRATE);
/* Optional for low clock rates only: Chip_UART_SetBaudWithRTC32K(LPC_USART, 300); */
Chip_UART_Enable(LPC_USART);
Chip_UART_TXEnable(LPC_USART);
/* Before using the ring buffers, initialize them using the ring
buffer init function */
RingBuffer_Init(&rxring, rxbuff, 1, UART_RB_SIZE);
RingBuffer_Init(&txring, txbuff, 1, UART_RB_SIZE);
/* Enable receive data and line status interrupt */
Chip_UART_IntEnable(LPC_USART, UART_INTEN_RXRDY);
Chip_UART_IntDisable(LPC_USART, UART_INTEN_TXRDY); /* May not be needed */
/* Enable UART interrupt */
NVIC_EnableIRQ(LPC_IRQNUM);
/* Initial message sent using blocking method to prevent ring
buffer overflow */
Chip_UART_SendBlocking(LPC_USART, inst1, sizeof(inst1) - 1);
Chip_UART_SendRB(LPC_USART, &txring, inst2, sizeof(inst2) - 1);
/* Poll the receive ring buffer for the ESC (ASCII 27) key */
key = 0;
while (key != 27) {
bytes = Chip_UART_ReadRB(LPC_USART, &rxring, &key, 1);
if (bytes > 0) {
/* Wrap value back around */
if (Chip_UART_SendRB(LPC_USART, &txring, (const uint8_t *) &key, 1) != 1) {
Board_LED_Toggle(0);/* Toggle LED if the TX FIFO is full */
}
}
}
/* DeInitialize UART peripheral */
NVIC_DisableIRQ(LPC_IRQNUM);
Chip_UART_DeInit(LPC_USART);
return 1;
}
