Beispiel #1
0
static uint32_t mcu_calc_timing(struct timing_mcu *timing)
{
	uint32_t  clk_rate;
	uint32_t  rcss, rlpw, rhpw, wcss, wlpw, whpw;
	struct clk * clk = NULL;

	if(NULL == timing){
		printk(KERN_ERR "autotst_dispc: [%s]: Invalid Param\n", __FUNCTION__);
		return 0;
	}

	clk = clk_get(NULL,"clk_dispc_dbi");
	if (IS_ERR(clk)) {
		printk(KERN_WARNING "autotst_dispc: get clk_dispc_dbi fail!\n");
	} else {
		pr_debug(KERN_INFO "autotst_dispc: get clk_dispc_dbi ok!\n");
	}
//	clk_rate = clk_get_rate(clk) / 1000000;
	clk_rate = 250;	// dummy 250M Hz

	pr_debug(KERN_INFO "autotst_dispc: [%s] clk_rate: 0x%x\n", __FUNCTION__, clk_rate);

	/********************************************************
	* we assume : t = ? ns, dispc_dbi = ? MHz   so
	*      1ns need cycle  :  dispc_dbi /1000
	*      tns need cycles :  t * dispc_dbi / 1000
	*
	********************************************************/
#define MAX_DBI_RWCSS_TIMING_VALUE	15
#define MAX_DBI_RWLPW_TIMING_VALUE	63
#define MAX_DBI_RWHPW_TIMING_VALUE	63
#define DBI_CYCLES(ns) (( (ns) * clk_rate + 1000 - 1)/ 1000)

	/* ceiling*/
	rcss = DBI_CYCLES(timing->rcss);
	if (rcss > MAX_DBI_RWCSS_TIMING_VALUE) {
		rcss = MAX_DBI_RWCSS_TIMING_VALUE ;
	}

	rlpw = DBI_CYCLES(timing->rlpw);
	if (rlpw > MAX_DBI_RWLPW_TIMING_VALUE) {
		rlpw = MAX_DBI_RWLPW_TIMING_VALUE ;
	}

	rhpw = DBI_CYCLES (timing->rhpw);
	if (rhpw > MAX_DBI_RWHPW_TIMING_VALUE) {
		rhpw = MAX_DBI_RWHPW_TIMING_VALUE ;
	}

	wcss = DBI_CYCLES(timing->wcss);
	if (wcss > MAX_DBI_RWCSS_TIMING_VALUE) {
		wcss = MAX_DBI_RWCSS_TIMING_VALUE ;
	}

	wlpw = DBI_CYCLES(timing->wlpw);
	if (wlpw > MAX_DBI_RWLPW_TIMING_VALUE) {
		wlpw = MAX_DBI_RWLPW_TIMING_VALUE ;
	}

#ifndef CONFIG_LCD_CS_ALWAYS_LOW
	 /* dispc/lcdc will waste one cycle because CS pulse will use one cycle*/
	whpw = DBI_CYCLES (timing->whpw) - 1;
#else
	whpw = DBI_CYCLES (timing->whpw) ;
#endif
	if (whpw > MAX_DBI_RWHPW_TIMING_VALUE) {
		whpw = MAX_DBI_RWHPW_TIMING_VALUE ;
	}

	return (whpw | (wlpw << 6) | (wcss << 12)
			| (rhpw << 16) |(rlpw << 22) | (rcss << 28));
}
Beispiel #2
0
static uint32_t mcu_calc_timing(struct timing_mcu *timing, uint16_t dev_id)
#endif
{
	uint32_t  clk_rate;
	uint32_t  rcss, rlpw, rhpw, wcss, wlpw, whpw;
	struct clk * clk = NULL;

	if(NULL == timing){
		printk(KERN_ERR "sprdfb: [%s]: Invalid Param\n", __FUNCTION__);
		return 0;
	}

#ifdef CONFIG_OF
	if(SPRDFB_MAINLCD_ID == dev->dev_id){
		clk = of_clk_get_by_name(dev->of_dev->of_node,"dispc_dbi_clk");
#else
	if(SPRDFB_MAINLCD_ID == dev_id){
		clk = clk_get(NULL,"clk_dispc_dbi");
#endif
		if (IS_ERR(clk)) {
			printk(KERN_WARNING "sprdfb: get clk_dispc_dbi fail!\n");
		} else {
			pr_debug(KERN_INFO "sprdfb: get clk_dispc_dbi ok!\n");
		}
	}
//	clk_rate = clk_get_rate(clk) / 1000000;
	clk_rate = 250;	// dummy 250M Hz

#ifdef CONFIG_OF
	pr_debug(KERN_INFO "sprdfb: [%s] clk_rate: 0x%x, dev_id = %d\n", __FUNCTION__, clk_rate, dev->dev_id);
#else
	pr_debug(KERN_INFO "sprdfb: [%s] clk_rate: 0x%x, dev_id = %d\n", __FUNCTION__, clk_rate, dev_id);
#endif
	/********************************************************
	* we assume : t = ? ns, dispc_dbi = ? MHz   so
	*      1ns need cycle  :  dispc_dbi /1000
	*      tns need cycles :  t * dispc_dbi / 1000
	*
	********************************************************/
#define MAX_DBI_RWCSS_TIMING_VALUE	15
#define MAX_DBI_RWLPW_TIMING_VALUE	63
#define MAX_DBI_RWHPW_TIMING_VALUE	63
#define DBI_CYCLES(ns) (( (ns) * clk_rate + 1000 - 1)/ 1000)

	/* ceiling*/
	rcss = DBI_CYCLES(timing->rcss);
	if (rcss > MAX_DBI_RWCSS_TIMING_VALUE) {
		rcss = MAX_DBI_RWCSS_TIMING_VALUE ;
	}

	rlpw = DBI_CYCLES(timing->rlpw);
	if (rlpw > MAX_DBI_RWLPW_TIMING_VALUE) {
		rlpw = MAX_DBI_RWLPW_TIMING_VALUE ;
	}

	rhpw = DBI_CYCLES (timing->rhpw);
	if (rhpw > MAX_DBI_RWHPW_TIMING_VALUE) {
		rhpw = MAX_DBI_RWHPW_TIMING_VALUE ;
	}

	wcss = DBI_CYCLES(timing->wcss);
	if (wcss > MAX_DBI_RWCSS_TIMING_VALUE) {
		wcss = MAX_DBI_RWCSS_TIMING_VALUE ;
	}

	wlpw = DBI_CYCLES(timing->wlpw);
	if (wlpw > MAX_DBI_RWLPW_TIMING_VALUE) {
		wlpw = MAX_DBI_RWLPW_TIMING_VALUE ;
	}

#ifndef CONFIG_LCD_CS_ALWAYS_LOW
	 /* dispc/lcdc will waste one cycle because CS pulse will use one cycle*/
	whpw = DBI_CYCLES (timing->whpw) - 1;
#else
	whpw = DBI_CYCLES (timing->whpw) ;
#endif
	if (whpw > MAX_DBI_RWHPW_TIMING_VALUE) {
		whpw = MAX_DBI_RWHPW_TIMING_VALUE ;
	}

	return (whpw | (wlpw << 6) | (wcss << 12)
			| (rhpw << 16) |(rlpw << 22) | (rcss << 28));
}

static uint32_t mcu_readid(struct panel_spec *self)
{
	uint32_t id = 0;

	/* default id reg is 0 */
	self->info.mcu->ops->send_cmd(0x0);

	if(self->info.mcu->bus_width == 8) {
		id = (self->info.mcu->ops->read_data()) & 0xff;
		id <<= 8;
		id |= (self->info.mcu->ops->read_data()) & 0xff;
	} else {
		id = self->info.mcu->ops->read_data();
	}

	return id;
}